High power output system protection device and method

Abstract

The invention relates to a high-power output system protection device and method. Relates to the field of electronic circuits, and solves the problems of poor protection effect and tedious operation of an overcurrent protection circuit scheme. The device comprises a driving circuit, a load circuit, a sampling circuit, a switching circuit, a current-limiting starting circuit and an overcurrent protection circuit, the driving circuit is connected to the load circuit and the current-limiting starting circuit and outputs a driving signal; the sampling circuit samples the load circuit to obtain a sampling voltage signal and outputs the sampling voltage signal to the switching circuit; the switching circuit receives the driving signal and the sampling voltage signal output by the sampling circuit, and outputs the sampling voltage signal to the current-limiting starting circuit so as to switch on or switch off the current-limiting starting circuit. And outputting the sampling voltage signal and the delay capacitor voltage signal to the over-current protection circuit so as to switch on or switch off the over-current protection circuit. The technical scheme provided by the invention is suitable for a high-power output system.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic circuits, and in particular to a high-power output system protection device and method. Background Art

[0002] With the continuous development of the electric vehicle industry, the requirements for vehicle control systems are also increasing. When the high-power output circuit of the vehicle controller is abnormal, it may cause damage to the high-power output circuit or load, causing a vehicle accident.

[0003] By setting up a protection circuit, the load circuit can be protected when an abnormality occurs. Figure 1 As shown, a sampling circuit is set to sample the current and / or voltage of the load switch circuit, and the sampling result is input into the overcurrent protection circuit. The overcurrent protection circuit determines whether an abnormality occurs according to the sampling result, and starts protection based on the determination result. In order to protect the output circuit and the load, the overcurrent protection circuit will quickly cut off the output circuit when an abnormality such as overcurrent occurs; when the overcurrent is relieved, the output circuit is automatically restored.

[0004] During the process of the protection circuit cutting off and automatically restoring the output circuit, devices such as MOS tubes and insulated gate bipolar transistors (IGBTs) in the load will continue to operate in the non-cutoff and non-conducting amplification areas, accelerating the aging and damage of the devices.

[0005] In addition, when the load is capacitive or the startup current peak is large, the protection circuit cannot protect against the current peak at the moment of power-on. And the circuit protection function cannot be reset and released in the energized state, and the entire control system needs to be powered off.

[0006] In summary, the protection circuit solution for overcurrent has poor protection effect and cumbersome operation. Summary of the invention

[0007] In order to overcome the problems existing in the related art, the present disclosure provides a high-power output system protection device and method. Different protection schemes are adopted for different working states, which realizes reliable and efficient high-power output circuit protection and solves the problems of poor protection effect and cumbersome operation of the protection circuit scheme for overcurrent.

[0008] According to a first aspect of an embodiment of the present disclosure, there is provided a high power output system protection device, comprising a drive circuit and a load circuit, and further comprising a sampling circuit, a switching circuit, a current limiting start circuit, and an overcurrent protection circuit; The driving circuit is connected to the load circuit and the current limiting starting circuit to output a driving signal; The sampling circuit samples the load circuit to obtain a sampling voltage signal, and outputs the sampling voltage signal to the switching circuit; The switching circuit receives the driving signal and the sampling voltage signal output by the sampling circuit, outputs the sampling voltage signal to the current limiting startup circuit to turn on or off the current limiting startup circuit, and outputs the sampling voltage signal and the delay capacitor voltage signal to the overcurrent protection circuit to turn on or off the overcurrent protection circuit; The current limiting startup circuit receives the sampling voltage signal and the driving signal, and turns on or off the load circuit; The overcurrent protection circuit is used to receive the sampling signal and the delay capacitor voltage signal, output a protection signal to the drive circuit, and turn on or off the drive circuit's output of the drive signal.

[0009] Further, the sampling circuit includes a first sampling resistor and a second sampling resistor; One end of the first sampling resistor is grounded, and the other end is connected to the output end of the load circuit; One end of the second sampling resistor is connected to the output end of the load circuit, and the other end is connected to the switching circuit to output the sampling voltage signal to the switching circuit.

[0010] Further, the switching circuit includes an analog-to-digital (AD) switching chip, a delay capacitor, a capacitor protection resistor, a first diode of the switching circuit, and a second diode of the switching circuit; The cathode of the first diode of the switching circuit is connected to the driving signal, and the anode is connected to the capacitor protection resistor; One end of the capacitor protection resistor is connected to the positive electrode of the first diode of the switching circuit, and the other end is connected to the delay capacitor, the AD switching chip and the negative electrode of the second diode; One end of the delay capacitor is connected to the capacitor protection resistor, the AD switching chip and the cathode of the second diode, and the other end is grounded; The cathode of the first diode is connected to the driving signal, and the anode is connected to the capacitor protection resistor; The cathode of the second diode is connected to the capacitor protection resistor and the delay capacitor, and the anode is connected to the overcurrent protection circuit; The AD switching chip comprises a voltage input terminal, a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal, the voltage input terminal is connected to the protection circuit power supply, the first input terminal and the second input terminal are connected to the output of the circuit sampling circuit, the third input terminal and the fourth input terminal are connected to the delay capacitor and the capacitor protection resistor, the first output terminal is connected to the current limiting startup circuit, and the second output terminal is connected to the overcurrent protection circuit; When the voltage of the delay capacitor does not reach the switching level of the AD switching chip, the AD switching chip switches on the first input terminal and the current limiting startup circuit, and outputs the sampling voltage signal to the current limiting startup circuit. When the voltage of the delay capacitor reaches the switching level, the second input terminal and the overcurrent protection circuit are turned on, and the sampling voltage signal is output to the overcurrent protection circuit; When the voltage of the delay capacitor reaches the clamping voltage of the second diode of the switching circuit, the AD switching chip outputs a delay capacitor voltage signal to the overcurrent protection circuit through the second diode.

[0011] Further, the current limiting starting circuit includes a current limiting transistor; The base of the current limiting transistor is connected to the switching circuit to receive the sampling voltage signal output by the switching circuit, the emitter is grounded, and the collector is connected to the output of the driving circuit to receive the driving signal; The current limiting transistor is turned on after the base receives the sampling voltage signal, and cuts off the transmission of the driving signal to the load circuit.

[0012] Further, the overcurrent protection circuit includes a first voltage-dividing resistor, a second voltage-dividing resistor, a pull-down resistor, a pull-up resistor, a comparator, a first NAND gate, and a second NAND gate; One end of the first voltage-dividing resistor is connected to the protection circuit power supply, and the other end is connected to the second voltage-dividing resistor and the non-inverting input end of the comparator; One end of the second voltage-dividing resistor is connected to the first voltage-dividing resistor and the non-inverting input end of the comparator, and the other end is grounded; The comparator has a non-inverting input terminal connected to the first voltage-dividing resistor and the second voltage-dividing resistor, an inverting input terminal receiving a sampling voltage signal output by the switching circuit, and an output terminal connected to the pull-up resistor and pin 1 of the second NAND gate; One end of the pull-up resistor is connected to the protection circuit power supply, and the other end is connected to pin 1 of the second NAND gate and the output end of the comparator; One end of the pull-down resistor is connected to pin 1 of the first NAND gate and the switching circuit; Pin No. 1 of the first NAND gate is connected to the pull-down resistor and the switching circuit, and pin No. 2 is connected to the driving circuit. The delay capacitor voltage signal output by the switching circuit is received through pin No. 1.

[0013] Further, the driving circuit includes a push-pull circuit, an AND gate and a NOT gate; Pin 1 of the AND gate is connected to the driving signal, and pin 2 is connected to the output end of the NOT gate, and the output end is connected to the input of the push-pull circuit; The input end of the NOT gate is connected to the output of the overcurrent protection circuit, and the output end of the NOT gate is connected to the No. 2 pin of the AND gate; The input end of the push-pull circuit is connected to the output end of the AND gate, and the output end of the push-pull circuit is connected to the current limiting startup circuit, and the driving signal is output to the current limiting startup circuit.

[0014] Further, the push-pull circuit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first triode, a second triode, a third triode and a fourth triode; The base of the first transistor is connected to the output terminal of the AND gate and the sixth resistor, the collector is connected to the third resistor, and the emitter is grounded; The base of the second transistor is connected to the third resistor and the first resistor, the emitter is connected to the second resistor, and the collector is connected to the base of the third transistor, the base of the fourth transistor and the fourth resistor; The base of the third transistor is connected to the collector of the second transistor and the fourth resistor, the collector is connected to the driving circuit power supply, and the emitter is connected to the fifth resistor; The base of the fourth transistor is connected to the collector of the second transistor and the fourth resistor, the collector is grounded, and the emitter is connected to the fifth resistor; One end of the first resistor is connected to the driving circuit power supply, and the other end is connected to the third resistor and the base of the second transistor; One end of the second resistor is connected to the driving circuit power supply, and the other end is connected to the emitter of the second transistor; One end of the fifth resistor is connected to the emitter of the third transistor and the collector of the fourth transistor, and the other end is connected to the current limiting starting circuit to output the driving signal to the current limiting starting circuit; One end of the sixth resistor is connected to the base of the first transistor and the output end of the AND gate, and the other end is grounded.

[0015] According to a second aspect of an embodiment of the present disclosure, a high power output system protection method is provided, using the above-mentioned high power output system protection device, the method comprising: Detect the working current of the load circuit; When the working current is detected to be abnormal during the startup phase, stopping the loading of the driving signal to the load circuit; When the working current is detected to be abnormal during the operation phase, the output of the driving signal by the driving circuit is interrupted.

[0016] Furthermore, the step of interrupting the output of the driving signal by the driving circuit includes: By latching the high level output state of the second NAND gate in the overcurrent protection circuit, the output of the driving signal by the driving circuit is interrupted.

[0017] Furthermore, the startup phase is a phase in which the voltage value of the delay capacitor of the switching circuit does not reach the switching level value of the AD switching chip after the high-power output system protection device is powered on. The operation stage is the stage after the voltage value of the delay capacitor reaches the switching level value of the AD switching chip. After the step of interrupting the output of the driving signal by the driving circuit when the working current is detected to be abnormal during the operation phase, the method further includes: In response to an instruction from the control platform, the input of the driving signal to the switching circuit is turned off to discharge the delay capacitor of the switching circuit.

[0018] The technical solution provided by the embodiment of the present disclosure may include the following beneficial effects: the driving circuit is connected to the load circuit and the current limiting startup circuit, and outputs the driving signal; the sampling circuit samples the load circuit to obtain a sampling voltage signal, and outputs it to the switching circuit; the switching circuit receives the driving signal and the sampling voltage signal output by the sampling circuit, outputs the sampling voltage signal to the current limiting startup circuit to turn on or off the current limiting startup circuit, and outputs the sampling voltage signal and the delay capacitor voltage signal to the overcurrent protection circuit to turn on or off the overcurrent protection circuit; the current limiting startup circuit receives the sampling voltage signal and the driving signal, turns on or off the load circuit; the overcurrent protection circuit is used to receive the sampling signal and the delay capacitor voltage signal, output a protection signal to the driving circuit, and turns on or off the output of the driving signal by the driving circuit. According to different working states, the high-power output circuit is protected by using the current limiting startup circuit or the overcurrent protection circuit, which can better protect the high-power output circuit and the load, solve the problem of poor protection effect and cumbersome operation of the protection circuit scheme for overcurrent, and realize reliable and efficient high-power output circuit protection.

[0019] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0021] Figure 1 is a schematic diagram of a circuit protection scheme.

[0022] Figure 2 is a schematic diagram showing a high power output system protection device according to an exemplary embodiment.

[0023] Figure 3 is a schematic diagram showing yet another high power output system protection device according to an exemplary embodiment.

[0024] Figure 4 The figure is a flow chart showing a high power output system protection method according to an exemplary embodiment. DETAILED DESCRIPTION

[0025] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0026] In such Figure 1 In the output circuit protection scheme shown, the protection circuit cuts off the drive signal after an overcurrent occurs in the output circuit. As the drive signal disappears, the overcurrent of the MOS tube or IGBT in the load switch circuit is released; after the protection is released and the drive signal is restored, the MOS tube or IGBT overcurrent occurs again. This process causes the MOS tube or IGBT to work in the middle area between non-cutoff and non-conduction. The cyclic occurrence of this working state can easily damage the MOS tube or IGBT.

[0027] In addition, when the load is capacitive or the startup current peak is large, the protection circuit cannot protect against the current peak at the moment of power-on. And the circuit protection function cannot be reset and released in the energized state, and the entire control system needs to be powered off.

[0028] In order to solve the above problems, the present disclosure provides a high-power output system protection device and method. By protecting overcurrent under different working conditions, a simple and efficient high-power output circuit protection solution is realized, solving the problem of poor protection effect and complicated operation of overcurrent protection circuit solutions.

[0029] An exemplary embodiment of the present disclosure provides a high power output system protection device, through which different circuit modules are used to protect against abnormal conditions such as overcurrent during the startup phase and the operation phase. The embodiments of the present disclosure are described in detail below in conjunction with the accompanying drawings.

[0030] like Figure 2 As shown, it is a structural schematic diagram of a high-power output system protection device provided in an embodiment of the present disclosure, and the device includes a drive circuit 201 and a load circuit 202, and also includes a sampling circuit 203, a switching circuit 204, a current limiting start circuit 205, and an overcurrent protection circuit 206.

[0031] The driving circuit 201 is connected to the load circuit 202 and the current limiting startup circuit 205 to output a driving signal.

[0032] The sampling circuit 203 samples the load circuit 202 to obtain a sampling voltage signal, and outputs the sampling voltage signal to the switching circuit 204 .

[0033] The switching circuit 204 receives the driving signal and the sampling voltage signal output by the sampling circuit 203, outputs the sampling voltage signal to the current limiting start-up circuit 205 to turn on or off the current limiting start-up circuit 205, and outputs the sampling voltage signal and the delay capacitor voltage signal to the overcurrent protection circuit 206 to turn on or off the overcurrent protection circuit 206.

[0034] The current limiting startup circuit 205 receives the sampled voltage signal and the driving signal, and turns on or off the load circuit 202 .

[0035] The overcurrent protection circuit 206 is used to receive the sampling signal and the delay capacitor voltage signal, output a protection signal to the drive circuit 201, and turn on or off the drive circuit 201 to output the drive signal.

[0036] An exemplary embodiment of the present disclosure also provides a high power output system protection device, such as Figure 3 shown.

[0037] The load circuit 202 includes a load switch Q1, a load and a protection diode D1. D1 is reversely connected in parallel with the load, one end of which is connected to the working power supply VDD, and the other end is connected to Q1 (when Q1 is a MOS tube, it is connected to the drain of Q1). The output of the drive circuit 201 is connected to the gate of Q1, and a drive signal is output to Q1.

[0038] The sampling circuit 203 includes a first sampling resistor R7 and a second sampling resistor R8 . R8 can be used as a current limiting resistor to protect the switching circuit 204 .

[0039] One end of R7 is grounded, and the other end is connected to the output end of the load circuit 202. Specifically, it is connected to Q1 (when Q1 is a MOS transistor, it is connected to the source of Q1).

[0040] One end of R8 is connected to the output end of the load circuit 202 , and the other end of R8 is connected to the switching circuit 204 to output the sampling voltage signal to the switching circuit 204 .

[0041] The switching circuit 204 includes an AD switching chip U1, a delay capacitor C1, a capacitor protection resistor R3, a first switching circuit diode D2 and a second switching circuit diode D3.

[0042] One end of R3 is connected to the positive terminal of D2, and the other end is connected to the negative terminals of C1, U1 and D3.

[0043] One end of C1 is connected to the negative terminals of R3, U1 and D3, and the other end is grounded.

[0044] The cathode of D2 is connected to the driving signal, and the anode is connected to R3.

[0045] The cathode of D3 is connected to R3 and C1 , and the anode of D3 is connected to the overcurrent protection circuit 206 .

[0046] U1 includes a voltage input terminal, a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal, and a second output terminal. Specifically, pin 1 of U1 corresponds to the first input terminal, pin 2 corresponds to the second input terminal, pin 3 corresponds to the third input terminal, and pin 4 corresponds to the fourth input terminal.

[0047] The voltage input terminal is connected to the protection circuit power supply VCC2, and the first input terminal and the second input terminal are connected to the output of the circuit sampling circuit 203. Specifically, pins 1 and 2 of U1 are connected to R8.

[0048] The third input terminal and the fourth input terminal are connected to C1, D3 and R3. Specifically, pins 3 and 4 of U1 are connected to the negative electrodes of C1, R3 and D3.

[0049] The first output terminal is connected to the current limiting startup circuit 205 , and the second output terminal is connected to the overcurrent protection circuit 206 .

[0050] When the voltage of C1 does not reach the switching level of U1 , U1 turns on the first input terminal and the current limiting startup circuit 205 , and outputs the sampled voltage signal to the current limiting startup circuit 205 .

[0051] When the voltage of C1 reaches the switching level, the second input terminal and the overcurrent protection circuit 206 are turned on, and the sampled voltage signal is output to the overcurrent protection circuit 206 .

[0052] When the voltage of C1 reaches the clamping voltage of D3 , U1 outputs the voltage signal of C1 to the overcurrent protection circuit 206 through D3 .

[0053] D2 and D3 can be transient voltage suppressor diodes (TVS).

[0054] The current limiting startup circuit 205 includes a current limiting transistor Q3.

[0055] The base of Q3 is connected to the switching circuit 204 to receive the sampling voltage signal output by the switching circuit 204, the emitter is grounded, and the collector is connected to the output of the driving circuit 201 to receive the driving signal. Specifically, the base of Q3 is connected to the first output terminal of U1, and the collector is connected to R5.

[0056] Q3 is turned on after the base receives the sampling voltage signal, and cuts off the transmission of the driving signal to the load circuit 202 .

[0057] The overcurrent protection circuit 206 includes a first voltage-dividing resistor R9, a second voltage-dividing resistor R10, a pull-down resistor R11, a pull-up resistor R12, a comparator U2, a first NAND gate U3A, and a second NAND gate U3B.

[0058] One end of R9 is connected to the protection circuit power supply, and the other end is connected to R10 and the non-inverting input of U2.

[0059] One end of R10 is connected to R9 and the non-inverting input of U2, and the other end is grounded.

[0060] The non-inverting input terminal of U2 is connected to R9 and R10, the inverting input terminal receives the sampling voltage signal output by the switching circuit, and the output terminal is connected to R12 and pin 1 of U3B.

[0061] One end of R12 is connected to the protection circuit power supply, and the other end is connected to pin 1 of U3B and the output end of U2; One end of the R11 is connected to pin 1 of the U3A and the switching circuit; Pin 1 of the U3A is connected to R11 and the switching circuit, and pin 2 is connected to the driving circuit. The delay capacitor voltage signal output by the switching circuit is received via pin 1.

[0062] The driving circuit 201 includes a push-pull circuit, an AND gate U4 and a NOT gate U5.

[0063] Pin 1 of U4 is connected to the driving signal, and pin 2 is connected to the output end of U5, and the output end is connected to the input of the push-pull circuit.

[0064] The input end of U5 is connected to the output of the overcurrent protection circuit 206, and the output end of U5 is connected to pin 2 of U4.

[0065] The input end of the push-pull circuit is connected to the output end of U4 , and the output end of the push-pull circuit is connected to the current limiting starting circuit 205 , outputting the driving signal to the current limiting starting circuit 205 .

[0066] The push-pull circuit includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first triode Q2A, a second triode Q2B, a third triode Q3A and a fourth triode Q3B.

[0067] Q2A has its base connected to the output of U4 and R6, its collector connected to R3, and its emitter connected to ground.

[0068] The base of Q2B is connected to R3 and R1, the emitter is connected to R2, and the collector is connected to the base of Q3A, the base of Q3B, and R4.

[0069] The base of Q3A is connected to the collector of Q2B and R4, the collector is connected to the drive circuit power supply VCC1, and the emitter is connected to R5.

[0070] The base of Q3B is connected to the collector of Q2B and R4, the collector is grounded, and the emitter is connected to R5.

[0071] One end of R1 is connected to VCC1, and the other end is connected to R3 and the base of Q2B.

[0072] One end of R2 is connected to VCC1, and the other end is connected to the emitter of Q2B.

[0073] One end of R5 is connected to the emitter of Q3A and the collector of Q3B, and the other end is connected to the current limiting startup circuit 205 to output the driving signal to the current limiting startup circuit 205. Specifically, R5 is connected to the collector of Q3.

[0074] One end of R6 is connected to the emitter of Q2A and the output of U4, and the other end is grounded.

[0075] An exemplary embodiment of the present disclosure also provides a high power output system protection method, using the high power output system protection device provided by the embodiment of the present invention to protect the circuits, loads, etc. of the high power output system. Figure 4 As shown, including: Step 401: Detect the operating current of the load circuit.

[0076] In this step, the high-power output system is powered on, and a driving signal is sent to the driving circuit through the control platform. According to one method, the driving signal can be sent to the driving circuit through the MCU. After conversion and push-pull, the driving signal is sent to the MOS tube Q1 through the driving resistor R5. When the driving signal is at a high level, Q1 is turned on and the load is powered on; when the driving signal is at a low level, Q1 is turned off.

[0077] The sampling circuit detects the working current / voltage of the load, and inputs the collected sampling voltage signal to the first input terminal of U1 through R7 and R8.

[0078] Step 402: When the operating current is detected to be abnormal during the startup phase, stop loading the driving signal to the load circuit.

[0079] In this step, the startup phase is the phase when the voltage value of the delay capacitor of the switching circuit has not reached the switching level value of the AD switching chip after the high-power output system protection device is powered on; the operation phase is the phase when the voltage value of the delay capacitor reaches the switching level value of the AD switching chip.

[0080] According to one implementation mode, if the starting current in the starting phase is small, the driving circuit continues to output the driving signal normally and the load works normally; if the starting current is large, the first input terminal of U1 inputs the collected sampled voltage signal to Q3, Q3 is turned on, and the driving signal output by R5 is turned on to GND, thereby turning off Q1 and stopping the power supply to the load.

[0081] At the same time, the driving signal will charge C1 through D2 and R13, satisfying the formula t=R13*C1*Ln[E / (E-Vt)], where E=V1-V2; Vt is the real-time voltage value of capacitor C1; when Vt meets the switching level of U1, U1 switches the sampling signal input by R8 to the second input terminal of U1, and inputs it to the overcurrent protection circuit 206.

[0082] Step 403: When the working current is detected to be abnormal during the operation phase, the drive circuit is interrupted from outputting the drive signal.

[0083] In this step, the output of the driving signal by the driving circuit can be interrupted by latching the high level output state of the second NAND gate in the overcurrent protection circuit.

[0084] According to one implementation, when the voltage of C1 exceeds the clamping voltage value of D3, the output to pin 1 of U3A begins, and the level value of pin 1 of U3A is the difference between the voltage of C1 and the voltage of D3, that is, Uc1-Ud3.

[0085] The overcurrent protection circuit 206 collects the sampled voltage signal output by U1 and compares it with the voltage divided by R9 and R10 on VCC2, and outputs a high / low level signal through U2. When the sampled voltage signal output by U1 is less than the voltage divided by R9 and R10 on VCC2, it indicates that there is no overcurrent in the load circuit, and U2 outputs a high level signal.

[0086] Because the No. 1 pin of U3A is connected to the pull-down resistor R11, the initial state of No. 1 pin is low level, and the output signal of U3A is high level. At this time, because U2 also outputs a high level signal, U3B outputs a low level signal, which is inverted by U5 to obtain a high level signal and input to U4. The level signal output by U4 will follow the drive signal to perform high-low conversion and output normally. At the same time, U3B outputs a low level signal. Even if C1 is fully charged and outputs a high level signal to U3A through D3, U3A still outputs a high level signal due to the negation relationship.

[0087] If an overcurrent occurs in the load circuit, the sampling voltage signal increases, U1 outputs a high-level signal (greater than the voltage divider value of R9 and R10 on VCC2), U2 outputs a low-level signal, and U3B outputs a high-level signal. At this time, because C1 has been fully charged, a constant high-level signal is input to U3A through D3, so U3A outputs a low-level signal, and U3B outputs a high-level signal and latches the state. U5 outputs a low-level signal, and U4 outputs a normally low-level signal, which pulls down the drive signal, realizes the output shutdown of the drive signal, and then realizes the shutdown of the high-power output system, thereby protecting the circuit and load from overcurrent.

[0088] An exemplary embodiment of the present disclosure also provides a high-power output system protection method, in which when an overcurrent occurs during operation, the output of the drive signal is turned off by the overcurrent protection circuit. After the overcurrent anomaly is resolved, the output of the drive signal can be restored, thereby restoring the power supply to the load.

[0089] Specifically, when the overcurrent anomaly is processed (for example, the cause of the anomaly has been eliminated or the inspection result shows that there is no overcurrent anomaly), in response to the instruction of the control platform, the input of the drive signal to the switching circuit can be turned off to discharge the delay capacitor of the switching circuit.

[0090] According to one implementation, after the overcurrent anomaly is released, the drive signal only needs to be turned off through the MCU, and after C1 is discharged, the signal input to U3A through D3 becomes a low-level signal, and U3A outputs a high-level signal. Since U2 outputs a high-level signal after the overcurrent anomaly is released, the output of U3B becomes a low-level signal, and U5 outputs a high-level signal, and the overcurrent protection is released.

[0091] The embodiment of the present disclosure provides a high-power output system protection device and method, wherein the driving circuit is connected to the load circuit and the current limiting start circuit, and outputs the driving signal; the sampling circuit samples the load circuit to obtain a sampling voltage signal, and outputs it to the switching circuit; the switching circuit receives the driving signal and the sampling voltage signal output by the sampling circuit, outputs the sampling voltage signal to the current limiting start circuit to turn on or off the current limiting start circuit, and outputs the sampling voltage signal and the delay capacitor voltage signal to the overcurrent protection circuit to turn on or off the overcurrent protection circuit; the current limiting start circuit receives the sampling voltage signal and the driving signal, turns on or off the load circuit; the overcurrent protection circuit is used to receive the sampling signal and the delay capacitor voltage signal, output a protection signal to the driving circuit, and turns on or off the output of the driving signal by the driving circuit. According to different working states, the high-power output circuit is protected by using the current limiting start circuit or the overcurrent protection circuit, which can better protect the high-power output circuit and the load, solve the problem of poor protection effect and cumbersome operation of the protection circuit scheme for overcurrent, and realize reliable and efficient high-power output circuit protection.

[0092] Switch between the current limiting startup circuit and the overcurrent protection circuit through a multi-channel analog output chip. First, start the current limiting startup, and charge the delay capacitor synchronously. By controlling the charging time of the delay capacitor, the end time of the current limiting startup can be controlled. When the delay capacitor is fully charged, switch to the overcurrent protection circuit. When an overcurrent occurs, the overcurrent protection circuit inverts and latches the output signal through the signal latch circuit composed of a NAND gate, cuts off the drive signal, and achieves the purpose of overcurrent protection. Check whether there is any abnormality in the load state. If there is no abnormality, reset the operation by turning off the drive signal, and start again after the delay capacitor is discharged.

[0093] The current limiting function at startup is realized to prevent the MOS tube or IGBT from entering the working amplification area during operation. It is compatible with capacitive loads or loads with large startup current peaks. The unlocking operation is performed through the software control protection function.

[0094] The overcurrent protection circuit can effectively realize circuit overcurrent protection and perform latching state operation. The charging principle of the delay capacitor in the switching circuit is used to switch between the startup current limiting function and the overcurrent protection function. The protection state release operation is realized by turning off the drive signal through software, which is convenient and concise.

[0095] Those skilled in the art may also understand that the various illustrative logical blocks and steps listed in the embodiments of the present application may be implemented by electronic hardware, computer software, or a combination of the two. Whether such functions are implemented by hardware or software depends on the specific application and the design requirements of the entire system. Those skilled in the art may use various methods to implement the functions described for each specific application, but such implementation should not be understood as exceeding the scope of protection of the embodiments of the present application.

[0096] In addition, the word "exemplary" is used herein to indicate serving as an example, instance, or diagram. Any aspect or design described as "exemplary" in this article is not necessarily understood to be advantageous compared to other aspects or designs. On the contrary, the use of the word exemplary is intended to present concepts in a specific way. As used herein, the term "or" is intended to represent an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X applies A or B" is intended to represent any one of the natural inclusive arrangements. That is, if X applies A; X applies B; or X applies both A and B, "X applies A or B" is satisfied under any of the aforementioned examples. In addition, unless otherwise specified or clearly pointed to a singular form from the context, the articles "one" and "an" as used in this application and the appended claims are generally understood to mean "one or more".

[0097] Likewise, although the present disclosure has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art after reading and understanding the specification and drawings. The present disclosure includes all such modifications and variations and is limited only by the scope of the claims. In particular, with respect to the various functions performed by the components (e.g., elements, resources, etc.) described above, unless otherwise indicated, the terms used to describe such components are intended to correspond to any component (functionally equivalent) that performs the specific functions of the described components, even if the structure is not equivalent to the disclosed structure. In addition, although specific features of the present disclosure may have been disclosed with respect to only one of several implementations, such features may be combined with one or more other features of other implementations as may be desired and conducive to any given or specific application. In addition, with respect to "including", "having", "having", "having", or variations thereof used in a specific embodiment or claim, such terms are intended to be inclusive in a manner similar to the term "comprising".

[0098] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0099] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A high power output system protection device, comprising a drive circuit and a load circuit, characterized in that: It also includes a sampling circuit, a switching circuit, a current limiting startup circuit, and an overcurrent protection circuit; The driving circuit is connected to the load circuit and the current limiting starting circuit to output a driving signal; The sampling circuit samples the load circuit to obtain a sampling voltage signal, and outputs the sampling voltage signal to the switching circuit; The switching circuit receives the driving signal and the sampling voltage signal output by the sampling circuit, outputs the sampling voltage signal to the current limiting startup circuit to turn on or off the current limiting startup circuit, and outputs the sampling voltage signal and the delay capacitor voltage signal to the overcurrent protection circuit to turn on or off the overcurrent protection circuit; The current limiting startup circuit receives the sampling voltage signal and the driving signal, and turns on or off the load circuit; The overcurrent protection circuit is used to receive the sampling signal and the delay capacitor voltage signal, output a protection signal to the drive circuit, and turn on or off the drive circuit's output of the drive signal.

2. The high power output system protection device according to claim 1, characterized in that: The sampling circuit includes a first sampling resistor and a second sampling resistor; One end of the first sampling resistor is grounded, and the other end is connected to the output end of the load circuit; One end of the second sampling resistor is connected to the output end of the load circuit, and the other end is connected to the switching circuit to output the sampling voltage signal to the switching circuit.

3. The high power output system protection device according to claim 1, characterized in that: The switching circuit includes an analog-to-digital AD switching chip, a delay capacitor, a capacitor protection resistor, a first switching circuit diode and a second switching circuit diode; The cathode of the first diode of the switching circuit is connected to the driving signal, and the anode is connected to the capacitor protection resistor; One end of the capacitor protection resistor is connected to the positive electrode of the first diode of the switching circuit, and the other end is connected to the delay capacitor, the AD switching chip and the negative electrode of the second diode; One end of the delay capacitor is connected to the capacitor protection resistor, the AD switching chip and the cathode of the second diode, and the other end is grounded; The cathode of the first diode is connected to the driving signal, and the anode is connected to the capacitor protection resistor; The cathode of the second diode is connected to the capacitor protection resistor and the delay capacitor, and the anode is connected to the overcurrent protection circuit; The AD switching chip comprises a voltage input terminal, a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal and a second output terminal, the voltage input terminal is connected to the protection circuit power supply, the first input terminal and the second input terminal are connected to the output of the circuit sampling circuit, the third input terminal and the fourth input terminal are connected to the delay capacitor and the capacitor protection resistor, the first output terminal is connected to the current limiting startup circuit, and the second output terminal is connected to the overcurrent protection circuit; When the voltage of the delay capacitor does not reach the switching level of the AD switching chip, the AD switching chip switches on the first input terminal and the current limiting startup circuit, and outputs the sampling voltage signal to the current limiting startup circuit. When the voltage of the delay capacitor reaches the switching level, the second input terminal and the overcurrent protection circuit are turned on, and the sampling voltage signal is output to the overcurrent protection circuit; When the voltage of the delay capacitor reaches the clamping voltage of the second diode of the switching circuit, the AD switching chip outputs a delay capacitor voltage signal to the overcurrent protection circuit through the second diode.

4. The high power output system protection device according to claim 1, characterized in that: The current limiting starting circuit includes a current limiting transistor; The base of the current limiting transistor is connected to the switching circuit to receive the sampling voltage signal output by the switching circuit, the emitter is grounded, and the collector is connected to the output of the driving circuit to receive the driving signal; The current limiting transistor is turned on after the base receives the sampling voltage signal, and cuts off the transmission of the driving signal to the load circuit.

5. The high power output system protection device according to claim 1, characterized in that: The overcurrent protection circuit includes a first voltage-dividing resistor, a second voltage-dividing resistor, a pull-down resistor, a pull-up resistor, a comparator, a first NAND gate, and a second NAND gate; One end of the first voltage-dividing resistor is connected to the protection circuit power supply, and the other end is connected to the second voltage-dividing resistor and the non-inverting input end of the comparator; One end of the second voltage-dividing resistor is connected to the first voltage-dividing resistor and the non-inverting input end of the comparator, and the other end is grounded; The comparator has a non-inverting input terminal connected to the first voltage-dividing resistor and the second voltage-dividing resistor, an inverting input terminal receiving a sampling voltage signal output by the switching circuit, and an output terminal connected to the pull-up resistor and pin 1 of the second NAND gate; One end of the pull-up resistor is connected to the protection circuit power supply, and the other end is connected to pin 1 of the second NAND gate and the output end of the comparator; One end of the pull-down resistor is connected to pin 1 of the first NAND gate and the switching circuit; Pin No. 1 of the first NAND gate is connected to the pull-down resistor and the switching circuit, and pin No. 2 is connected to the driving circuit. The delay capacitor voltage signal output by the switching circuit is received through pin No.

1.

6. The high power output system protection device according to claim 1 or 5, characterized in that: The driving circuit includes a push-pull circuit, an AND gate and a NOT gate; Pin 1 of the AND gate is connected to the driving signal, and pin 2 is connected to the output end of the NOT gate, and the output end is connected to the input of the push-pull circuit; The input end of the NOT gate is connected to the output of the overcurrent protection circuit, and the output end of the NOT gate is connected to the No. 2 pin of the AND gate; The input end of the push-pull circuit is connected to the output end of the AND gate, and the output end of the push-pull circuit is connected to the current limiting startup circuit, and the driving signal is output to the current limiting startup circuit.

7. The high power output system protection device according to claim 6, characterized in that: The push-pull circuit comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first triode, a second triode, a third triode and a fourth triode; The base of the first transistor is connected to the output terminal of the AND gate and the sixth resistor, the collector is connected to the third resistor, and the emitter is grounded; The base of the second transistor is connected to the third resistor and the first resistor, the emitter is connected to the second resistor, and the collector is connected to the base of the third transistor, the base of the fourth transistor and the fourth resistor; The base of the third transistor is connected to the collector of the second transistor and the fourth resistor, the collector is connected to the driving circuit power supply, and the emitter is connected to the fifth resistor; The base of the fourth transistor is connected to the collector of the second transistor and the fourth resistor, the collector is grounded, and the emitter is connected to the fifth resistor; One end of the first resistor is connected to the driving circuit power supply, and the other end is connected to the third resistor and the base of the second transistor; One end of the second resistor is connected to the driving circuit power supply, and the other end is connected to the emitter of the second transistor; One end of the fifth resistor is connected to the emitter of the third transistor and the collector of the fourth transistor, and the other end is connected to the current limiting starting circuit to output the driving signal to the current limiting starting circuit; One end of the sixth resistor is connected to the emitter of the first transistor and the output end of the AND gate, and the other end is grounded.

8. A high power output system protection method, using the high power output system protection device as claimed in any one of claims 1 to 7, characterized in that: The method comprises: Detect the working current of the load circuit; When the working current is detected to be abnormal during the startup phase, stopping the loading of the driving signal to the load circuit; When the working current is detected to be abnormal during the operation phase, the output of the driving signal by the driving circuit is interrupted.

9. The high power output system protection method according to claim 8, characterized in that: The step of interrupting the output of the driving signal by the driving circuit comprises: By latching the high level output state of the second NAND gate in the overcurrent protection circuit, the output of the driving signal by the driving circuit is interrupted.

10. The high power output system protection method according to claim 8, characterized in that: The startup phase is a phase in which the voltage value of the delay capacitor of the switching circuit does not reach the switching level value of the AD switching chip after the high-power output system protection device is powered on. The operation stage is the stage after the voltage value of the delay capacitor reaches the switching level value of the AD switching chip. After the step of interrupting the output of the driving signal by the driving circuit when the working current is detected to be abnormal during the operation phase, the method further includes: In response to an instruction from the control platform, the input of the driving signal to the switching circuit is turned off to discharge the delay capacitor of the switching circuit.

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