Semiconductor storage structure and forming method thereof

Abstract

The invention provides a semiconductor storage structure and a forming method thereof, relates to the technical field of semiconductors, and is used for improving the performance of the semiconductor storage structure. The structure comprises a spin orbit moment layer, and a storage magnetic tunnel junction, a dummy magnetic tunnel junction and a dielectric layer which are arranged on the spin orbit moment layer, the dummy magnetic tunnel junction is located beside the storage magnetic tunnel junction; the dielectric layer at least fills a gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; and the spin orbit moment layer is formed by etching by taking the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as masks. According to the semiconductor storage structure and the forming method thereof, a photomask does not need to be arranged for the spin-orbit moment layer, the forming process can be simplified, overlay offset of the storage magnetic tunnel junction and the spin-orbit moment layer can be avoided, alignment of the storage magnetic tunnel junction and the spin-orbit moment layer is ensured, the write-in current efficiency is improved, and the reliability of the semiconductor storage structure is improved. The performance of the semiconductor storage structure is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor storage structure and a method for forming the same. Background Art

[0002] With the continuous development of semiconductor technology, magnetic random access memory (MRAM) has been widely used in the fields of Internet of Things, edge AI devices, high-performance computing and automobiles. Among them, spin-orbit torque magnetic random access memory (SOT-MRAM) uses current to flip the free layer to achieve data storage, has the advantages of high-speed reading and writing and low power consumption, and has broad application prospects.

[0003] The cell structure in the SOT-MRAM device is a three-terminal device, including two electrical channels. The current in one of the electrical channels flows through the magnetic tunnel junction (MTJ), which is the data "read" channel; the current in the other electrical channel flows through the SOT layer (i.e., the bottom electrode), which is the data "write" channel. For the "write" channel, the write current must flow through the SOT layer, form a spin current under its spin-orbit coupling, and diffuse to the free layer of the MTJ, exerting a spin-orbit torque effect on the free layer, thereby affecting the magnetization direction of the free layer, thereby distinguishing between "0" and "1" in binary and realizing the write process.

[0004] However, the lithography of the SOT layer in the SOT-MRAM device is independent of the MTJ, and a separate mask needs to be provided for the SOT layer. Moreover, as the size of the SOT-MRAM device continues to shrink, the lithography of the SOT layer and the MTJ is easily misaligned, causing the device to fail. Summary of the invention

[0005] In view of the above problems, an embodiment of the present application provides a semiconductor storage structure and a method for forming the same, which can simplify the formation process of the semiconductor storage structure, and at the same time avoid overlay offset between the storage magnetic tunnel junction and the spin-orbit moment layer to improve the performance of the semiconductor storage structure.

[0006] According to some embodiments, the present application provides a semiconductor storage structure, comprising: a spin-orbit moment layer, and a storage magnetic tunnel junction, a dummy magnetic tunnel junction and a dielectric layer arranged on the spin-orbit moment layer; the dummy magnetic tunnel junction is located next to the storage magnetic tunnel junction; the dielectric layer at least fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; the spin-orbit moment layer is formed by etching using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as masks.

[0007] In some possible implementations, it further includes: a substrate having at least two conductive through holes disposed therein, the conductive through holes being located on both sides of the storage magnetic tunnel junction; and the orthographic projections of the storage magnetic tunnel junction, the virtual magnetic tunnel junction and the dielectric layer on the substrate covering at least two of the conductive through holes on both sides of the storage magnetic tunnel junction.

[0008] In some possible implementations, the virtual magnetic tunnel junction is provided with one, and the virtual magnetic tunnel junction covers one of the conductive through holes; the dielectric layer also covers the side wall of the storage magnetic tunnel junction away from one end of the virtual magnetic tunnel junction, and covers one of the conductive through holes.

[0009] In some possible implementations, two dummy magnetic tunnel junctions are provided; and the two dummy magnetic tunnel junctions respectively cover one corresponding conductive through hole.

[0010] In some possible implementations, the storage magnetic tunnel junction and the dummy magnetic tunnel junction are formed by synchronous etching.

[0011] In some possible implementations, the distances between the side walls of the dummy magnetic tunnel junction and the storage magnetic tunnel junction that are arranged opposite to each other are equal.

[0012] The semiconductor storage structure in the embodiment of the present application includes a spin-orbit moment layer, a storage magnetic tunnel junction, a virtual magnetic tunnel junction and a dielectric layer. The storage magnetic tunnel junction, the virtual magnetic tunnel junction and the dielectric layer are all arranged on the spin-orbit moment layer, and the virtual magnetic tunnel junction is located beside the storage magnetic tunnel junction; the dielectric layer at least fills the gap between the storage magnetic tunnel junction and the virtual magnetic tunnel junction to connect the storage magnetic tunnel junction and the virtual magnetic tunnel junction. The spin-orbit moment layer is formed by etching using the storage magnetic tunnel junction, the virtual magnetic tunnel junction and the dielectric layer as masks, and there is no need to set a mask for the spin-orbit moment layer, which simplifies the formation process. At the same time, it can also avoid the overlay offset between the storage magnetic tunnel junction and the spin-orbit moment layer, ensure the alignment of the storage magnetic tunnel junction and the spin-orbit moment layer, thereby improving the write current efficiency and improving the performance of the semiconductor storage structure.

[0013] According to some embodiments, the present application also provides a method for forming a semiconductor storage structure, which includes: forming a spin-orbit moment initial layer and a magnetic tunnel junction stacking layer, wherein the magnetic tunnel junction stacking layer is located on the spin-orbit moment initial layer; etching the magnetic tunnel junction stacking layer to form a storage magnetic tunnel junction and a dummy magnetic tunnel junction, wherein the dummy magnetic tunnel junction is located next to the storage magnetic tunnel junction; forming a dielectric layer, wherein the dielectric layer at least fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as a mask, etching the spin-orbit moment initial layer to form a spin-orbit moment layer.

[0014] In some possible implementations, forming the dielectric layer includes: depositing an initial dielectric layer, wherein the initial dielectric layer at least covers the spin-orbit moment initial layer, the storage magnetic tunnel junction, and the dummy magnetic tunnel junction, and fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; etching the initial dielectric layer, removing a portion of the initial dielectric layer, and the remaining initial dielectric layer forms the dielectric layer.

[0015] In some possible implementations, removing part of the initial dielectric layer includes: removing the entire initial dielectric layer on the top surface of the storage magnetic tunnel junction, the dummy magnetic tunnel junction, and the spin-orbit moment initial layer to expose the storage magnetic tunnel junction and the dummy magnetic tunnel junction.

[0016] In some possible implementations, the thickness of the initial dielectric layer on the sidewalls of the storage magnetic tunnel junction and the dummy magnetic tunnel junction is not less than half of the distance between the storage magnetic tunnel junction and the dummy magnetic tunnel junction.

[0017] The method for forming a semiconductor storage structure in an embodiment of the present application includes: forming a spin-orbit moment initial layer and a magnetic tunnel junction stacking layer, wherein the magnetic tunnel junction stacking layer is located on the spin-orbit moment initial layer; etching the magnetic tunnel junction stacking layer to form a storage magnetic tunnel junction and a dummy magnetic tunnel junction, wherein the dummy magnetic tunnel junction is located next to the storage magnetic tunnel junction; forming a dielectric layer, wherein the dielectric layer at least fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as a mask, etching the spin-orbit moment initial layer to form a spin-orbit moment layer. The storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer are used to realize the patterning of the spin-orbit moment initial layer, and the spin-orbit moment layer can be formed without separate photolithography, and there is no need to set a mask for the spin-orbit moment layer, thereby simplifying the formation process, and at the same time, it can also avoid the storage magnetic tunnel junction and the spin-orbit moment layer from generating an overlay offset, ensuring that the storage magnetic tunnel junction and the spin-orbit moment layer are aligned, thereby improving the write current efficiency, and improving the performance of the semiconductor storage structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a three-dimensional diagram after a magnetic tunnel junction is formed in the related art; Figure 2 It is a cross-sectional view after a magnetic tunnel junction is formed in the related art; Figure 3 It is a top view after forming a magnetic tunnel junction in the related art; Figure 4 A three-dimensional image after forming a photoresist in the related art; Figure 5 It is a cross-sectional view after forming a photoresist in the related art; Figure 6 A top view after forming a photoresist in the related art; Figure 7 It is a cross-sectional view of a dielectric hard mask after being patterned in the related art; Figure 8 A top view of a dielectric hard mask after patterning in the related art; Fig. 9 It is a cross-sectional view of a spin-orbit moment layer after being patterned in the related art; Fig.10 It is a top view of the spin-orbit moment layer after being patterned in the related art; Fig.11 A three-dimensional diagram of a first semiconductor storage structure in an embodiment of the present application; Fig.12 is a cross-sectional view of a first semiconductor storage structure in an embodiment of the present application; Fig.13 A top view of a first semiconductor storage structure in an embodiment of the present application; Fig.14 is a cross-sectional view of a second semiconductor storage structure in an embodiment of the present application; Fig.15 is a cross-sectional view of a third semiconductor storage structure in an embodiment of the present application; Fig.16 is a cross-sectional view of a fourth semiconductor storage structure in an embodiment of the present application; Fig.17 is a cross-sectional view of a fifth semiconductor storage structure in an embodiment of the present application; Fig.18 is a top view of a fifth semiconductor storage structure in an embodiment of the present application; Fig.19 is a flow chart of a method for forming a semiconductor storage structure in an embodiment of the present application; Fig. 20 is a three-dimensional diagram of a substrate in an embodiment of the present application; Fig.21 It is a three-dimensional diagram after forming a mask layer in an embodiment of the present application; Fig. 22 It is a three-dimensional diagram after forming a photoresist layer in an embodiment of the present application; Fig.23 It is a three-dimensional image after etching the mask layer in the embodiment of the present application; Fig.24 It is a three-dimensional diagram after forming a dummy magnetic tunnel junction and a storage magnetic tunnel junction in an embodiment of the present application; Fig.25 It is a cross-sectional view after forming a dummy magnetic tunnel junction and a storage magnetic tunnel junction in an embodiment of the present application; Fig.26 A top view of a dummy magnetic tunnel junction and a storage magnetic tunnel junction after they are formed in an embodiment of the present application; Fig. 27It is a three-dimensional diagram after the dielectric layer is formed in the embodiment of the present application; Fig.28 It is a cross-sectional view after the dielectric layer is formed in the embodiment of the present application; Fig.29 It is a top view after the dielectric layer is formed in the embodiment of the present application; Fig.30 It is a three-dimensional diagram after the initial dielectric layer is formed in the embodiment of the present application; Fig.31 It is a cross-sectional view after the initial dielectric layer is formed in the embodiment of the present application; Fig.32 It is a top view after the initial dielectric layer is formed in the embodiment of the present application.

[0019] Description of reference numerals: 10-substrate; 11-conductive via; 20-magnetic tunnel junction; 21-virtual magnetic tunnel junction; 22-storage magnetic tunnel junction; 23-magnetic tunnel junction stacking layer; 30-spin-orbit moment layer; 31-spin-orbit moment initial layer; 41-dielectric hard mask; 42-photoresist; 50-dielectric layer; 51-initial dielectric layer; 52-step; 60-mask layer; 70-photoresist layer; 80-isolation layer; 90-top electrode. DETAILED DESCRIPTION

[0020] In the related art, see Figures 1 to 10 The patterns of the spin-orbit moment layer 30 and the magnetic tunnel junction 20 are usually independent and need to be photolithographically processed separately. The process is as follows: First, Figure 1 , Figure 2 and Figure 3 As shown, the magnetic tunnel junction 20 is photolithographically processed and etched; thereafter, as shown Figure 4 , Figure 5 and Figure 6 As shown, after depositing a non-conductive dielectric hard mask 41 (usually SiN) and a photoresist 42, the photoresist 42 is photolithographically processed to cover the dielectric hard mask 41 with the patterned photoresist 42; Figure 7 and Figure 8 As shown, the dielectric hard mask 41 is then etched to transfer the pattern of the photoresist 42 to the dielectric hard mask 41; Fig. 9 and Fig.10 As shown, the etched dielectric hard mask 41 is used as a mask to etch the spin-orbit moment layer 30. This process requires a separate photomask for the spin-orbit moment layer 30, and the corresponding pattern is transferred in the order of photoresist 42, dielectric hard mask 41, and spin-orbit moment layer 30.

[0021] Moreover, as the device size has been reduced to tens of nanometers or even lower, the key dimensions need to be continuously miniaturized, and the pattern alignment of the spin-orbit moment layer 30 and the magnetic tunnel junction 20 becomes more and more critical. If there is a significant misalignment between the two, the write current efficiency will be directly reduced, and then the write failure of the magnetic tunnel junction 20 will be caused, resulting in the failure of the memory.

[0022] To this end, an embodiment of the present application provides a semiconductor storage structure, in which a dielectric layer connects a virtual magnetic tunnel junction and a storage magnetic tunnel junction, so that the three are integrated, and a spin-orbit moment layer is formed by etching using the virtual magnetic tunnel junction, the storage magnetic tunnel junction and the dielectric layer as masks. There is no need to set a mask for the spin-orbit moment layer, thereby simplifying the formation process. At the same time, it can also avoid overlay offset between the storage magnetic tunnel junction and the spin-orbit moment layer, ensure that the storage magnetic tunnel junction and the spin-orbit moment layer are aligned, thereby improving the write current efficiency and improving the performance of the semiconductor storage structure.

[0023] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of this application.

[0024] The present application provides a semiconductor storage structure, which is a magnetic storage device. Figures 11 to 13 The semiconductor storage structure includes a spin-orbit moment layer 30, and a storage magnetic tunnel junction 22, a dummy magnetic tunnel junction 21 (Dummy MTJ) and a dielectric layer 50 arranged on the spin-orbit moment layer 30. The dummy magnetic tunnel junction 21 is located beside the storage magnetic tunnel junction 22; the dielectric layer 50 at least fills the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21; the spin-orbit moment layer 30 is formed by etching using the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 as masks.

[0025] The spin-orbit moment layer 30 is used to generate corresponding polarization currents with write currents in different directions, thereby generating different torques. The spin-orbit moment layer 30 can be in a strip shape or an L shape. The embodiment of the present application does not limit the shape of the spin-orbit moment layer 30. For example, the spin-orbit moment layer 30 extends along a first direction, and the first direction is as follows: Fig.11 X direction shown.

[0026] The spin-orbit moment layer 30 is a single layer or a stacked layer, and the material of the spin-orbit moment layer 30 includes a conductive material with a strong spin-orbit coupling effect. Exemplarily, the material of the spin-orbit moment layer 30 includes one or more of Pt, Pd, Hf, Au, AuPt, PtHf, PtCr, PtMn, FeMn, NiMn, Ta, W, Ir, IrMn, WOx, WN, WON, TaN, TaB, and topological insulators. Topological insulators include Bi x Se 1-x ,Bi x Sb 1-x , (Bi,Sb)2Te3, where x independently satisfies the value of 0.1-0.9.

[0027] The storage magnetic tunnel junction 22 is used to store data. The storage magnetic tunnel junction 22 is disposed on the spin-orbit moment layer 30 and is in contact with the spin-orbit moment layer 30. When a write current in different directions is passed through the spin-orbit moment layer 30, the storage magnetic tunnel junction 22 will be in a high resistance state or a low resistance state, respectively, to store data "1" or data "0" correspondingly, thereby realizing rapid writing of information.

[0028] The dummy magnetic tunnel junction 21 is not used to store data. On the one hand, in the embodiment of the present application, since the film layer height of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 is the same, it can support the storage magnetic tunnel junction 22 during etching and chemical mechanical polishing, thereby improving the uniformity of etching and chemical mechanical polishing of the storage magnetic tunnel junction 22. On the other hand, in the embodiment of the present application, a dielectric layer is filled in the gap between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, so that the dummy magnetic tunnel junction 21, the storage magnetic tunnel junction 22 and the dielectric layer 50 are used as a template together to form a patterned hard mask of the spin-orbit moment layer 30.

[0029] The dummy magnetic tunnel junction 21 is disposed on the spin-orbit moment layer 30 and is in contact with the spin-orbit moment layer 30. The dummy magnetic tunnel junction 21 is located beside the storage magnetic tunnel junction 22 and is spaced apart from the storage magnetic tunnel. The dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 are arranged along the extension direction of the spin-orbit moment layer 30.

[0030] The number of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 can be at least one, and these dummy magnetic tunnel junctions 21 and the storage magnetic tunnel junctions 22 are arranged in sequence and spaced from each other along the extension direction of the spin-orbit moment layer 30. Among them, at least one dummy magnetic tunnel junction 21 is located outside the storage magnetic tunnel junction 22, and along the extension direction of the spin-orbit moment layer 30, at least one end of the spin-orbit moment layer 30 is correspondingly provided with a dummy magnetic tunnel junction 21, that is, at least one dummy magnetic tunnel junction 21 is adjacent to the end of the spin-orbit moment layer 30.

[0031] For example, one dummy magnetic tunnel junction 21 is provided, and at least one storage magnetic tunnel junction 22 is provided, and these storage magnetic tunnel junctions 22 are located on the same side of the dummy magnetic tunnel junction 21. For another example, two dummy magnetic tunnel junctions 21 are provided, and one storage magnetic tunnel junction 22 is provided, and the two dummy magnetic tunnel junctions 21 can be provided on both sides of the storage magnetic tunnel junction 22 or on the same side.

[0032] For another example, there are two dummy magnetic tunnel junctions 21 and at least two storage magnetic tunnel junctions 22. The two dummy magnetic tunnel junctions 21 can be located on both sides of the storage magnetic tunnel junctions 22, respectively, or one of the dummy magnetic tunnel junctions 21 is located on one side of the storage magnetic tunnel junctions 22, and the other dummy magnetic tunnel junction 21 is located between the two storage magnetic tunnel junctions 22.

[0033] In some possible implementations, the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 have the same height, that is, the top surfaces of the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 are flush, so as to facilitate their formation and use as a mask. Among them, the material and structure of the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 can be the same. Exemplarily, the storage magnetic tunnel junction 22 and the virtual magnetic tunnel junction 21 are formed by synchronous etching, that is, by etching the deposited film layer, the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 are formed at the same time, so that the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 do not need to be patterned separately, simplifying the formation process.

[0034] Exemplarily, the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 both include a free layer, a barrier layer and a reference layer stacked in sequence, and the free layer is arranged on the spin-orbit moment layer 30. The magnetization direction of the free layer can be changed, the magnetization direction of the reference layer is fixed, and the barrier layer isolates the free layer and the reference layer. The materials of the free layer and the reference layer both include ferromagnetic materials, for example, at least one of Co, Fe, B, Ni, Ru, Ir, and Pt. The materials of the free layer and the reference layer can be the same or different. The material of the barrier layer includes an insulating material, for example, at least one of MgO, Al2O3, and SiO2. The shape of the storage magnetic tunnel junction 22 can be cylindrical, elliptical, rectangular, arc-shaped, etc., which is not limited here. The virtual magnetic tunnel junction 21 can be designed into a specific shape according to actual needs, and the specific shape can be the same as or different from the shape of the storage magnetic tunnel junction 22.

[0035] Continue reading Figures 11 to 13 In some possible implementations, the spacing between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 is equal. In this way, the gap between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 is substantially equal in width, which facilitates the formation of the dielectric layer 50 and ensures the quality of the dielectric layer 50. In some possible implementations, such as Fig.13As shown, the sidewalls of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 at one end adjacent to each other have the same shape, for example, both are arc surfaces. In this way, along the peripheral direction of the storage magnetic tunnel junction 22, the spacing d between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 remains the same.

[0036] For example, Fig.13 As shown, the storage magnetic tunnel junction 22 can be in the shape of an elliptical column, that is, the orthographic projection of the storage magnetic tunnel junction 22 on the substrate 10 is an ellipse, and the short axis of the ellipse is the same as the extension direction of the spin-orbit moment layer 30. The virtual magnetic tunnel junction 21 can be in the shape of a rectangular column, and the virtual magnetic tunnel junction 21 is concave inward toward the surface of the storage magnetic tunnel junction 22 to form an arc surface. The orthographic projection of the virtual magnetic tunnel junction 21 on the substrate 10 includes three straight lines connected in sequence and an arc line, and along the circumference of the ellipse, the spacing between the arc line and the ellipse is equal.

[0037] In other examples, the storage magnetic tunnel junction 22 may be in the shape of an elliptical column, that is, the orthographic projection of the storage magnetic tunnel junction 22 on the substrate 10 is an ellipse, and the short axis of the ellipse is the same as the extension direction of the spin-orbit moment layer 30. The virtual magnetic tunnel junction 21 may also be in the shape of an arc column, and the surface of the virtual magnetic tunnel junction 21 facing the storage magnetic tunnel junction 22 and the surface away from the storage magnetic tunnel junction 22 are both concave in the direction away from the storage magnetic tunnel junction 22, forming an arc surface. Alternatively, the virtual magnetic tunnel junction 21 may also be in the shape of a crescent, and be concave in the direction away from the storage magnetic tunnel junction 22.

[0038] In other possible implementations, the spacings between the side walls of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 that are arranged opposite to each other may also be different, so as to improve the flexibility of the arrangement of the dummy magnetic tunnel junction 21. Exemplarily, the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 have the same shape, for example, the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 are both in the shape of an ellipse, that is, the orthographic projections of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 on the substrate 10 are both ellipses, and the sizes of the two ellipses may be equal or unequal.

[0039] The dielectric layer 50 at least fills the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 to connect the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, so that the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 are an integral structure. The storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 are used as masks to form the spin-orbit moment layer 30. On the one hand, the continuity of the spin-orbit moment layer 30 can be ensured. On the other hand, there is no need to set a mask for the spin-orbit moment layer 30, which simplifies the formation process. At the same time, it can also avoid the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 from generating an overlay offset, ensuring that the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 are aligned, thereby improving the write current efficiency and improving the performance of the semiconductor storage structure.

[0040] The dielectric layer 50, the storage magnetic tunnel junction 22 and the top surface of the storage magnetic tunnel junction 22 are flush, and the above top surfaces all refer to the surface away from the spin-orbit moment layer 30. The dielectric layer 50 at least covers the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 that are opposite to each other, and the material of the dielectric layer 50 includes an insulating material, for example, at least one of SiO2, SiN, and SiON, to ensure the insulation isolation of the storage magnetic tunnel junction 22.

[0041] In other possible examples, the top surface of the dielectric layer 50 may also be higher than the top surfaces of the storage magnetic tunnel junction 22 and the storage magnetic tunnel junction 22. In this way, the dielectric layer 50 also covers the storage magnetic tunnel junction 22 and the storage magnetic tunnel junction 22, and can provide protection for the storage magnetic tunnel junction 22 and the storage magnetic tunnel junction 22, reduce the loss of the storage magnetic tunnel junction 22 and the storage magnetic tunnel junction 22 when etching downward as a mask, and ensure storage performance.

[0042] In some possible implementations, such as Fig.14 As shown, dummy magnetic tunnel junctions 21 are respectively arranged on both sides of the storage magnetic tunnel junction 22, and the dielectric layer 50 is located between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, that is, the dielectric layer 50 covers the side walls of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 adjacent to each other, and the side walls of the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 away from each other are exposed. Or, as Fig.12 As shown, the dielectric layer 50 covers the entire side wall of the dummy magnetic tunnel junction 21 and the entire side wall of the storage magnetic tunnel junction 22, that is, the dielectric layer 50 surrounds the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, and the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 are located in the dielectric layer 50.

[0043] In some other possible implementations, such as Fig.15 As shown, a dummy magnetic tunnel junction 21 is correspondingly arranged on one side of the storage magnetic tunnel junction 22, and the dielectric layer 50 is located between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, and covers the side wall of the storage magnetic tunnel junction 22 away from the dummy magnetic tunnel junction 21. Exemplarily, the dielectric layer 50 covers the entire side wall of the storage magnetic tunnel junction 22, and covers a portion of the side wall of the dummy magnetic tunnel junction 21 adjacent to the storage magnetic tunnel junction 22, and a portion of the side wall of the dummy magnetic tunnel junction 21 away from the storage magnetic tunnel junction 22 is exposed. Or, as Fig.16 As shown, the dielectric layer 50 also covers a portion of the sidewall of the dummy magnetic tunnel junction 21 away from the storage magnetic tunnel junction 22, that is, the dielectric layer 50 covers the entire sidewall of the dummy magnetic tunnel junction 21. The dummy magnetic tunnel junction 21 and the storage magnetic tunnel are located in the dielectric layer 50.

[0044] In order to realize the function of data writing, in some possible implementations, the semiconductor storage structure further includes a substrate 10, in which at least two conductive through holes 11 are arranged, and the conductive through holes 11 are located on both sides of the storage magnetic tunnel junction 22; the orthographic projections of the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 on the substrate 10 cover at least two conductive through holes on both sides of the storage magnetic tunnel junction 22. In this way, the whole formed by the dummy magnetic tunnel junction 21, the storage magnetic tunnel junction 22 and the dielectric layer 50 can meet the graphic requirements of the spin-orbit moment layer 30, so that the two ends of the spin-orbit moment layer 30 formed by using the whole as a mask are respectively connected to the conductive through holes 11 on the substrate 10 and pass under the storage magnetic tunnel junction 22.

[0045] Among them, the substrate 10 supports the structure thereon, and the material of the substrate 10 includes semiconductor materials, such as silicon, germanium, silicon germanium, silicon on insulator (SOI) or germanium on insulator (SOG). The conductive through hole 11 runs through the substrate 10, that is, the two ends of the conductive through hole 11 are exposed on both sides of the substrate 10 respectively, so as to connect the spin-orbit moment layer 30 and the external circuit. There are at least two conductive through holes 11 to pass write currents in different directions into the spin-orbit moment layer 30. At least two conductive through holes 11 are located on both sides of the storage magnetic tunnel junction 22, and the orthographic projection of the storage magnetic tunnel junction 22 on the substrate 10 is spaced from each conductive through hole 11. Exemplarily, there are multiple storage magnetic tunnel junctions 22, and a conductive through hole 11 is correspondingly provided on each side of the multiple storage magnetic tunnel junctions 22 away from each other.

[0046] In some possible implementations, such as Fig.15 and Fig.16 As shown, a dummy magnetic tunnel junction 21 is provided, and the dummy magnetic tunnel junction 21 covers a corresponding conductive through hole 11; the dielectric layer 50 also covers the side wall of the storage magnetic tunnel junction 22 away from the end of the dummy magnetic tunnel junction 21, and covers a corresponding conductive through hole 11. The dummy magnetic tunnel junction 21 is located on one side of the storage magnetic tunnel junction 22, and covers a corresponding conductive through hole 11 on the side. The dummy magnetic tunnel junction 21 covers a corresponding conductive through hole 11 means that the orthographic projection of the dummy magnetic tunnel junction 21 on the substrate 10 covers the corresponding conductive through hole 11.

[0047] In the above implementation, a dielectric layer 50 needs to be provided on the side wall of the storage magnetic tunnel junction 22 away from the end of the dummy magnetic tunnel junction 21, and this part of the dielectric layer 50 corresponds to covering a conductive through hole 11 to ensure that the formed spin-orbit moment layer 30 covers the conductive through hole 11, so that the semiconductor storage structure can work normally. Among them, the dielectric layer 50 corresponds to covering a conductive through hole 11 means that the orthographic projection of the dielectric layer 50 on the substrate 10 covers the corresponding conductive through hole 11. In this way, the tops of the two conductive through holes 11 correspond to the dummy magnetic tunnel junction 21 and the dielectric layer 50, respectively.

[0048] In some other possible implementations, such as Fig.12 and Fig.14 As shown, two dummy magnetic tunnel junctions 21 are provided; the two dummy magnetic tunnel junctions 21 cover one conductive through hole 11 respectively. The two dummy magnetic tunnel junctions 21 are respectively located on both sides of the storage magnetic tunnel junction 22, and cover one conductive through hole 11 on the side respectively, that is, the two dummy magnetic tunnel junctions 21 correspond to the two conductive through holes 11. Among them, the dummy magnetic tunnel junction 21 covers one conductive through hole 11 correspondingly, which means that the orthographic projection of the dummy magnetic tunnel junction 21 on the substrate 10 covers the corresponding conductive through hole 11. In this way, the two conductive through holes 11 correspond to two dummy magnetic tunnel junctions 21 respectively.

[0049] In other possible implementation methods, one dummy magnetic tunnel junction 21 is provided, the dummy magnetic tunnel junction 21 and the adjacent part of the dielectric layer 50 cover one conductive through hole 11, and the part of the dielectric layer 50 at one end of the storage magnetic tunnel junction 22 away from the dummy magnetic tunnel junction 21 covers one conductive through hole 11. Alternatively, two dummy magnetic tunnel junctions 21 are provided, wherein at least one dummy magnetic tunnel junction 21 and the adjacent part of the dielectric layer 50 cover one conductive through hole 11. In this implementation, the dummy magnetic tunnel junction 21 is not located directly above the conductive through hole 11, the orthographic projection of the dummy magnetic tunnel junction 21 on the substrate 10 partially overlaps with the conductive through hole 11, and the dummy magnetic tunnel junction 21 and the dielectric layer 50 correspond to two conductive through holes 11.

[0050] In some possible implementations, see Fig.17 and Fig.18 , the semiconductor storage structure also includes an isolation layer 80 and a top electrode 90, the isolation layer 80 covers the storage magnetic tunnel junction 22, the virtual magnetic tunnel junction 21, the dielectric layer 50, the spin-orbit moment layer 30 and the substrate 10, and the top electrode 90 is connected to the storage magnetic tunnel junction 22 and extends above the isolation layer 80. Among them, the material of the isolation layer 80 can be the same as the material of the dielectric layer 50, for example, the material of the isolation layer 80 and the dielectric layer 50 are both silicon nitride, so that the isolation layer 80 and the dielectric layer 50 form an integral structure. The top electrode 90 penetrates the isolation layer 80 to contact and conduct with the storage magnetic tunnel junction 22, and can be formed by opening a hole in the isolation layer 80 and filling it with a conductive material. The material of the top electrode 90 includes metal, such as copper. The top electrode 90 is also connected to an external circuit, for example, it is connected to a read circuit in the substrate 10 through a plug or a conductive through hole 11 in the isolation layer 80.

[0051] In some possible implementations, the semiconductor storage structure further includes a mask layer (not shown in the figure), which is disposed above the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21. The mask layer is a conductive mask, and its structure may be a single-layer mask layer or a multi-layer mask layer; the material of the mask layer includes at least one of Ta, TaN, TiN, Ru, Co, and C. The mask layer can be used to connect to the top electrode 90 or an external circuit to turn on the read circuit, and can also protect the storage magnetic tunnel junction 22 to avoid etching damage caused by the process.

[0052] The semiconductor storage structure in the embodiment of the present application includes a spin-orbit moment layer 30, a storage magnetic tunnel junction 22, a dummy magnetic tunnel junction 21 and a dielectric layer 50. The storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 are all arranged on the spin-orbit moment layer 30, and the dummy magnetic tunnel junction 21 is located beside the storage magnetic tunnel junction 22; the dielectric layer 50 at least fills the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 to connect the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21. The spin-orbit moment layer 30 is formed by etching using the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 as masks, and there is no need to set a mask for the spin-orbit moment layer 30, which simplifies the formation process, and can also avoid the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 from generating an overlay offset, ensuring that the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 are aligned, thereby improving the write current efficiency, so as to improve the performance of the semiconductor storage structure.

[0053] The present application also provides a method for forming a semiconductor storage structure. Fig.19 , the forming method may specifically include the following steps:

[0054] Step S100: forming a spin-orbit moment initial layer and a magnetic tunnel junction stacking layer, wherein the magnetic tunnel junction stacking layer is located on the spin-orbit moment initial layer.

[0055] See also Fig. 20 and Fig.21 The spin-orbit moment initialization layer 31 and the magnetic tunnel junction stacking layer 23 can be formed by a deposition process. The spin-orbit moment initialization layer 31 is used to form the spin-orbit moment layer 30 (see Fig.11 ), which can be a single layer or a stacked layer. The material of the spin-orbit moment initial layer 31 includes a conductive material with a strong spin-orbit coupling effect, which will not be described in detail here.

[0056] The spin-orbit moment initialization layer 31 can be formed on a substrate 10, which is usually placed on a stage. The substrate 10 supports the structure thereon, and the material of the substrate 10 includes a semiconductor material. At least two conductive vias 11 are also provided in the substrate 10, and the conductive vias 11 penetrate the substrate 10, that is, the two ends of the conductive vias 11 are respectively exposed on both sides of the substrate 10, so as to pass write currents of different directions into the spin-orbit moment layer 30.

[0057] The magnetic tunnel junction stacking layer 23 is located on the spin-orbit moment initial layer 31, and is used to subsequently form a virtual magnetic tunnel junction 21 and a storage magnetic tunnel junction 22. The magnetic tunnel junction stacking layer 23 includes a free initial layer, a barrier initial layer and a reference initial layer stacked in sequence, and the free initial layer is arranged on the spin-orbit moment initial layer 31. Among them, the free initial layer is used to form a free layer, and its magnetization direction can be changed. The reference initial layer is used to form a reference layer, and its magnetization direction is fixed, and the barrier initial layer is used to form a barrier layer to isolate the free layer and the reference layer. The materials of the free initial layer and the reference initial layer both include ferromagnetic materials, and the materials of the free initial layer and the reference initial layer can be the same or different. The material of the barrier initial layer includes an insulating material.

[0058] Step S200: etching the magnetic tunnel junction stack layer to form a storage magnetic tunnel junction and a dummy magnetic tunnel junction, wherein the dummy magnetic tunnel junction is located beside the storage magnetic tunnel junction.

[0059] See also Figure 22 to Figure 26 , part of the magnetic tunnel junction stacking layer 23 is removed, and the remaining magnetic tunnel junction stacking layer 23 forms a storage magnetic tunnel junction 22 and a dummy magnetic tunnel junction 21. The storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 can be formed at the same time, simplifying the formation process. The dummy magnetic tunnel junction 21 is located next to the storage magnetic tunnel junction 22 and is spaced apart from the storage magnetic tunnel junction 22. The dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 can each be provided with one or more. Exemplarily, dummy magnetic tunnel junctions 21 are respectively provided on both sides of the storage magnetic tunnel junction 22, or a dummy magnetic tunnel junction 21 is provided on one side of the storage magnetic tunnel junction 22.

[0060] The spacing between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 is equal. In this way, the gap between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 is substantially equal in width. Fig.13 ), when the deposition thickness is half of the gap between the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 can be connected, and the dielectric layer 50 can be formed as quickly as possible without the deposition thickness being too high, so as to facilitate the formation of the dielectric layer 50 and ensure the quality of the dielectric layer 50.

[0061] In some possible implementations, the sidewalls of the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 at one end adjacent to each other have the same shape, for example, both are arc surfaces. Exemplarily, the storage magnetic tunnel junction 22 may be in the shape of an elliptical column, that is, the positive projection of the storage magnetic tunnel junction 22 on the substrate 10 is an ellipse, and the short axis of the ellipse is the same as the extension direction of the spin-orbit moment layer 30. The virtual magnetic tunnel junction 21 may be in the shape of a rectangular column, and the virtual magnetic tunnel junction 21 is concave inward toward the surface of the storage magnetic tunnel junction 22 to form an arc surface. The positive projection of the virtual magnetic tunnel junction 21 on the substrate 10 includes three straight lines and an arc line connected in sequence, and along the circumference of the ellipse, the spacing between the arc line and the ellipse is equal.

[0062] In some possible implementations, etching the magnetic tunnel junction stack layer 23 may specifically include: Fig.21 , forming a mask layer 60 on the magnetic tunnel junction stack layer 23, and forming a photoresist layer 70 on the mask layer 60; Fig. 22 and Fig.23 , exposing and developing the photoresist layer 70, and using the developed photoresist layer 70 as a mask, etching the mask layer 60 to transfer the pattern to the mask layer 60; Figure 23 to Figure 26 , using the etched mask layer 60 as a mask, the magnetic tunnel junction stacking layer 23 is etched downward to form a storage magnetic tunnel junction 22 and a dummy magnetic tunnel junction 21 ; and the remaining mask layer 60 is removed.

[0063] The mask layer 60 may be a single layer or a stacked layer. For example, the mask layer 60 includes a first layer disposed on the magnetic tunnel junction stacked layer 23, and a second layer disposed on the first layer. The material of the first layer includes at least one of Ta, TaN, TiN, Ru, Co, and C, and the material of the second layer includes at least one of SiO2 and SiN. The second layer may be completely consumed as a sacrificial layer during the etching process of the first layer.

[0064] In the example where at least two conductive vias 11 are provided in the substrate 10, the storage magnetic tunnel junction 22 is staggered with the conductive vias 11, and the dummy magnetic tunnel junction 21 covers the corresponding conductive via 11, that is, the orthographic projection of the storage magnetic tunnel junction 22 on the substrate 10 does not coincide with the conductive via 11, and the orthographic projection of the dummy magnetic tunnel junction 21 on the substrate 10 covers the corresponding conductive via 11, or partially overlaps with the corresponding conductive via 11.

[0065] Step S300: forming a dielectric layer, wherein the dielectric layer at least fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction.

[0066] See also Figure 27 to Figure 29, the dielectric layer 50 is located in the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, and connects the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21. The material of the dielectric layer 50 includes an insulating material, such as at least one of SiO2, SiN, and SiON. Among them, the top surfaces of the dielectric layer 50, the storage magnetic tunnel junction 22, and the dummy magnetic tunnel junction 21 can be flush, and the orthographic projection of the overall structure formed by the dielectric layer 50, the storage magnetic tunnel junction 22, and the dummy magnetic tunnel junction 21 on the substrate 10 covers at least one conductive through hole 11 on each side of the storage magnetic tunnel junction 22, so as to ensure that the semiconductor storage structure can work normally.

[0067] In some possible examples, the dielectric layer 50 also covers the ends of the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 that are away from each other, for example, the dielectric layer 50 covers the entire side wall of the virtual magnetic tunnel junction 21 and the entire side wall of the storage magnetic tunnel junction 22, that is, the dielectric layer 50 surrounds the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22, and the virtual magnetic tunnel junction 21 and the storage magnetic tunnel junction 22 are located in the dielectric layer 50.

[0068] Step S400: using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as masks, etching the spin-orbit moment initial layer to form a spin-orbit moment layer.

[0069] See also Fig.28 and Fig.12 , using the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 as masks, the spin-orbit moment initial layer 31 is etched, a portion of the spin-orbit moment initial layer 31 is removed, and the remaining spin-orbit moment initial layer 31 forms a spin-orbit moment layer 30, and the spin-orbit moment layer 30 is used as a bottom electrode, and a portion of the top surface of the substrate 10 is exposed. In this way, there is no need to set a mask for the spin-orbit moment layer 30, which simplifies the formation process, and can also avoid the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 from generating an overlay offset, ensuring that the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 are aligned, thereby improving the write current efficiency, and thus improving the performance of the semiconductor storage structure.

[0070] For some possible examples, see Fig.17 and Fig.18 After forming the spin-orbit moment layer 30, it also includes: forming an isolation layer 80 and a top electrode 90, the isolation layer 80 covers the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21, the dielectric layer 50, the spin-orbit moment layer 30 and the substrate 10, and the top electrode 90 is connected to the storage magnetic tunnel junction 22 and extends above the isolation layer 80.

[0071] The material of the isolation layer 80 can be the same as that of the dielectric layer 50, for example, the materials of the isolation layer 80 and the dielectric layer 50 are both silicon nitride, so that the isolation layer 80 and the dielectric layer 50 form an integral structure. The top electrode 90 penetrates the isolation layer 80 to contact and conduct with the storage magnetic tunnel junction 22, and can be formed by opening a hole in the isolation layer 80 and filling it with a conductive material. The material of the top electrode 90 includes metal, such as copper. The top electrode 90 is also connected to an external circuit, for example, it is connected to a read circuit in the substrate 10 through a plug or a conductive through hole 11 in the isolation layer 80.

[0072] In the method for forming a semiconductor storage structure in an embodiment of the present application, a spin-orbit moment initial layer 31 and a magnetic tunnel junction stacking layer 23 are formed, and the magnetic tunnel junction stacking layer 23 is located on the spin-orbit moment initial layer 31; the magnetic tunnel junction stacking layer 23 is etched to form a storage magnetic tunnel junction 22 and a dummy magnetic tunnel junction 21, and the dummy magnetic tunnel junction 21 is located next to the storage magnetic tunnel junction 22; a dielectric layer 50 is formed, and the dielectric layer 50 at least fills the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21; using the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 as a mask, the spin-orbit moment initial layer 31 is etched to form a spin-orbit moment layer 30. The storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the dielectric layer 50 are used to pattern the spin-orbit moment initial layer 31. The spin-orbit moment layer 30 can be formed without separate photolithography, and there is no need to set a mask for the spin-orbit moment layer 30, which simplifies the formation process. At the same time, it can also avoid the overlay offset between the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30, ensure that the storage magnetic tunnel junction 22 and the spin-orbit moment layer 30 are aligned, thereby improving the write current efficiency and improving the performance of the semiconductor storage structure.

[0073] In some possible implementations, see Figure 30 to Figure 32 ,as well as Fig.28 , forming a dielectric layer 50 (step S300), including: depositing an initial dielectric layer 51, the initial dielectric layer 51 at least covers the spin-orbit moment initial layer 31, the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, and fills the gap between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21; etching the initial dielectric layer 51, removing part of the initial dielectric layer 51, and the remaining initial dielectric layer 51 forms the dielectric layer 50.

[0074] The initial dielectric layer 51 may be formed by vapor deposition, such as plasma enhanced chemical vapor deposition (PECVD). In the initial stage of the deposition of the initial dielectric layer 51, the top surface of the spin-orbit moment initial layer 31, the sidewalls of the storage magnetic tunnel junction 22, and the sidewalls of the dummy magnetic tunnel junction 21 are covered with a thin layer of the initial dielectric layer 51.

[0075] As the deposition thickness of the initial dielectric layer 51 increases, the initial dielectric layer 51 on the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 slowly extends in a direction parallel to the top surface of the spin-orbit moment initial layer 31, that is, the initial dielectric layer 51 is deposited on the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 and diffuses outward.

[0076] When the deposition thickness of the initial dielectric layer 51 reaches at least half of the minimum spacing between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, that is, the thickness of the initial dielectric layer 51 on the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 is not less than half of the spacing between the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, the initial dielectric layer 51 on the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 is in contact with each other, and is joined to the initial dielectric layer 51 above the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21 to form a complete and continuous step 52, so that the pattern corresponding to the spin-orbit moment layer 30 can be formed as quickly as possible under the premise that the deposition thickness of the initial dielectric layer 51 is as low as possible.

[0077] like Fig.31 As shown, the sidewalls and top surface of the storage magnetic tunnel junction 22, and the initial dielectric layer 51 on the sidewalls and top surface of the dummy magnetic tunnel junction 21 are higher than the initial dielectric layer 51 on the top surface of the spin-orbit moment initial layer 31. The sidewalls and top surface of the storage magnetic tunnel junction 22, and the initial dielectric layer 51 on the sidewalls and top surface of the dummy magnetic tunnel junction 21 correspond to the pattern of the spin-orbit moment layer 30, and its height is approximately equal to the height of the magnetic tunnel junction stack layer 23 (see Fig.21 ) and the total thickness of the mask layer 60 (if any).

[0078] The etching angle when etching the initial dielectric layer 51 can be 10° to 90°. For example, the initial dielectric layer 51 is etched in the vertical direction using anisotropic etching. The vertical direction refers to the direction perpendicular to the top surface of the initial dielectric layer 51. The thickness of the initial dielectric layer 51 on the sidewalls of the storage magnetic tunnel junction 22 and the sidewalls of the dummy magnetic tunnel junction 21 is greater than the thickness of the initial dielectric layer 51 on the top surface of the storage magnetic tunnel junction 22, the top surface of the dummy magnetic tunnel junction 21, and the top surface of the spin-orbit moment initial layer 31. The surface of the initial dielectric layer 51 facing away from the spin-orbit moment initial layer 31 sinks as a whole. After etching the initial dielectric layer 51, the morphology of the step 52 of the initial dielectric layer 51 can be retained.

[0079] In some possible examples, the initial dielectric layer 51 is etched to remove all of the initial dielectric layer 51 on the top surfaces of the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21, and the spin-orbit moment initial layer 31, and retain part of the initial dielectric layer 51 on the side walls of the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21. In this way, the top surfaces of the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21, and the spin-orbit moment initial layer 31 can be exposed, and the remaining initial dielectric layer 51 forms a dielectric layer 50.

[0080] It can be understood that when the etching conditions of the initial dielectric layer 51 cause the consumption rate of the initial dielectric layer 51 to be higher than that of the spin-orbit moment initial layer 31, it is necessary to remove all the initial dielectric layer 51 on the top surface of the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the spin-orbit moment initial layer 31, and change the etching conditions so that the consumption rate of the spin-orbit moment initial layer 31 is not lower than the consumption rate of the dielectric layer 50 and the mask layer 60 (if any), so that in the subsequent etching process of the spin-orbit moment initial layer 31, the dielectric layer 50 always exists on the area where the spin-orbit moment initial layer 31 needs to be retained, and the mask layer 60 (if any) exists above the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, thereby ensuring the shape of the formed spin-orbit moment layer 30 and the performance of the semiconductor storage structure.

[0081] In some other possible examples, part of the initial dielectric layer 51 on the top surface of the storage magnetic tunnel junction 22, the dummy magnetic tunnel junction 21 and the spin-orbit moment initial layer 31 is removed, and the initial dielectric layer 51 is thinned without exposing the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, while ensuring that the step 52 morphology of the initial dielectric layer 51 is transferred downward, and excessive consumption of the storage magnetic tunnel junction 22 / mask layer 60 (if any) can be avoided.

[0082] It is understandable that, in order to facilitate etching of the spin-orbit moment initial layer 31, the initial dielectric layer 51 can be thinned, the step 52 morphology of the initial dielectric layer 51 is retained, and the thickness of the initial dielectric layer 51 is reduced as a whole. When etching the spin-orbit moment initial layer 31, the etching conditions are changed so that the consumption rate of the spin-orbit moment initial layer 31 is not lower than the consumption rate of the dielectric layer 50 and the mask layer 60 (if any), so as to ensure that in the subsequent etching process of the spin-orbit moment initial layer 31, there is a dielectric layer 50 of sufficient thickness above the area where the spin-orbit moment initial layer 31 needs to be retained, and there is a mask layer 60 (if any) above the storage magnetic tunnel junction 22 and the dummy magnetic tunnel junction 21, so as to ensure the shape of the formed spin-orbit moment layer 30 and the performance of the semiconductor storage structure.

[0083] In some other possible examples, before etching the spin-orbit moment initial layer 31, part of the initial dielectric layer 51 may not be removed, and the entire deposited initial dielectric layer 51 may be retained. Afterwards, the initial dielectric layer 51 and the spin-orbit moment initial layer 31 are etched simultaneously to obtain the dielectric layer 50 and the spin-orbit moment layer 30.

[0084] It is understandable that when the etching conditions of the initial dielectric layer 51 do not consume the initial dielectric layer 51 at a rate lower than that of the spin-orbit moment initial layer 31 , etching the spin-orbit moment initial layer 31 will not consume more initial dielectric layer 51 , and there is no need to pre-etch the initial dielectric layer 51 .

[0085] In this specification, each embodiment or implementation is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other. The description of reference terms such as "one implementation", "some implementations", "illustrative implementations", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the implementation or example are included in at least one implementation or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more implementations or examples in a suitable manner.

[0086] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor storage structure, characterized in that: include: A spin-orbit moment layer, and a storage magnetic tunnel junction, a dummy magnetic tunnel junction and a dielectric layer arranged on the spin-orbit moment layer; The dummy magnetic tunnel junction is located beside the storage magnetic tunnel junction; The dielectric layer at least fills the gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; The spin-orbit moment layer is formed by etching using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as masks.

2. The semiconductor storage structure according to claim 1, characterized in that: Also includes: A substrate, wherein at least two conductive through holes are disposed in the substrate, and the conductive through holes are located on both sides of the storage magnetic tunnel junction; The orthographic projections of the storage magnetic tunnel junction, the dummy magnetic tunnel junction, and the dielectric layer on the substrate cover at least two of the conductive through holes on both sides of the storage magnetic tunnel junction.

3. The semiconductor storage structure according to claim 2, characterized in that: The virtual magnetic tunnel junction is provided with one, and the virtual magnetic tunnel junction covers one of the conductive through holes correspondingly; The dielectric layer also covers the side wall of the storage magnetic tunnel junction away from the end of the dummy magnetic tunnel junction, and correspondingly covers one of the conductive through holes.

4. The semiconductor storage structure according to claim 2, characterized in that: The virtual magnetic tunnel junctions are provided with two; The two virtual magnetic tunnel junctions respectively cover one corresponding conductive through hole.

5. The semiconductor storage structure according to any one of claims 1 to 4, characterized in that: The storage magnetic tunnel junction and the dummy magnetic tunnel junction are formed by synchronous etching.

6. The semiconductor storage structure according to any one of claims 1 to 4, characterized in that: The distances between the side walls of the dummy magnetic tunnel junction and the storage magnetic tunnel junction that are arranged opposite to each other are equal.

7. A method for forming a semiconductor storage structure, characterized in that: include: forming a spin-orbit moment initial layer and a magnetic tunnel junction stacking layer, wherein the magnetic tunnel junction stacking layer is located on the spin-orbit moment initial layer; Etching the magnetic tunnel junction stacking layer to form a storage magnetic tunnel junction and a dummy magnetic tunnel junction, wherein the dummy magnetic tunnel junction is located beside the storage magnetic tunnel junction; forming a dielectric layer, wherein the dielectric layer at least fills a gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; The spin-orbit moment initial layer is etched using the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the dielectric layer as masks to form a spin-orbit moment layer.

8. The forming method according to claim 7, characterized in that: Forming the dielectric layer includes: Depositing an initial dielectric layer, wherein the initial dielectric layer at least covers the spin-orbit moment initial layer, the storage magnetic tunnel junction and the dummy magnetic tunnel junction, and fills a gap between the storage magnetic tunnel junction and the dummy magnetic tunnel junction; The initial dielectric layer is etched to remove a portion of the initial dielectric layer, and the remaining initial dielectric layer forms the dielectric layer.

9. The forming method according to claim 8, characterized in that: Removing part of the initial dielectric layer, comprising: The entire initial dielectric layer on the top surfaces of the storage magnetic tunnel junction, the dummy magnetic tunnel junction and the spin-orbit moment initial layer is removed to expose the storage magnetic tunnel junction and the dummy magnetic tunnel junction.

10. The forming method according to claim 8, characterized in that: The thickness of the initial dielectric layer on the side walls of the storage magnetic tunnel junction and the dummy magnetic tunnel junction is not less than half of the distance between the storage magnetic tunnel junction and the dummy magnetic tunnel junction.

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