Y-shaped three-phase arc high-voltage discharge system for optical fiber fusion splicer

Abstract

The invention belongs to the field of optical fiber corollary equipment, and discloses a Y-type three-phase arc high-voltage discharge system for an optical fiber fusion splicer, a ZYNQ development board generates two signals which are respectively used as driving signals of switching tubes of a Boost circuit module and a Flyback circuit module, the ZYNQ development board boosts an input direct-current voltage through the Boost circuit module, and outputs the boosted direct-current voltage to the Flyback circuit module; the system comprises three groups of Flyback circuit modules, the three groups of Flyback circuit modules are boosted and then serve as input voltages of the three groups of Flyback circuit modules, three groups of three-phase direct-current high voltages with the same voltage amplitude and the phase difference of 120 degrees in pairs are obtained, the three groups of Flyback circuit modules are connected with a three-phase discharging device, the three-phase direct-current high voltages break down air to form three-phase Y-shaped electric arcs, and optical fibers are welded through radiant heat zones generated by the electric arcs. The heat production power is high, so that welding of large-diameter optical fibers is facilitated; the temperature in the thermal radiation field is radially and symmetrically distributed, the center of the temperature zone is uniformly heated, and the heating effect is good.

Description

Technical Field

[0001] The invention relates to the field of optical fiber supporting equipment, and in particular to a Y-shaped three-phase arc high-voltage discharge system for an optical fiber fusion splicer, and can also be used for the preparation of optical fiber related devices. Background Art

[0002] As optical fiber communication enters a stage of rapid development, the demand for high-end optical fiber fusion processing equipment has greatly increased, and higher requirements have been put forward for optical fiber fusion processing equipment. China has always been in a leading position in the research and development of optical fiber fusion splicers. Optical fiber fusion splicers are key equipment for connecting optical fibers, and their performance directly affects the quality and reliability of optical fiber communication.

[0003] The high-voltage discharge system in the fiber fusion splicer is one of the key components for achieving fiber fusion splicing. China is also conducting a series of research and innovations in the high-voltage discharge system of the fiber fusion splicer. Researchers have been working to improve the efficiency and stability of high-voltage discharge technology. By optimizing the design and control algorithm of the high-voltage power supply, they are trying to achieve more accurate and reliable high-voltage discharge to ensure the quality of fiber fusion splicing.

[0004] The electrode needles in the fiber fusion splicer usually use two electrodes, which are responsible for transmitting the current required for high-voltage discharge and providing heat to melt the optical fiber during the fiber fusion splicing process. However, this method can only heat the middle high-temperature zone of the high-voltage spindle-shaped arc generated by the discharge of the two electrode needles. The high-temperature zone is small in area and the heat generation power is relatively small, which is not conducive to the fusion of large-diameter optical fibers. Although the design of the two electrodes is simple, easy to operate and maintain, there may be certain limitations for some complex optical fiber connection requirements. In specific application scenarios, more electrodes or different designs may be required to meet higher requirements for optical fiber fusion quality. Summary of the invention

[0005] The purpose of the present invention is to solve the deficiencies in the prior art and to provide a Y-type three-phase arc high-voltage discharge system for an optical fiber fusion splicer.

[0006] In order to achieve the above object, the present invention is implemented by the following technical scheme: comprising a ZYNQ development board, a Boost boost circuit module, three sets of Flyback circuit modules, and a three-phase discharge device.

[0007] The ZYNQ development board generates two PWM signals, which are used as driving signals of the MOS tubes of the Boost circuit module and the Flyback circuit module respectively. First, the ZYNQ development board boosts the input DC voltage through the Boost circuit module, and the boosted DC voltage is used as the input voltage of the three groups of Flyback circuit modules, so as to obtain three groups of three-phase DC high voltages with the same voltage amplitude and a phase difference of 120°. The three groups of Flyback circuit modules are connected to the three-phase discharge device, and the three-phase DC high voltage breaks through the air to form a three-phase "Y-shaped" arc, and the radiant heat zone generated by the arc is used to weld the optical fiber;

[0008] The ZYNQ development board integrates a PL end and a PS end, and the PL end and the PS end are connected via an AXI bus;

[0009] The Boost circuit module includes an input capacitor, an inductor L1, a MOS tube Q1, a diode D1, an output capacitor and a gate drive module A. The gate drive module A amplifies the current of the PWM output by the ZYNQ development board to drive the MOS tube Q1. When the MOS tube Q1 is in the on state, the inductor L1 is grounded and the diode D1 is cut off. When the MOS tube Q1 is in the off state, the diode D1 is forward-conducted, and the input DC voltage is increased and output through the output capacitor;

[0010] The Flyback circuit includes a transformer T1, a MOS tube Q5, a high-voltage diode D6, a high-voltage diode D8, an output capacitor C20 and a gate drive module B. The gate drive module B amplifies the current of the PWM output by the ZYNQ development board to drive the MOS tube Q5. Through the periodic switching of the MOS tube Q5, the transformer T1 realizes energy storage and transmission under different working conditions, and then the input DC voltage is increased through rectification by the high-voltage diode D6 and the high-voltage diode D8 and filtering by the output capacitor C20;

[0011] The three-phase discharge device includes three copper columns, which form a "Y"-shaped structure. An electrode rod is arranged on each copper column. Three groups of DC high voltages are connected in sequence using high-voltage diodes, that is, the low potential end of the first group is connected to the high potential end of the second group, the low potential end of the second group is connected to the high potential end of the third group, and the low potential end of the third group is connected to the high potential end of the first group. The three ports are respectively connected to the three-phase discharge device.

[0012] Preferably, the ZYNQ development board generates four PWM waves, namely PWM0, PWM1, PWM2, and PWM3, wherein the duty cycle of PWM0 is 50% and the frequency is 300KHz, and it is used to control the amplitude of the boost of the Boost circuit module; the duty cycle of PWM1, PWM2, and PWM3 is 66%, the frequency is 30KHz, and the phases differ by 120°, and they are used to control three identical Flyback circuit modules, and convert the output voltage of the Boost circuit into three groups of full-wave pulse high voltages with equal amplitudes and phases differing by 120°.

[0013] Preferably, in the Boost circuit module, when the MOS tube Q1 is in the on state, the relationship is as follows:

[0014]

[0015] When the MOS tube Q1 is in the off state, the relationship is as follows:

[0016]

[0017] The initial value and final value of the inductor current are equal, and the integral of the voltage across the two ends over time is 0, which gives the following relationship:

[0018]

[0019] Among them, V s is the input voltage, V O is the output voltage, L is the self-inductance coefficient, t is the time, i L is the inductor current, T off is the cut-off time of MOS tube Q1, T on is the conduction time of MOS tube Q1, D is the duty cycle of PWM signal, Δi L+ is the current change when MOS tube Q1 is turned on, Δi L- It is the current change when MOS tube Q1 is turned off.

[0020] Preferably, the gate drive module A includes a gate driver chip U1, resistors R1, R2, R3 and capacitor C2. When the MOS tube Q1 is in the on state, the inductor L1 is grounded, the diode D1 is cut off, and the power supply voltage charges the inductor L1 after being stabilized by the input capacitor, and at the same time provides voltage to the gate drive chip U1. The waveform of PWMA output by the ZYNQ development board remains unchanged after passing through the gate drive chip U1, and the current becomes larger. The appropriate switching speed is obtained through the parallel resistors R1 and R2 to control the on and off of the MOS tube Q1. The function of the resistor R3 is to pull the gate-source voltage of the MOS tube Q1 down to 0V when the input signal is open.

[0021] Preferably, in the Flyback circuit module, the ratio of the output voltage to the input voltage is:

[0022]

[0023] Where N1 is the number of turns of the primary coil, N2 is the number of turns of the secondary coil, V S1 is the input voltage, V O1 is the output voltage, and D is the duty cycle of the PWM signal.

[0024] Preferably, the gate drive module B shown includes a gate drive chip U6, a resistor R17, a resistor R18, a resistor R20 and a capacitor C21. The power supply voltage provides voltage to the gate drive chip U6 after being stabilized by the capacitor C21. The waveform of the PWM-A output by the ZYNQ development board remains unchanged after passing through the gate drive chip U6, and the current becomes larger. The appropriate switching speed is obtained through the parallel resistors R17 and R18 to control the opening and closing of the MOS tube Q1. The function of the resistor R20 is to pull the gate-source voltage of the MOS tube Q5 down to 0V when the input signal is open.

[0025] Preferably, a set of RCD circuits is provided on the primary side of the transformer T1 of the Flyback circuit module for absorbing the leakage inductance energy of the primary side of the transformer T1 to prevent damage to the MOS tube Q5. The RCD circuit includes a diode D7, a resistor R15 and a capacitor C19. The resistor R15 and the capacitor C19 are connected in parallel and in series with the diode D7.

[0026] Preferably, in order to obtain a PWM wave with a smooth waveform, the clock IP core of the ZYNQ development board is called with a clock frequency of 50M. The register is defined as a counter, and the rising edge of the clock is used as the trigger point. The counter value increases sequentially. When the value accumulates to a certain level, it is compared with the preset value to generate PWM. When the counter value is less than the duty cycle, the PWM output is a high level; otherwise, it is a low level, thereby realizing a PWM wave with adjustable duty cycle.

[0027] The system has a large area of ​​thermal radiation field, high heat generation power, and a wide control range of discharge power, which is conducive to the welding of large diameter optical fibers, with lower welding losses and faster welding speeds. The design of three electrodes provides more parameter adjustment space and can control the welding process more flexibly. This is beneficial for adapting to different types and diameters of optical fibers and different connection requirements. The system with three electrodes can more easily adapt to various optical fiber types, including optical fibers with different diameters, thereby expanding the scope of application of the equipment. By more accurately controlling welding parameters such as temperature and current, the design of three electrodes helps to improve the quality of welding and reduce the loss of optical signal transmission. For some scenarios that require more complex connections, such as multi-core optical fibers or optical fibers with special structures, the design of three electrodes can better adapt to these complex connection requirements. Since the parameters can be adjusted more flexibly, the system with three electrodes can achieve faster and more efficient fiber welding and improve production efficiency. By using three electrodes, a higher degree of alignment can be achieved, ensuring that the position and angle of the optical fiber during the welding process are more accurate.

[0028] The present invention has the following beneficial effects: (1) The Y-type three-phase discharge system provided by the present invention has significant advantages over the two-pole discharge system. It has higher power, higher temperature, more uniform arc zone thermal field distribution, and performs well in the welding of large core diameter optical fibers, and has good application prospects.

[0029] (2) 1. The three-phase discharge electrode used has a large-area thermal radiation field, high heat generation power, and a wide controllable range of discharge power, which is conducive to the welding of large-diameter optical fibers; 2. The temperature in the thermal radiation field formed by Y-type discharge is radially symmetrically distributed, the intensity of the three arcs is the same, the center of the temperature zone is heated evenly, and the heating effect is good; 3. It has low welding loss and fast welding speed, which greatly shortens the welding time; 4. It is suitable for the welding of large-core diameter and small-core diameter optical fibers, as well as the preparation of optical fiber-related devices, and has a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a physical picture of a Y-type three-phase arc high-voltage discharge system.

[0031] Figure 2 It is a structural diagram of the Boost circuit module in an embodiment of the present invention.

[0032] Figure 3 4 is a structural diagram of a Flyback circuit module in an embodiment of the present invention.

[0033] Figure 4 It is the ZYNQ development board in the embodiment of the present invention.

[0034] Figure 5 It is a structural diagram of a three-phase discharge electrode in an embodiment of the present invention.

[0035] Figure 6 It is a diagram showing the actual effect of the three-phase discharge electrode in the embodiment of the present invention.

[0036] Figure 7 Schematic diagram of a system circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present invention will be further described below in conjunction with the embodiments, but they are not intended to limit the present invention.

[0038] A Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicing machine, such as Figure 1 As shown in the figure, from left to right are the Venus ZYNQ 7010 development board, Boost circuit module, Flyback circuit module and three-phase discharge device. The ZYNQ development board as a control module mainly generates a set of 300KHzPWM signals and three sets of 30KHzPWM signals, which are used as the driving signals of the Boost circuit and Flyback circuit switch tubes respectively. In terms of hardware, the input DC voltage 12V is first boosted to 24V through the Boost circuit (MOS tube switching frequency is 300K, duty cycle is 50%), and then the 24V voltage output by the Boost circuit module is used as the input voltage of the three sets of Flyback circuit modules, so as to obtain three sets of three-phase DC high voltage with the same voltage amplitude of 4800V and a phase difference of 120° between each two (MOS tube switching frequency is 30K, duty cycle is 66%, and phase difference is 120° between each two). Finally, it is connected to the three-phase discharge device, and the high voltage breaks through the air to form a three-phase "Y-type" arc, and the radiant heat zone generated by the arc is used to weld the optical fiber. The ZYNQ development board generates a PWM wave with a variable duty cycle to control the DC voltage amplitude of the Boost boost and the AC voltage amplitude of the Flyback output.

[0039] like Figure 1As shown, in order to meet the actual situation that the power supply voltage of the driver chip is lower than the required DC power, the Boost boost circuit is selected as the primary boost part. The Boost boost circuit includes an input capacitor, an inductor L1, a MOS tube Q1, a diode D1, an output capacitor and a gate drive module A. The input capacitor includes a parallel electrolytic capacitor E1 and a capacitor C1, and the output capacitor includes a parallel electrolytic capacitor E2, E3, a capacitor C3, C4, and C5. The gate drive module A includes a gate driver chip U1, resistors R1, R2, R3, and a capacitor C2. The module is used to amplify the current of the PWM output of the ZYNQ development board to better drive the MOS tube Q1, and the function is to boost the input voltage according to the duty cycle of the PWM signal. When the MOS tube Q1 is in the on state, the inductor L1 is grounded, the diode D1 is cut off, and the power supply voltage +12V-IN charges the inductor L1 after being stabilized by the input capacitor (electrolytic capacitor E1 and capacitor C1), and the inductor current increases linearly with time. The waveform of PWMA output by the ZYNQ development board remains unchanged after passing through the gate driver chip U1, and the current increases. After passing through the parallel resistors R1 and R2, the appropriate switching speed is obtained to control the opening and closing of the MOS tube Q1. The power supply voltage +12V-IN provides voltage to the gate driver chip U1 after being stabilized by the capacitor C2. The function of R3 is to pull the gate-source voltage of the MOS tube Q1 down to 0V when the input signal is open. When the MOS tube Q1 is in the off state, the current at both ends of the inductor L1 cannot suddenly change, and decreases linearly with time. The diode D1 is forward-conducted, and the current supplies power to the load and charges the capacitors at both ends of the load; when the MOS tube Q1 is turned on again, the charging process is repeated, the diode D1 is reversely cut off, and the voltage of the capacitors at both ends of the load cannot suddenly change, and continues to discharge to the load.

[0040] In the Boost circuit module, when the MOS tube Q1 is in the on state, the following relationship exists:

[0041]

[0042] When the MOS tube Q1 is in the off state, the following relationship exists:

[0043]

[0044] According to the volt-second balance law of the inductor voltage, when the switching power supply is working stably, the initial value and final value of the inductor current are equal, and the integral of the voltage at both ends over time is 0. The following relationship is obtained:

[0045]

[0046] Among them, V s is the input voltage, V O is the output voltage, L is the self-inductance coefficient, t is the time, ΔiL+ is the ripple increment of the upper half of the inductor current, Δi L- is the ripple increment of the lower half of the inductor current, T off is the cut-off time of MOS tube Q1, T on is the conduction time of MOS tube Q1, and D is the duty cycle of PWM signal.

[0047] In the Boost circuit module, the GPIO on the ZYNQ development board outputs a control signal to control the conduction and interruption of the MOS tube Q1. Considering that the driving capability of the GPIO is limited and cannot directly drive the gate of the MOS tube Q1, the gate driver chip U1 is added to play a current amplification role to meet the driving conditions for the on and off of the MOS tube Q1. Among them, the resistor between the gate driver module A can reduce the reverse impulse impact of the impulse voltage and ripple current on the chip, and play a role in protecting the circuit.

[0048] In order to effectively reduce the output voltage ripple of the Boost circuit, multiple output capacitors (E2, E3, C3, C4, C5) are connected in parallel to increase the capacitance. At the same time, these output capacitors (E2, E3, C3, C4, C5) have the advantage of low ESR. These two points can effectively reduce the voltage ripple, make the arc more stable, make the optical fiber fusion more complete and reduce the fusion loss.

[0049] like Figure 2 As shown, the secondary boost circuit selects the Flyback circuit module, which includes a transformer T1, a MOS tube Q5, high-voltage diodes D6, D8, an output capacitor C20 and a gate drive module B. The gate drive module B includes a gate drive chip U6, resistors R17, R18, R20 and a capacitor C21. The module is used to amplify the current of the PWM output of the ZYNQ development board to better drive the MOS tube Q5. The main function is to enable the transformer T1 to store and transfer energy under different working conditions through the periodic on and off of the MOS tube Q5, and then increase the input DC voltage (the voltage after being boosted by the Boost boost circuit module) to the required output DC voltage through rectification by the high-voltage diodes D6, D8 and filtering by the output capacitor C20.

[0050] The waveform of PWM-A output by the ZYNQ development board remains unchanged after passing through the gate driver chip U6, and the current becomes larger. After passing through the parallel resistors R17 and R18, the appropriate switching speed is obtained to control the opening and closing of the MOS tube Q1. The power supply voltage +12V-IN provides voltage for the gate driver chip U1 after being stabilized by the capacitor C21. The function of the resistor R20 is to pull the gate-source voltage of the MOS tube Q5 down to 0V when the input signal is open. When the MOS tube Q5 is turned on, the current flows into the same-name end of the primary coil of the transformer T1. Since the primary and secondary coils are in different phases, when the current flows through the primary coil, the unidirectional conduction performance of the high-voltage diodes D6 and D8 in the secondary coil makes the current zero. The electrical energy is converted into magnetic energy and stored in the primary coil of the transformer. When the MOS tube Q5 is turned off, the magnetic energy in the primary coil is converted into electrical energy, forming an electric field with opposite polarity, and the high-voltage diodes D6 and D8 are turned on. The current flows to the load through the high-voltage diodes D6 and D8, and the energy of the transformer T1 is released in time to provide the load voltage and current. The ratio of output to input voltage is:

[0051]

[0052] Where N1 is the number of turns of the primary coil, N2 is the number of turns of the secondary coil, V S1 is the input voltage, V O1 is the output voltage, D is the duty cycle of the PWM signal;

[0053] In order to simplify the circuit design, a gate drive module B is added so that the GPIO of the ZYNQ development board can directly control the duty cycle and frequency of the on and off of the MOS tube Q5.

[0054] Compared with the classic Flyback circuit, a set of RCD circuits is added to the primary side of transformer T1 in the system. The RCD circuit includes diode D7, resistor R15 and capacitor C19. The function is to absorb the leakage inductance energy of the primary side of transformer T1 and prevent the MOS tube Q5 from being damaged. Resistor R15 and capacitor C19 are connected in parallel and in series with diode D7. At the same time, due to the high output voltage, the secondary side rectifier circuit of transformer T1 is composed of high-voltage diodes D6, D8 and output capacitor C20. When the MOS tube Q5 in the Flyback circuit template is turned off, the energy stored in transformer T1 is charged to the output capacitor C20 through high-voltage diodes D6 and D8; when the MOS tube Q5 is turned on, the transformer T1 is charged, and the output capacitor C20 is discharged through the electrode needle. In the connection with the three-phase discharge device, the copper column is directly connected to the electrode needle through the red and black wires, and the output voltage of each phase is connected to the output end of the next phase transformer, such as PowerAA is connected to P BB, Power BB is connected to P CC, and Power CC is connected to P AA. In order to ensure that the discharge direction is always consistent and the three arcs do not interfere with each other, a high-voltage diode is connected in series between each two-phase voltage. Vivado is used to set the phase of the three-phase PWM signal that provides drive for the three sets of Flyback circuits to be 120° apart from each other. The three-phase PWM wave is used to drive the Flyback circuit module, so that only one arc is discharged at each moment, and the other two Flyback circuit modules charge the output capacitor C20.

[0055] like Figure 3As shown in the figure, the ZYNQ-7000 series is a SoC (System on Chip) device launched by Xilinx, integrating programmable logic (PL) and dual-core ARM Cortex-A9 processor system (PS). The xc7z010 is one of the models. The following briefly describes the FPGA composition and functions of each module on the PL side of the xc7z010 model: Logic units (LUTs) are used to implement various logic functions, including Boolean logic, arithmetic operations, etc. Registers are used to store intermediate results and control signals. DSP on-chip resources are used to implement digital signal processing functions, including multipliers and accumulators. IOBs (input / output modules) are used to connect to external devices, including input / output pins, clocks, etc. Distributed RAM: Small-scale RAM distributed between logic units for storing temporary data. Block RAM: Used to implement larger-scale memory, which can be used to store data, programs, etc. The clock management unit (CMU) is used to generate and distribute various clock signals, including the clock on the PL side. IO resources are used to connect external devices and devices. Configuration logic is used to load the configuration bitstream of the FPGA. The debug interface provides debugging functions, including JTAG interface, etc. In the ZYNQ series, PL and PS (processor system) are connected to each other through a high-performance AXI bus, which realizes the close integration of hardware and software, allowing developers to implement a hybrid design of hardware acceleration and processor processing on the same chip.

[0056] like Figure 4 As shown, after the three groups of full-wave pulse high voltage obtained by the Flyback circuit module are rectified into half-wave pulse high voltage, three copper column outputs are obtained. Then the three outputs are connected to the electrode needles respectively to form a Y-type three-phase discharge.

[0057] Figure 5 This is the actual discharge effect of a three-phase arc high-voltage discharge system. The three arcs have the same intensity and the equilateral triangle heating radiation field formed is uniform, which has an excellent heating and melting effect.

[0058] like Figure 6 As shown, this design uses the ZYNQ development board of model xc7z010 and the Vivado design suite of Xilinx. After selecting the corresponding chip, the Verilog language is used to write the software control program of the PWM wave hardware description circuit of the overall discharge module.

[0059] In order to obtain a PWM wave with a smooth waveform, the clock IP core is called with a clock frequency of 50M. The register is defined as a counter, with the rising edge of the clock as the trigger point. The counter value increases in sequence. When the value accumulates to a certain level, it is compared with the preset value to generate PWM. When the counter value is less than the duty cycle, the PWM output is high; otherwise, it is low. In this way, a PWM wave with adjustable duty cycle is realized. The cycle control can control the cycle of PWM by adjusting the cycle constant parameter. The reset processing resets the counter and PWM register to the initial state when the reset signal is high. According to this software design, four PWM waves are generated using the PL end, i.e., FPGA, on the ZYNQ development board. One is a Boost circuit drive signal with a frequency of 300KHz and a duty cycle of 50%, and the other three are three-phase Flyback circuit drive signals with a frequency of 30KHz and a duty cycle of 66%.

[0060] The above shows and describes the basic principles, main features and advantages of the present invention. However, the above is only a specific embodiment of the present invention, and the technical features of the present invention are not limited thereto. Any other implementation methods derived by any technician in the field without departing from the technical solution of the present invention should be included in the patent scope of the present invention.

Claims

1. A Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicing machine, characterized in that: Including ZYNQ development board, Boost circuit module, three sets of Flyback circuit modules, and three-phase discharge device. The ZYNQ development board generates two PWM signals, which are used as driving signals for the MOS tubes of the Boost circuit module and the Flyback circuit module respectively. First, the ZYNQ development board boosts the input DC voltage through the Boost circuit module, and the boosted DC voltage is used as the input voltage of the three groups of Flyback circuit modules, so as to obtain three groups of three-phase DC high voltages with the same voltage amplitude and a phase difference of 120°. The three groups of Flyback circuit modules are connected to the three-phase discharge device, and the three-phase DC high voltage breaks through the air to form a three-phase "Y-shaped" arc, and the radiant heat zone generated by the arc is used to weld the optical fiber; The ZYNQ development board integrates a PL end and a PS end, and the PL end and the PS end are connected via an AXI bus; The Boost circuit module includes an input capacitor, an inductor L1, a MOS tube Q1, a diode D1, an output capacitor and a gate drive module A. The gate drive module A amplifies the current of the PWM output by the ZYNQ development board to drive the MOS tube Q1. When the MOS tube Q1 is in the on state, the inductor L1 is grounded and the diode D1 is cut off. When the MOS tube Q1 is in the off state, the diode D1 is forward-conducted, and the input DC voltage is increased and output through the output capacitor; The Flyback circuit includes a transformer T1, a MOS tube Q5, a high-voltage diode D6, a high-voltage diode D8, an output capacitor C20 and a gate drive module B. The gate drive module B amplifies the current of the PWM output by the ZYNQ development board to drive the MOS tube Q5. Through the periodic switching of the MOS tube Q5, the transformer T1 realizes energy storage and transmission under different working conditions, and then the input DC voltage is increased through rectification by the high-voltage diode D6 and the high-voltage diode D8 and filtering by the output capacitor C20; The three-phase discharge device includes three copper columns, which form a "Y"-shaped structure. An electrode rod is arranged on each copper column. Three groups of DC high voltages are connected in sequence using high-voltage diodes, that is, the low potential end of the first group is connected to the high potential end of the second group, the low potential end of the second group is connected to the high potential end of the third group, and the low potential end of the third group is connected to the high potential end of the first group. The three ports are respectively connected to the three-phase discharge device.

2. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: The ZYNQ development board generates four PWM waves, namely PWM0, PWM1, PWM2, and PWM3. The duty cycle of PWM0 is 50% and the frequency is 300KHz, which is used to control the amplitude of the boost circuit module; the duty cycle of PWM1, PWM2, and PWM3 is 66%, the frequency is 30KHz, and the phase difference is 120° between each other, which is used to control three identical Flyback circuit modules to convert the output voltage of the Boost circuit into three groups of full-wave pulse high voltages with equal amplitudes and phase difference of 120° between each other.

3. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: In the Boost circuit module, when the MOS tube Q1 is in the on state, the relationship is as follows: When the MOS tube Q1 is in the off state, the relationship is as follows: The initial value and final value of the inductor current are equal, and the integral of the voltage across the two ends over time is 0, which gives the following relationship: Among them, V s is the input voltage, V O is the output voltage, L is the self-inductance coefficient, t is the time, i L is the inductor current, T off is the cut-off time of MOS tube Q1, T on is the conduction time of MOS tube Q1, D is the duty cycle of PWM signal, Δi L+ is the current change when MOS tube Q1 is turned on, Δi L- It is the current change when MOS tube Q1 is turned off.

4. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: The gate drive module A includes a gate driver chip U1, resistors R1, R2, R3 and capacitor C2. When the MOS tube Q1 is in the on state, the inductor L1 is grounded, the diode D1 is cut off, and the power supply voltage charges the inductor L1 after being stabilized by the input capacitor, and at the same time provides voltage to the gate drive chip U1. The waveform of PWMA output by the ZYNQ development board remains unchanged after passing through the gate drive chip U1, and the current becomes larger. The appropriate switching speed is obtained through the parallel resistors R1 and R2 to control the on and off of the MOS tube Q1. The function of the resistor R3 is to pull the gate-source voltage of the MOS tube Q1 down to 0V when the input signal is open.

5. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: In the Flyback circuit module, the ratio of output to input voltage is: Where N1 is the number of turns of the primary coil, N2 is the number of turns of the secondary coil, V S1 is the input voltage, V O1 is the output voltage, and D is the duty cycle of the PWM signal.

6. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: The gate drive module B shown includes a gate drive chip U6, a resistor R17, a resistor R18, a resistor R20 and a capacitor C21. The power supply voltage provides voltage for the gate drive chip U6 after being stabilized by the capacitor C21. The waveform of the PWM-A output by the ZYNQ development board remains unchanged after passing through the gate drive chip U6, and the current becomes larger. The appropriate switching speed is obtained through the parallel resistors R17 and R18 to control the opening and closing of the MOS tube Q1. The function of the resistor R20 is to pull the gate-source voltage of the MOS tube Q5 down to 0V when the input signal is open.

7. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: The primary side of the transformer T1 of the Flyback circuit module is provided with a set of RCD circuits for absorbing the leakage inductance energy of the primary side of the transformer T1 to prevent damage to the MOS tube Q5. The RCD circuit includes a diode D7, a resistor R15 and a capacitor C19. The resistor R15 and the capacitor C19 are connected in parallel and in series with the diode D7.

8. The Y-type three-phase arc high-voltage discharge system for optical fiber fusion splicer according to claim 1, characterized in that: In order to obtain a PWM wave with a smooth waveform, the clock IP core of the ZYNQ development board is called with a clock frequency of 50M. The register is defined as a counter. The rising edge of the clock is used as the trigger point, and the counter value increases sequentially. When the value accumulates to a certain level, it is compared with the preset value to generate PWM. When the counter value is less than the duty cycle, the PWM output is a high level; otherwise, it is a low level, realizing a PWM wave with adjustable duty cycle.

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