Data transmission method, device, equipment and medium
By receiving and comparing the enqueue information in a multi-core processor system, generating port information tags, and making dequeue requests through the arbitration management unit, the communication congestion problem caused by the significant increase in the amount of communication data between cores is solved, and efficient management of data transmission and traffic control are achieved.
Patent Information
- Application Number
- CN202510163683.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-14
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2045-02-14
AI Technical Summary
With the development of multi-core processors, the amount of communication data between cores has increased significantly. The traditional information management mechanism cannot meet business needs and is prone to communication congestion.
Provides a data transmission method, by receiving the incoming information of the originating processor core and its occupied memory value, comparing it with the remaining space in the cache management unit, and performing physical incoming or backpressure of data; generating port information tags, making dequeuing requests through the arbitration management unit, storing them in the message queue pool, and performing packet transmission.
Effectively manage data transmission, control data traffic during congestion, and avoid blockage and delay in communication systems.
Smart Images

Figure CN119668902A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of data processing technology, and in particular to a data transmission method, device, equipment and medium. Background Art
[0002] At present, with the development of electronic information technology, multi-core processors are gradually replacing single-core processors, and multi-core processors have become the mainstream design of system-level integrated circuits (SOC, System on Chip); each core in a multi-core processor is responsible for specific tasks, such as logical operations, peripheral scheduling or algorithm acceleration, etc.; with the increase in the number of integrated circuit cores, the amount of communication data between cores has increased significantly, and traditional information management mechanisms cannot meet business needs, and communication congestion is prone to occur. Summary of the invention
[0003] In order to overcome the above-mentioned technical defects, the purpose of the present application is to provide a data transmission method, device, equipment and medium, the method comprising: receiving any enqueue information of an originating processor core and the occupied memory value of the enqueue information; comparing the occupied memory value of the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; in response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueue information, performing physical enqueue of data; generating a port information tag of the originating processor core according to the enqueue information of the originating processor core; and synchronizing the arbitration management unit with the target processor core. The corresponding arbitrator is set as the target arbitrator; any dequeue information of the target processor core is generated according to the port information label of the originating processor core; the remaining space of the data dequeue cache queue corresponding to the target processor core is judged; in response to the fact that the remaining space of the data dequeue cache queue corresponding to the target processor core is not full and there is any dequeue information to be sent to the target processor core in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator, and the data is physically dequeued; a dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups. The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delay of the communication system.
[0004] The specific technical solutions provided by the embodiments of this application are as follows: In a first aspect, the present application provides a data transmission method, which is applied to a multi-core data transmission system, wherein the system includes a message queue pool, a cache management unit, and an arbitration management unit; the message queue pool includes a plurality of queues, the arbitration management unit includes a plurality of arbitrators, and the method includes: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0005] In one embodiment, before receiving any one of the enqueue information of the originating processor core and the occupied memory value of the enqueue information, the method includes: Acquire a data frame of the originating processor core, wherein the data frame includes an ID address of a data transmission target processor core, a data message ID, a data message priority, and a data frame head and tail flag; Determine the enqueue information of the originating processor core through the data message ID; Determine the memory occupied by the queue information through the data frame header and frame tail flags; The enqueuing information of the originating processor core and the occupied memory value of the enqueuing information are stored in groups.
[0006] In one embodiment, the method comprises: In response to the remaining space corresponding to the originating processor core in the cache management unit being less than the occupied memory value of the enqueue information, the enqueue information of the originating processor core is stopped from being received, and data enqueue back pressure is performed.
[0007] In one embodiment, the method comprises: In response to the data dequeue cache queue space corresponding to the target processor core being full or the cache area of the originating processor core not having any dequeue information to be sent to the target processor core, a dequeue request is resent to the message queue pool.
[0008] In one embodiment, the generating a dequeue request queue through the dequeue requests of each port of the message queue pool and transmitting the data in groups includes: Generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and store the dequeue request queue separately; When the storage space of the dequeue cache queue is not full, the dequeue request queue is stored in the corresponding dequeue cache queue, and the data is transmitted in groups.
[0009] In one embodiment, the dequeue request queue is generated through the dequeue request of each port of the message queue pool, and after the data is transmitted in groups, the method includes: The cache management unit initializes the port information tag of the originating processor core according to the dequeue information of the target processor core, and updates the remaining storage space of the cache area of the cache management unit.
[0010] In one embodiment, storing any dequeue information of the target processor core to a message queue pool through the target arbitrator to perform physical dequeue of data includes: Determining the priority of the target processor core dequeue information by the target arbiter; Determining a priority level of dequeued information according to a network application type of the dequeued information of the target processor core, wherein the network application type includes voice over internet protocol, video streaming, email, and web browsing; According to the priority level of the dequeue information, the dequeue information of the target processor core is stored in a message queue pool, and data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determine the time order scheduling strategy of the dequeue information arriving at the target processor core through the target arbitrator; Distribute the dequeue information to different queues according to the time order priority of the dequeue information, prioritize the dequeue information that arrives at the target processor core, store it in the message queue pool, and perform physical dequeue of the data; When the dequeue information priority level strategy and the time sequence scheduling strategy are determined by the network application type of the dequeue information at the same time, the target arbitrator preferentially stores the dequeue information of the target processor core into the message queue pool through the time sequence scheduling strategy to perform physical data dequeue.
[0011] In a second aspect, the present application further provides a data transmission device, which is applied to a multi-core data transmission system, wherein the system includes a message queue pool, a cache management unit, and an arbitration management unit; the message queue pool includes several queues, the arbitration management unit includes several arbitrators, and the device includes: A receiving module, used for receiving any one of the enqueuing information and the occupied memory value of the enqueuing information from the originating processor core; A comparison module, used for comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; A first execution module, configured to execute physical enqueuing of data in response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information; A generating module, configured to generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; determine a dequeue request through the target arbitrator, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; A setting module, used for setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; A determination module, used for determining the remaining space of the data dequeue cache queue corresponding to the target processor core; A second execution module is configured to, in response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and the cache area of the originating processor core having any dequeue information to be sent to the target processor core, store any dequeue information of the target processor core in the message queue pool through the target arbitrator, and perform physical dequeue of the data; The transmission module is used to generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and transmit the data in groups.
[0012] In a third aspect, a data transmission device is also provided, including: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the data transmission method as described in any one of the first aspects.
[0013] In a fourth aspect, the present application further provides a computer device, the device comprising: A memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the data transmission method as described in any one of the first aspects.
[0014] In a fifth aspect, the present application further provides a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of any of the data transmission methods described in the first aspect.
[0015] In a sixth aspect, the present application further provides a computer storage medium, the medium comprising: A computer program is stored thereon, and when the computer program is executed by a processor, the steps of any data transmission method described in the first aspect are implemented.
[0016] Compared with the prior art, the method described in the technical solution provided in the embodiment of the present application includes: receiving any one of the enqueue information of the originating processor core and the occupied memory value of the enqueue information; comparing the occupied memory value of the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; in response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueue information, performing physical enqueue of data; generating a port information tag of the originating processor core according to the enqueue information of the originating processor core; setting the arbitrator corresponding to the arbitration management unit and the target processor core as the target arbitrator; and The target arbiter determines the dequeue request, generates any dequeue information of the target processor core according to the port information tag of the originating processor core; judges the remaining space of the data dequeue cache queue corresponding to the target processor core; in response to the fact that the remaining space of the data dequeue cache queue corresponding to the target processor core is not full and there is any dequeue information to be sent to the target processor core in the cache area of the originating processor core, the target arbiter stores any dequeue information of the target processor core in the message queue pool to perform physical dequeue of the data; generates a dequeue request queue through the dequeue requests of each port of the message queue pool, and transmits the data in groups. The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delay of the communication system.
[0017] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0018] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0020] Figure 1 A first structural diagram of a data transmission system provided in Embodiment 1 of the present application; Figure 2 A second structural diagram of the data transmission system provided in Embodiment 1 of the present application; Figure 3 A first flow chart of a data transmission method provided in Embodiment 1 of the present application; Figure 4 A second flow chart of the data transmission method provided in Embodiment 2 of the present application; Figure 5 A specific flow chart of the data transmission method provided in Example 2 of the present application; Figure 6 A structural diagram of a data transmission device provided in Embodiment 3 of the present application; Figure 7 The exemplary system provided for Embodiment 7 of the present application can be used to implement the various embodiments described in the present application. DETAILED DESCRIPTION
[0021] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0022] It should be noted that, unless the context clearly requires otherwise, words such as “include”, “including” and similar words throughout the specification and claims should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is “including but not limited to”.
[0023] Furthermore, in the description of the present application, unless otherwise specified, “plurality” means two or more.
[0024] As the number of processor cores increases, the amount of inter-core communication data increases significantly. It becomes crucial to efficiently and quickly group and sort inter-core information to ensure communication efficiency.
[0025] Here, the queue management module technology can effectively manage the queuing and transmission of data packets, control data flow during congestion, and avoid congestion and delay in the communication system.
[0026] Embodiment 1 The present application embodiment provides a data transmission method, such as Figure 1 , 2 As shown in , 3, the method is applied to a multi-core data transmission system, the system includes a message queue pool, a cache management unit and an arbitration management unit; the message queue pool includes a plurality of queues, the arbitration management unit includes a plurality of arbitrators, and the method includes: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Determine a dequeue request through the target arbiter, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0027] Specifically, the present application provides a method for data packet scheduling suitable for inter-core communication. It groups and caches data by extracting enqueue information, and dequeues queue messages using a parallel arbitration method, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus. At the same time, a data back pressure method is used in the data processing flow to control the data flow. When the port is blocked, the back pressure information cannot be fed back to the upstream in a timely manner, resulting in data loss.
[0028] Team management: According to the input data frame and the sending address, the corresponding queue information is extracted and the queue information is grouped and temporarily stored.
[0029] Cache Management: Cache management is mainly divided into two modules: message cache and cache scheduling; The message cache is used to maintain free cache space information and allocate cache addresses when it needs to be enqueued; Cache scheduling is used to adjust the position of input messages in the message buffer.
[0030] Arbitration Administration: Arbitration management mainly includes parallel arbitration and dequeue cache module; the arbitrator reads the requests to be dequeued in the dequeue request cache queue, obtains the address of the information in the cache queue from the cache management module according to the request, obtains the actual dequeue message from the cache module according to the address, and stores it in the dequeue cache module to complete the logical dequeue.
[0031] Team management: It includes generating dequeue requests and dequeue request cache queues; the dequeue request generation is mainly based on the empty and full status of the lower-level port data buffer memory area, and the dequeue request is stored in the dequeue request cache queue; when the physical dequeue is completed according to the parallel arbitration result, the data in the cache module is updated at the same time.
[0032] Among them, Figure 2 The core here refers to the processor core.
[0033] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0034] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0035] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0036] Embodiment 2 The present application embodiment provides a data transmission method, such as Figure 4 As shown, the method is applied to a multi-core data transmission system, the system includes a message queue pool, a cache management unit and an arbitration management unit; the message queue pool includes several queues, the arbitration management unit includes several arbitrators, and the method includes: Step S01, obtaining a data frame of the originating processor core, wherein the data frame includes an ID address of a data transmission target processor core, a data message ID, a data message priority, and a data frame header and tail flag; Determine the enqueue information of the originating processor core through the data message ID; Determine the memory occupied by the queue information through the data frame header and frame tail flags; The enqueuing information of the originating processor core and the occupied memory value of the enqueuing information are stored in groups.
[0037] Specifically, the corresponding queue information is extracted according to the input data frame and address, and the information is temporarily stored; In a multi-core communication system, the multi-core system inputs message frames into the packet system through the bus. The data frame usually includes the address ID, message ID, message priority, data bits and frame end flag corresponding to the target core of the data; the address ID is used to determine which core the message comes from.
[0038] The enqueue information can be extracted through the address ID corresponding to the target core, the memory size of the data frame can be obtained through the data frame header and tail, and the data can be grouped and temporarily stored.
[0039] Step S02, receiving any one of the queue entry information and the occupied memory value of the queue entry information of the originating processor core; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, physical enqueuing of data is performed.
[0040] Specifically, the enqueuing information is read, the enqueuing information is compared with the current state in the cache management module, the logical enqueuing result of the data frame is determined, and physical enqueuing or enqueuing-side data back pressure is performed according to the result.
[0041] By comparing the queue information with the memory status of the corresponding cache area in the cache management space, when the remaining space in the cache area meets the queue requirements of the data frame, the temporarily stored data frame is written into the cache area to realize physical queueing.
[0042] Step S02 also includes: Step S021, in response to the remaining space corresponding to the originating processor core in the cache management unit being smaller than the occupied memory value of the enqueue information, stopping receiving the enqueue information of the originating processor core and performing data enqueue back pressure.
[0043] Specifically, for example: when the core core0 (the originating processor core) sends a message message0, the target core is core1 (the target processor core), and the data size is 16KB, when message0 is cached, it will be compared with the remaining space in the cache area corresponding to core0 in the cache management module; if the remaining space is 32KB, it can be cached normally; if the remaining space is only 4KB, the remaining space is insufficient and it is necessary to wait for the space to be released. At the same time, data back pressure is required, that is, stop accepting subsequent messages sent by core0.
[0044] Step S03, generating a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbiter corresponding to the arbitration management unit and the target processor core as the target arbiter; The dequeue request is determined by the target arbiter, and any dequeue information of the target processor core is generated according to the port information tag of the originating processor core.
[0045] Specifically, when a message is physically enqueued, a port information label is generated through the enqueuing information of the originating processor core. Similarly, when the originating processor core core0 sends a message message0, the target processor core is core1, and the data size is 16KB, for example. When the message0 is physically enqueued successfully, the data label of the occupied area of the core core0 cache is updated to label label1, corresponding to core1. When there are multiple messages in the cache of core0, there will be multiple data labels label1, label2, labelN, etc.
[0046] Step S04, determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and there being any dequeue information to be sent to the target processor core in the cache area of the originating processor core, the target arbitrator stores any dequeue information of the target processor core in the message queue pool to perform physical data dequeue.
[0047] Specifically, the arbitrator of the arbitration management unit selects the dequeue request of each queue, and reads the corresponding dequeue information according to the queue port information tag to complete the logical dequeue; the arbitrator confirms whether to perform physical dequeue according to the fullness of the dequeue cache queue, and after confirming that physical dequeue is possible, the dequeue information is placed in the dequeue cache queue.
[0048] Here, each queue is matched with the same number of arbitrators according to the number of connected ports, and the dequeue requests of each port are processed in parallel.
[0049] For example: the core 0 will exchange information with the other three cores (core 1 / 2 / 3). There will be three arbitrators for the arbitration management module of core 0, which will process the data read requests from core 1 / 2 / 3 respectively. If the data receiving queue corresponding to core 1 is not full at this time, and there is a message to be sent to core 1 in the buffer area of core 0, a dequeue request with label 2 will be generated to realize logical dequeue. The arbitrator reads the corresponding message into the dequeue buffer queue according to the dequeue label to complete the physical dequeue. When the bus issues a data read command for core 1, the message in the dequeue buffer will be read into the data receiving queue of core 1.
[0050] Step S04 also includes: Step S041, in response to the remaining space of the data dequeue cache queue corresponding to the target processor core being full or the cache area of the originating processor core does not have any dequeue information to be sent to the target processor core, resend a dequeue request to the message queue pool.
[0051] Step S05, generating a dequeue request queue through the dequeue requests of each port of the message queue pool, and transmitting the data in groups.
[0052] Step S05 also includes: Step S051, generating a dequeue request queue through the dequeue requests of each port of the message queue pool, and storing the dequeue request queue separately; When the storage space of the dequeue cache queue is not full, the dequeue request queue is stored in the corresponding dequeue cache queue, and the data is transmitted in groups.
[0053] Specifically, the dequeue management module generates dequeue requests according to the states of the data receiving queues of different ports, and stores the dequeue requests separately; The dequeue requests are stored according to the data receiving queue status of different ports. When the space of the data receiving queue is not full, a dequeue request will be issued, and the dequeue requests of different ports constitute a dequeue request queue.
[0054] Step S06: the cache management unit initializes the port information tag of the originating processor core according to the dequeue information of the target processor core, and updates the remaining storage space of the cache area of the cache management unit.
[0055] Specifically, the cache management module updates the port information tag and the queue cache status information according to the physical dequeue information.
[0056] When message0 with label1 in the core0 cache area is physically dequeued, the cache management module needs to restore the label corresponding to the area to the default value and update the remaining status of the cache area space.
[0057] Step S07, storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data, includes: Determining the priority of the target processor core dequeue information by the target arbiter; Determining a priority level of dequeued information according to a network application type of the dequeued information of the target processor core, wherein the network application type includes voice over internet protocol, video streaming, email, and web browsing; According to the priority level of the dequeue information, the dequeue information of the target processor core is stored in a message queue pool, and data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determine the time order scheduling strategy of the dequeue information arriving at the target processor core through the target arbitrator; Distribute the dequeue information to different queues according to the time order priority of the dequeue information, prioritize the dequeue information that arrives at the target processor core, store it in the message queue pool, and perform physical dequeue of the data; When the dequeue information priority level strategy and the time sequence scheduling strategy are determined by the network application type of the dequeue information at the same time, the target arbitrator preferentially stores the dequeue information of the target processor core into the message queue pool through the time sequence scheduling strategy to perform physical data dequeue.
[0058] Specifically, data priority is assigned: First, different priority levels need to be defined based on the importance or urgency of the data; for example, real-time voice communication is given the highest priority, and file downloads have a lower priority; Different types of network applications have different requirements for latency and bandwidth. For example, real-time applications such as Voice over Internet Protocol (VoIP) and video streaming usually require higher priority to reduce latency. However, applications such as email or web browsing can accept slightly higher latency and can be assigned lower priority. Network conditions and user needs may change over time, and a mechanism needs to be established to dynamically adjust the priority of data packets based on actual conditions; Scheduling algorithm selection: Process data packets in the order they arrive; Classify data packets into different queues according to their priority, and give priority to data packets in high-priority queues; this method can effectively ensure the rapid transmission of important data, but may cause low-priority data packets to be delayed indefinitely; It combines the priority queue and fairness principle to assign a certain weight to each priority, ensuring that all packets can get a certain degree of service, while giving higher priority packets more bandwidth; When network congestion is about to occur, RED will drop some packets in advance to avoid complete congestion; Packets of different types or priorities are assigned to different physical or logical queues, and each queue can be independently configured with different scheduling policies to achieve more refined traffic control.
[0059] Here, RED (Random Early Detection) is a random early detection algorithm.
[0060] like Figure 5 As shown, the present application extracts the corresponding queue information according to the input data frame and address, and temporarily stores the information; Read the queue information, compare the queue information with the current state in the cache management module, determine the logical queue result of the data frame, and perform physical queue or queue side back pressure according to the result; When the message is physically enqueued, a port information tag is generated through the enqueuing information; The dequeue management module generates dequeue requests according to the status of the secondary cache of different ports, and stores the dequeue requests separately; The parallel arbitrator selects the dequeue request of each queue, and reads the corresponding dequeue information according to the port information tag to complete the logical dequeue. The arbitrator determines whether to perform physical dequeue according to the empty or full status of the dequeue cache queue. After confirming that dequeue is possible, the dequeue information is placed in the dequeue cache queue. The cache management module updates the port information tag and queue cache status information according to the physical dequeue information.
[0061] In addition, the arbitrator includes a polling arbitrator and a credit-based arbitrator, and the target arbitrator stores any dequeue information of the target processor core into a message queue pool to perform physical dequeue of data, and further includes: Determine the scheduling strategy for the dequeuing information to reach the target processor core through the polling arbiter; Check the request status of each dequeue information by polling the arbitrator to determine the dequeue request information; When it is determined that the dequeue request needs to be transmitted, the polling arbitrator grants the current communication permission to the dequeue information and transmits the dequeue information through shared resources; Set the time slice to control the duration of outbound information; And dynamically adjust the polling interval and time slice length according to changes in system load; The dequeue information of the target processor core is stored in a message queue pool, and the data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determining, by means of the credit-based arbiter, a scheduling strategy for the dequeuing information to reach the target processor core; Initializing credit values of the originating processor core and the target processor core; determining whether the credit value of the originating processor core is greater than zero; If so, the originating processor core determines the memory value to send the dequeue information based on the available credit value; The dequeue information of the target processor core is stored in a message queue pool, and the data is physically dequeued; After the data is physically dequeued, the credit values of the originating processor core and the target processor core are updated.
[0062] Here, according to the changes in system load, the polling interval and time slice length can be dynamically adjusted to optimize performance. For example, under high load conditions, the time slice may need to be shortened to improve response speed; while under low load conditions, the time slice can be extended to reduce polling overhead.
[0063] At the same time, the credit mechanism can effectively avoid network congestion and data overflow, and maintain the stability and efficiency of data transmission; The credit value can be dynamically adjusted according to network conditions to adapt to different application scenarios; The originating processor core will not send data until it has received enough credits to ensure correct delivery of the data.
[0064] In the design of multi-core processors (SoCs), multiple processing cores need to exchange data efficiently. In order to manage and control the communication between these cores, an arbitrator mechanism is used to ensure the effectiveness of data transmission and avoid conflicts. That is, the arbitrator is effectively used to manage the communication between integrated circuit cores to improve the reliability and efficiency of the entire system.
[0065] The data transmission method provided in the embodiment of the present application may be further improved and optimized without departing from the technical solution of the present application, and these improvements and optimizations should also be regarded as within the scope of protection of the present application.
[0066] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0067] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0068] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0069] Embodiment 3 The present application provides a data transmission device, such as Figure 6 As shown, the device includes an acquisition module, a receiving module, a comparison module, a first execution module, a generation module, a setting module, a judgment module, a second execution module, a transmission module, and a processing module.
[0070] In this embodiment, the receiving module is used to receive any one of the enqueuing information of the originating processor core and the occupied memory value of the enqueuing information; A comparison module, used for comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; A first execution module, configured to execute physical enqueuing of data in response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information; A generating module, configured to generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; determine a dequeue request through the target arbitrator, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; A setting module, used for setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; A determination module, used for determining the remaining space of the data dequeue cache queue corresponding to the target processor core; A second execution module is configured to, in response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and the cache area of the originating processor core having any dequeue information to be sent to the target processor core, store any dequeue information of the target processor core in the message queue pool through the target arbitrator, and perform physical dequeue of the data; The transmission module is used to generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and transmit the data in groups.
[0071] In one embodiment, the acquisition module is used to acquire the data frame of the originating processor core, wherein the data frame includes the data transmission target processor core ID address, data message ID, data message priority, and data frame head and tail flags; Determine the enqueue information of the originating processor core through the data message ID; Determine the memory occupied by the queue information through the data frame header and frame tail flags; The enqueuing information of the originating processor core and the occupied memory value of the enqueuing information are stored in groups.
[0072] In one of the embodiments, the first execution module is used to stop receiving the enqueue information of the originating processor core and perform data enqueue back pressure in response to the remaining space corresponding to the originating processor core in the cache management unit being less than the occupied memory value of the enqueue information.
[0073] In one embodiment, the second execution module is used to resend a dequeue request to the message queue pool in response to the data dequeue cache queue space corresponding to the target processor core being full or the cache area of the originating processor core does not have any dequeue information to be sent to the target processor core.
[0074] In one of the embodiments, the transmission module is used to generate a dequeue request queue through dequeue requests of each port of the message queue pool, and store the dequeue request queue separately; When the storage space of the dequeue cache queue is not full, the dequeue request queue is stored in the corresponding dequeue cache queue, and the data is transmitted in groups.
[0075] In one of the embodiments, the processing module is used to initialize the port information tag of the originating processor core according to the dequeue information of the target processor core, and update the remaining storage space of the cache area of the cache management unit.
[0076] In one of the embodiments, the transmission module is used to determine the priority of the target processor core dequeue information through the target arbitrator; Determining a priority level of dequeued information according to a network application type of the dequeued information of the target processor core, wherein the network application type includes voice over internet protocol, video streaming, email, and web browsing; According to the priority level of the dequeue information, the dequeue information of the target processor core is stored in a message queue pool, and data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determine the time order scheduling strategy of the dequeue information arriving at the target processor core through the target arbitrator; Distribute the dequeue information to different queues according to the time order priority of the dequeue information, prioritize the dequeue information that arrives at the target processor core, store it in the message queue pool, and perform physical dequeue of the data; When the dequeue information priority level strategy and the time sequence scheduling strategy are determined by the network application type of the dequeue information at the same time, the target arbitrator preferentially stores the dequeue information of the target processor core into the message queue pool through the time sequence scheduling strategy to perform physical data dequeue.
[0077] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0078] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0079] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0080] Embodiment 4 The present invention also provides a data transmission device, comprising: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors execute the following data transmission method: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Determine a dequeue request through the target arbiter, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0081] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0082] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0083] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0084] Embodiment 5 The present application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following data transmission method can be executed: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Determine a dequeue request through the target arbiter, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0085] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0086] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0087] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0088] Embodiment 6 The present application also provides a computer program product, including a computer program, which can implement the following data transmission method when executed by a processor: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Determine a dequeue request through the target arbiter, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0089] The beneficial effects of the technical solution provided by the embodiment of the present application are: The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0090] The technical solution provided in the embodiment of the present application extracts the enqueue information to group and cache the information, and uses a parallel arbitration method to dequeue the queue messages, thereby solving the head-of-line blocking caused by mounting multiple ports on a single bus; at the same time, a data back pressure method is used in the data processing flow to control the data flow blocking at the port, thereby solving the problem of data loss caused by the inability to provide timely feedback of the back pressure information to the upstream.
[0091] The technical solution provided in the embodiment of the present application provides a data packet scheduling mechanism for inter-core communication applicable to core heterogeneous scenarios, which increases the versatility of the data transmission device through flexible configuration of the number of queue ports and the size of the cache area.
[0092] Embodiment 7 The present application provides a computer storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Determine a dequeue request through the target arbiter, and generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
[0093] In one embodiment, before receiving any one of the enqueue information of the originating processor core and the occupied memory value of the enqueue information, the method includes: Acquire a data frame of the originating processor core, wherein the data frame includes an ID address of a data transmission target processor core, a data message ID, a data message priority, and a data frame head and tail flag; Determine the enqueue information of the originating processor core through the data message ID; Determine the memory occupied by the queue information through the data frame header and frame tail flags; The enqueuing information of the originating processor core and the occupied memory value of the enqueuing information are stored in groups.
[0094] In one embodiment, the method comprises: In response to the remaining space corresponding to the originating processor core in the cache management unit being less than the occupied memory value of the enqueue information, the enqueue information of the originating processor core is stopped from being received, and data enqueue back pressure is performed.
[0095] In one embodiment, the method comprises: In response to the data dequeue cache queue space corresponding to the target processor core being full or the cache area of the originating processor core not having any dequeue information to be sent to the target processor core, a dequeue request is resent to the message queue pool.
[0096] In one embodiment, the generating a dequeue request queue through the dequeue requests of each port of the message queue pool and transmitting the data in groups includes: Generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and store the dequeue request queue separately; When the storage space of the dequeue cache queue is not full, the dequeue request queue is stored in the corresponding dequeue cache queue, and the data is transmitted in groups.
[0097] In one embodiment, the dequeue request queue is generated through the dequeue request of each port of the message queue pool, and after the data is transmitted in groups, the method includes: The cache management unit initializes the port information tag of the originating processor core according to the dequeue information of the target processor core, and updates the remaining storage space of the cache area of the cache management unit.
[0098] In one embodiment, storing any dequeue information of the target processor core to a message queue pool through the target arbitrator to perform physical dequeue of data includes: Determining the priority of the target processor core dequeue information by the target arbiter; Determining a priority level of dequeued information according to a network application type of the dequeued information of the target processor core, wherein the network application type includes voice over internet protocol, video streaming, email, and web browsing; According to the priority level of the dequeue information, the dequeue information of the target processor core is stored in a message queue pool, and data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determine the time order scheduling strategy of the dequeue information arriving at the target processor core through the target arbitrator; Distribute the dequeue information to different queues according to the time order priority of the dequeue information, prioritize the dequeue information that arrives at the target processor core, store it in the message queue pool, and perform physical dequeue of the data; When the dequeue information priority level strategy and the time sequence scheduling strategy are determined by the network application type of the dequeue information at the same time, the target arbitrator preferentially stores the dequeue information of the target processor core into the message queue pool through the time sequence scheduling strategy to perform physical data dequeue.
[0099] The present application can effectively manage data transmission, control data flow during congestion, and avoid congestion and delays in the communication system.
[0100] Figure 7 The exemplary system provided for the seventh embodiment of the present application can be used to implement the various embodiments described in the present application; wherein the attached Figure 7 The NVM in it is non-volatile memory; like Figure 7As shown, in some embodiments, the system can be used as any of the above-mentioned devices for data transmission in each of the described embodiments. In some embodiments, the system may include one or more computer-readable media (e.g., system memory or NVM / storage device) having results and one or more processors (e.g., (one or more) processors) coupled to the one or more computer-readable media and configured to execute the results to implement the module to perform the actions described in this application.
[0101] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0102] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0103] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A data transmission method, characterized in that: The method is applied to a multi-core data transmission system, the system comprising a message queue pool, a cache management unit and an arbitration management unit; the message queue pool comprises a plurality of queues, the arbitration management unit comprises a plurality of arbitrators, and the method comprises: Receive any enqueue information of the originating processor core and the occupied memory value of the enqueue information; Comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; In response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information, performing physical enqueuing of data; Generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; Setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; Generate any dequeue information of the target processor core according to the port information tag of the originating processor core; Determining the remaining space of the data dequeue cache queue corresponding to the target processor core; In response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and any dequeue information to be sent to the target processor core exists in the cache area of the originating processor core, any dequeue information of the target processor core is stored in the message queue pool through the target arbitrator to perform physical dequeue of the data; A dequeue request queue is generated through the dequeue requests of each port of the message queue pool, and the data is transmitted in groups.
2. The data transmission method according to claim 1, characterized in that: Before receiving any one of the enqueuing information of the originating processor core and the occupied memory value of the enqueuing information, the method includes: Acquire a data frame of the originating processor core, wherein the data frame includes an ID address of a data transmission target processor core, a data message ID, a data message priority, and a data frame head and tail flag; Determine the enqueue information of the originating processor core through the data message ID; Determine the memory occupied by the queue information through the data frame header and frame tail flags; The enqueuing information of the originating processor core and the occupied memory value of the enqueuing information are stored in groups.
3. The data transmission method according to claim 1, characterized in that: The method comprises: In response to the remaining space corresponding to the originating processor core in the cache management unit being less than the occupied memory value of the enqueue information, the enqueue information of the originating processor core is stopped from being received, and data enqueue back pressure is performed.
4. The data transmission method according to claim 1, characterized in that: The method comprises: In response to the data dequeue cache queue space corresponding to the target processor core being full or the cache area of the originating processor core not having any dequeue information to be sent to the target processor core, a dequeue request is resent to the message queue pool.
5. The data transmission method according to claim 1, characterized in that: The step of generating a dequeue request queue through dequeue requests of each port of the message queue pool and transmitting the data in groups includes: Generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and store the dequeue request queue separately; When the storage space of the dequeue cache queue is not full, the dequeue request queue is stored in the corresponding dequeue cache queue, and the data is transmitted in groups.
6. The data transmission method according to claim 1, characterized in that: The method generates a dequeue request queue through the dequeue requests of each port of the message queue pool, and after the data is grouped and transmitted, comprises: The cache management unit initializes the port information tag of the originating processor core according to the dequeue information of the target processor core, and updates the remaining storage space of the cache area of the cache management unit.
7. The data transmission method according to claim 1, characterized in that: The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator and performing physical dequeue of data includes: Determining the priority of the target processor core dequeue information by the target arbiter; Determining a priority level of dequeued information according to a network application type of the dequeued information of the target processor core, wherein the network application type includes voice over internet protocol, video streaming, email, and web browsing; According to the priority level of the dequeue information, the dequeue information of the target processor core is stored in a message queue pool, and data is physically dequeued; The step of storing any dequeue information of the target processor core into a message queue pool through the target arbitrator to perform physical dequeue of data further includes: Determine the time order scheduling strategy of the dequeue information arriving at the target processor core through the target arbitrator; Distribute the dequeue information to different queues according to the time order priority of the dequeue information, prioritize the dequeue information that arrives at the target processor core, store it in the message queue pool, and perform physical dequeue of the data; When the dequeue information priority level strategy and the time sequence scheduling strategy are determined by the network application type of the dequeue information at the same time, the target arbitrator preferentially stores the dequeue information of the target processor core into the message queue pool through the time sequence scheduling strategy to perform physical data dequeue.
8. A data transmission device, characterized in that: The device is applied to a multi-core data transmission system, the system includes a message queue pool, a cache management unit and an arbitration management unit; the message queue pool includes a plurality of queues, the arbitration management unit includes a plurality of arbitrators, and the device includes: A receiving module, used for receiving any one of the enqueuing information and the occupied memory value of the enqueuing information from the originating processor core; A comparison module, used for comparing the memory occupied by the enqueue information of the originating processor core with the remaining space corresponding to the originating processor core in the cache management unit; A first execution module, configured to execute physical enqueuing of data in response to the remaining space corresponding to the originating processor core in the cache management unit being greater than or equal to the occupied memory value of the enqueuing information; A generating module, configured to generate a port information tag of the originating processor core according to the enqueue information of the originating processor core; and to generate any dequeue information of the target processor core according to the port information tag of the originating processor core; A setting module, used for setting the arbitrator corresponding to the target processor core in the arbitration management unit as the target arbitrator; A determination module, used for determining the remaining space of the data dequeue cache queue corresponding to the target processor core; A second execution module is configured to, in response to the remaining space of the data dequeue cache queue corresponding to the target processor core being not full and the cache area of the originating processor core having any dequeue information to be sent to the target processor core, store any dequeue information of the target processor core in the message queue pool through the target arbitrator, and perform physical dequeue of the data; The transmission module is used to generate a dequeue request queue through the dequeue requests of each port of the message queue pool, and transmit the data in groups.
9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the data transmission method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the data transmission method according to any one of claims 1 to 7 are implemented.
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