Optical sensor based on wafer-level chip scale packaging and packaging method thereof
By forming metal columns in the outer area of the cutting channel of the optical sensor wafer, and forming metal lines and solder resist layers on the glass, the problem of poor sealing and reliability of the existing optical sensor WLCSP packaging methods is solved, and higher packaging reliability and circuit protection are achieved.
Patent Information
- Application Number
- CN202411903086.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-03-21
AI Technical Summary
The existing optical sensor WLCSP packaging method has poor sealing and reliability, and when there are functional areas or circuits under the wafer pads, it is easy to cause damage, limiting the application of the packaging process.
A first metal column is formed in the outer area of the cutting path of the optical sensor wafer, and a bonding layer is formed on the wafer surface, and bonded to the glass through the coated wafer. The second metal column and metal circuit are then formed on the glass, and the wafer pad is electrically connected to the first metal column through these structures to form a glass and a wafer solder resist layer to improve sealing and protection circuitry.
It effectively improves the sealing and reliability between the glass and the optical sensor wafer, and avoids damage to the wafer when there is a functional area or circuit under the wafer pad, and solves the problem of poor reliability of the existing WLCSP packaging methods.
Smart Images
Figure CN119677247A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor process technology, and in particular to an optical sensor based on wafer-level chip scale packaging and a packaging method thereof. Background Art
[0002] Optical sensors are sensors that measure based on optical principles. They are widely used because of their non-contact and non-destructive measurement, almost interference-free, high-speed transmission, and telemetry and remote control capabilities. In order to reduce the size of optical sensors and improve their performance, optical sensors are currently packaged using wafer-level chip scale packaging processes.
[0003] Based on Wafer Level Chip Scale Packaging (WLCSP), packaging and testing are first performed on the entire wafer, and then cut into individual chip particles, thereby effectively reducing the packaging volume.
[0004] In the existing optical sensor WLCSP packaging process, a cofferdam is generally made on the glass by photolithography, and then the glass and the wafer are bonded by glue; the pads on the wafer are connected to the back of the wafer by opening a through hole on the back of the wafer, and the pad signal is led to the back of the wafer by using a redistribution layer and electroplating process. However, in the existing optical sensor WLCSP packaging process, since the glass and the wafer are bonded by glue, its sealing and reliability are poor; moreover, if there is a functional area or circuit under the wafer pad, the bonding method is easy to damage the functional area or circuit, thus limiting the application of the WLCSP packaging process. Summary of the invention
[0005] The object of the present invention is to provide an optical sensor based on wafer level chip scale packaging and a packaging method thereof, so as to at least solve the problem of poor reliability of the existing optical sensor WLCSP packaging method.
[0006] In order to solve the above technical problems, the present invention provides a packaging method of an optical sensor based on wafer-level chip scale packaging, comprising: forming a first metal pillar in an outer region of a scribe line of the optical sensor wafer; Coating a film on the surface of the optical sensor wafer to form a bonding layer, wherein the bonding layer exposes the photosensitive area, the wafer pad and the first metal column of the optical sensor wafer; Bonding the coated optical sensor wafer to the glass; forming a second metal column and a metal line on the glass to electrically connect the wafer pad to the first metal column through the second metal column and the metal line; Forming a glass solder resist layer on the glass, wherein the glass solder resist layer covers the metal circuit; Using a rewiring technology, a bump pad is formed at the bottom of the optical sensor wafer, and the bump pad is electrically connected to the first metal column in a one-to-one correspondence; A wafer solder resist layer is formed on the bottom of the optical sensor wafer, wherein the wafer solder resist layer covers the bottom of the optical sensor wafer and exposes the bump pads.
[0007] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the method of forming the first metal pillar in the outer area of the scribe line of the optical sensor wafer includes: Using a photolithography process, a vertical hole etching area is reserved in an outer area of a dicing street of the optical sensor wafer; Using an etching process, etching the vertical hole etching area to form a vertical hole; The vertical hole is filled with electroplating by using an electroplating process to form a first metal column.
[0008] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the first metal pillar is located in the peripheral area of the cutting path and corresponds one-to-one to the wafer pads on the optical sensor wafer.
[0009] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the first metal column and the wafer pad are aligned one by one along the length direction of the wafer pad, and the distance between the first metal column and the wafer pad is 10~20μm; the diameter of the first metal column is 1~10μm, and the depth is 80~250μm.
[0010] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the method of coating the surface of the optical sensor wafer to form a bonding layer includes: covering the photosensitive area, the wafer pad and the first metal pillar with photoresist; Using chemical vapor deposition, plasma enhanced chemical vapor deposition or evaporation process, silicide is deposited on the surface of the optical sensor wafer; Remove the photoresist and complete the coating.
[0011] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the bonding layer exposes the photosensitive area and a 10-20 μm range around the photosensitive area; the bonding layer exposes a 1×1 μm-10×10 μm size range of the wafer pad.
[0012] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the method of forming the second metal pillar and the metal line on the glass includes: Using a photolithography process, a through-hole etching area is reserved on the glass surface, wherein a vertical projection of the through-hole etching area falls on an exposed area of the first metal column and the wafer pad; Using an etching process, etching the through hole etching area to form a through hole; Using an electroplating process, electroplating and filling the through hole to form a second metal column; Using a photolithography process, forming a circuit groove on the glass surface, wherein the circuit groove connects a second metal column connected to the first metal column and a second metal column connected to the wafer pad; The circuit grooves are filled with electroplating by using an electroplating process to form metal circuits.
[0013] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the distance between the vertical projection of the glass solder resist layer on the optical sensor wafer and the photosensitive area is 30~50μm; the thickness of the glass solder resist layer is 5~20μm.
[0014] Optionally, in the packaging method of the optical sensor based on wafer-level chip scale packaging, the thickness of the wafer solder resist layer is 5-20 μm.
[0015] In order to solve the above technical problems, the present invention also provides an optical sensor, which is packaged using the packaging method of an optical sensor based on wafer-level chip scale packaging as described in any of the above items, and the optical sensor includes an optical sensor chip, a bonding layer and glass arranged in sequence from bottom to top; the optical sensor chip has a photosensitive area, a wafer pad and a first metal column, and the glass has a second metal column and a metal line; the wafer pad is electrically connected to the first metal column through the second metal column and the metal line, and is led out to the back side of the optical sensor chip through the first metal column; the optical sensor chip is bonded to the glass through the bonding layer; the bonding layer exposes the photosensitive area.
[0016] Optionally, in the optical sensor, the bottom of the optical sensor chip has a bump pad, and the bump pad is electrically connected to the first metal column in a one-to-one correspondence.
[0017] Optionally, in the optical sensor, a glass solder resist layer is formed on the glass surface, and the glass solder resist layer covers the metal circuit; a wafer solder resist layer is formed at the bottom of the optical sensor chip, and the wafer solder resist layer covers the bottom of the optical sensor chip and exposes the bump pads.
[0018] Optionally, in the optical sensor, the first metal pillar is located outside the cutting path of the optical sensor chip, and the first metal pillar corresponds to the wafer pad one by one.
[0019] The optical sensor based on wafer-level chip scale packaging and its packaging method provided by the present invention include: forming a first metal column in the outer area of the cutting path of the optical sensor wafer; coating the surface of the optical sensor wafer to form a bonding layer, wherein the bonding layer exposes the photosensitive area of the optical sensor wafer, the wafer pad and the first metal column; anodically bonding the coated optical sensor wafer to glass; forming a second metal column and a metal line on the glass to electrically connect the wafer pad to the first metal column through the second metal column and the metal line; forming a glass solder resist layer on the glass, wherein the glass solder resist layer covers the metal line; using the rewiring technology, forming a bump pad at the bottom of the optical sensor wafer, wherein the bump pad is electrically connected to the first metal column in a one-to-one correspondence; forming a wafer solder resist layer at the bottom of the optical sensor wafer, wherein the wafer solder resist layer covers the bottom of the optical sensor wafer and exposes the bump pad. By bonding the glass and the optical sensor wafer through coating, the sealing and reliability between the glass and the optical sensor wafer can be effectively improved; by forming a first metal column in the outer area of the cutting path of the optical sensor wafer, and electrically connecting the wafer pad to the first metal column through a second metal column and a metal line on the glass and leading out to the back side of the optical sensor wafer, when there is a functional area or circuit under the wafer pad, it is possible to ensure that the wafer pad signal is led out without causing damage to the functional area or circuit, thereby solving the problem of poor reliability of the existing optical sensor WLCSP packaging method. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 A flow chart of a packaging method for an optical sensor based on wafer-level chip scale packaging provided in this embodiment; FIG. 2 (A) to FIG. 2 (I) are a top view (left) and a cross-sectional schematic diagram (right) of the structure of the optical sensor corresponding to each step in the packaging method of the optical sensor based on wafer-level chip scale packaging provided by this embodiment; Figure 3 A schematic diagram of the structure of the optical sensor provided in this embodiment; The descriptions of the reference numerals are as follows: 100 - optical sensor wafer; 101 - cutting road; 102 - photosensitive area; 103 - wafer pad; 104 - first metal column; 105 - bump pad; 110 - optical sensor chip; 200-bonding layer; 300-glass; 301-second metal column; 302-metal line; 400-Glass solder mask; 500-Wafer solder mask. DETAILED DESCRIPTION
[0021] The optical sensor based on wafer-level chip scale packaging and the packaging method thereof proposed by the present invention are further described in detail below in combination with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the accompanying drawings is often a part of the actual structure. In particular, the emphasis that each drawing needs to show is different, and sometimes different proportions are used.
[0022] It should be noted that the terms "first", "second", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0023] This embodiment provides a packaging method for an optical sensor based on wafer-level chip scale packaging, such as Figure 1 As shown, including: S1, forming a first metal pillar in an outer area of a scribe line of an optical sensor wafer; S2, coating a surface of the optical sensor wafer to form a bonding layer, wherein the bonding layer exposes the photosensitive area, the wafer pad and the first metal column of the optical sensor wafer; S3, bonding the coated optical sensor wafer to the glass; S4, forming a second metal column and a metal line on the glass to electrically connect the wafer pad to the first metal column through the second metal column and the metal line; S5, forming a glass solder resist layer on the glass, wherein the glass solder resist layer covers the metal circuit; S6, using a rewiring technology to form bump pads at the bottom of the optical sensor wafer, wherein the bump pads are electrically connected to the first metal pillars in a one-to-one correspondence; S7, forming a wafer solder resist layer on the bottom of the optical sensor wafer, wherein the wafer solder resist layer covers the bottom of the optical sensor wafer and exposes the bump pads.
[0024] The packaging method of the optical sensor based on wafer-level chip scale packaging provided in this embodiment can effectively improve the sealing and reliability between the glass and the optical sensor wafer by bonding the glass and the optical sensor wafer through coating; by forming a first metal column in the outer area of the cutting path of the optical sensor wafer, and electrically connecting the wafer pad to the first metal column through the second metal column and the metal line on the glass and leading out to the back side of the optical sensor wafer, so that when there is a functional area or circuit under the wafer pad, it can also ensure that the wafer pad signal can be led out without causing damage to the functional area or circuit, thereby solving the problem of poor reliability of the existing optical sensor WLCSP packaging method.
[0025] In order to clearly illustrate the optical sensor based on wafer-level chip scale packaging and its packaging method provided by the present application, in the structural diagrams in Figures 2 (A) to 2 (I), the top view on the left side only takes a single optical sensor chip as an example, and the cross-sectional view on the right side takes the optical sensor wafer as an example.
[0026] The top of the optical sensor wafer 100 usually has a dicing line 101, a photosensitive area 102, and a wafer pad 103. As shown in FIG2 (A), the dicing line 101 surrounds the photosensitive area 102 and the wafer pad 103; the wafer pad 102 is located at the periphery of the photosensitive area 102 and has a certain distance from the photosensitive area 102. Usually, in the area within the dicing line 101, the bottom of the optical sensor wafer 100 may have a functional area or a circuit; the dicing line 101 is used to guide the dicing area when the wafer is divided into a single chip (die) in the WLCSP packaging process, so the outer area of the dicing line 101 does not have a functional area or a circuit.
[0027] This embodiment utilizes the functional and structural characteristics of the cutting path 101 and proposes a packaging method for an optical sensor based on wafer-level chip scale packaging, so that when the wafer pad signal is led out from the back side of the wafer, the functional area or circuit on the back side of the wafer will not be damaged.
[0028] Specifically, in this embodiment, in step S1, the method of forming the first metal pillar 104 in the outer area of the dicing street 101 of the optical sensor wafer 100 includes: S11 , using a photolithography process, leaving a vertical hole etching area in the outer area of the cutting street 101 of the optical sensor wafer 100 .
[0029] Specifically, through coating, exposure and development steps, an area to be etched can be reserved in the outer area of the dicing street 101 corresponding to each optical sensor chip on the optical sensor wafer 100 .
[0030] In practical applications, the vertical hole etching area should be located in the peripheral area of the cutting road 101 and correspond one-to-one to the wafer pad 103 on the optical sensor wafer 100, so that the position of the formed first metal column 104 is located in the peripheral area of the cutting road 101 and corresponds one-to-one to the wafer pad 103 on the optical sensor wafer 100.
[0031] The "one-to-one correspondence" described here in this embodiment should be understood as: when multiple wafer pads 103 are arranged along the length and / or width direction of the optical sensor chip, vertical hole etching areas are also arranged in the peripheral area of the cutting road 101 along the length and / or width direction of the optical sensor chip; the spacing between adjacent vertical hole etching areas is consistent with the spacing between the corresponding wafer pads 103, and the spacing between all vertical hole etching areas and the corresponding wafer pads 103 is also consistent, that is, the vertical hole etching areas are aligned one by one with the wafer pads along the length direction of the wafer pads, so that the formed first metal pillars 104 are aligned one by one with the wafer pads along the length direction of the wafer pads, which is convenient for subsequent electrical connection wiring.
[0032] In a specific embodiment, the distance between the vertical hole etching area and the wafer pad 103 is 10-20 μm, so as to ensure that the wafer pad 103 is not damaged when the first metal column 104 is formed.
[0033] S12, etching the vertical hole etching area using an etching process to form a vertical hole.
[0034] In practical applications, vertical holes can be formed by laser etching or dry etching processes. The vertical holes can be blind holes or through holes. In this embodiment, the diameter of the vertical holes is 1-10 μm and the depth is 80-250 μm. The specific size selection of the diameter and depth should be determined based on the outer area of the cutting road 101 of the optical sensor wafer 100, the spacing between the cutting road 101 and the wafer pad 103, and the process accuracy.
[0035] S13 , using an electroplating process to electroplating fill the vertical hole to form a first metal column 104 .
[0036] Specifically, after the first metal pillar 104 is formed by electroplating, the photoresist left in step S11 needs to be removed. The product structure formed after step S1 is shown in FIG2 (B), wherein the first metal pillar 104 is aligned one by one with the wafer pad 103 along the length direction of the wafer pad 103, and the distance between the first metal pillar 104 and the wafer pad 103 is 10-20 μm; the diameter of the first metal pillar 104 is 1-10 μm, and the depth is 80-250 μm.
[0037] Furthermore, in this embodiment, step S2, the method of coating the surface of the optical sensor wafer 100 to form the bonding layer 200 includes: S21 , covering the photosensitive area 102 , the wafer pad 103 and the first metal pillar 104 with photoresist.
[0038] Specifically, the photosensitive area 102, the wafer pad 103 and the first metal column 104 can be covered with photoresist through coating, exposure and development steps. In practical applications, the photoresist covers the photosensitive area 102 and the 10-20 μm range of the periphery of the photosensitive area 102, the 1×1 μm-10×10 μm size range of the wafer pad 103, and the complete first metal column 104, thereby ensuring that these areas are not covered by the coating, ensuring that the entire photosensitive area 102 of the packaged optical sensor can receive light, and the wafer pad 103 and the first metal column 104 can be electrically connected.
[0039] The "10-20 μm range outside the photosensitive region 102" mentioned here in this embodiment refers to the area enclosed by 10-20 μm extending outward from the length and width of the photosensitive region 102, and the specific outward extension size needs to consider the distance between the photosensitive region 102 and the wafer pad 103. The area size of the exposed area selected by the wafer pad 103 needs to be determined comprehensively based on factors such as the actual area size of the wafer pad 103 and the process accuracy.
[0040] S22 , using chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) or evaporation process to plate silicide on the surface of the optical sensor wafer 100 .
[0041] Among them, silicide includes silicon oxide, silicon nitride, silicon oxynitride and other silicon-containing materials. Also, in practical applications, other coating processes can also be used to coat silicide on the surface of the optical sensor wafer 100. The specific process implementation of the coating is well known to those skilled in the art and will not be described in detail in this application.
[0042] S23, remove the photoresist and complete the coating.
[0043] After removing the photoresist, the area covered by the photoresist is exposed, and there is no coating on its surface, while the other areas form a bonding layer 200. The product structure formed after step S2 is shown in FIG2 (C), wherein the bonding layer 200 exposes the photosensitive area 102 of the optical sensor wafer 100, the wafer pad 103 (at least part) and the first metal pillar 104.
[0044] Furthermore, in this embodiment, step S3, as shown in FIG2 (D), the coated optical sensor wafer 100 is bonded to the glass 300. In this way, the optical sensor wafer 100 is bonded to the glass 300 through the bonding layer 200, so that the photosensitive area 102 is effectively sealed, thereby improving the sealing and reliability of the optical sensor. Specifically, the optical sensor wafer 100 can be bonded to the glass 300 by anodic bonding. The specific process of anodic bonding is well known to those skilled in the art, and will not be described in detail in this application.
[0045] Furthermore, in this embodiment, step S4 forms a second metal column 301 and a metal line 302 on the glass 300 to electrically connect the wafer pad 103 to the first metal column 104 through the second metal column 301 and the metal line 302. Specifically, it includes: S41, using a photolithography process, leaving a through hole etching area on the glass surface, the vertical projection of the through hole etching area falls on the exposed area of the first metal column 104 and the wafer pad 103, so that the formed through hole can be connected to the first metal column 104 and the wafer pad 103.
[0046] S42, etching the through hole etching area by etching process to form a through hole. The bottom of the through hole needs to expose the first metal column 104 and the top of the wafer pad 103. In practical applications, the through hole can be formed by laser etching or dry etching process.
[0047] S43 , using an electroplating process to electroplating fill the through hole, where the electroplating filled area includes the through hole in the glass 300 and the through hole in the bonding layer 200 thereunder, to form a second metal column 301 .
[0048] In practical applications, the photoresist formed in step S41 needs to be removed. Thus, the product structure is formed as shown in FIG. 2 (E), wherein each of the first metal pillars 104 and the top of the wafer pad 103 are connected to the second metal pillars 301 in the glass 300 .
[0049] S44 , forming a circuit groove on the surface of the glass 300 by using a photolithography process, wherein the circuit groove connects the second metal column 301 connected to the first metal column 104 and the second metal column 301 connected to the wafer pad 103 .
[0050] Specifically, since each first metal pillar 104 corresponds to a wafer pad 103 when the first metal pillar 104 is formed, the second metal pillar 301 connected to the first metal pillar 104 is connected to the second metal pillar 301 connected to the wafer pad 103 corresponding to the first metal pillar 104 through the circuit groove when the circuit groove is formed, thereby ensuring that after the metal circuit is formed, the first metal pillar 104 can be electrically connected to the corresponding wafer pad 103 through the second metal pillar 301 and the metal circuit.
[0051] S45 , using an electroplating process to fill the circuit groove with electroplating to form a metal circuit 302 .
[0052] In practical applications, the photoresist formed in step S44 needs to be removed. The product structure formed at this time is shown in FIG. 2 (F), wherein each of the first metal pillars 104 is electrically connected to the wafer pad 103 through the second metal pillar 301 connected thereto, the metal line 302 and the second metal pillar 301 connected to the wafer pad 103 in sequence.
[0053] Furthermore, in this embodiment, in step S5 , as shown in FIG. 2 (G ), a glass solder resist layer 400 is formed on the glass 300 , and the glass solder resist layer 400 covers the metal circuit 302 .
[0054] Specifically, in this embodiment, a glass solder resist layer 400 may be formed on the surface of the area where the metal line 302 exists by using photolithography technology to protect the metal line 302 .
[0055] In practical applications, the distance between the vertical projection of the glass solder resist layer 400 on the optical sensor wafer 100 and the photosensitive area 102 is 30-50 μm, so as to ensure that the photosensitive area 102 is fully exposed and can receive sufficient light. In addition, the thickness of the glass solder resist layer 400 is 5-20 μm, so as to provide reliable protection for the metal line 302.
[0056] Furthermore, in this embodiment, in step S6, as shown in FIG2 (H), a bump pad 105 is formed on the bottom of the optical sensor wafer 100 by using a rewiring technology, and the bump pad 105 is electrically connected to the first metal pillar 104 in a one-to-one correspondence. The left side of FIG2 (H) shows the bottom structure of the optical sensor wafer 100.
[0057] Specifically, before forming the bump pads 105, it is necessary to first grind the bottom of the optical sensor wafer 100 using a grinding technique to expose the first metal pillars 104 from the bottom of the optical sensor wafer 100. Afterwards, through coating, exposure and development steps, the bump pads 105 are formed on the bottom of the optical sensor wafer 100 using a rewiring technique, and the bump pads 105 are wired and connected to the first metal pillars 104 in a one-to-one correspondence.
[0058] Furthermore, in this embodiment, in step S7, as shown in FIG2 (I), a wafer solder resist layer 500 is formed on the bottom of the optical sensor wafer 100, and the wafer solder resist layer 500 covers the bottom of the optical sensor wafer 100 and exposes the bump pads 105. The left side of FIG2 (I) shows the bottom structure of the optical sensor wafer 100.
[0059] Specifically, similar to the process of step S5, a wafer solder resist layer 500 is formed at the bottom of the optical sensor wafer 100, and the thickness of the wafer solder resist layer 500 is 5-20 μm. In this way, the first metal pillars 104 leaking from the bottom of the optical sensor wafer 100 and the metal traces formed by the redistribution can be protected, and the bump pads 105 can be exposed for easy welding with other devices.
[0060] Finally, a cutter wheel saw may be used to separate the packaged optical sensor wafer 100 into individual optical sensor chips.
[0061] Corresponding to the packaging method provided in this embodiment, this embodiment also provides an optical sensor, which is packaged using the packaging method of the optical sensor as described above, such as Figure 3 As shown, the optical sensor includes an optical sensor chip 110, a bonding layer 200 and a glass 300 arranged in sequence from bottom to top; the optical sensor chip 110 has a photosensitive area 102, a wafer pad 103 and a first metal column 104, and the glass 300 has a second metal column 301 and a metal line 302; the wafer pad 103 is electrically connected to the first metal column 104 through the second metal column 301 and the metal line 302, and is led out to the back side of the optical sensor chip 110 through the first metal column 104; the optical sensor chip 110 is bonded to the glass 300 through the bonding layer 200; the bonding layer 200 exposes the photosensitive area 102.
[0062] The first metal pillars 104 are located outside the dicing road 101 of the optical sensor chip 110 , and the first metal pillars 104 correspond to the wafer pads 103 one by one.
[0063] The optical sensor provided in this embodiment is bonded to the optical sensor chip 110 through the glass 300 via the bonding layer 200, which can effectively improve the sealing and reliability between the glass 300 and the optical sensor chip 110; the wafer pad 103 is electrically connected to the first metal column 104 through the second metal column 301 and the metal line 302 on the glass 300 and is led out to the back side of the optical sensor chip 110, so that when there is a functional area or circuit under the wafer pad, it can also ensure that the wafer pad signal is led out without causing damage to the functional area or circuit, thereby solving the problem of poor reliability of the existing optical sensor WLCSP packaging method.
[0064] Furthermore, in this embodiment, the bottom of the optical sensor chip 110 has a bump pad 105 , and the bump pad 105 is electrically connected to the first metal pillars 104 in a one-to-one correspondence.
[0065] Furthermore, in this embodiment, a glass solder resist layer 400 is formed on the surface of the glass 300 , and the glass solder resist layer 400 covers the metal line 302 ; a wafer solder resist layer 500 is formed at the bottom of the optical sensor chip 110 , and the wafer solder resist layer 500 covers the bottom of the optical sensor chip 110 and exposes the bump pad 105 .
[0066] The optical sensor based on wafer-level chip scale packaging and the packaging method thereof provided in the present embodiment can effectively improve the sealing and reliability between the glass and the optical sensor wafer by bonding the glass and the optical sensor wafer through coating; by forming a first metal column in the outer area of the cutting path of the optical sensor wafer, and electrically connecting the wafer pad to the first metal column through the second metal column and the metal line on the glass and leading out to the back side of the optical sensor wafer, so that when there is a functional area or circuit under the wafer pad, it can also ensure that the wafer pad signal can be led out without causing damage to the functional area or circuit, thereby solving the problem of poor reliability of the existing optical sensor WLCSP packaging method.
[0067] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.
[0068] The optical sensor based on wafer-level chip scale packaging and its packaging method provided in this embodiment include: forming a first metal column in the outer area of the cutting path of the optical sensor wafer; coating the surface of the optical sensor wafer to form a bonding layer, wherein the bonding layer exposes the photosensitive area, wafer pad and first metal column of the optical sensor wafer; bonding the coated optical sensor wafer to glass; forming a second metal column and a metal line on the glass to electrically connect the wafer pad to the first metal column through the second metal column and the metal line; forming a glass solder resist layer on the glass, wherein the glass solder resist layer covers the metal line; using the rewiring technology, forming a bump pad at the bottom of the optical sensor wafer, wherein the bump pad is electrically connected to the first metal column in a one-to-one correspondence; forming a wafer solder resist layer at the bottom of the optical sensor wafer, wherein the wafer solder resist layer covers the bottom of the optical sensor wafer and exposes the bump pad. By bonding the glass and the optical sensor wafer through coating, the sealing and reliability between the glass and the optical sensor wafer can be effectively improved; by forming a first metal column in the outer area of the cutting path of the optical sensor wafer, and electrically connecting the wafer pad to the first metal column through a second metal column and a metal line on the glass and leading out to the back side of the optical sensor wafer, when there is a functional area or circuit under the wafer pad, it is possible to ensure that the wafer pad signal is led out without causing damage to the functional area or circuit, thereby solving the problem of poor reliability of the existing optical sensor WLCSP packaging method.
[0069] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A packaging method for an optical sensor based on wafer-level chip scale packaging, characterized in that: include: forming a first metal pillar in an outer region of a scribe line of the optical sensor wafer; Coating a film on the surface of the optical sensor wafer to form a bonding layer, wherein the bonding layer exposes the photosensitive area, the wafer pad and the first metal column of the optical sensor wafer; Bonding the coated optical sensor wafer to the glass; forming a second metal column and a metal line on the glass to electrically connect the wafer pad to the first metal column through the second metal column and the metal line; Forming a glass solder resist layer on the glass, wherein the glass solder resist layer covers the metal circuit; Using a rewiring technology, a bump pad is formed at the bottom of the optical sensor wafer, and the bump pad is electrically connected to the first metal column in a one-to-one correspondence; A wafer solder resist layer is formed on the bottom of the optical sensor wafer, wherein the wafer solder resist layer covers the bottom of the optical sensor wafer and exposes the bump pads.
2. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The method for forming a first metal pillar in an outer area of a scribe line of an optical sensor wafer comprises: Using a photolithography process, a vertical hole etching area is reserved in an outer area of a dicing street of the optical sensor wafer; Using an etching process, etching the vertical hole etching area to form a vertical hole; The vertical hole is filled with electroplating by using an electroplating process to form a first metal column.
3. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The first metal pillars are located in the peripheral area of the dicing road and correspond one-to-one to the wafer pads on the optical sensor wafer.
4. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The first metal column and the wafer pad are aligned one by one along the length direction of the wafer pad, and the distance between the first metal column and the wafer pad is 10~20μm; the diameter of the first metal column is 1~10μm, and the depth is 80~250μm.
5. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The method of coating a surface of an optical sensor wafer to form a bonding layer comprises: covering the photosensitive area, the wafer pad and the first metal pillar with photoresist; Using chemical vapor deposition, plasma enhanced chemical vapor deposition or evaporation process, silicide is deposited on the surface of the optical sensor wafer; Remove the photoresist and complete the coating.
6. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The bonding layer exposes the photosensitive area and a 10-20 μm range around the photosensitive area; the bonding layer exposes a 1×1 μm-10×10 μm range of the wafer pad.
7. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The method for forming a second metal column and a metal line on glass comprises: Using a photolithography process, a through-hole etching area is reserved on the glass surface, wherein a vertical projection of the through-hole etching area falls on an exposed area of the first metal column and the wafer pad; Using an etching process, etching the through hole etching area to form a through hole; Using an electroplating process, electroplating and filling the through hole to form a second metal column; Using a photolithography process, forming a circuit groove on the glass surface, wherein the circuit groove connects a second metal column connected to the first metal column and a second metal column connected to the wafer pad; The circuit grooves are filled with electroplating by using an electroplating process to form metal circuits.
8. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The distance between the vertical projection of the glass solder resist layer on the optical sensor wafer and the photosensitive area is 30-50 μm; the thickness of the glass solder resist layer is 5-20 μm.
9. The packaging method of an optical sensor based on wafer-level chip scale packaging according to claim 1, characterized in that: The thickness of the wafer solder resist layer is 5-20 μm.
10. An optical sensor, packaged by the packaging method of an optical sensor based on wafer-level chip scale packaging according to any one of claims 1 to 9, characterized in that: The optical sensor comprises an optical sensor chip, a bonding layer and glass arranged in sequence from bottom to top; the optical sensor chip has a photosensitive area, a wafer pad and a first metal column, and the glass has a second metal column and a metal line; the wafer pad is electrically connected to the first metal column through the second metal column and the metal line, and is led out to the back side of the optical sensor chip through the first metal column; The optical sensor chip is bonded to the glass through the bonding layer; the bonding layer exposes the photosensitive area.
11. The optical sensor according to claim 10, characterized in that The bottom of the optical sensor chip has a bump pad, and the bump pad is electrically connected to the first metal column in a one-to-one correspondence.
12. The optical sensor according to claim 11, characterized in that A glass solder resist layer is formed on the glass surface, and the glass solder resist layer covers the metal circuit; a wafer solder resist layer is formed on the bottom of the optical sensor chip, and the wafer solder resist layer covers the bottom of the optical sensor chip and exposes the bump pad.
13. The optical sensor according to claim 10, characterized in that The first metal pillars are located outside the dicing lanes of the optical sensor chip, and the first metal pillars correspond to the wafer pads one by one.