On-chip adjustable non-uniform quantization analog-to-digital converter based on memristor

Abstract

The invention relates to the technical field of analog-to-digital converters, in particular to an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor. Comprising a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit and an on-chip adjustment circuit, the input signal conversion circuit is used for connecting an original input signal and a reference voltage and performing amplitude conversion on the input signal and the reference voltage; the memristor array unit is used for receiving the converted input signal and reference voltage and dividing the reference voltage into a plurality of reference voltage nodes; the output signal control conversion circuit is used for connecting a plurality of reference voltage nodes and outputting a digital signal in a bus form; and the on-chip adjusting circuit is used for carrying out gating adjustment on the memristor array unit, so that non-uniform quantization of data is realized, and quantization noise is effectively reduced.

Description

Technical Field

[0001] The invention relates to the technical field of analog-to-digital converters, and in particular to an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor. Background Art

[0002] An analog-to-digital converter (ADC) is a device that quantizes analog domain signals into digital domains. It is a bridge between real-world signals and digital signals. ADCs mainly include FLASH, SAR, Sigma-Delta ADC and other types, each with different application scenarios and precision. Among them, Flash ADC is a low-precision, high-speed analog-to-digital converter. If the quantization interval needs to be reduced to improve the resolution, the number of voltage divider resistors, comparators and triggers contained in it will increase exponentially. Therefore, as the resolution increases, Flash ADC has defects such as large chip area and high power consumption. Although Flash ADC has these shortcomings, it only needs one comparison to quantize the analog signal, while other types of ADCs, such as SAR ADC, usually require N comparisons to produce N-bit quantization results. In addition, Sigma-Delta ADC can achieve high precision through multiple stages and high oversampling rates, but the response time is long.

[0003] Most traditional ADCs use uniform quantization, and the sampled reference signal is evenly distributed within the range. However, for some application scenarios, the signal is not evenly distributed, but concentrated in a certain part of the range. If uniform quantization is used, the quantization noise in the data-dense area will be larger, and in the data-sparse area, although the quantization noise is small, the amount of data is also small. For example, audio signals are mainly small-amplitude signals and background noise parts that do not contain information. The use of uniform quantization will make the restoration of small-amplitude signals rougher, and a relatively small number of high-amplitude signals will be assigned more quantization levels, resulting in a lower signal-to-noise ratio for the final signal. Summary of the invention

[0004] The purpose of the present invention is to provide an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which solves the problem that the uniform quantization used in the traditional ADC makes the restoration of signals with smaller amplitudes relatively rough, and a relatively small number of signals with higher amplitudes are relatively assigned more quantization levels, resulting in a low signal-to-noise ratio of the final signal.

[0005] To achieve the above-mentioned object, the present invention adopts an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, comprising a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit and an on-chip adjustment circuit, wherein the memristor array unit is connected to the input signal conversion circuit, and the output signal control conversion circuit and the on-chip adjustment circuit are respectively connected to the memristor array unit; The input signal conversion circuit is used to connect the original input signal and the reference voltage, and perform amplitude conversion between the input signal and the reference voltage; The memristor array unit is used to receive the converted input signal and the reference voltage, and divide the reference voltage to form a plurality of reference voltage nodes; The output signal control conversion circuit is used to connect multiple reference voltage nodes and output digital signals in the form of a bus; The on-chip adjustment circuit is used to perform gating adjustment on the memristor array unit.

[0006] The memristor array unit comprises a plurality of memristors connected in series.

[0007] Wherein, the number of the memristors is 2 N wherein N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on the memristor.

[0008] Wherein, the output signal control conversion circuit includes a comparator array unit, a D flip-flop array unit and a digital encoder; The comparator array unit is used to connect the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code; The D flip-flop array unit is used to transmit the temperature code under the control of the clock signal; The digital encoder is used to receive the temperature code, convert the temperature code into a binary code, and output it in the form of a bus.

[0009] Wherein, the comparator array unit includes 2 N - 1 comparator; The D flip-flop array unit includes 2 N - 1 D flip-flop.

[0010] The on-chip adjustment circuit includes a gate array unit and an address gate, the gate array unit is connected to the memristor array unit, and the address gate is connected to the gate array unit.

[0011] Wherein, the gate array unit includes 2 N +1 MOS tube.

[0012] The present invention discloses an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, wherein the input signal conversion circuit is used to connect the original input signal and the reference voltage, and perform amplitude conversion between the input signal and the reference voltage; the memristor array unit is used to receive the converted input signal and the reference voltage, and divide the reference voltage to form a plurality of reference voltage nodes; the output signal control conversion circuit is used to connect the plurality of reference voltage nodes, and output a digital signal in the form of a bus; the on-chip adjustment circuit is used to perform gating adjustment on the memristor array unit; the on-chip adjustment circuit is used to achieve fine adjustment of the resistance of the memristor array unit, and to alleviate the problem of uneven quantization interval caused by the misalignment of the non-ideal comparator to a certain extent; at the same time, when facing different types of signals, the analog-to-digital converter can be adjusted to different quantization types, and suitable quantization intervals can be applied to signals of different amplitudes, which can not only reduce the quantization noise in the signal region of main concern by non-uniform quantization, but also increase the reusability and flexibility of the analog-to-digital converter; in addition, after performing the non-uniform quantization operation, different types of digital-to-analog converters can be used to perform a certain degree of nonlinear mapping function, thereby realizing nonlinear calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0014] Figure 1 It is a block diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor of the present invention.

[0015] Figure 2 It is a structural principle diagram of an on-chip adjustable non-uniform quantized analog-to-digital converter based on a memristor of the present invention.

[0016] Figure 3 It is a circuit schematic diagram of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor of the present invention.

[0017] Figure 4 This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Example 1 of the present invention.

[0018] Figure 5 It is a schematic diagram of the quantization interval of the on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to the second embodiment of the present invention.

[0019] Figure 6This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Embodiment 2 of the present invention.

[0020] Figure 7 It is a schematic diagram of the quantization interval of the on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to the third embodiment of the present invention.

[0021] Figure 8 This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Example 3 of the present invention.

[0022] Fig. 9 It is a schematic diagram of the quantization interval of the on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to the fourth embodiment of the present invention.

[0023] Fig.10 This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Embodiment 4 of the present invention.

[0024] Fig.11 This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Example 5 of the present invention.

[0025] Fig.12 This is a diagram of quantization results of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor according to Example 6 of the present invention.

[0026] 100 - memristor array unit, 200 - input signal conversion circuit, 300 - output signal control conversion circuit, 301 - comparator array unit, 302 - D flip-flop array unit, 303 - digital encoder, 400 - on-chip adjustment circuit, 401 - gate array unit, 402 - address gate. DETAILED DESCRIPTION

[0027] See also Figure 1~Figure 3 ,in Figure 1 is a block diagram of an on-chip tunable non-uniform quantization analog-to-digital converter based on memristors. Figure 2 This is the structural schematic diagram of an on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor. Figure 3 This is the circuit schematic of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor.

[0028] The present invention provides an on-chip adjustable non-uniform quantized analog-to-digital converter based on a memristor, comprising a memristor array unit 100, an input signal conversion circuit 200, an output signal control conversion circuit 300 and an on-chip adjustment circuit 400, wherein the memristor array unit 100 is connected to the input signal conversion circuit 200, and the output signal control conversion circuit 300 and the on-chip adjustment circuit 400 are respectively connected to the memristor array unit 100; The input signal conversion circuit 200 is used to connect the original input signal and the reference voltage, and perform amplitude conversion between the input signal and the reference voltage; The memristor array unit 100 is used to receive the converted input signal and the reference voltage, and divide the reference voltage to form a plurality of reference voltage nodes; The output signal control conversion circuit 300 is used to connect multiple reference voltage nodes and output digital signals in the form of a bus; The on-chip adjustment circuit 400 is used to perform gating adjustment on the memristor array unit 100 .

[0029] In this embodiment, the input signal conversion circuit 200 connects the original input signal and the reference voltage, and performs amplitude conversion on the input signal and the reference voltage; the memristor array unit 100 receives the converted input signal and the reference voltage, and divides the reference voltage to form a plurality of reference voltage nodes; the output signal control conversion circuit 300 connects the plurality of reference voltage nodes, and outputs a digital signal in the form of a bus; the on-chip adjustment circuit 400 performs gating adjustment on the memristor array unit 100; through the on-chip adjustment circuit 400, the resistance of the memristor array unit 100 is finely adjusted, and the problem of uneven quantization interval caused by the offset of the non-ideal comparator is alleviated to a certain extent; at the same time, when facing different types of signals, the analog-to-digital converter can be adjusted to different quantization types, and the appropriate quantization interval can be applied to signals of different amplitudes, which can not only reduce the quantization noise in the signal area of ​​main concern by non-uniform quantization, but also increase the reusability and flexibility of the analog-to-digital converter; in addition, after performing the non-uniform quantization operation, different types of digital-to-analog converters can be used to perform a certain degree of nonlinear mapping function, thereby realizing nonlinear calculation.

[0030] Furthermore, the memristor array unit 100 includes a plurality of memristors connected in series.

[0031] Furthermore, the number of the memristors is 2 N wherein N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on the memristor.

[0032] In this embodiment, the number of memristors is 2 N Where N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor, the top electrode of the memristor array unit 100 is used as the input terminal and the bottom electrode is used as the output terminal, such as Figure 3 As shown, No. 2 NThe input end of each memristor is connected to a reference voltage VREF, and the output end of the first memristor unit is connected to ground via a switch S1; when the switch S1 is closed, the memristor array unit 100 divides the reference voltage VREF from the first to the second. N The nodes where the memristor units are connected lead out various divided voltages.

[0033] Further, the output signal control conversion circuit 300 includes a comparator array unit 301, a D flip-flop array unit 302 and a digital encoder 303; The comparator array unit 301 is used to connect the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code; The D flip-flop array unit 302 is used to transmit the temperature code under the control of the clock signal; The digital encoder 303 is used to receive the temperature code, convert the temperature code into a binary code, and output it in the form of a bus.

[0034] Furthermore, the comparator array unit 301 includes 2 N - 1 comparator; The D flip-flop array unit 302 includes two N - 1 D flip-flop.

[0035] In this embodiment, the comparator array unit 301 is connected to the input voltage, compares the reference voltage node with the input voltage, and converts the input voltage into a temperature code; the D flip-flop array unit 302 transmits the temperature code under the control of the clock signal; the digital encoder 303 receives the temperature code, converts the temperature code into a binary code, and outputs it in the form of a bus; wherein the comparator array unit 301 includes 2 N -1 comparator, the D flip-flop array unit 302 includes 2 N -1 D flip-flop. The comparators are connected to the D flip-flops one by one; the positive input of each comparator is connected to the input voltage VIN, the negative input of the ith comparator is connected to the nth voltage divider, the output of the ith comparator is connected to the D terminal of the ith D flip-flop, the ith comparator compares the nth voltage divider with the input voltage, quantizes the input voltage into a temperature code and outputs it to the ith D flip-flop, i=1,2,...,2 N -1; the clock end of each D flip-flop is connected to the clock signal CLK, and the Q output end is connected to the digital encoder 303. The i-th D flip-flop transmits the temperature code output by the i-th comparator to the digital encoder 303 under the control of the clock signal; the digital encoder 303 converts the temperature code into a binary code and outputs it in the form of a bus.

[0036] Furthermore, the on-chip adjustment circuit 400 includes a gate array unit 401 and an address gate 402 . The gate array unit 401 is connected to the memristor array unit 100 , and the address gate 402 is connected to the gate array unit 401 .

[0037] Furthermore, the gate array unit 401 includes 2 N +1 MOS tube.

[0038] In this embodiment, the gate array unit 401 includes two N +1 of the MOS tubes, the input end of the jth memristor is connected to the drain of the jth MOS tube, and the output end is connected to the drain of the j+1th MOS tube, j=1,2,..., 2 N ; The first MOS tube to the second N +1 of the MOS tubes connects the source electrode to the control terminal VA and the control terminal VB in sequence; the first MOS tube to the second N The gates of the MOS transistors are all connected to the output bus of the address selector 402.

[0039] The specific process of gating and adjusting any one of the memristors in the memristor array unit 100 by the address gate 402 is as follows: Keep the switch S1 open, and input the address signal to the address selector 402, so that the MOS transistors at both ends of the memristor are selected by the address selector 402, so that the memristor array unit 100 connects the control terminal VA and the control terminal VB through the MOS transistors at both ends; and the resistance value of the memristor is adjusted through the control terminal VA and the control terminal VB; Apply a read voltage through the control terminal VA and the control terminal VB, and calculate the current resistance value according to the read current; adjust the control terminal VA or the control terminal VB to apply a write pulse according to the difference between the current resistance value and the target resistance value; The above process is repeated until the resistance of the memristor array unit 100 reaches the target resistance, and during the repeated process, the amplitude of the write pulse is gradually reduced to accurately adjust the memristor unit.

[0040] The input signal conversion circuit 200 includes: two proportional amplifiers and a sampling and holding circuit. The two proportional amplifiers respectively amplify or reduce the input voltage VIN and the reference voltage VREF by the same proportion. The scaled input voltage passes through the sampling and holding circuit and is input to the comparator array unit 301. The scaled reference voltage is input to the memristor array unit 100.

[0041] In this embodiment, the first, second, ..., secondN The order of +1 is based on the direction of the ground input voltage VIN and the reference voltage VREF in the circuit, that is, Figure 3 The order is from right to left.

[0042] Based on the above non-uniform quantization analog-to-digital converter, for the non-uniform quantization process, it is necessary to adjust the resistance value of the memristor in the memristor array unit 100 on-chip, so that different quantization intervals are used for signals of different amplitudes; for example, for a specific application scenario that is more concerned with the accuracy of small-amplitude signals, that is, a small quantization interval is used for small-amplitude signals, the lower-order memristors in the memristor array unit 100 are adjusted to a low-resistance state, and the higher-order memristors in the memristor array unit 100 are adjusted to a high-resistance state. Specifically, the on-chip adjustment of the quantization interval is composed of: The switch S1 is kept disconnected, so that the memristor enters the read-write state; the address signal is input to the address selector 402, and the address selector 402 selects the MOS tubes at both ends of the specified memristor; for example, for the jth memristor, the address selector 402 selects the jth MOS tube and the j+1th MOS tube, and the jth memristor realizes reading and writing through the control terminal VA and the control terminal VB connected at both ends, which can control the relative size of the signals at both ends to increase or decrease the resistance value of the memristor, and can also measure the output current after applying the read voltage to determine the resistance state after adjustment, thereby realizing accurate resistance value regulation of the memristor; taking the lowest-order memristor in the memristor array unit 100 as an example, the address of the memristor is input, and after the address selector 402 decodes the address, the <1:0> two port signals of the bus are pulled high, thereby turning on the MOS tubes connected at both ends of the lowest-order memristor, and the lowest-order memristor is turned on. The top electrode of the memristor is connected to the VB terminal through the first MOS tube, and the bottom electrode is connected to the VA terminal through the second MOS tube. If the memristor needs to be adjusted to a low resistance state to achieve a small quantization interval, a read voltage that will not change the state of the memristor is first applied, and the current resistance state is calculated according to the read current. If the resistance of the memristor is greater than the resistance to be adjusted at this time, the VA terminal is grounded, and a pulse signal is input from the VB terminal to lower the resistance value. After adjustment, the current state is detected by reading the voltage. If the resistance of the memristor is less than the resistance to be adjusted at this time, the VB terminal is grounded, and a pulse signal is input from the VA terminal to increase the resistance value. After adjustment, the current state is detected by reading the voltage. The above process is repeated until the resistance is adjusted to the resistance to be adjusted; further, the above process is repeated to adjust each of the memristors through the address selector 402 until all the memristors in the memristor array unit 100 are adjusted to the target state.

[0043] The result finally produced by the above non-uniform quantization analog-to-digital converter adopts a small quantization interval for the signal of some amplitudes, and the binary codes of the quantization output are still evenly distributed; therefore, in the process of signal restoration, the signal should be restored in a non-uniform quantization interval manner. For example, after obtaining the final binary output, the corresponding binary code to analog value lookup table should be configured according to the resistance state of the memristor array in the non-uniform quantization device used at that time, and the quantized binary code should be mapped back to the original analog value, so as to realize the final sampling to non-uniform quantization and signal restoration process. Specifically, the conversion process of non-uniform quantization digital code to analog signal is as follows: first, the input binary digital code is converted into a decimal number. Since this binary code is converted from a thermometer code in the non-uniform quantization device, the decimal number can correspond to the temperature code one by one, that is, the decimal number corresponds to which input signal actually makes the final output signal of the comparator high level, and the decimal number is recorded as the activation number; the resistance value of the memristor array unit 100 or the ratio of the resistance of the memristor array unit 100 is input or stored in the non-uniform quantization device in the form of an array. In the conversion device of quantized digital code to analog signal, by summing the resistance values ​​of the memristor array unit 100, the total resistance from the input end to the ground is obtained, and the subscript from zero to the activation number is summed with a decimal number as a reference, and divided by the total resistance of the memristor array, the proportion of the resistance value from the port to the ground corresponding to the reference level reached by the input voltage to the total resistance value can be obtained, and the corresponding analog signal can be restored, and each restored analog voltage except the zero level and the full scale is raised by half of the corresponding quantization interval to reduce the quantization noise generated in the quantization process. If the signal does not need to be restored, for example, the analog signal is input into this non-uniform quantization analog-to-digital converter, and a non-linear activation operation similar to that of the neuron node in the neural network is performed on it, then the digital code generated by the non-uniform quantization can be not finally mapped back to the original analog signal, and the traditional equal-interval digital-to-analog converter can be directly used to convert the non-uniform quantized digital code into an analog signal, and a signal after non-linear quantization can be obtained; that is, under different non-uniform quantization configurations, this non-uniform quantization analog-to-digital converter can achieve a certain degree of non-linear calculation function in the quantization process.

[0044] The beneficial effects of the present invention are further described below in conjunction with the accompanying drawings and embodiments.

[0045] Example 1 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured in a uniform quantization state. The quantization result of a linear signal is as follows: Figure 4 As shown in the figure, it can be seen that the analog-to-digital converter can be adjusted to a uniform quantization mode, and all the bits use the same quantization interval.

[0046] Example 2 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured to adopt a non-uniform quantization state of a small quantization interval for a small amplitude signal and a large quantization interval for a large amplitude signal, and a quantization interval for a linear signal such as Figure 5 As shown, the quantization result of the linear signal is as follows Figure 6 As shown in the figure, it can be seen that the small signal has a relatively small quantization interval relative to the large signal, and more quantization bits are allocated, that is, the analog-to-digital converter can be adjusted to use a small quantization interval for small-amplitude signals and a large quantization interval for large-amplitude signals.

[0047] Example 3 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured to adopt a non-uniform quantization state of a large quantization interval for a small amplitude signal and a small quantization interval for a large amplitude signal, and a quantization interval for a linear signal such as Figure 7 As shown, the quantization result of the linear signal is as follows Figure 8 As shown in the figure, it can be seen that small signals have relatively large quantization intervals relative to large signals, and are allocated fewer quantization bits, that is, the analog-to-digital converter can be adjusted to use a large quantization interval for small-amplitude signals and a small quantization interval for large-amplitude signals.

[0048] Example 4 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured to use a non-uniform quantization state with a large quantization interval for small-amplitude signals and large-amplitude signals and a small quantization interval for intermediate-amplitude signals, and a quantization interval for linear signals such as Fig. 9 As shown, the quantization result of the linear signal is as follows Fig.10 As shown in the figure, it can be seen that the medium amplitude signal has a relatively small quantization interval and more quantization bits relative to large and small signals, that is, the analog-to-digital converter can be adjusted to use a large quantization interval for small signals and large signals, and a small quantization interval for medium amplitude signals.

[0049] Example 5 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured in a uniform quantization state. The quantization result of the superimposed sinusoidal signal is as follows: Fig.11 As shown in the figure, it can be seen that uniform quantization quantizes all parts of the sinusoidal signal uniformly.

[0050] Example 6 This embodiment provides a 4-bit on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, which is configured to adopt a non-uniform quantization state of a large quantization interval for a small amplitude signal and a small quantization interval for a large amplitude signal, and the quantization result of the superimposed sinusoidal signal is as follows: Fig.12 As shown, it can be seen from the figure that the analog-to-digital converter configured for non-uniform quantization has a small quantization interval for the large amplitude signal of interest and a large quantization interval for the small amplitude signal, and the quantization accuracy in this relatively large amplitude signal region is higher.

[0051] In the present invention, non-uniform quantization can flexibly change the quantization mode for different types of signals and reduce quantization distortion; Flash ADCs using non-uniform resistance division are more common, but their resistance is usually determined at the beginning of the design to divide the non-uniform quantization intervals, and cannot be adjusted on-chip for different application scenarios. Memristors are the fourth type of passive electronic devices besides resistors, capacitors, and inductors. The resistance value of a memristor is related to the current flowing through it, so the resistance value of the memristor can be adjusted to a certain state by applying a certain voltage or current signal. There are many types of conductive mechanisms in actual memristors, including anion migration, cation migration, electronic effect and thermal effect. Taking ion migration memristors as an example, under the influence of an applied voltage, metal ions or oxygen holes migrate and gradually form a conductive channel or disconnect in the resistive layer between the top electrode and the bottom electrode of the memristor, thereby switching between high resistance and low resistance states. By applying limiting current and pulse signals, the resistance value can be precisely adjusted by controlling the thickness and number of the conductive channel. An ideal memristor can achieve continuous adjustment of conductivity or resistance as the signal is written. In addition to ion migration memristors, phase change resistive memory with better analog resistive performance can also be selected as needed, but the switching ratio and other performances must also be considered. In addition, the memristor has many advantages such as small size, fast read and write speed, and low power consumption, and its manufacturing process is compatible with CMOS process and can be used in storage and computing. The original input signal and the reference voltage are connected through the input signal conversion circuit 200, and the input signal and the reference voltage are converted in amplitude. The memristor array unit 100 receives the converted input signal and the reference voltage, and divides the reference voltage to form a plurality of reference voltage nodes. The output signal control conversion circuit 300 connects a plurality of reference voltage nodes and outputs a digital signal in the form of a bus. The on-chip adjustment circuit 400 performs selection adjustment on the memristor array unit 100, realizes non-uniform quantization of data, and effectively reduces quantization noise.

[0052] What is disclosed above is only one or more preferred embodiments of the present invention, which certainly cannot be used to limit the scope of rights of the present invention. Ordinary technicians in this field can understand that all or part of the processes of implementing the above embodiments and making equivalent changes according to the claims of the present invention still fall within the scope of the invention.

Claims

1. An on-chip adjustable non-uniform quantization analog-to-digital converter based on a memristor, characterized in that: It includes a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit and an on-chip adjustment circuit, wherein the memristor array unit is connected to the input signal conversion circuit, and the output signal control conversion circuit and the on-chip adjustment circuit are respectively connected to the memristor array unit; The input signal conversion circuit is used to connect the original input signal and the reference voltage, and perform amplitude conversion between the input signal and the reference voltage; The memristor array unit is used to receive the converted input signal and the reference voltage, and divide the reference voltage to form a plurality of reference voltage nodes; The output signal control conversion circuit is used to connect multiple reference voltage nodes and output digital signals in the form of a bus; The on-chip adjustment circuit is used to perform gating adjustment on the memristor array unit.

2. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as claimed in claim 1, characterized in that: The memristor array unit comprises a plurality of memristors connected in series.

3. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as claimed in claim 2, characterized in that: The number of memristors is 2 N wherein N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on the memristor.

4. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as claimed in claim 3, characterized in that: The output signal control conversion circuit includes a comparator array unit, a D flip-flop array unit and a digital encoder; The comparator array unit is used to connect the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code; The D flip-flop array unit is used to transmit the temperature code under the control of the clock signal; The digital encoder is used to receive the temperature code, convert the temperature code into a binary code, and output it in the form of a bus.

5. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as claimed in claim 4, characterized in that: The comparator array unit includes 2 N - 1 comparator; The D flip-flop array unit includes 2 N - 1 D flip-flop.

6. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as claimed in claim 3, characterized in that: The on-chip adjustment circuit comprises a gate array unit and an address gate, wherein the gate array unit is connected to the memristor array unit, and the address gate is connected to the gate array unit.

7. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to claim 6, characterized in that: The gate array unit includes 2 N +1 MOS tube.

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