Polymer substrate / metal layer composite structure, flexible circuit board and preparation method thereof

By using ALD technology to form an oxide buffer layer and a conductive metal layer on the surface of the polymer substrate of the flexible printed circuit board, problems such as small binding force of the PI/Cu interface in the prior art are solved, and a high-performance and highly reliable flexible circuit board is achieved.

CN119730007APending Publication Date: 2025-03-28NINGBO INST OF MATERIALS TECH & ENG CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202311283379.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

During the preparation process, existing flexible printed circuit boards (FPCs) have problems such as small binding force, poor adhesion, low step coverage, poor uniformity and easy degradation of the PI/Cu interface, which is difficult to meet the needs of ultra-high precision FPCs.

Method used

Atomic layer deposition (ALD) technology is used to form an oxide buffer layer in situ on the surface of the polymer substrate, and a conductive metal layer is formed thereon, forming an ALD-metal/ALD-oxide/polymer substrate sandwich structure.

Benefits of technology

The metal/polymer interface performance and the high conductivity of the conductive metal layer are significantly improved, achieving a flexible circuit board with low cost, high performance, high reliability and small line width/line distance (less than 10μm).

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Abstract

The invention provides a polymer base material / metal layer composite structure, a flexible circuit board and a preparation method of the flexible circuit board. The composite structure comprises an oxide buffer layer and a conductive metal layer which are formed on the surface of the polymer substrate in situ; the oxide buffer layer comprises a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are respectively distributed among metal crystal grains in the conductive metal layer and in molecular chain gaps of the surface layer of the polymer substrate. The composite structure may be made by a two-step ALD process. Compared with the prior art, the flexible circuit board is low in cost, high in performance, high in reliability and small in line width / line distance.
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Description

Technical Field

[0001] The present application specifically relates to a polymer substrate / metal layer composite structure, a flexible circuit board and a preparation method thereof. Background Art

[0002] In recent decades, flexible printed circuit boards (FPCs) have attracted widespread attention for their unique properties, including strong flexibility, customizable shapes, and lightness. They have made significant progress in the fields of information industry, smart wearable devices, and advanced electronic products. Compared with traditional wire harnesses, their weight and volume can be reduced by more than 70%, and they can be bent in many ways. At present, commercial flexible circuit boards are usually single-layer FPC structures. However, as electronic devices move further towards miniaturization, lightness, multi-functions, and high-density assembly, single-layer FPCs must also develop towards multi-layer high-density interconnect (High Density Interconnector, referred to as HDI) circuit boards. HDI technology introduces blind buried holes and refined line width / line spacing in conventional circuit boards, and can manufacture thin, multi-layer, stable, and high-density interconnected printed circuit boards that cannot be achieved by traditional multi-layer board technology. As the core substrate in the field of flexible electronics, flexible copper clad laminates have both static and dynamic bending characteristics, and the improvement of their various properties has an important impact on the performance improvement of high-end electronic products.

[0003] There are two main FPC preparation processes based on PI / Cu (polyimide / copper composite layer). One of the processes is to grow a copper seed layer on a PI substrate using a copper deposition process to obtain a Cu / precious metal catalyst / PI three-layer structure, and then use a thickened Cu film process to prepare a thick Cu film on the Cu buffer layer. However, when the line width and line spacing of the copper conductive line are less than 10μm, the PI / Cu interface bonding force is small and the adhesion is poor. This may cause interface delamination or peeling during use, making it difficult to obtain an ultra-high precision FPC. Another process is to directly grow a copper seed layer on the surface of a PI substrate using a physical vapor deposition (PVD) method to obtain a PI / Cu structure, and then use a thickened Cu film process (also including PVD technology) to prepare a thick Cu film on the Cu seed layer. This solution has problems such as low step coverage, poor uniformity, and easy degradation of the PI / Cu interface, which can easily lead to performance degradation of ultra-high precision FPCs.

[0004] At present, some researchers have tried to use the atomic layer deposition (ALD) method based on a single pulse source to deposit a Cu layer on a PI substrate to prepare FPC. However, the single pulse source causes excessive physical adsorption of the atomic layer deposition precursor on the surface of the polymer substrate, resulting in excessive parasitic chemical vapor deposition (CVD) reaction, causing the problem of high resistivity of the copper layer. Summary of the invention

[0005] The main purpose of the present application is to provide a polymer substrate / metal layer composite structure, a flexible circuit board and a preparation method thereof to overcome the deficiencies of the prior art.

[0006] In order to achieve the above-mentioned invention objectives, this application provides the following technical solutions.

[0007] The first aspect of the present application provides a polymer substrate / metal layer composite structure, which includes an oxide buffer layer and a conductive metal layer formed in situ on the surface of the polymer substrate; the oxide buffer layer contains a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are respectively distributed between the metal grains in the conductive metal layer and in the molecular chain gaps of the surface layer of the polymer substrate.

[0008] The second aspect of the present application provides a method for preparing a polymer substrate / metal layer composite structure, which comprises:

[0009] Using a first precursor monomer and an oxygen-containing substance, an oxide buffer layer is formed in situ on the surface of a polymer substrate by a thermal atomic layer deposition method, wherein the oxide buffer layer comprises a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are filled in the molecular chain gaps of the surface layer of the polymer substrate;

[0010] A conductive metal layer is in-situ formed on the oxide buffer layer by an atomic layer deposition method using a reducing agent and a second precursor monomer, and a plurality of oxide nanoclusters are distributed between metal grains in the conductive metal layer.

[0011] The third aspect of the present application provides a flexible circuit board, which includes the polymer substrate / metal layer composite structure.

[0012] The fourth aspect of the present application provides a method for preparing the flexible circuit board, which includes the step of making the polymer substrate / metal layer composite structure.

[0013] Compared with the prior art, the present application introduces an atomic layer deposition process in the production process of flexible circuit boards. By first growing an oxide buffer layer on a polymer substrate and then growing a conductive metal layer on the polymer substrate, a metal / oxide composite interface is formed, and an ALD-metal / ALD-oxide / polymer substrate sandwich structure is constructed. This can significantly improve the metal / polymer interface performance and the high conductivity of the conductive metal layer on the polymer substrate, thereby realizing a low-cost, high-performance, high-reliability flexible circuit board with a small line width / line spacing (less than 10μm). BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 This is a schematic diagram of a preparation process of a PI substrate / Cu layer composite structure in an embodiment of the present application;

[0016] Figure 2 Schematic diagram of the atomic layer deposition process in the multi-pulse copper source gas supply mode in the embodiment of the present application;

[0017] Figure 3 is a SEM image of the surface of a PI substrate used in Example 1 of the present application;

[0018] Figure 4 This is an AFM image of the surface of a PI substrate used in Example 1 of the present application;

[0019] Figure 5 is a SEM image of a PI substrate having a ZnO buffer layer deposited on the surface with an ALD growth cycle of 50 in Example 1 of the present application;

[0020] Figure 6 is an AFM image of a PI substrate with a ZnO buffer layer deposited on the surface with an ALD growth cycle of 50 in Example 1 of the present application;

[0021] Figure 7 is an XRD pattern of a ZnO buffer layer grown on a glass substrate with an ALD growth period of 300 in Example 1 of the present application;

[0022] Figure 8 is a ZnLMM Auger XPS graph of the ZnO buffer layer grown on the surface of the PI substrate at different ALD growth cycles in Example 1 of the present application;

[0023] Fig. 9 is an O1s XPS graph of the ZnO buffer layer grown on the surface of the PI substrate at different ALD growth cycles in Example 1 of the present application;

[0024] Fig.10 is a Zn2p3 / 2 XPS graph of the ZnO buffer layer grown on the surface of the PI substrate at different ALD growth cycles in Example 1 of the present application;

[0025] Fig.11 The Zn2p of the ZnO buffer layer grown on the surface of the PI substrate in different ALD growth cycles in Example 1 of the present application after adsorption of Cu(hfac)23 / 2 XP chart;

[0026] Fig.12 is a surface SEM image of the ALD-Cu film deposited on the PI substrate without an ALD-ZnO buffer layer on the surface in Comparative Example 1;

[0027] Fig.13 is a cross-sectional SEM image of the ALD-Cu film deposited on the PI substrate without an ALD-ZnO buffer layer on the surface in Comparative Example 1;

[0028] Fig.14 is a surface SEM image of the ALD-Cu film deposited on the PI substrate having an ALD-ZnO buffer layer with a growth period of 50 on the surface in Example 1 of the present application;

[0029] Fig.15 is a cross-sectional SEM image of an ALD-Cu film deposited on a PI substrate having an ALD-ZnO buffer layer with a growth period of 50 on the surface in Example 1 of the present application;

[0030] Fig.16 is a surface SEM image of the ALD-Cu film deposited on the PI substrate having an ALD-ZnO buffer layer with a growth period of 100 on the surface in Example 1 of the present application;

[0031] Fig.17 is a cross-sectional SEM image of an ALD-Cu film deposited on a PI substrate having an ALD-ZnO buffer layer with a growth period of 100 on the surface in Example 1 of the present application;

[0032] Fig.18 It is the ADF-STEM image and the STEM-EDX scanning spectrum of the cross section of the PI / ZnO / Cu structure in the experimental product 4 in Example 1 of the present application;

[0033] Fig.19 It is a high-resolution transmission electron microscope (HRTEM) image of the PI / ZnO / Cu structure in the experimental product 4 in Example 1 of the present application and the FFT patterns of different regions;

[0034] Fig. 20 It is a vertical average intensity diagram of the EDX signal of the PI / ZnO / Cu structure in the experimental product 4 in Example 1 of the present application;

[0035] Fig.21 yes Fig. 20 A partial enlarged view of the area framed by the dashed line;

[0036] Fig. 22 This is an electron microscope image of a Cu layer deposited in a narrow trench with a depth-to-width ratio of about 20:1 in Comparative Example 2 of the present application. DETAILED DESCRIPTION

[0037] As mentioned above, taking the flexible copper-clad laminate as an example, whether it is the existing copper deposition process or the existing physical vapor deposition (PVD) method, when growing the Cu seed layer on PI, there are problems such as small PI / Cu interface bonding force and poor adhesion, or there are problems such as low step coverage, poor uniformity, and easy degradation of the PI / Cu interface, so it is difficult to meet the needs of preparing ultra-high precision flexible circuit boards. At the same time, although there are some literature reports that the Cu layer can be deposited on a polymer substrate by methods such as magnetron sputtering, it also has defects, such as difficulty in surface modification and copper film deposition in narrow channels with high aspect ratios or blind holes with high aspect ratios, so it is also not suitable for making ultra-high precision flexible circuit boards. In view of this, the applicant has been able to propose the technical solution of the present application after long-term research and a lot of practice. The technical solution of the present application will be further explained as follows.

[0038] In this specification, some technical terms are defined as follows.

[0039] Flexible circuit board: FPC (Flexible Printed Circuit) is an excellent flexible printed circuit board made of polyimide (PI) or polyester film as the base material. It has the characteristics of high wiring density, light weight, thin thickness, good bending and high reliability.

[0040] Buffer layer: A buffer layer is a layer of intermediate medium located between different materials or structures. It is used to adjust the property differences or interface mismatches between different materials, and plays the role of interface buffering and matching, barrier, surface modification, etc., so as to improve the stability and interaction effect of the interface.

[0041] Some embodiments of the present application provide a polymer substrate / metal layer composite structure including an oxide buffer layer and a conductive metal layer formed in situ on the surface of a polymer substrate; the oxide buffer layer contains a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are respectively distributed between the metal grains in the conductive metal layer and in the molecular chain gaps of the surface layer of the polymer substrate.

[0042] Furthermore, it can be considered that the oxide buffer layer described in the present application is macroscopically equivalent to an ultra-thin sandwich layer between the polymer substrate and the conductive metal layer, which is nested between the interface of the polymer substrate and the conductive metal layer.

[0043] It can also be considered that the surface layer of the polymer substrate and the bottom layer of the conductive metal layer described in the present application are partially embedded in the oxide buffer layer, thereby forming a composite structure layer in the area around the interface between the polymer substrate and the conductive metal layer. The thickness of the composite structure layer is about 10 to 20 nm, which is basically consistent with the distribution range of the oxide buffer layer, and therefore oxide is the main component.

[0044] In one embodiment, the composite structure has at least one of the following features a to h:

[0045] a. The size of the oxide nanoclusters is below 0.5 nm;

[0046] b. The particle size of the metal grains is 20 to 50 nm;

[0047] c. The thickness of the oxide buffer layer is 1 to 10 nm, preferably 3 to 10 nm;

[0048] d. The thickness of the conductive metal layer is 20 to 50 nm;

[0049] e. The sheet resistance of the conductive metal layer is below 5Ω / sq, preferably below 3Ω / sq, more preferably below 2Ω / sq, and the resistivity is below 20μΩ·cm, preferably below 8μΩ·cm, more preferably below 5μΩ·cm;

[0050] f. The material of the oxide buffer layer is, but is not limited to, any one or more combinations of zinc oxide, aluminum-doped zinc oxide, and silicon dioxide, preferably zinc oxide;

[0051] g. The material of the conductive metal layer includes but is not limited to any one of Cu, Ag, and Pt;

[0052] h. The material of the polymer substrate includes but is not limited to any one of polyimide, polyester, epoxy resin, and ABS resin.

[0053] The composite structure provided in the present application has a metal / oxide / polymer substrate sandwich structure, and there is no clear interface boundary between the conductive metal layer, the oxide buffer layer, and the polymer substrate. The overall performance is a composite interface, which significantly improves the interfacial bonding force and adhesion performance of the conductive metal layer and the polymer substrate, and greatly improves the uniformity and film resistivity of the conductive metal layer. When it is used in FPC and HDI circuit boards, it can make the flexible circuit board have the advantages of low cost, high performance, high reliability, long life, and small line width / line spacing.

[0054] Some embodiments of the present application provide a method for preparing a polymer substrate / metal layer composite structure, comprising:

[0055] S1. Using a first precursor monomer and an oxygen-containing substance, an oxide buffer layer is formed in situ on the surface of a polymer substrate by a thermal atomic layer deposition method, wherein the oxide buffer layer comprises a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are filled in the molecular chain gaps of the surface layer of the polymer substrate;

[0056] S2. Using a reducing agent and a second precursor monomer, an in-situ conductive metal layer is formed on the oxide buffer layer by an atomic layer deposition method, and a plurality of oxide nanoclusters are distributed between metal grains in the conductive metal layer.

[0057] The first precursor monomer may be selected from an organic metal compound, silane / siloxane, etc., which reacts with the oxygen-containing substance to generate the oxide nanoclusters, thereby forming the oxide buffer layer. Furthermore, the oxide buffer layer is a discontinuous layer.

[0058] The second precursor monomer contains a metal element, and after the second precursor monomer reacts with the reducing agent, the metal element is reduced to a metal element, thereby forming the conductive metal layer.

[0059] The present application improves the surface polarity characteristics of the polymer substrate by adopting the ALD continuous double-layer growth process, and makes the formed composite structure have an ALD-conductive metal layer / ALD-oxide buffer layer / polymer substrate sandwich composite structure, effectively overcoming the defects of the prior art such as low interface bonding force and poor adhesion of PI / Cu.

[0060] In one embodiment, step S1 specifically includes:

[0061] S11, placing the polymer substrate into a reaction chamber of an atomic layer deposition device;

[0062] S12, adjusting the vacuum degree in the reaction chamber to within 0.0056 Torr, then introducing the first precursor monomer into the reaction chamber to allow the first precursor monomer to be fully adsorbed on the surface of the polymer substrate, and then fully purging the reaction chamber with an inert gas to remove pollutants and excess first precursor monomer in the reaction chamber;

[0063] S13, introducing an oxygen-containing substance into the reaction chamber, and allowing the oxygen-containing substance to react with the first precursor monomer adsorbed on the surface of the polymer substrate to form a plurality of the oxide nanoclusters, thereby forming the oxide buffer layer.

[0064] Furthermore, step S1 specifically includes: repeatedly executing step S12 and step S13 more than once until the oxide buffer layer with a set thickness is obtained.

[0065] In the present application, after the oxide buffer layer is formed, the roughness of the surface of the polymer substrate is significantly reduced, and the surface polarity characteristics of the polymer substrate are significantly improved, which is of great help in improving the problems of low step coverage and poor uniformity of the seed layer of the conductive metal layer in subsequent processes, and is conducive to achieving low-temperature (<150°C) and high-precision control of layer-by-layer growth of the seed layer, as well as improving the interface structure of the conductive metal layer / polymer substrate, greatly enhancing the interface bonding force and adhesion performance between the conductive metal layer and the polymer substrate, and helping to reduce its process cost.

[0066] In one embodiment, step S2 specifically includes:

[0067] S21, introducing the second precursor monomer into the reaction chamber, and allowing the second precursor monomer to chemically adsorb on the surface of the polymer substrate by at least reacting with the surface active groups of the oxide nanoclusters;

[0068] S22, fully purging the reaction chamber with an inert gas to remove pollutants and excess second precursor monomer in the reaction chamber;

[0069] S23, repeating step S21 to step S22 until the second precursor monomer is saturated with self-limiting chemical adsorption on the surface of the polymer substrate;

[0070] S24, introducing the reducing agent into the reaction chamber to reduce the second precursor monomer chemically adsorbed on the surface of the polymer substrate to a metal element and aggregate into metal grains, thereby forming the conductive metal layer.

[0071] In one embodiment, step S2 specifically includes: firstly repeating steps S21 to S22 for multiple times, and then executing step S23.

[0072] Furthermore, step S2 specifically includes: repeatedly executing steps S21 to S24 more than once until the conductive metal layer with a set thickness is obtained.

[0073] The present application adopts a multi-pulse atomic layer deposition source process, which effectively solves the problem of large consumption of Cu precursors, etc., and especially solves the problem of excessive chemical vapor deposition (CVD) parasitic reactions in low-temperature atomic layer deposition of metals on polymer substrates in the prior art. It reduces the deposition time of atomic layer deposited conductive metals, improves the film resistivity of low-temperature atomic layer deposited conductive metals, and effectively improves the performance of the conductive metal interconnect layer.

[0074] Moreover, in this application, by adopting a two-step atomic layer deposition process, ultra-high conformal deposition of oxide buffer layers and conductive metal layers in narrow channels with high aspect ratios and blind holes with high aspect ratios can be achieved, and the thickness can be controlled at the angstrom level, thereby achieving non-destructive modification of micro-nano-level channels and through-holes, and better meeting the production requirements of ultra-high precision flexible circuit boards.

[0075] Wherein, the material of the polymer substrate is as described above.

[0076] In one embodiment, the first precursor includes any one of diethylzinc, Zn(CH3COO)2, and Zn(CH3)2, but is not limited thereto.

[0077] In one embodiment, the oxygen-containing substance includes any one of water, hydrogen peroxide and ozone, but is not limited thereto.

[0078] In one embodiment, the second precursor includes any one of copper acetylacetonate, copper bis(2,2,6,6-tetramethyl-3,5-heptanedione), and Cu(acac)2, but is not limited thereto.

[0079] In one embodiment, the reducing agent includes any one of the first precursor monomer and hydrogen, but is not limited thereto. For example, if diethyl zinc is used as the reducing agent, during the reduction reaction, diethyl zinc will undergo ligand exchange with Cu(hfac)2 to generate Cu element and Zn(hfac)2, and Zn(hfac)2 can be purged and removed.

[0080] In one embodiment, in step S12, the first precursor monomer is fully adsorbed on the surface of the polymer substrate at a temperature of 100-180° C. (preferably 100-150° C., more preferably 100-120° C.).

[0081] In one embodiment, the reaction temperature used in step S13, step S21 and step S24 is 100-180°C, preferably 100-150°C, and more preferably 100-120°C.

[0082] In one embodiment, the pulse time of introducing the second precursor monomer into the reaction chamber in step S21 is 0.5 to 2 s, and the pulse time of introducing the reducing agent into the reaction chamber in step S24 is 0.02 to 0.05 s.

[0083] In the present application, a carrier gas may be used to carry the first precursor monomer, the oxygen-containing substance, the second precursor monomer, the reducing agent, etc. into the reaction chamber. In one embodiment, the carrier gas used in step S1 and step S2 includes nitrogen gas, and the flow rate of the carrier gas is 7 sccm to 15 sccm and the pressure is 0.1 to 0.2 torr.

[0084] In one embodiment, the amount of reactants used in step S2 is controlled by pulse time. Exemplarily, if the second precursor monomer used in step S2 is a Cu precursor monomer, the reducing agent is diethyl zinc, and the carrier gas is nitrogen, the pulse time of the Cu precursor monomer is 0.5 to 2 s, the pulse time of diethyl zinc is 0.02-0.05 s, the carrier gas flow rate is 7 sccm-15 sccm, the gas pressure in the reaction chamber is 0.1 to 0.2 torr, the temperature of each reaction is 100-150°C, and the reaction time is usually defined by the number of reaction cycles. Preferably, the number of reaction cycles of the Cu film layer as the conductive metal layer is 300 to 1000.

[0085] Some embodiments of the present application provide a flexible circuit board including the polymer substrate / metal layer composite structure.

[0086] In one embodiment, the flexible circuit board further includes a thickened metal layer, and the thickened metal layer is formed on a surface of the conductive metal layer.

[0087] Some embodiments of the present application provide a method for preparing a flexible circuit board, including:

[0088] The polymer substrate / metal layer composite structure is prepared by any of the aforementioned methods;

[0089] At least one of an electroplating process, a physical vapor deposition process (PVD) and a chemical vapor deposition process is used to form a thickened metal layer on the surface of the conductive metal layer.

[0090] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments.

[0091] Unless otherwise specified, the various processing equipment, testing equipment, raw materials, etc. used in the following examples can be obtained through commercial channels. In addition, in the following examples and comparative examples, the methods for testing multiple properties of each product include:

[0092] Membrane-base bonding test: ASTM D3359;

[0093] 90° pulling method to measure the bonding strength between membrane and substrate, DOI: 10.1021 / acs.1angmuir.9b00354:

[0094] Flexible copper wire bending resistance test: doi.org / 10.1038 / s41528-022-00151-1;

[0095] Copper foil resistivity test: IPC-TM-6502.5.14.

[0096] Example 1 The process principle of the preparation method of a PI substrate / Cu layer composite structure provided in this example can be referred to Figure 1 , which comprises the following steps:

[0097] S1. Prepare a ZnO buffer layer on a PI substrate at low temperature using a thermal ALD method. First, place a surface-cleaned PI substrate into the reaction chamber of an atomic layer deposition system, and evacuate the vacuum in the reaction chamber to less than 0.0056 Torr, then introduce a carrier gas and diethyl zinc (Et2Zn) as a Zn precursor monomer, wherein the amount of Et2Zn introduced is controlled by pulse time, which is set to about 0.025s in this embodiment. Et2Zn will be physically and chemically adsorbed on the surface of the PI substrate, and then purged by an inert gas (high-purity argon) for about 30s to take away pollutants and excess Et2Zn. Thereafter, introduce a carrier gas and pure water vapor, and the amount of pure water vapor introduced is controlled by pulse time, which is set to about 0.015s in this embodiment, so that water reacts with Et2Zn adsorbed on the surface of the PI substrate, and the reaction temperature is about 120°C, and ZnO nanoclusters (also defined as nanoislands) are formed on the surface of the PI substrate. The entire process, including all reactions and purge actions, will be repeated many times until the ZnO buffer layer reaches the desired film thickness. At this point, the ALD-ZnO buffer layer is prepared.

[0098] S2. After completing step S1, introduce carrier gas and copper bis(hexafluoroacetylacetonate) (Cu(hfac)2) as a Cu precursor into the reaction chamber, wherein the amount of Cu(hfac)2) introduced is controlled by pulse time, which is set to about 0.5s in this embodiment, wherein the ligand is thermally excited at a temperature of about 150°C and undergoes hydrogenation reaction with the hydroxyl groups on the surface of ZnO, and then purged with an inert gas for about 2s to remove all pollutants generated by Cu(hfac)2) in the previous process and excess Cu(hfac)2. Repeat the action of introducing Cu(hfac)2) and purging about 3 times to ensure saturated self-limiting chemical adsorption of the Cu precursor on the surface of the PI substrate. Then, carrier gas and Et2Zn as a reducing agent are introduced, wherein the amount of Et2Zn introduced is also controlled by pulse time, which is set to about 0.04s in this embodiment. At this time, Cu(hfac)2) will lose the bound ligand and undergo a reduction reaction at a temperature of about 150°C, which means that Cu atoms are diffused and aggregated into crystalline nanoparticles. The entire process, including all reactions and purge actions, will be repeated many times, that is, a multi-pulse copper source gas supply mode is executed until the ideal Cu layer thickness is reached. The thickness of the ALD-Cu layer will continue to thicken with the increase in the number of reaction cycles, so the thickness of the Cu layer can be precisely controlled. At this point, the composite Cu layer (also known as ALD-ZnO / ALD-Cu composite buffer layer) is prepared, and the composite Cu layer has a PI substrate / ZnO buffer layer / Cu layer sandwich structure (hereinafter abbreviated as PI / ZnO / Cu).

[0099] In the above operations of this embodiment, the carrier gas is high-purity nitrogen with a purity of 5N, the flow rate is about 7 sccm, and the reference gas pressure is about 0.11 torr.

[0100] The ALD growth cycles of the ALD-ZnO buffer layer are controlled to be 10, 20, 50, 100, and 300, respectively, and the ALD growth cycle of the ALD-Cu layer is controlled to be 500, and the Figure 2 The second multi-pulse copper source gas supply mode (i.e., double-pulse mode) was used, and the final products were defined as experimental product 1, experimental product 2, experimental product 3, experimental product 4, and experimental product 5 respectively.

[0101] Comparative Example 1 The present comparative example provides a method for preparing a PI substrate / Cu layer composite structure, comprising: placing the PI substrate into a reaction chamber of an atomic layer deposition system, and then directly depositing an ALD-Cu layer on the PI substrate using the same process conditions as step S2 of Example 1. The final product obtained in this comparative example is defined as comparative product 1.

[0102] See also Figure 3 to Figure 11It can be found that the surface of the original PI substrate presents a loose nanostructure, which is not conducive to the growth of the ALD-Cu layer, while the ALD-ZnO buffer layer can fill the gap to a certain extent, and the surface of the polyimide becomes smoother after the deposition of ALD-ZnO (see Figure 3 , Figure 5 ). At the same time, the RMS roughness of the PI substrate surface with ALD-ZnO buffer layer (about 1.18nm) is smaller than that of the untreated PI substrate (about 1.74nm). After ALD-ZnO deposition, the molecular chain gaps in the PI near-surface region may be spontaneously filled by ZnO nucleation clusters (see Figure 4 , Figure 6 ).

[0103] See also Figure 7-Figure 8 , XRD and Auger spectra prove that the deposited film is pure ZnO. The XRD peak at 34.4° is attributed to the (002) preferred orientation of ZnO, indicating that ALD-ZnO has crystalline properties. It should be noted that the PI substrate will cause more interference signals, so Figure 7 The XRD pattern shown is obtained by testing the ALD-ZnO layer grown on a glass substrate under the same conditions.

[0104] See also Figure 9-10 The XPS spectra of O 1s and Zn 2p3 / 2 show that there are a large number of hydroxyl groups on the surface of the ZnO buffer layer, which is conducive to the chemical adsorption of copper precursors. Fig.11 , the XPS spectrum of Zn 2p3 / 2 shows the formation of Zn-O-Cu(hfac) chemical bonding.

[0105] See also Figure 12-13 It shows that on the surface of the PI substrate without an ALD-ZnO buffer layer, the ALD-Cu particles are small and densely distributed. Figure 14 to Figure 17 It is shown that the ALD-Cu grains exhibit more obvious grain boundary edges and larger grain size after applying the ALD-ZnO buffer layer. Fig.13 , Fig.15 , Fig.17 The thickness of ALD-Cu films on PI substrate, ALD-ZnO (50 cycles) / PI and ALD-ZnO (100 cycles) / PI substrates are shown as 39.15nm, 39.73nm and 42.82nm respectively. By optimizing the thickness of the ZnO buffer layer on the PI substrate (≥50 deposition cycles), the resistivity of the ALD-Cu layer can be improved to 2.0-10μQ / cm.

[0106] Figure 18 to Figure 21 The characterization results of the interface of the Cu / ZnO / PI structure in the aforementioned experimental product 4 are shown. Fig.18The EDX signals of Cu, Zn and C show that there is no clear interface boundary between the PI / ZnO / Cu interface, and it behaves as a composite interface overall. Fig. 20 The average intensity distribution spectrum of the EDX signal shows that the EDX signals of Cu and Zn appear in the near-surface area of ​​PI and decrease with the enhancement of the C signal, as shown in the enlarged EDX spectrum of the area framed by the dashed line ( Fig.21 ). A composite interface may be formed on the PI substrate due to the potential penetration of Cu(hfac)2 and Et2Zn and the layer-by-layer growth mode. Fig. 20 Bright spots corresponding to the (111), (200), and (220) crystal planes of Cu were observed in the FFT image (region 1) obtained from the copper film. In the composite interlayer (region 2), only the obvious diffraction spots associated with the (111) crystal plane of Cu appeared in the corresponding FFT pattern. Due to the nanocluster characteristics of ALD-ZnO, no obvious ZnO electron diffraction spots were observed. Therefore, based on the element distribution and the nanostructure of the PI / ALD-ZnO / ALD-Cu interface, it is shown that the ALD-ZnO buffer layer is composited with the copper film and the PI substrate in the form of isolated nanoclusters.

[0107] Comparative Example 2 The preparation method of a PI substrate / Cu layer composite structure provided in this comparative example includes:

[0108] S1. Same as step S1 in Example 1.

[0109] S2. A Cu film is deposited on the PI substrate with an ALD-ZnO buffer layer formed on the surface by magnetron sputtering until the thickness of the Cu film is the same as the thickness of the ALD-Cu layer in Example 1. The process conditions used in the magnetron sputtering are: sputtering power 100 W, gas is an argon / oxygen mixed gas with a volume ratio of 4:1, gas flow rate is about 50 sccm, and working pressure is 5 mtorr.

[0110] The final product obtained in this comparative example is defined as comparative product 2, and the resistivity of comparative product 2 is similar to that of comparative product 1.

[0111] In addition, it can be found through observation by electron microscope or other methods that if the surface of the PI substrate is distributed with narrow channels with a high aspect ratio (above 10:1) or blind holes with a high aspect ratio (above 10:1), in the product prepared by the scheme of comparative example 2, the Cu film cannot be uniformly deposited in the aforementioned channels and blind holes, and the conductive circuit is prone to problems such as circuit breakage. For example, please refer to Fig. 22 The Cu layer deposited in the trench with high aspect ratio (about 20:1) by using the scheme of this comparative example is shown. In the product made by using the scheme of Example 1, the Cu film is also uniformly deposited in the aforementioned trench and blind hole, ensuring the continuity of the conductive line.

[0112] Comparative Example 3 The preparation method of a PI substrate / Cu layer composite structure provided in this comparative example includes:

[0113] S1. According to the method reported in the literature, a ZnO buffer layer is deposited on a clean PI substrate by magnetron sputtering until the thickness of the ZnO buffer layer is substantially the same as that of experimental product 4.

[0114] S2. The same as step S2 of embodiment 1.

[0115] The final product obtained in this comparative example is defined as comparative product 4. The resistivity of comparative product 3 is slightly inferior to that of comparative product 1. The reason may be that the ZnO buffer layer in comparative product 3 is a continuous film, which has a flat surface and a relatively small specific surface area compared to the ALD-ZnO buffer layer in experimental product 4, so the adsorption area is reduced, which is not conducive to the growth of ALD-Cu.

[0116] Similarly, through observations using an electron microscope or other methods, it can be found that if the surface of the PI substrate is distributed with narrow channels with a high aspect ratio or blind holes with a high length-to-diameter ratio, in the product prepared using the solution of Comparative Example 4, the ZnO buffer layer cannot be uniformly deposited in the aforementioned channels and blind holes, which in turn causes the Cu layer to fail to be uniformly deposited, and the conductive circuit is prone to problems such as circuit breakage.

[0117] Comparative Example 4 The preparation method of a PI substrate / Cu layer composite structure provided in this comparative example includes:

[0118] S1. Same as step S1 in Example 1.

[0119] S2. After completing step S1, Cu(hfac)2 is introduced into the reaction chamber until Cu(hfac)2 is saturatedly adsorbed on the surface of the PI substrate. Argon is then used to purge to remove all pollutants generated by Cu(hfac)2 and excess Cu(hfac)2. Et2Zn is then introduced for about 0.04s to react. The entire process, including all reactions and purging actions, will be repeated many times, wherein the total pulse time of Cu(hfac)2 and Et2Zn input into the reaction chamber is the same as the total pulse time of Cu(hfac)2 and Et2Zn required for preparing experimental product 4 in Example 1.

[0120] The final product obtained in this comparative example is defined as comparative product 4. The film uniformity of comparative product 4 is poor, the resistivity is more than 500% higher than that of experimental product 4, and the thickness is increased by more than 200%, which may be because Cu(hfac)2 in comparative example 5 does not use multi-segment pulse atomic layer deposition into the source, resulting in more parasitic CVD during the reaction process.

[0121] Example 2

[0122] The present embodiment provides a method for preparing a PI substrate / Cu layer composite structure, comprising:

[0123] S1. Place the PI substrate in the reaction chamber of the atomic layer deposition system, and draw the vacuum degree in the reaction chamber to less than 0.0056Torr, then introduce carrier gas and SiCl4, wherein the amount of SiCl4 introduced is controlled by pulse time, which is set to about 0.5s in this embodiment, and then purged by inert gas for about 30s to remove pollutants and excess SiCl4. Thereafter, introduce carrier gas and ozone, and the amount of ozone introduced is also controlled by pulse time, which is set to about 0.02s in this embodiment, so that ozone reacts with SiCl4 adsorbed on the surface of the PI substrate, and the reaction temperature is about 180°C, thereby forming SiO2 nanoclusters on the surface of the PI substrate. The entire process, including all reactions and purging actions, will be repeated many times until an ALD-SiO2 oxide layer with a thickness of less than 10nm is obtained.

[0124] S2 is basically the same as step S2 of Example 1, except that hydrogen is used instead of Et2Zn, and the ALD deposition process of the ALD-Cu layer adopts Figure 2 The first multi-pulse copper source gas supply mode (i.e. single pulse mode) is described.

[0125] In the above operations of this embodiment, the carrier gas is high-purity nitrogen with a purity of 5N, the flow rate is about 7 sccm, and the reference gas pressure is about 0.1 torr.

[0126] The final product obtained in this embodiment is defined as Experimental Product 6, the resistivity of which is increased to a certain extent compared with Experimental Products 1 to 5, and the other properties are similar to Experimental Product 4. This may be due to the increase in parasitic CVD caused by the single pulse copper source gas supply mode adopted in this embodiment.

[0127] Example 3

[0128] The present embodiment provides a method for preparing a PI substrate / Cu layer composite structure, comprising:

[0129] S1. Place the PI substrate into a reaction chamber of an atomic layer deposition system, and reduce the vacuum degree in the reaction chamber to less than 0.0056 Torr.

[0130] S2, then the carrier gas and Et2Zn are introduced into the reaction chamber, wherein the amount of Et2Zn introduced is controlled by the pulse time, which is set to about 0.02s in this embodiment, and then the pollutants and excess Et2Zn are removed by purging with an inert gas for about 30s. Thereafter, the carrier gas and hydrogen peroxide are introduced, and the amount of hydrogen peroxide introduced is also controlled by the pulse time, which is set to about 0.015s in this embodiment, so that the hydrogen peroxide reacts with the Et2Zn adsorbed on the surface of the PI substrate, and the reaction temperature is about 120°C.

[0131] Thereafter, carrier gas and trimethylaluminum are introduced into the reaction chamber, wherein the amount of trimethylaluminum introduced is controlled by pulse time, which is set to about 0.03s in this embodiment, and then inert gas is purged for about 10s to remove pollutants and excess trimethylaluminum. Thereafter, carrier gas and hydrogen peroxide are introduced, wherein the amount of hydrogen peroxide introduced is also controlled by pulse time, which is set to about 0.02s in this embodiment, so that hydrogen peroxide reacts with trimethylaluminum adsorbed on the surface of the PI substrate, and the reaction temperature is about 120°C.

[0132] The entire process, including all reactions and purge actions, will be repeated many times, with the ratio of ZnO cycle to Al2O3 growth cycle being about 20:3, until an ALD-AZO buffer layer with a thickness of less than 10nm is obtained.

[0133] S3 is basically the same as step S2 of Example 1, except that: the ALD deposition process of the ALD-Cu layer adopts Figure 2 The third multi-pulse copper source gas supply mode (i.e., three-pulse mode) is used.

[0134] In the above operations of this embodiment, the carrier gas is high-purity nitrogen with a purity of 5N, the flow rate is about 7 sccm, and the reference gas pressure is about 0.1 torr.

[0135] The final product obtained in this embodiment is defined as experimental product 7, and the surface resistivity of experimental product 7 is further reduced compared with experimental product 4. However, for channels with high aspect ratios and blind holes with high aspect ratios, the thickness of the Cu layer deposited at the bottom increases and the conformality decreases, which may be caused by the fact that the three-pulse copper source gas supply mode used in this embodiment is a supersaturated pulse mode.

[0136] Example 4

[0137] The preparation method of the PET substrate / Cu layer composite structure provided in this embodiment comprises the following steps:

[0138] S1. Place the PET substrate in the reaction chamber of the atomic layer deposition system, and draw the vacuum degree in the reaction chamber to less than 0.0056 Torr, then introduce carrier gas and Et2Zn, wherein the amount of Et2Zn introduced is controlled by pulse time, which is set to about 0.02s in this embodiment, and then purged by inert gas for about 5s to remove pollutants and excess Et2Zn. Thereafter, introduce carrier gas and pure water vapor, and the amount of pure water introduced is also controlled by pulse time, which is set to about 0.015s in this embodiment, so that water reacts with Et2Zn adsorbed on the surface of the PET substrate, and the reaction temperature is about 100°C, thereby forming ZnO nanoclusters on the surface of the PET substrate. The entire process, including all reactions and purging actions, will be repeated many times until an ALD-ZnO buffer layer with a thickness of about 1nm is obtained.

[0139] S2. After completing step S1, a carrier gas and Cu(hfac)2 are introduced into the reaction chamber, wherein the amount of Cu(hfac)2 introduced is controlled by a pulse time, which is set to about 0.5s in this embodiment. The ligands in Cu(hfac)2 are thermally excited at about 100°C and undergo a hydrogenation reaction with the hydroxyl groups on the surface of ZnO, and then an inert gas is purged for about 0.5s to remove all pollutants generated by Cu(hfac)2 in the previous process and excess Cu(hfac)2. Repeat the action of introducing Cu(hfac)2 and the action of purging more than 3 times. Then, a carrier gas and Et2Zn are introduced, wherein the amount of Et2Zn introduced is also controlled by a pulse time, which is set to about 0.02s in this embodiment, so that Cu(hfac)2 and Et2Zn undergo a reduction reaction at a temperature of about 100°C. The entire process, including all reactions and purging actions, will be repeated many times, i.e., a multi-pulse copper source gas supply mode ( Figure 2 The double pulse mode in the reactor was continued until the Cu layer thickness reached about 20 nm.

[0140] In the above operations of this embodiment, the carrier gas is high-purity nitrogen with a purity of 5N, the flow rate is about 7 sccm, and the reference gas pressure is about 0.1 torr.

[0141] The final product obtained in this embodiment is defined as Experimental Product 8, and the resistivity of Experimental Product 8 is greatly increased compared with Experimental Product 4. This may be caused by the diffusion of Et2Zn near the surface of the PET substrate during the atomic layer deposition of a 1 nm thick ZnO buffer layer.

[0142] Embodiment 5 The preparation method of the PET substrate / Cu layer composite structure provided in this embodiment comprises the following steps:

[0143] S1. Place the PET substrate in the reaction chamber of the atomic layer deposition system, and draw the vacuum degree in the reaction chamber to less than 0.0056 Torr, then introduce carrier gas and Et2Zn, wherein the amount of Et2Zn introduced is controlled by pulse time, which is set to about 0.05s in this embodiment, and then evacuate for about 40s by inert gas to take away pollutants and excess Et2Zn. Thereafter, introduce carrier gas and pure water vapor, and the amount of pure water introduced is also controlled by pulse time, which is set to about 0.05s in this embodiment, so that water reacts with Et2Zn adsorbed on the surface of the PET substrate, and the reaction temperature is about 180°C, thereby forming ZnO nanoclusters on the surface of the PET substrate. The entire process, including all reactions and purging actions, will be repeated many times until an ALD-ZnO buffer layer with a thickness of about 10nm is obtained.

[0144] S2. After completing step S1, a carrier gas and Cu(hfac)2 are introduced into the reaction chamber, wherein the amount of Cu(hfac)2 introduced is controlled by a pulse time, which is set to about 2s in this embodiment. The ligands in Cu(hfac)2 are thermally excited at about 180°C and undergo a hydrogenation reaction with the hydroxyl groups on the surface of ZnO, and then an inert gas is purged for about 0.5s to remove all pollutants generated by Cu(hfac)2 in the previous process and excess Cu(hfac)2. Repeat the action of introducing Cu(hfac)2 and the action of purging more than 3 times. Then, a carrier gas and Et2Zn are introduced, wherein the amount of Et2Zn introduced is also controlled by a pulse time, which is set to about 0.05s in this embodiment, so that Cu(hfac)2 and Et2Zn undergo a reduction reaction at a temperature of about 180°C. The entire process, including all reactions and purging actions, will be repeated many times, i.e., a multi-pulse copper source gas supply mode ( Figure 2 The double pulse mode in the reactor was continued until the Cu layer thickness reached about 50 nm.

[0145] In the above operations of this embodiment, the carrier gas is high-purity nitrogen with a purity of 5N, the flow rate is about 15 sccm, and the reference gas pressure is about 0.2 torr.

[0146] The final product obtained in this embodiment is defined as Experimental Product 9. The resistivity of Experimental Product 9 is significantly increased compared with Experimental Product 4, which may be due to the excessively high reaction temperature used in step S2.

[0147] Based on the products obtained in Examples 1 to 5 and Comparative Examples 1 to 4, a series of flexible circuit boards can be prepared by depositing a thickened copper film of the same thickness on the Cu layer of each PET substrate / Cu layer composite structure through an electrolytic copper plating process or a PVD process, etc. The flexible circuit board made by using the experimental product 4 can be defined as flexible circuit board 1, the flexible circuit boards made by using comparative products 1 to 4 are flexible circuit boards 2 to 5, and the flexible circuit boards made by using experimental products 6 to 9 are flexible circuit boards 6 to 9.

[0148] The aforementioned method was then used to test the film-base bonding strength and the bending resistance of the flexible copper wires of the flexible circuit boards 1 to 9. If the test result of the film-base bonding strength of the flexible circuit board 1 is used as a comparison benchmark, the film-base bonding strength (bonding strength between the Cu layer and the thickened copper film and the PI substrate) of the flexible circuit boards 2 to 5 is significantly lower than that of the flexible circuit board 1, and in particular, the film-base bonding strength of the flexible circuit board 4 is lower than that of the flexible circuit board 3. The film-base bonding strength of the flexible circuit boards 6 to 9 is close to that of the flexible circuit board 1.

[0149] If the bending resistance test result of flexible circuit board 1 is used as a comparison benchmark, the bending resistance of flexible circuit boards 6-7 is close to that of flexible circuit board 1, and the bending resistance of flexible circuit boards 8-9 is slightly inferior to that of flexible circuit board 1, which may be partly attributed to the fact that the bending resistance of PET substrate is worse than that of PI substrate. The bending resistance of flexible circuit boards 2-5 is worse than that of flexible circuit boards 8-9.

[0150] It should be understood that the technical solution of the present application is not limited to the above-mentioned specific implementation cases. Any technical deformation made according to the technical solution of the present application without departing from the purpose of the present application and the scope of protection of the claims shall fall within the scope of protection of the present application.

Claims

1. A polymer substrate / metal layer composite structure, characterized in that: It includes an oxide buffer layer and a conductive metal layer formed in situ on the surface of a polymer substrate; the oxide buffer layer contains a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are respectively distributed between metal grains in the conductive metal layer and in the molecular chain gaps on the surface of the polymer substrate.

2. The polymer substrate / metal layer composite structure according to claim 1, characterized in that: The composite structure has at least one of the following features a to h: a. The size of the oxide nanoclusters is below 0.5 nm; b. The particle size of the metal grains is 20 to 50 nm; c. The thickness of the oxide buffer layer is 1 to 10 nm; d. The thickness of the conductive metal layer is 20 to 50 nm; e. The sheet resistance of the conductive metal layer is below 5Ω / sq, preferably below 3Ω / sq, more preferably below 2Ω / sq, and the resistivity is below 20μΩ·cm, preferably below 8μΩ·cm, more preferably below 5μΩ·cm; f. The material of the oxide buffer layer includes any one or more combinations of zinc oxide, aluminum-doped zinc oxide, and silicon dioxide, preferably zinc oxide; g. The material of the conductive metal layer includes any one of Cu, Ag, and Pt; h. The material of the polymer substrate includes any one of polyimide, polyester, epoxy resin, and ABS resin.

3. A method for preparing a polymer substrate / metal layer composite structure, characterized in that: include: S1. Using a first precursor monomer and an oxygen-containing substance, an oxide buffer layer is formed in situ on the surface of a polymer substrate by a thermal atomic layer deposition method, wherein the oxide buffer layer comprises a plurality of isolated oxide nanoclusters, and the plurality of oxide nanoclusters are filled in the molecular chain gaps of the surface layer of the polymer substrate; S2. Using a reducing agent and a second precursor monomer, an in-situ conductive metal layer is formed on the oxide buffer layer by an atomic layer deposition method, and a plurality of the oxide nanoclusters are distributed between metal grains in the conductive metal layer.

4. The preparation method according to claim 3, characterized in that: Step S1 specifically includes: S11, placing the polymer substrate into a reaction chamber of an atomic layer deposition device; S12, adjusting the vacuum degree in the reaction chamber to within 0.0056 Torr, then introducing the first precursor monomer into the reaction chamber to allow the first precursor monomer to be fully adsorbed on the surface of the polymer substrate, and then fully purging the reaction chamber with an inert gas to remove pollutants and excess first precursor monomer in the reaction chamber; S13, introducing an oxygen-containing substance into the reaction chamber, and allowing the oxygen-containing substance to react with the first precursor monomer adsorbed on the surface of the polymer substrate to form a plurality of oxide nanoclusters, thereby forming the oxide buffer layer; And / or, step S2 specifically includes: S21, introducing the second precursor monomer into the reaction chamber, and allowing the second precursor monomer to chemically adsorb on the surface of the polymer substrate by at least reacting with the surface active groups of the oxide nanoclusters; S22, fully purging the reaction chamber with an inert gas to remove pollutants and excess second precursor monomer in the reaction chamber; S23, repeating step S21 to step S22 until the second precursor monomer is saturated with self-limiting chemical adsorption on the surface of the polymer substrate; S24, introducing the reducing agent into the reaction chamber to reduce the second precursor monomer chemically adsorbed on the surface of the polymer substrate to a metal element and aggregate into metal grains, thereby forming the conductive metal layer.

5. The preparation method according to claim 4, characterized in that: In step S12, the first precursor monomer is fully adsorbed on the surface of the polymer substrate at a temperature of 100 to 180° C.; and / or, the reaction temperature used in step S13, step S21 and step S24 is 100-180° C.; and / or, the pulse time of introducing the second precursor monomer into the reaction chamber in step S21 is 0.5 to 2 s, the pulse time of introducing the reducing agent into the reaction chamber in step S24 is 0.02 to 0.05 s, And / or, the carrier gas used in step S1 and step S2 includes nitrogen, and the flow rate of the carrier gas is 7 sccm-15 sccm and the pressure is 0.1-0.2 torr.

6. The preparation method according to claim 4, characterized in that: Step S1 specifically includes: repeatedly performing step S12 and step S13 for more than one time until the oxide buffer layer with a set thickness is obtained; And / or, step S2 specifically includes: repeating steps S21 to S24 more than once until the conductive metal layer with a set thickness is obtained; preferably, step S2 specifically includes: repeating steps S21 to S24 300 to 1000 times in total.

7. The preparation method according to any one of claims 4 to 6, characterized in that: The material of the polymer substrate includes any one of polyimide, polyester, epoxy resin, and ABS resin; and / or, the first precursor comprises any one of diethylzinc, Zn(CH3COO)2, and Zn(CH3)2; and / or, the oxygen-containing substance comprises any one of water, hydrogen peroxide and ozone; And / or, the second precursor includes any one of copper acetylacetonate, copper bis(2,2,6,6-tetramethyl-3,5-heptanedione), and Cu(acac)2; And / or, the reducing agent includes any one of the first precursor monomer and hydrogen.

8. A flexible circuit board, characterized in that: The present invention comprises a polymer substrate / metal layer composite structure as described in any one of claims 1 to 2.

9. The flexible circuit board according to claim 8, characterized in that: It also includes a thickened metal layer, which is formed on the surface of the conductive metal layer.

10. A method for preparing a flexible circuit board, characterized in that: include: A polymer substrate / metal layer composite structure is prepared by the method according to any one of claims 3 to 7; At least one of an electroplating process, a physical vapor deposition process, and a chemical vapor deposition process is used to form a thickened metal layer on the surface of the conductive metal layer.