Self-rectification memristor based on isovalent niobium oxide and preparation method thereof
By using a multi-layer structural insulation layer of niobium oxide in the memristor, the crosstalk problem of traditional memristors when reading multiple devices is solved, the rectification performance and nonlinearity are improved, and more efficient storage and reading capabilities are achieved.
Patent Information
- Application Number
- CN202411930052.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-03-28
AI Technical Summary
Existing memristors are prone to crosstalk when reading multiple devices simultaneously, resulting in a reduced read margin, and traditional solutions such as 1T1R and 1S1R increase process cost and complexity.
Using a self-rectification memristor based on heterovalent niobium oxide, a niobium oxide film prepared in a low oxygen environment is inserted into a niobium oxide film prepared in a high oxygen environment to form a multi-layer structural insulating layer to improve the rectification performance and nonlinearity.
Improves the rectification performance of the device at low voltage and the size of the array, enhances the rectification, switching ratio and nonlinearity, is suitable for self-rectification memristors with relatively low switching, and improves the maximum achievable size of the memory array.
Smart Images
Figure CN119730715A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of microelectronics manufacturing, and in particular to a self-rectifying memristor based on aisovalent niobium oxide and a preparation method thereof. Background Art
[0002] In the era of artificial intelligence, in-memory computing is an important part of technological change. In order to cope with the performance bottleneck of traditional computing systems, innovation at the device and architecture levels is imperative. A large amount of research work focuses on the integrated computing paradigm similar to the human brain. Memristors, as new storage devices, play a core role in this process.
[0003] Large-scale memristor arrays may cause crosstalk when reading multiple devices at the same time, and the parasitic current generated will significantly reduce the read margin. To solve this problem, transistors (1T1R) and bipolar selectors (1S1R) are usually cascaded on the memristor. Although both methods can effectively solve the potential path problem, they also seriously increase the process cost and complexity. In order to meet the needs of solving crosstalk and compatible process considerations at the same time, self-rectifying memristor arrays with nonlinear characteristics stand out.
[0004] Recently, oxide-based self-rectifying memristor arrays have received extensive attention and research. For example, Williams et al. proposed a NbO memristor suitable for low-power memristor applications. x / TiO y / NbO x Stacked structure, its rectification ratio is up to 10 5 , the set and reset switching currents are as low as 10 nA and 1 pA, respectively (Nano Letters, 2016, 16(11): 6724-6732). Kim et al. reported a Ta2O5 / Nb2O with continuous analog switching behavior. 5-x / Al2O 3-y Memristor cross array, the device has high stability, and the electronic energy spectrum and conduction mechanism are used to make a reasonable explanation. The above two memristors have a high rectification ratio, but there is a low switching ratio. When a large amount of storage and reading is performed, the stability will gradually decrease, resulting in the change of resistance value is not obvious, which increases the difficulty and error of data processing. Summary of the invention
[0005] In order to solve the above technical problems, the present invention provides a self-rectifying memristor based on heterovalent niobium oxide with simple structure and reliable operation, and provides a preparation method thereof.
[0006] The technical solution of the present invention to solve the above technical problems is: a self-rectifying memristor based on aisovalent niobium oxide, comprising a laterally arranged upper electrode, an insulating layer and a longitudinally arranged lower electrode, wherein the insulating layer is stacked from top to bottom in sequence by a first niobium oxide film prepared in a high oxygen environment, a second niobium oxide film prepared in a low oxygen environment, and a third niobium oxide film prepared in a high oxygen environment, the upper electrode, the first niobium oxide film, the second niobium oxide film, the third niobium oxide film, and the lower electrode are vertically stacked and integrated on a silicon wafer substrate.
[0007] In the self-rectifying memristor based on heterovalent niobium oxide, the electrical properties of the first niobium oxide film and the third niobium oxide film prepared in a high oxygen environment show resistance memory switching properties, and the electrical properties of the second niobium oxide film prepared in a low oxygen environment show threshold switching properties.
[0008] In the self-rectifying memristor based on aisovalent niobium oxide, the upper electrode is a strip-shaped Ti electrode, and the lower electrode is a strip-shaped Pt electrode.
[0009] In the self-rectifying memristor based on heterovalent niobium oxide, the thickness of the Pt electrode is 40-60 nm.
[0010] In the self-rectifying memristor based on heterovalent niobium oxide, the thickness of the Ti electrode is 30-40 nm.
[0011] In the self-rectifying memristor based on aisovalent niobium oxide, the thickness of the first niobium oxide film and the third niobium oxide film is 30-40 nm.
[0012] In the self-rectifying memristor based on aisovalent niobium oxide, the thickness of the second niobium oxide film is 100-110 nm.
[0013] In the self-rectifying memristor based on heterovalent niobium oxide, the difference in work function between the Pt electrode and the Ti electrode is greater than 1 eV, and there is a potential barrier with the insulating layer.
[0014] A method for preparing a self-rectifying memristor based on heterovalent niobium oxide comprises the following steps: Step 1: Spin-coat a double-layer photoresist on the substrate and heat and dry it, use a mask to photolithograph the lower electrode pattern, and then use electron beam evaporation to deposit the lower electrode, i.e., the Pt electrode; Step 2: Prepare a third niobium oxide film on a substrate with a Pt electrode, photolithograph the third niobium oxide film pattern using a matching insulating layer mask, and then use a magnetron sputtering device to deposit the film on a 5×10 -4 The third niobium oxide film is deposited in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 3: Photolithography of the second niobium oxide film pattern on the substrate with the third niobium oxide film grown on 5×10 -4Depositing a second niobium oxide film in an environment with a vacuum degree of 0.04 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:0.2 sccm; Step 4: Photolithography of the first niobium oxide film pattern on the substrate with the second niobium oxide film grown on 5×10 -4 Depositing a first niobium oxide film in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 5: Photolithography a top electrode pattern on the substrate on which the first niobium oxide film is grown, and then electron beam evaporation is used to deposit the top electrode, ie, the Ti electrode.
[0015] The beneficial effects of the present invention are: 1. The present invention can improve the rectification performance of the device at low voltage and the size of the array by inserting a layer of niobium oxide film prepared in a low oxygen environment into the niobium oxide film prepared in a high oxygen environment.
[0016] 2. The present invention inserts an insulating layer with threshold characteristics to improve the performance of the device in terms of rectification, switching ratio and nonlinearity. It is not only suitable for self-rectifying memristors with low switching ratios, but can also be used to enhance the nonlinearity of the device, thereby increasing the maximum achievable size of the storage array.
[0017] 3. The present invention forms a higher potential barrier between the Pt electrode with a high work function and the high-k insulating layer, thereby realizing the reverse rectification function. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The self-rectifying memristor Pt / NbO in the first embodiment of the present invention x / Ti current-voltage curve.
[0019] Figure 2 The self-rectifying memristor Pt / NbO in the first embodiment of the present invention x The switching ratio and nonlinearity of / Ti vary with voltage.
[0020] Figure 3 The self-rectifying memristor Pt / NbO in the second embodiment of the present invention y / Ti current-voltage curve.
[0021] Figure 4 Schematic diagram of the structure of a self-rectifying memristor based on heterovalent niobium oxide in Embodiment 3 of the present invention.
[0022] Figure 5 This is a microscope image of a 32×32 planar array of self-rectifying memristors based on aisovalent niobium oxide in Example 3 of the present invention.
[0023] Figure 6The present invention is a flowchart of the preparation method in Example 3.
[0024] Figure 7 The self-rectifying memristor Pt / NbO in the third embodiment of the present invention x / NbO y / NbO x / Ti current-voltage curve.
[0025] Figure 8 The self-rectifying memristor Pt / NbO in the third embodiment of the present invention x / NbO y / NbO x / Ti data storage capacity.
[0026] Fig. 9 The self-rectifying memristor Pt / NbO in the third embodiment of the present invention x / NbO y / NbO x The switching ratio and nonlinearity of / Ti vary with voltage.
[0027] Fig.10 The present invention compares the array size scales of the first embodiment and the third embodiment under ideal conditions. DETAILED DESCRIPTION
[0028] The present invention will be further described below in conjunction with the accompanying drawings and embodiments. Embodiment 1
[0029] This embodiment proposes a single-layer niobium oxide self-rectifying memristor prepared in a high-oxygen environment. From top to bottom, it is a metal Ti electrode, a high-oxygen niobium oxide insulating layer, and a metal Pt electrode. Figure 1 As shown, the device has 10 5 The above ultra-high rectification ratio can suppress the crosstalk current in the cross array. Figure 2 As shown, the disadvantage is that the switch is relatively small, and the stability will be reduced during a large amount of storage and reading, resulting in insufficient change in resistance state. The device is prepared by PVD method, and the specific process is as follows: Step 1: Cut the silicon wafer into 1 cm squares, clean them in an ultrasonic instrument using acetone, alcohol, and deionized water in turn, and place them in a drying oven for ten minutes to remove any liquid residue on the substrate surface.
[0030] Step 2: Use electron beam to bombard platinum particles with a purity of 99.99% to evaporate a 50 nm Pt electrode.
[0031] Step 3: NbO was deposited by RF magnetron sputtering at a power of 60 W under the conditions of working gas pressure of 1 Pa and Ar / O2 flow rate of 50 / 20 sccm.2+x The target material was deposited for 15 min.
[0032] Step 4: Bombard Ti particles with electron beam and evaporate 30 nm Ti electrode. Embodiment 2
[0033] This embodiment proposes a single-layer niobium oxide self-rectifying memristor prepared in a low-oxygen environment. From top to bottom, it is a metal Ti electrode, a low-oxygen niobium oxide insulating layer, and a metal Pt electrode. Figure 3 As shown in Figure 2, the device follows typical threshold behavior during scanning, with excellent uniformity and stability. When the applied voltage is scanned from 0 V to 2 V, the current is constant when the voltage reaches 1.7 V (V th ) is due to the structural characteristics of the NbO2 phase in the film changing from an insulating monoclinic phase to a metallic rutile phase. The device is prepared by PVD method, and the specific process is as follows: Step 1: Cut the silicon wafer into 1 cm squares, clean them in an ultrasonic instrument using acetone, alcohol, and deionized water in turn, and place them in a drying oven for ten minutes to remove any liquid residue on the substrate surface.
[0034] Step 2: Use electron beam to bombard platinum particles with a purity of 99.99% to evaporate a 50 nm Pt electrode.
[0035] Step 3: In a vacuum of 5×10 -4 Under the conditions of 1 Pa, 1 Pa working pressure, and 50 / 0.2 sccm Ar / O2 flow rate, NbO was sputtered by RF magnetron sputtering with a power of 60 W. 2+x The target material was deposited for 30 min.
[0036] Step 4: Bombard Ti particles with electron beam and evaporate 30 nm Ti electrode. Embodiment 3
[0037] This embodiment proposes a self-rectifying memristor array based on heterovalent niobium oxide, such as Figure 4 As shown, a self-rectifying memristor based on aisovalent niobium oxide comprises a laterally arranged upper electrode 1, an insulating layer and a longitudinally arranged lower electrode 5, wherein the insulating layer is stacked from top to bottom in sequence by a first niobium oxide film 2 prepared in a high oxygen environment, a second niobium oxide film 3 prepared in a low oxygen environment, and a third niobium oxide film 4 prepared in a high oxygen environment, the upper electrode 1, the first niobium oxide film 2, the second niobium oxide film 3, the third niobium oxide film 4, and the lower electrode 5 are vertically stacked and integrated on a silicon wafer substrate.
[0038] The electrical characteristics of the first niobium oxide film 2 and the third niobium oxide film 4 prepared in a high oxygen environment show resistance memory switching characteristics, and the electrical characteristics of the second niobium oxide film 3 prepared in a low oxygen environment show threshold switching characteristics.
[0039] The upper electrode 1 is a strip-shaped Ti electrode, and the lower electrode 5 is a strip-shaped Pt electrode. The thickness of the Pt electrode is 40-60 nm, the thickness of the Ti electrode is 30-40 nm, the thickness of the first niobium oxide film 2 and the third niobium oxide film 4 is 30-40 nm, and the thickness of the second niobium oxide film 3 is 100-110 nm. The difference in work function between the Pt electrode and the Ti electrode is greater than 1 eV, and there is a potential barrier with the insulating layer.
[0040] like Figure 6 As shown, a method for preparing a self-rectifying memristor based on heterovalent niobium oxide comprises the following steps: Step 1: Spin-coat a double-layer photoresist on the substrate and heat and dry it, use a mask to photolithograph the lower electrode pattern, and then use electron beam evaporation to deposit the lower electrode, i.e., the Pt electrode; Step 2: Prepare a third niobium oxide film on a substrate with a Pt electrode, photolithograph the third niobium oxide film pattern using a matching insulating layer mask, and then use a magnetron sputtering device to deposit the film on a 5×10 -4 The third niobium oxide film is deposited in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 3: Photolithography of the second niobium oxide film pattern on the substrate with the third niobium oxide film grown on 5×10 -4 Depositing a second niobium oxide film in an environment with a vacuum degree of 0.04 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:0.2 sccm; Step 4: Photolithography of the first niobium oxide film pattern on the substrate with the second niobium oxide film grown on 5×10 -4 Depositing a first niobium oxide film in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 5: Photolithography a top electrode pattern on the substrate on which the first niobium oxide film is grown, and then electron beam evaporation is used to deposit the top electrode, ie, the Ti electrode.
[0041] like Figure 7 As shown in the figure, compared with the traditional self-rectifying memristor, the proposed self-rectifying memristor based on aisovalent niobium oxide not only exhibits rectification characteristics, but also threshold switching phenomenon. When the reverse voltage is applied, the current remains at the pA level, and although no obvious reset switching is observed, the negative scanning restores the conductive state to the initial state. Figure 5 A microscope image of a 32×32 planar crossbar array of this structure is shown.
[0042] like Figure 8 As shown, at a read voltage of 1.5 V, the proposed self-rectifying memristor based on aisovalent niobium oxide exhibits good retention characteristics in both high-resistance and low-resistance states, and can be effectively used as a memory device.
[0043] In this embodiment, NbO y The threshold characteristics improve the rectification ratio, switching ratio and nonlinearity. x / NbO y / NbO x / Ti self-rectifying memristor mechanism analysis: When a positive bias is applied to the Pt electrode, the drop in the Fermi level allows the captured electrons to be transferred to the Pt electrode. The large amount of electron flow causes the concentration of electrons in the trap tunnel to gradually increase, inducing a phase transition of the surrounding NbO2. After it becomes a metallic phase, the current suddenly changes to form a conductive channel, which leads to an increase in the number of electrons in the trap tunnel. When a negative bias is applied to the Pt electrode, due to the higher work function of the Pt electrode, the injection of electrons is affected by the Pt / NbO x Due to the blocking of the interlayer potential barrier, the number of electrons flowing through the trap energy level is much lower than the electron injection from the opposite interface. Therefore, the TS phenomenon does not occur under negative bias and the current is significantly reduced.
[0044] The threshold rectification performance of this embodiment is as follows Figure 7 As shown, when the reset voltage increases, the threshold voltage tends to decrease. This can be understood that when the reset switching is incomplete, some empty trap sites will be left, which will be further utilized in the subsequent set switching, resulting in an increase in the conductivity of the low-resistance state.
[0045] The above-mentioned embodiments 1 and 2 are devices with a single-layer niobium oxide film as the functional layer. The parameters used are all optimal. The niobium oxide film prepared in a high-oxygen environment exhibits rectification characteristics, and the niobium oxide film prepared in a low-oxygen environment exhibits threshold characteristics. The device structure of embodiment 3 is prepared by combining embodiment 1 and embodiment 2. The device not only retains the excellent rectification ratio, but also improves the switching ratio and nonlinearity on the basis of the previous ones. Fig. 9 and Figure 2 , the performance of all aspects of the three-layer structure device has been significantly improved.
[0046] The complex array structure is equivalent to a two-terminal passive array for convenient calculation, and the one-bit-line-pull-up (OBPU) method is used to represent the N×N (N represents the number of rows or columns of the array) self-rectifying memristor array circuit model. The Kirchhoff equation is used to calculate the read margin (RM). Fig.10The figure shows the read margin calculated based on the above method. The size N of the self-rectifying memristor array based on aisovalent niobium oxide prepared in Example 3 can reach 7757. Compared with the size N of the device prepared in Example 1, it is increased by 4 times.
Claims
1. A self-rectifying memristor based on heterovalent niobium oxide, characterized in that: It includes a laterally arranged upper electrode, an insulating layer and a longitudinally arranged lower electrode, wherein the insulating layer is formed by stacking a first niobium oxide film prepared in a high oxygen environment, a second niobium oxide film prepared in a low oxygen environment, and a third niobium oxide film prepared in a high oxygen environment in sequence from top to bottom; the upper electrode, the first niobium oxide film, the second niobium oxide film, the third niobium oxide film, and the lower electrode are vertically stacked and integrated on a silicon wafer substrate.
2. The self-rectifying memristor based on heterovalent niobium oxide according to claim 1, characterized in that: The electrical properties of the first niobium oxide film and the third niobium oxide film prepared in a high oxygen environment show resistance memory switching characteristics, and the electrical properties of the second niobium oxide film prepared in a low oxygen environment show threshold switching.
3. The self-rectifying memristor based on heterovalent niobium oxide according to claim 2, characterized in that: The upper electrode is a strip-shaped Ti electrode, and the lower electrode is a strip-shaped Pt electrode.
4. The self-rectifying memristor based on heterovalent niobium oxide according to claim 3, characterized in that: The thickness of the Pt electrode is 40-60 nm.
5. The self-rectifying memristor based on heterovalent niobium oxide according to claim 3, characterized in that: The thickness of the Ti electrode is 30-40 nm.
6. The self-rectifying memristor based on aisovalent niobium oxide according to claim 3, characterized in that: The thickness of the first niobium oxide film and the third niobium oxide film is 30-40 nm.
7. The self-rectifying memristor based on aisovalent niobium oxide according to claim 3, characterized in that: The thickness of the second niobium oxide film is 100-110 nm.
8. The self-rectifying memristor based on aisovalent niobium oxide according to claim 3, characterized in that: The difference in work function between the Pt electrode and the Ti electrode is greater than 1 eV, and there is a potential barrier with the insulating layer.
9. A method for preparing a self-rectifying memristor based on heterovalent niobium oxide, applied to the self-rectifying memristor based on heterovalent niobium oxide as claimed in any one of claims 1 to 8, characterized in that: The following steps are involved: Step 1: Spin-coat a double-layer photoresist on the substrate and heat and dry it, use a mask to photolithograph the lower electrode pattern, and then use electron beam evaporation to deposit the lower electrode, i.e., the Pt electrode; Step 2: Prepare a third niobium oxide film on a substrate with a Pt electrode, photolithograph the third niobium oxide film pattern using a matching insulating layer mask, and then use a magnetron sputtering device to deposit the film on a 5×10 -4 The third niobium oxide film is deposited in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 3: Photolithography of the second niobium oxide film pattern on the substrate with the third niobium oxide film grown on 5×10 -4 Depositing a second niobium oxide film in an environment with a vacuum degree of 0.04 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:0.2 sccm; Step 4: Photolithography of the first niobium oxide film pattern on the substrate with the second niobium oxide film grown on 5×10 -4 Depositing a first niobium oxide film in an environment with a vacuum degree of 1 Pa, a working pressure of 1 Pa, and an argon-oxygen ratio of 50:20 sccm; Step 5: Photolithography a top electrode pattern on the substrate on which the first niobium oxide film is grown, and then electron beam evaporation is used to deposit the top electrode, ie, the Ti electrode.