Silicon nitride sintered wafer and method for producing single crystal using same

Abstract

The flat-plate-shaped sintered silicon nitride wafer is characterized in that for at least one surface of the wafer, the average value of the average length RSm of a plurality of roughness curve elements with a plurality of line segments passing through the center of the surface as the reference length is within the range of 100 [mu] m to 350 [mu] m. In addition, the average length RSm of the plurality of roughness curve elements is preferably within the range of 10 [mu] m or more and 800 [mu] m or less. In addition, the average value of the maximum valley depths Rv of a plurality of roughness curves with a plurality of line segments passing through the center of the surface as the reference length is preferably within the range of 0.04 [mu] m to 0.4 [mu] m (inclusive).

Description

Technical Field

[0001] The embodiments described below generally relate to a silicon nitride sintered wafer and a method for producing a single crystal using the same. Background Art

[0002] Silicon nitride substrates have been used for circuit substrates because of their high strength and high thermal conductivity. For example, Japanese Patent Gazette No. 6293772 (Patent Document 1) discloses a silicon nitride substrate having a thermal conductivity of 50 W / m·K or more and a three-point bending strength of 600 MPa or more. The silicon nitride substrate of Patent Document 1 has excellent insulating properties such as dielectric strength. In order to utilize the insulating properties of silicon nitride substrates, research is also underway into applications other than circuit substrates.

[0003] For example, Japanese Patent No. 6992364 (Patent Document 2) and Japanese Unexamined Patent Application Publication No. 2006-282500 (Patent Document 3) use a silicon nitride substrate as a substrate for placing a single crystal. Such a substrate for placing a single crystal is called a wafer.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent No. 6293772

[0007] Patent Document 2: Japanese Patent No. 6992364

[0008] Patent Document 3: Japanese Patent Application Publication No. 2006-282500 Summary of the invention

[0009] Problems to be solved by the invention

[0010] The silicon nitride sintered wafer of Patent Document 2 has improved insulation by controlling the density at the center and the end portions. On the other hand, adhesion with a single crystal is not necessarily satisfactory.

[0011] The silicon nitride sintered wafer according to the embodiment is for solving such a problem, and provides a silicon nitride sintered wafer having good adhesion to a single crystal.

[0012] Means used to solve problems

[0013] The silicon nitride sintered wafer involved in the embodiment is a flat silicon nitride sintered wafer, characterized in that, for at least one side of the silicon nitride sintered wafer, the average value of the average length RSm of multiple roughness curve elements with multiple line segments passing through the center of the surface as the reference length is within the range of greater than 100 μm and less than 350 μm. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a perspective view showing an example of a silicon nitride sintered wafer according to the embodiment.

[0015] Figure 2 FIG. 1 is a plan view showing an example of a silicon nitride sintered wafer according to the embodiment.

[0016] Figure 3 It is a side view showing an example of a method for producing a single crystal (without a thin film) according to an embodiment.

[0017] Figure 4 It is a side view showing an example of a method for producing a single crystal (with a thin film) according to an embodiment. DETAILED DESCRIPTION

[0018] The silicon nitride sintered wafer according to the embodiment is characterized in that it is formed in a flat plate shape, and on at least one side, the average value of the average length RSm of multiple roughness curve elements based on multiple line segments passing through the center of the surface as reference length is within a range of greater than 100 μm and less than 350 μm.

[0019] Figure 1 and Figure 2 An example of a silicon nitride sintered wafer according to the embodiment is shown in FIG. In the figure, symbol 1 is a silicon nitride sintered wafer, symbol 2 is one side of the silicon nitride sintered wafer 1, symbol 3 is the center of the side 2, symbol 4 is a plurality of line segments passing through the center 3 (for example, a "line segment" in the case of a circular plate shape refers to a diameter, and a "line segment" in the case of a polygonal shape refers to a diagonal line), and symbols 41 and 42 are two line segments in the line segment 4.

[0020] The silicon nitride sintered body wafer 1 is formed of a flat plate-shaped silicon nitride sintered body. Figure 1 The wafers of the embodiment are not limited to the disc shape, but can also be applied to various shapes such as quadrilaterals, polygons, ellipses, etc. In addition, the silicon nitride sintered wafer 1 of the embodiment is used to manufacture a single crystal 7 ( Figure 3 and Figure 4 Figure 5) and used to configure single crystal 5 ( Figure 3 and Figure 4 That is, the surface 2 is used as the location for arranging the single crystal 5. Therefore, it is different from that used in the silicon nitride circuit substrate in which a metal plate is bonded to the silicon nitride substrate.

[0021] At least one side of the silicon nitride sintered wafer 1 is characterized in that the average value of the average length RSm of a plurality of roughness curve elements with a plurality of line segments passing through the center of the surface as the reference length is within the range of 100 μm to 350 μm. Hereinafter, the silicon nitride sintered wafer 1 may also be referred to as wafer 1.

[0022] First, the center 3 and the plurality of line segments 4 are described. The center 3 is the centroid of the surface 2. If the surface 2 is circular, the center 3 becomes the center point. Therefore, when the surface 2 is circular, the plurality of line segments 4 are diameters. In addition, when the surface 2 is not circular, the centroid becomes the center 3. The plurality of line segments 4 pass through the center 3 and become straight lines from the end of the surface 2 to the end on the opposite side.

[0023] The silicon nitride sintered wafer 1 according to the embodiment is characterized in that an average value of average lengths RSm of a plurality of roughness curve elements based on a plurality of line segments passing through the center 3 as reference lengths is within a range of 100 μm to 350 μm.

[0024] The so-called average length RSm of the roughness curve element is the average value of the length Xs of the profile curve element in the reference length. It is a parameter for evaluating the concave-convex of the surface 2 in the depth direction of the silicon nitride sintered wafer 1 as the dimension in the line segment direction passing through the center 3 of the surface 2. The average length RSm of the roughness curve element is specified in JIS-B-0601 (2013). As specified in JIS-B-0601 (2013), it is necessary to identify the minimum height and minimum length of the peaks and valleys for the average length RSm of the roughness curve element. The standard value of the identifiable minimum height is set to 10% of the maximum height roughness Rz. The standard value of the identifiable minimum length is set to 1% of the reference length. It is specified that after the peaks and valleys are determined in a manner that satisfies both of these two conditions, the average value of the length Xs of the profile curve element is obtained. Furthermore, JIS-B-0601 corresponds to ISO4287.

[0025] In addition, the measurement method of RSm, Rt, and Rv is based on the method according to JIS-B-0601 (2013). The measurement conditions are set to reference length: more than 10 mm (for example, in the case of a disc-shaped wafer 1, it is the diameter), measurement speed: 0.6 mm / s, shape removal: least squares straight line, λs filter: yes, λs cutoff ratio: 300, cutoff category: Gaussian, cutoff wavelength (λc): 0.8 mm. When a reference length of more than 10 mm cannot be ensured by one measurement, the measurement can also be performed in multiple times. Under this condition, the measurement is performed on a straight line passing through the center. In addition, a contact-type roughness measuring instrument is used when the measurement is specified. If it is an optical roughness measuring instrument, there is a possibility that the polished surface cannot be measured due to reflection. Furthermore, a laser type can be listed as an optical roughness measuring instrument.

[0026] In addition, RSm, Rt, and Rv are measured on a plurality of line segments 4, respectively. The plurality of line segments 4 may be any as long as they pass through the center 3. For example, the number of the plurality of line segments 4 passing through the center 3 is set to 5, and the average value of the 5 RSm is measured. The wafer 1 involved in the embodiment is characterized in that the average value of RSm on any line segment 4 is within the range of 100 μm or more and 350 μm or less.

[0027] Regarding the silicon nitride sintered wafer 1 involved in the embodiment, the average value of RSm on the plurality of line segments 4 is within a range of 100 μm or more and 350 μm or less. As described above, RSm is the length of one cycle of a peak and a valley. As described later, the silicon nitride sintered wafer 1 is used in a process of configuring a single crystal 5. If the average value of RSm is within a specified range, both bonding strength and adhesion can be achieved.

[0028] If RSm is small, it means that one cycle of peaks and valleys is short. In addition, if RSm is large, it means that one cycle of peaks and valleys is long. If RSm is small, an anchoring effect can be obtained. On the other hand, if RSm is small, it becomes easy to form a gap between the wafer 1 and the single crystal 5. Therefore, the average value of RSm on the plurality of line segments 4 is preferably greater than 100 μm and less than 350 μm, and more preferably within the range of greater than 150 μm and less than 300 μm.

[0029] The average value of RSm of the plurality of line segments 4 passing through the center 3 is within the prescribed range, which indicates that the deviation of RSm in the diameter direction is small. Thus, the deviation of the closeness when the single crystal 5 is arranged can be suppressed. When RSm is less than 100 μm, although the anchoring effect can be obtained, there is a possibility of a gap between the wafer 1 and the single crystal 5. In addition, when RSm is large and exceeds 350 μm, although the gap between the wafer 1 and the single crystal 5 can be suppressed, there is a possibility of a decrease in the bonding strength.

[0030] In addition, the other side of the wafer 1, that is, the back side (the side on which the single crystal 5 is not configured), can also be used as the same grinding surface as the front side, or it can be not ground. By using the back side of the wafer 1 as the same grinding surface as the front side (the average value of RSm is within the range of 100 μm or more and 350 μm or less), either side can be used as the surface for configuring the single crystal 5. Thus, in the process of configuring the single crystal 5, it is possible to deal with it without caring about the front and back of the wafer 1. In other words, as long as there is a difference between the front and back of the wafer 1, it is preferred not to grind the back side. Not grinding the back side can prevent cost increases.

[0031] As will be described later, the wafer 1 on which the single crystal 5 is arranged is preferably circular. By controlling the RSm of the plurality of line segments 4, it is possible to suppress variations in bonding strength and adhesion in the radial direction of the circle.

[0032] In addition, RSm is preferably within a range of 10 μm to 800 μm. As described above, RSm is measured at a reference length of 10 mm or more. By making RSm measured under these conditions within a range of 10 μm to 800 μm, RSm deviation can be suppressed. Thus, adhesion can be further improved.

[0033] When considering the bonding strength between the silicon nitride sintered wafer 1 and the single crystal 5, as long as the bonding strength of the outer peripheral portion is good, it is possible to suppress defects such as detachment and positional deviation.

[0034] In addition, the average value of the maximum valley depth Rv of the plurality of roughness curves with the plurality of line segments 4 passing through the center 3 as the reference length is preferably within a range of 0.04 μm or more and 0.4 μm or less. For example, the number of the plurality of line segments 4 passing through the center 3 is set to 5, and the average value of the 5 Rvs is measured. The so-called average value of Rv is the average value when Rv on the plurality of line segments 4 is measured at a reference length of 10 mm or more.

[0035] The maximum valley depths Rv of the roughness curves with the line segments 4 passing through the center 3 as reference lengths are preferably within a range of 0.02 μm to 2 μm. These values ​​are the values ​​of Rv obtained on the line segments 4 with a reference length of 10 mm or more.

[0036] The maximum valley depth Rv of the roughness curve is the depth of the largest valley of the roughness curve. If the valley is deep, Rv increases. By having the average value of Rv of multiple line segments 4 passing through the center 3 in the range of 0.04 μm or more and 0.4 μm or less, the bonding strength and adhesion can be further improved. In addition, by having the value of each Rv obtained by a reference length of more than 10 mm in the range of 0.02 μm or more and 2 μm or less, it can be further improved.

[0037] In addition, the average value of the maximum height Rt of the plurality of roughness curves with the plurality of line segments 4 passing through the center 3 as the reference length is preferably within a range of 0.4 μm or more and 2 μm or less. For example, the number of the plurality of line segments 4 passing through the center 3 is set to 5, and the average value of the 5 Rt is measured. The so-called average value of Rt is the average value when the Rt on the plurality of line segments 4 is measured at a reference length of 10 mm or more (for example, in the case of a disk-shaped wafer 1, it is the diameter).

[0038] The maximum height Rt of the roughness curves based on the reference length of the line segments 4 passing through the center 3 is preferably within a range of 0.1 μm to 4 μm. These values ​​are the values ​​of Rt obtained on the line segments 4 at a reference length of 10 mm or more.

[0039] The maximum height Rt of the roughness curve is the height of the largest peak of the roughness curve.

[0040] The average value of multiple Rt values ​​with multiple line segments 4 passing through the center 3 as the reference length is within the range of 0.4 μm to 2 μm, thereby further improving the bonding strength and adhesion. In addition, the value of each Rt obtained by a reference length of more than 10 mm is within the range of 0.1 μm to 4 μm, which can further improve it.

[0041] After RSm is controlled as described above, it is effective to control Rv and Rt. In addition, Rv and Rt can be applied individually or in combination.

[0042] RSm controls one cycle of peaks and valleys, Rv controls the depth of valleys, and Rt controls the height of peaks. Thus, both bonding strength and adhesion are achieved.

[0043] In addition, it is preferred that the silicon nitride sintered body has a thermal conductivity of 50 W / m·K or more and a three-point bending strength of 600 MPa or more. If the thermal conductivity is high, the heat dissipation is improved. In addition, if the strength is high, the possibility of breakage during transportation when configuring the single crystal 5 is reduced. In other words, the production volume is improved. In addition, in the silicon nitride substrate, silicon nitride grains with an aspect ratio of 1.5 or more become the main body. The strength can be improved by winding the slender silicon nitride grains. In addition, RSm is easily controlled by randomly orienting the slender silicon nitride grains.

[0044] In addition, it is preferred that the silicon nitride sintered body contains a grain boundary phase in a range of 1 mass % or more and 20 mass % or less. If the grain boundary phase is contained, the density of the silicon nitride sintered body can be within a range of 95% or more and 100% or less of the theoretical density. In addition, this is also effective for controlling the surface roughness.

[0045] In addition, the linear expansion coefficient of the silicon nitride sintered body is preferably 2.4×10 ―6 / K and above 3.2×10 ―6 / K or less. The linear expansion coefficient is the value from room temperature to 300°C obtained by the average linear expansion coefficient test of JIS-C-2141. The linear expansion coefficient is the ratio of the length and volume expansion of an object as the temperature rises per unit temperature. The linear expansion coefficient is sometimes also called the thermal expansion coefficient. As substrates for configuring the single crystal 5, sapphire substrates and aluminum nitride substrates can be listed. The linear expansion coefficient of the sapphire substrate is 5.5×10 ―6 / K. In addition, the linear expansion coefficient of the aluminum nitride substrate is 4.5×10 ―6 / K or so. The linear expansion of silicon nitride sintered body is small. Therefore, deformation caused by heat can be suppressed. By suppressing deformation caused by heat, the advantages of the aforementioned surface roughness can be exerted. For example, the epitaxial growth of gallium nitride (GaN) rises to around 1000°C. In addition, the epitaxial growth of silicon carbide (SiC) rises to around 1500°C. The linear expansion coefficient of silicon nitride sintered body can be controlled by the content of grain boundary phase. Therefore, the content of grain boundary phase is preferably greater than 1 mass % and less than 20 mass %, and more preferably in the range of greater than 3 mass % and less than 15 mass %.

[0046] In addition, the surface 2 of the silicon nitride sintered wafer 1 is preferably disk-shaped. The shape of the surface 2 of the silicon nitride sintered wafer 1 can be circular or polygonal when viewed from above. In addition, as a circle, a perfect circle and an ellipse can be listed. As a polygon, a triangle, a quadrilateral, a pentagon, a hexagon, etc. can be listed.

[0047] The single crystal 5 is mostly in the shape of a disk. For example, the diameter and thickness of a silicon single crystal are specified in the SEMI standard (Semiconductor Equipment and Materials International). A silicon single crystal is sometimes also called a silicon wafer. By making the diameter (a line segment passing through the center 3) of the single crystal 5 and the silicon nitride sintered wafer 1 the same in advance, it becomes easier to use in the manufacturing process of semiconductor elements.

[0048] In addition, the diameter of the surface 2 of the silicon nitride sintered wafer 1 (the line segment passing through the center 3) is preferably 40 mm or more. In addition, the diameter of the surface 2 of the silicon nitride sintered wafer 1 (the line segment passing through the center 3) is preferably the same as the diameter of the single crystal 5. In addition, the thickness of the silicon nitride sintered wafer 1 is preferably in the range of 0.2 mm or more and 3 mm or less.

[0049] The silicon nitride sintered wafer 1 as described above can be used in the step of arranging the single crystal 5 . Figure 3 and Figure 41 shows an example of a structure in which a single crystal 7 is arranged on a silicon nitride sintered wafer 1. In the figure, reference numeral 1 is a silicon nitride sintered wafer, reference numeral 5 is a single crystal, reference numeral 6 is a thin film, and reference numeral 7 is a single crystal.

[0050] Silicon and compound semiconductors can be cited as the single crystal 5. Compound semiconductors include GaN-based, InN-based, AlN-based, SiC-based, etc. GaN-based semiconductors include GaN, GaInN, GaAlN, GaInAlN, etc.

[0051] Examples of the step of arranging the single crystal 5 on the silicon nitride sintered wafer 1 include a step of stacking the single crystal 5 on the silicon nitride sintered wafer 1 and a step of growing the single crystal 5 .

[0052] In addition, as a process for stacking the single crystal 5 on the silicon nitride sintered wafer 1, there can be cited the following steps: Figure 3 A method of directly configuring a single crystal 5 on a silicon nitride sintered wafer 1 as shown in the figure. In addition, after a thin film 6 is formed on the silicon nitride sintered wafer 1, a single crystal 5 can also be configured on the formed thin film 6. In addition, as a process for growing the single crystal 5, a gas phase method, a liquid phase method, etc. can be listed. Before the crystal growth process is performed, a thin film 6 can also be formed on the silicon nitride sintered wafer 1. The thin film 6 formed on the silicon nitride sintered wafer 1 preferably has the same composition as the single crystal 5. The thin film 6 having the same composition as the single crystal 5 can play the role of a seed crystal in the crystal growth process. The wafer 1 involved in the embodiment can effectively function even if the single crystal 5 is configured via the thin film 6.

[0053] After the single crystal 5 is arranged on the silicon nitride sintered wafer 1, the process of manufacturing a semiconductor element can be performed. In the process of manufacturing a semiconductor element, the silicon nitride sintered wafer 1 can also be used as a substrate. In addition, by removing the silicon nitride sintered wafer 1, only the single crystal 5 can be used in the process of manufacturing a semiconductor element. A component in which the single crystal 5 is arranged on the silicon nitride sintered wafer 1 and a component in which the single crystal 5 is arranged via the thin film 6 are called a single crystal.

[0054] By controlling RSm of the surface 2 of the silicon nitride sintered wafer 1 on which the single crystal 5 is disposed, it is possible to achieve both bonding strength and adhesion. The expansion of the gap between the silicon nitride sintered wafer 1 and the single crystal 5 can be suppressed by the stress caused by the difference in thermal expansion between the silicon nitride sintered wafer 1 and the single crystal 5. In addition, it is possible to improve by controlling Rv and Rt.

[0055] Next, a method for producing the silicon nitride sintered wafer 1 according to the embodiment will be described. The method for producing the silicon nitride sintered wafer 1 according to the embodiment is not limited as long as it has the above-mentioned configuration, but the following methods can be cited as methods that can achieve high yields.

[0056] First, silicon nitride powder and sintering aid powder are prepared. The amount of the sintering aid added is set within a range of 1 mass % or more and 20 mass % or less. In addition, as the sintering aid, one or more oxides selected from rare earth elements, magnesium, hafnium, and titanium can be listed. In particular, it is preferred to use oxides of rare earth elements as essential components and to add one or more oxides selected from magnesium, hafnium, and titanium.

[0057] A mixed raw material powder of silicon nitride powder and sintering aid powder is prepared. The mixed raw material powder is mixed with a binder and the like to prepare a raw material powder slurry.

[0058] Next, a molding step is performed using the raw material powder slurry. The molding step can be performed using a known method such as a doctor blade method or a die molding method.

[0059] In addition, the obtained molded body is preferably processed into a target shape. For example, when a disk-shaped silicon nitride sintered wafer is desired, the molded body is preferably formed into a disk-shaped body in advance. In addition, the molded body may also be stacked to adjust the thickness.

[0060] Next, a step of degreasing the molded body is performed. The degreasing step is preferably performed in a temperature range of 300° C. to 700° C. In addition, a step of sintering the degreased body is performed. The sintering step is preferably performed in a temperature range of 1600° C. to 1900° C.

[0061] Next, the surface of the obtained silicon nitride sintered body is ground. The grinding is performed in such a way that the RSm, Rv, and Rt of the plurality of line segments 4 passing through the center 3 of the surface 2 are within a predetermined range. For this purpose, it is effective to perform the grinding while rotating the flat silicon nitride sintered body.

[0062] (Example)

[0063] (Examples 1 to 5, Comparative Examples 1 to 2)

[0064] As the silicon nitride sintered body, the silicon nitride sintered body shown in Table 1 was prepared. The silicon nitride sintered body had oxides of rare earth elements and one or more oxides selected from magnesium, hafnium, and titanium added as sintering aids. All were set to be disk-shaped silicon nitride sintered bodies.

[0065] Table 1

[0066]

[0067] Next, the surface of the disk-shaped silicon nitride sintered body is ground to control the surface roughness, thereby producing the silicon nitride sintered body wafer 1 of the embodiment and the silicon nitride sintered body wafer of the comparative example. The surface roughness, the diameter and thickness of the disk are shown in Table 2 and Table 3. In addition, a diameter of 125 mm is equivalent to 5 inches, and a diameter of 150 mm is equivalent to 6 inches.

[0068] In addition, surface roughness is represented by Rsm, Rv, and Rt, and the measurement conditions are defined as described above. The average value is the average value of multiple values ​​obtained based on multiple line segments 4 (diameter in the case of a circular wafer) passing through the center of one side of the circular plate. For RSm, Rv, and Rt, the average value, minimum value, and maximum value when the reference length is used as the diameter are shown.

[0069] Table 2

[0070] Types of Silicon Nitride Sintered Compacts Diameter [mm] Thickness [mm] Example 1 Silicon nitride sintered body 1 125 0.6 Example 2 Silicon nitride sintered body 1 150 1.0 Example 3 Silicon nitride sintered body 2 125 0.8 Example 4 Silicon nitride sintered body 2 150 0.8 Example 5 Silicon nitride sintered body 3 150 1.0 Comparative Example 1 Silicon nitride sintered body 3 150 0.6 Comparative Example 2 Silicon nitride sintered body 3 150 0.6

[0071] Table 3

[0072]

[0073] In the silicon nitride sintered wafer 1 according to the embodiment, RSm of a plurality of line segments 4 (diameter in the case of a circular wafer) passing through the center 3 is set within a range of 100 μm to 350 μm. In addition, Rv and Rt are also set within a predetermined range.

[0074] On the other hand, the average value of RSm is larger in the silicon nitride sintered wafer involved in Comparative Example 1. In addition, the average values ​​of Rv and Rt are also larger. In other words, in Comparative Example 1, one cycle of peaks and valleys is larger, and the peaks and valleys are also larger.

[0075] In addition, the average value of RSm is small in the silicon nitride sintered wafer involved in Comparative Example 2. In addition, the average values ​​of Rv and Rt are also small. In other words, in Comparative Example 2, one cycle of peaks and valleys is small, and the peaks and valleys are also small.

[0076] Furthermore, the surface roughness Ra of the silicon nitride sintered wafer 1 according to the example and the silicon nitride sintered wafer according to the comparative example is 0.1 μm or less. It is found that even if Ra is the same, the obtained effect is different due to the difference in RSm.

[0077] Next, a process of arranging a single crystal on the silicon nitride sintered wafer 1 involved in the embodiment and the silicon nitride sintered wafer involved in the comparative example is performed. An AlN thin film is formed on the surface of the silicon nitride sintered wafer by sputtering. A GaN single crystal is arranged on the AlN film. Thus, a sample in which a single crystal is arranged on a silicon nitride sintered wafer is prepared.

[0078] As a single crystal adhesion test, each sample was subjected to a TCT test. The TCT test was performed in the order of -40°C × 30 minutes, room temperature × 10 minutes, 170°C × 30 minutes, and room temperature 10 minutes as one cycle, and the single crystal and AlN thin film were measured for peeling after 1000 cycles. The presence of peeling was confirmed by SAT (ultrasonic flaw detection).

[0079] Products with a peeling area of ​​0% or more and 3% or less were considered good products, and products with a peeling area exceeding 3% were considered defective products.

[0080] Table 4

[0081] Adhesion test with single crystal Example 1 Good product Example 2 Good product Example 3 Good product Example 4 Good product Example 5 Good product Comparative Example 1 Defective products Comparative Example 2 Defective products

[0082] As can be seen from the table, the bonding strength between the wafer 1 made of silicon nitride sintered according to the example and the single crystal is improved. Therefore, it can be seen that the control of the average value of RSm is effective.

[0083] On the other hand, the bonding strength is reduced when the average value of RSm is out of the range as in Comparative Examples 1 and 2. That is, like the TCT characteristic, the performance is reduced when thermal stress is applied.

[0084] Several embodiments of the present invention are illustrated above, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the main purpose of the invention. These embodiments and their modifications are included in the scope and main purpose of the invention, and are also included in the invention described in the claims and their equivalents. In addition, the above-mentioned embodiments can also be implemented by combining with each other.

Claims

1. A silicon nitride sintered wafer, characterized in that: It is a flat silicon nitride sintered wafer. For at least one surface of the silicon nitride sintered wafer, an average value of average lengths RSm of a plurality of roughness curve elements based on a plurality of line segments passing through the center of the surface as reference lengths is within a range of 100 μm to 350 μm.

2. The silicon nitride sintered wafer according to claim 1, characterized in that: The average length RSm of the plurality of roughness curve elements is respectively within a range of 10 μm to 800 μm.

3. The silicon nitride sintered wafer according to claim 1 or 2, characterized in that: An average value of maximum valley depths Rv of a plurality of roughness curves having a plurality of line segments passing through the center of the surface as a reference length is within a range of 0.04 μm to 0.4 μm.

4. The silicon nitride sintered wafer according to claim 1 or 2, characterized in that: The maximum valley depths Rv of a plurality of roughness curves with a plurality of line segments passing through the center of the surface as reference lengths are each within a range of 0.02 μm or more and 2 μm or less.

5. The silicon nitride sintered wafer according to claim 3, characterized in that: The maximum valley depths Rv of a plurality of roughness curves with a plurality of line segments passing through the center of the surface as reference lengths are each within a range of 0.02 μm or more and 2 μm or less.

6. The silicon nitride sintered wafer according to claim 1 or 2, characterized in that: An average value of maximum heights Rt of a plurality of roughness curves having a plurality of line segments passing through the center of the surface as a reference length is within a range of 0.4 μm to 2 μm.

7. The silicon nitride sintered wafer according to claim 1 or 2, characterized in that: The maximum heights Rt of the plurality of roughness curves, which have a plurality of line segments passing through the center of the surface as reference lengths, are each within a range of 0.1 μm to 4 μm.

8. The silicon nitride sintered wafer according to claim 5, characterized in that: An average value of maximum heights Rt of a plurality of roughness curves having a plurality of line segments passing through the center of the surface as a reference length is within a range of 0.4 μm to 1.4 μm.

9. The silicon nitride sintered wafer according to claim 8, characterized in that: The maximum heights Rt of the plurality of roughness curves, which have a plurality of line segments passing through the center of the surface as reference lengths, are each within a range of 0.1 μm to 4 μm.

10. The silicon nitride sintered wafer according to claim 1 or 2, characterized in that: It is a wafer formed of a disk-shaped silicon nitride sintered body. The plurality of line segments are a plurality of diameters.

11. The silicon nitride sintered wafer according to claim 4, characterized in that: It is a wafer formed of a disk-shaped silicon nitride sintered body. The plurality of line segments are a plurality of diameters.

12. The silicon nitride sintered wafer according to claim 9, characterized in that: It is a wafer formed of a disk-shaped silicon nitride sintered body. The plurality of line segments are a plurality of diameters.

13. A method for manufacturing a single crystal, characterized in that: The method comprises the step of arranging a single crystal on the silicon nitride sintered wafer according to claim 1 or 2.

14. A method for manufacturing a single crystal, characterized in that: The method comprises the step of arranging a single crystal on the silicon nitride sintered wafer according to claim 12.

15. The method for manufacturing a single crystal according to claim 13, characterized in that: The method comprises the steps of forming a thin film on a silicon nitride sintered wafer and disposing the single crystal on the formed thin film.

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