A quaternary optocoupler infrared LED epitaxial wafer and a preparation method thereof

By introducing a current tunneling layer and a tunneling transition layer into the optocoupled infrared LED epitaxial sheet and adopting a dual current active zone structure, the existing binary optocoupled infrared LED is solved, and a quadruple optocoupled infrared LED epitaxial sheet with high power, good uniformity and low cost is achieved.

CN119767890BActive Publication Date: 2025-05-27NANCHANG KAIXUN PHOTOELECTRIC CO LTD
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Patent Information

Application Number
CN202510264895.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-07
Publication Date
2025-05-27
Estimated Expiration
2045-03-07

AI Technical Summary

Technical Problem

The existing binary optocoupler infrared LED epitaxial sheets have insufficient power, poor uniformity and high cost under small currents, which cannot meet the rapid development of the optocoupler market.

Method used

The design of a quadruple optical coupling infrared LED epitaxial sheet is adopted, including introducing a current tunneling layer and a tunneling transition layer between the N-type and P-type restriction layer and the current expansion layer, and adopting a dual-current active region structure in the light emitting region.

Benefits of technology

The power characteristics and uniformity of the optocoupling LED under small current are improved, production costs are reduced, and good power response characteristics are achieved under both large and small currents.

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Abstract

The present invention relates to the field of LED technology, and particularly relates to a quaternary opto-coupled infrared LED epitaxial wafer and a preparation method thereof. The quaternary opto-coupled infrared LED epitaxial wafer sequentially includes an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current spreading layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type confinement layer, an N-side spacer layer, a first active region, a second active region, a P-side spacer layer, a P-type confinement layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current spreading layer, and a P-side contact layer from bottom to top; the thickness of the second active region is less than the thickness of the first active region. By combining the design of the current tunneling layer and the design of the double-current active region structure, the obtained quaternary opto-coupled infrared LED epitaxial wafer has high power and good uniformity, improves the power characteristics at low currents, and can be used to replace the existing binary opto-coupled infrared LED materials.
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Description

Technical Field

[0001] The present invention relates to the technical field of LEDs, and particularly relates to a quaternary opto - coupled infrared LED epitaxial wafer and a preparation method thereof. Background Art

[0002] An opto - coupler (referred to as an optical coupler for short) is a device that transmits electrical signals through light. Usually, a light emitter (infrared LED) and a receiver are encapsulated in the same package. When an electrical signal is applied to the input terminal, the light emitter emits light. After the light receiver receives the light, a photocurrent is generated and flows out from the output terminal, thus realizing the "electric - light - electric" conversion and being widely used in digital circuits.

[0003] In conventional opto - coupler light emitters, a binary infrared LED material grown by liquid - phase epitaxy (LPE) is used. Its epitaxial structure is as Figure 1 shown. Using the LPE epitaxial technology, an N - type GaAs electron layer 2 and a P - type GaAs hole layer 3 are grown on an N - type GaAs substrate 1 from bottom to top. Since the conventional binary opto - coupler light emitter LED epitaxial wafer uses the liquid - phase epitaxy (LPE) growth technology, the raw material cost and production cost are relatively high. At the same time, there are also disadvantages such as low power, poor uniformity, and a large power attenuation amplitude at low currents. The binary infrared LED as a light emitter cannot achieve a high power and cannot meet the high - speed development of the opto - coupler market. Therefore, it is of great significance to develop a quaternary high - power infrared LED to replace the binary opto - coupler light emitter. Summary of the Invention

[0004] Aiming at the deficiencies of the prior art, the present invention provides a quaternary opto - coupled infrared LED epitaxial wafer, which has the advantages of high power, good uniformity, low cost, etc., and can effectively replace the existing binary opto - coupled infrared LED epitaxial material.

[0005] The first object of the present invention is to provide a quaternary opto - coupled infrared LED epitaxial wafer, which sequentially includes an N - type GaAs substrate, an N - type GaAs buffer layer, an N - type current spreading layer, an N - type tunneling transition layer, an N - type current tunneling layer, an N - type confinement layer, an N - side spacer layer, a first active region, a second active region, a P - side spacer layer, a P - type confinement layer, a P - type current tunneling layer, a P - type tunneling transition layer, a P - type current spreading layer, and a P - surface contact layer from bottom to top; the thickness of the second active region is less than the thickness of the first active region.

[0006] On the one hand, by adopting the design of the current tunneling layer, the present invention enables the carriers in the small current to directly penetrate through the confinement layer into the light-emitting active region through the tunneling effect, which can solve the problems of voltage rise and insufficient power caused by the inability of carriers to cross the barrier between the confinement layer and the current spreading layer under small current. On the other hand, by adopting the structural design of the double-current active region with different thicknesses in the light-emitting region, it can ensure that the optocoupler infrared LED has good power response characteristics under both large current and small current. The obtained quaternary optocoupler infrared LED epitaxial wafer has high power and good uniformity, improves the power characteristics under small current, can be used to replace the original binary optocoupler infrared LED material, and has a broader application market.

[0007] Further, the material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, wherein the component x2 of Al is gradually changed, starting from the initial set component of 0.2 on the side close to the N-type current spreading layer, and then gradually changing to 0.02 slowly, and the rate of component gradual change is 0.009 / nm - 0.018 / nm; the material of the N-type current tunneling layer is GaAs.

[0008] Further, the material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, wherein the component x7 of Al is gradually changed, starting from the initial set component of 0.02 on the side close to the P-type confinement layer, and then gradually changing to 0.2 slowly, and the rate of component gradual change is 0.009 / nm - 0.018 / nm; the material of the P-type current tunneling layer is GaAs. By introducing the design of the current tunneling layer and the tunneling transition layer between the traditional confinement layer and the current spreading layer, the present invention can solve the problem of insufficient power of the optocoupler LED under small current. At the same time, by virtue of the characteristics of the narrow bandgap and high mobility of GaAs, it helps the carriers to directly penetrate through the confinement layer into the light-emitting active region through the tunneling effect, and solves the problems of voltage rise and insufficient power caused by the inability of carriers to cross the barrier between the confinement layer and the current spreading layer under small current. In addition, this design can also reduce the abrupt change of the barrier between the epitaxial layer interfaces, improve the chip response rate under small current and the current spreading ability under large current, ensure the rapid injection of carriers to form radiative recombination and luminescence under small current, thereby improving the problem of low brightness power in the small current working range, and avoiding the problem of high working voltage caused by the interface barrier difference under large current.

[0009] Further, the first active region is composed of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5P is a periodic cyclic structure with alternating growth of quantum well / barrier materials, the number of cyclic pairs is 5 to 8 pairs, and all are undoped. The thickness of the single-layer quantum well In y1 Ga 1- y1 As is 9 nm to 11 nm, and the thickness of the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is 18 nm to 20 nm, where the value ranges of y1 and y2 are 0.18 to 0.24 and 0.2 to 0.4 respectively.

[0010] Furthermore, the second active region is composed of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is a periodic cyclic structure with alternating growth of quantum well / barrier materials, the number of cyclic pairs is 5 to 8 pairs, and all are undoped. The thickness of the single-layer quantum well In y3 Ga 1- y3 As is 4 nm to 6 nm, and the thickness of the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is 10 nm to 12 nm, where the value ranges of y3 and y4 are 0.18 to 0.24 and 0.2 to 0.4 respectively. In the present invention, by designing the first and second active regions to form a double-current active region, and utilizing the characteristic that the electron mobility is much greater than the hole mobility, a well / barrier structure with a narrower width is designed on the P-side as the second active region, which helps to perform radiative recombination luminescence as close as possible to the region with a higher hole concentration, thereby improving the luminescence power at low currents. As the current increases, more carriers can be captured and recombined in the first active region with a wider well / barrier, so as to improve the current response characteristics of the opto-coupled LED as a double-current active region.

[0011] The second objective of the present invention is to provide a method for preparing a quaternary optocoupler infrared LED epitaxial wafer. By using MOCVD (Metal Organic Chemical Vapor Deposition) equipment on an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current spreading layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type confinement layer, an N-side spacer layer, a first active region, a second active region, a P-side spacer layer, a P-type confinement layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current spreading layer, and a P-face contact layer are successively grown. Due to the good nucleation quality characteristics of MOCVD growth, the epitaxial structure can be grown at a high rate, significantly reducing production costs and raw material costs and improving production capacity. The present invention uses MOCVD to grow a high-power quaternary optocoupler infrared LED epitaxial wafer to replace the binary optocoupler infrared LED epitaxial material grown by the existing liquid phase epitaxy (LPE). This not only reduces production costs but also results in an epitaxial structure with high crystal quality, good uniformity, better reliability, and application prospects.

[0012] Further, the growth steps of the N-type tunneling transition layer are as follows: Set the reaction chamber temperature to 690 °C ± 10 °C. On the N-type current spreading layer, introduce TMAl, TMGa, and AsH 3 , and grow an Al x2 Ga 1-x2 As material with a thickness of 10 nm to 20 nm. The Al composition x2 is set to 0.2 from the start of growing this structural layer and then gradually changes to 0.02 at a rate of 0.009 / nm to 0.018 / nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 ; The growth steps of the N-type current tunneling layer are as follows: Set the reaction chamber temperature to 690 °C ± 10 °C. On the N-type tunneling transition layer, introduce TMGa and AsH 3 , and grow a GaAs material with a thickness of 40 nm to 60 nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 2×10 18 cm -3 ~5×10 18 cm -3 .

[0013] Further, the growth steps of the P-type current tunneling layer are as follows: Set the reaction chamber temperature to 690 °C ± 10 °C. On the P-type confinement layer, introduce TMGa and AsH 3 , and grow a GaAs material with a thickness of 40 nm to 60 nm. The P-type dopant used for this layer is CCl 4 , and the doping concentration is 2×10 18 cm -3~5×10 18 cm -3 ; The growth steps of the P-type tunneling transition layer are as follows: Set the reaction chamber temperature to 690 °C ± 10 °C, and introduce TMAl, TMGa, and AsH 3 on the P-type current tunneling layer to grow an Al x7 Ga 1-x7 As material with a thickness of 10 nm to 20 nm. The starting value of the Al component x7 for this structural layer is set to 0.02 and then gradually changes to 0.2 at a rate of 0.009 / nm to 0.018 / nm. The N-type dopant used for this layer is CCl 4 , and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0014] Further, the growth steps of the first active region are as follows: Set the reaction chamber temperature to 680 °C ± 10 °C, and introduce TMAl, TMGa, TMIn, and AsH 3 , and PH 3 on the N-side spacer layer to grow a periodic cyclic structure of quantum wells and quantum barriers of In y1 Ga 1-y1 As and (Al y2 Ga 1-y2 ) 0.5 As 0.5 P materials, all of which are undoped. The thickness of the single-layer quantum well In y1 Ga 1-y1 As is 9 nm to 11 nm, and the value range of y1 is 0.18 to 0.24. The thickness of the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is 18 nm to 20 nm, and the value range of y2 is 0.2 to 0.4.

[0015] Further, the growth steps of the second active region are as follows: Set the reaction chamber temperature to 680 °C ± 10 °C, and introduce TMAl, TMGa, TMIn, and AsH 3 , and PH 3 on the first active region to grow a periodic cyclic structure of quantum wells and quantum barriers of In y3 Ga 1-y3 As and (Al y4 Ga 1-y4 ) 0.5 As 0.5 P materials, all of which are undoped. The thickness of the single-layer quantum well In y3 Ga1-y3 The thickness of As is 4 nm to 6 nm, where the value range of y1 is 0.18 to 0.24, and the single-layer quantum well (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10 nm to 12 nm, where the value range of y2 is 0.2 to 0.4.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0017] 1. In the epitaxial wafer structure of the present invention, a current tunneling layer and a tunneling transition design are adopted, that is, an N-type GaAs current tunneling layer is inserted between the N-type confinement layer and the N-type current spreading layer. At the same time, on the side of the N-type GaAs current tunneling layer close to the N-type current spreading layer, an AlGaAs graded material is used as the N-type tunneling transition layer structure. A P-type GaAs current tunneling layer is inserted between the P-type confinement layer and the P-type current spreading layer. At the same time, on the side of the P-type GaAs current tunneling layer close to the P-type current spreading layer, an AlGaAs graded material is used as the N-type tunneling transition layer, so that the carriers under small current can directly pass through the confinement layer into the light-emitting active region through the tunneling effect, solving the problems of voltage rise and power shortage caused by the inability of carriers to cross the barrier between the confinement layer and the current spreading layer under small current.

[0018] 2. The present invention adopts a double-current active region structure design in the light-emitting region, and a well / barrier structure with a narrower width is designed on the P-side as the second active region, which helps to perform radiative recombination luminescence as close as possible to the position with a higher hole concentration, improving the luminescence power under small current. As the current increases, more carriers can be captured and recombined in the first active region with a wider well / barrier, ensuring that the optocoupler infrared LED has good power response characteristics under both large current and small current.

[0019] 3. The present invention uses MOCVD to grow a high-power quaternary optocoupler infrared LED epitaxial wafer to replace the existing binary optocoupler infrared LED epitaxial material, which not only reduces the production cost, but also the epitaxial structure of the new solution has high crystal quality and good uniformity, and has better reliability and application prospects. Description of the Drawings

[0020] Figure 1 It is a schematic diagram of the structure of a conventional binary optocoupler LED epitaxial wafer;

[0021] Figure 2 It is a schematic diagram of the structure of the quaternary optocoupler infrared LED epitaxial wafer of the present invention;

[0022] Figure 3 It is a comparison diagram of the emission power curves of the quaternary optocoupler infrared LED of the present invention and the conventional binary optocoupler infrared LED.

[0023] Description of reference numerals in the schematic diagram:

[0024] 1. N-type GaAs substrate; 2. N-type GaAs electron layer; 3. P-type GaAs hole layer; 4. N-type GaAs buffer layer; 5. N-type current spreading layer; 6. N-type tunneling transition layer; 7. N-type current tunneling layer; 8. N-type confinement layer; 9. N-side space layer; 10. First active region; 11. Second active region; 12. P-side space layer; 13. P-type confinement layer; 14. P-type current tunneling layer; 15. P-type tunneling transition layer; 16. P-type current spreading layer; 17. P-side contact layer. Detailed implementation manners

[0025] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and in no way restrictive of the present application and its application or use. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0026] In the description of the present application, it should be understood that the use of words such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Without further statement, the above words have no special meanings, so they cannot be understood as limiting the protection scope of the present application.

[0027] In the description of the present application, it should be understood that the orientation or positional relationship indicated by orientation words such as "front, back, up, down, left, right", "horizontal, vertical, perpendicular, horizontal" and "top, bottom" is usually based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present application and simplifying the description. Without contrary description, these orientation words do not indicate and imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, so they cannot be understood as limiting the protection scope of the present application; the orientation words "inside, outside" refer to the inside and outside relative to the contour of each component itself.

[0028] Please refer to Figures 1 to 3 , it should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape and size of the components in actual implementation. The form, quantity and proportion of each component in actual implementation can be arbitrarily changed, and the layout form of its components may also be more complex.

[0029] In an embodiment of the present invention, a quaternary optocoupler infrared LED epitaxial wafer is provided, and its structural schematic diagram is as follows Figure 2 shown, which sequentially includes an N-type GaAs substrate 1, an N-type GaAs buffer layer 4, an N-type current spreading layer 5, an N-type tunneling transition layer 6, an N-type current tunneling layer 7, an N-type confinement layer 8, an N-side spacer layer 9, a first active region 10, a second active region 11, a P-side spacer layer 12, a P-type confinement layer 13, a P-type current tunneling layer 14, a P-type tunneling transition layer 15, a P-type current spreading layer 16, and a P-face contact layer 17 from bottom to top.

[0030] In some embodiments, the material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, and the thickness is 10 nm to 20 nm. Among them, the component x2 of Al is gradually changed. The initial set component on the side close to the N-type current spreading layer is 0.2, and then gradually changes to 0.02 slowly. The rate of component gradient is 0.009 / nm to 0.018 / nm. The doping concentration of the N-type tunneling transition layer Al x2 Ga 1-x2 As is 1×10 18 cm -3 ~2×10 18 cm -3 The N-type dopant used in this layer is SiH 4 .

[0031] In some embodiments, the material of the N-type current tunneling layer is GaAs, the thickness is 40 nm to 60 nm, and the doping concentration is 2×10 18 cm -3 ~5×10 18 cm -3 The N-type dopant used in this layer is SiH 4 .

[0032] In some embodiments, the material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, and the thickness is 10 nm to 20 nm. Among them, the component x7 of Al is gradually changed. The initial set component on the side close to the P-type confinement layer is 0.02, and then gradually changes to 0.2 slowly. The rate of component gradient is 0.009 / nm to 0.018 / nm. The doping concentration of the P-type tunneling transition layer Al x7 Ga 1-x7 As is 1×10 18 cm -3 ~2×10 18 cm -3 The P-type dopant used in this layer is CCl 4 .

[0033] In some embodiments, the material of the P-type current tunneling layer is GaAs, with a thickness ranging from 40 nm to 60 nm and a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 , and the P-type dopant used in this layer is CCl 4 .

[0034] By introducing the design of a current tunneling layer and a tunneling transition layer between the traditional confinement layer and the current spreading layer, the present invention can solve the problem of insufficient power of the opto-coupled LED under low current. With the characteristics of narrow bandgap and high mobility of GaAs, it helps carriers directly pass through the confinement layer into the light-emitting active region through the tunneling effect, solving the problem that under low current, due to the low carrier concentration, the carriers cannot cross the barrier between the confinement layer and the current spreading layer, resulting in an increase in voltage and insufficient power. It can also reduce the abrupt change of the barrier between the epitaxial layer interfaces, improve the chip response rate under low current and the current spreading ability under high current, ensure the rapid injection of carriers to form radiative recombination luminescence under low current, thereby improving the problem of low brightness power in the low current working range, and also avoiding the problem of high working voltage caused by the interface barrier difference under high current.

[0035] In some embodiments, the first active region is a periodic cyclic structure formed by alternating growth of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5 P as quantum well / barrier materials, and the number of cyclic pairs is 5 to 8 pairs. The thickness of a single-layer quantum well In y1 Ga 1-y1 As is 9 nm to 11 nm, and the thickness of a single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is 18 nm to 20 nm, and the value ranges of y1 and y2 are 0.18 to 0.24 and 0.2 to 0.4 respectively, and both are undoped.

[0036] In some embodiments, the second active region is a periodic cyclic structure formed by alternating growth of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P as quantum well / barrier materials, and the number of cyclic pairs is 5 to 8 pairs. The thickness of a single-layer quantum well In y3 Ga 1-y3 As is 4 nm to 6 nm, and the single-layer quantum barrier (Aly4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10 nm to 12 nm, the value ranges of y3 and y4 are 0.18 to 0.24 and 0.2 to 0.4 respectively, and both are undoped. By designing the active region as a dual-current active region in the present invention, the purpose is to utilize the characteristics that the electron mobility is much greater than the hole mobility, and the N-type carrier concentration is higher than the P-type carrier concentration under low current. Therefore, a well / barrier structure with a narrower width is designed on the P-side as the second active region, which helps to perform radiative recombination luminescence as close as possible to the region with a higher hole concentration, improving the luminescence power under low current. As the current increases, more carriers can be captured in the first active region with a wider well / barrier for recombination, thereby using this as a dual-current active region to improve the current response characteristics of the opto-coupled LED.

[0037] In another embodiment, the present invention also provides a method for preparing a quaternary opto-coupled infrared LED epitaxial wafer. Using an MOCVD device on an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current spreading layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type confinement layer, an N-side spacer layer, a first active region, a second active region, a P-side spacer layer, a P-type confinement layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current spreading layer, and a P-side contact layer are sequentially grown. Specifically, the following steps are included:

[0038] (1) The MOCVD is evacuated to a low pressure of 50 mbar in a pure H 2 atmosphere, the reaction chamber is set at a temperature of 400 °C, and then the N-type GaAs substrate is transferred to the reaction chamber through the robot transfer chamber, and then quickly heated to 690 °C and kept at a constant temperature of 690 °C for 8 min.

[0039] (2) Growing the N-type GaAs buffer layer: Set the temperature of the reaction chamber at 690 °C ± 10 °C, introduce TMGa, AsH 3 , grow a GaAs buffer layer material with a thickness of 150 nm to 200 nm, and use SiH 4 as the N-type dopant with a doping concentration of 2 × 10 18 cm -3 to 5 × 10 18 cm -3 .

[0040] (3) Growing the N-type current spreading layer: Set the temperature of the reaction chamber at 690 °C ± 10 °C, introduce TMGa, TMAl, AsH 3 , grow an Al x1 Ga 1-x1 As material with a thickness of 2500 nm to 3500 nm, the value range of x1 is 0.15 to 0.2, and use SiH4 As an N-type dopant, the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 。

[0041] (4)Growing an N-type tunneling transition layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, introduce TMAl, TMGa, AsH 3 , and grow an Al x2 Ga 1-x2 As material with a thickness of 10 nm to 20 nm. The set value of component x2 from the start of growing this structural layer is 0.2, and then it gradually changes to 0.02, with the rate of component gradient being 0.009 / nm to 0.018 / nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 。

[0042] (5)Growing an N-type current tunneling layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, introduce TMGa, AsH 3 , and grow a GaAs material with a thickness of 40 nm to 60 nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 2×10 18 cm -3 ~5×10 18 cm -3 。

[0043] (6)Growing an N-type confinement layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, introduce TMGa, TMAl, AsH 3 , and grow an Al x3 Ga 1-x3 As material with a thickness of 300 nm to 400 nm, where the value range of x3 is 0.28 to 0.32. This layer uses SiH 4 as the N-type dopant, and the doping concentration is 1.5×10 18 cm -3 ~2.5×10 18 cm -3 。

[0044] (7)Growing an N-side spacer layer: Set the temperature of the reaction chamber to 680 °C ± 10 °C, introduce TMGa, TMAl, AsH 3 , and grow an Al x4 Ga 1-x4As material, where the value range of x4 is 0.1 to 0.15, and this layer is undoped.

[0045] (8) Grow the first active region: Set the temperature of the reaction chamber to 680 °C ± 10 °C, and introduce TMAl, TMGa, TMIn, AsH 3 , PH 3 , and grow a periodic cyclic structure of quantum well and quantum barrier made of In y1 Ga 1-y1 As, (Al y2 Ga 1-y2 ) 0.5 As 0.5 P materials. The thickness of a single-layer quantum well In y1 Ga 1-y1 As is 9 nm to 11 nm, where the value range of y1 is 0.18 to 0.24. The thickness of a single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is 18 nm to 20 nm, where the value range of y2 is 0.2 to 0.4. The number of periodic cycles is 5 to 8 pairs, and both the well and the barrier are undoped.

[0046] (9) Grow the second active region: Set the temperature of the reaction chamber to 680 °C ± 10 °C, and introduce TMAl, TMGa, TMIn, AsH 3 , PH 3 , and grow a periodic cyclic structure of quantum well and quantum barrier made of In y3 Ga 1-y3 As, (Al y4 Ga 1-y4 ) 0.5 As 0.5 P materials. The thickness of a single-layer quantum well In y3 Ga 1-y3 As is 4 nm to 6 nm, where the value range of y3 is 0.18 to 0.24. The thickness of a single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is 10 nm to 12 nm, where the value range of y4 is 0.2 to 0.4. The number of periodic cycles is 5 to 8 pairs, and both the well and the barrier are undoped.

[0047] (10) Grow the P-side spacer layer: Set the temperature of the reaction chamber to 680 °C ± 10 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al x5 Ga 1-x5 with a thickness of 100 nm to 150 nmAs material, where the value range of x5 is 0.1 to 0.15, and this layer is undoped.

[0048] (11) Grow a P-type confinement layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al x6 Ga 1-x6 As material with a thickness of 300 nm to 400 nm, where the value range of x6 is 0.28 to 0.32, and CCl 4 is used as the P-type dopant with a doping concentration of 1.5×10 18 cm -3 to 2.5×10 18 cm -3 .

[0049] (12) Grow a P-type current tunneling layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, and introduce TMGa, AsH 3 , and grow a GaAs material with a thickness of 40 nm to 60 nm. The P-type dopant used for this layer is CCl 4 , and the doping concentration is 2×10 18 cm -3 to 5×10 18 cm -3 .

[0050] (13) Grow a P-type tunneling transition layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, and introduce TMAl, TMGa, AsH 3 , and grow an Al x7 Ga 1-x7 As material with a thickness of 10 nm to 20 nm. The set value of component x7 from the start of growing this structural layer is 0.02, and then it gradually changes to 0.2 with a gradual change rate of 0.009 / nm to 0.018 / nm. The P-type dopant used for this layer is CCl 4 , and the doping concentration is 1×10 18 cm -3 to 2×10 18 cm -3 .

[0051] (14) Grow a P-type current spreading layer: Set the temperature of the reaction chamber to 690 °C ± 10 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al x8 Ga 1-x8 As material with a thickness of 7000 nm to 8000 nm, where the value range of x8 is 0.15 to 0.2, and CCl 4 is used as the P-type dopant with a doping concentration of 1×10 18 cm-3 ~2×10 18 cm -3 。

[0052] (15) Growth of P-side contact layer: Set the temperature of the reaction chamber to 620 °C ± 10 °C, introduce TMGa, AsH 3 , and grow a GaAs contact layer material with a thickness of 50 nm to 80 nm. Use CCl 4 as the P-type dopant, and the doping concentration is 2×10 19 cm -3 ~5×10 19 cm -3 。

[0053] (16) Wafer taking: After the growth is completed, lower the temperature of the MOCVD reaction chamber to 110 °C, then adjust the pressure to 1000 mbar, open the reaction chamber, and take out the epitaxial wafer.

[0054] The following is further illustrated by specific examples.

[0055] Example 1

[0056] A method for preparing a quaternary optocoupler infrared LED epitaxial wafer includes the following specific steps:

[0057] (1) Evacuate the MOCVD to a low pressure of 50 mbar in a pure H 2 atmosphere. Set the temperature of the reaction chamber to 400 °C. Then transfer the N-type GaAs substrate to the reaction chamber through the manipulator transfer chamber, and then quickly heat it up to 690 °C and maintain it at 690 °C for 8 minutes.

[0058] (2) Growth of N-type GaAs buffer layer: Set the temperature of the reaction chamber to 690 °C, introduce TMGa, AsH 3 , and grow a GaAs buffer layer material with a thickness of 200 nm. Use SiH 4 as the N-type dopant, and the doping concentration is 3×10 18 cm -3 。

[0059] (3) Growth of N-type current spreading layer: Set the temperature of the reaction chamber to 690 °C, introduce TMGa, TMAl, AsH 3 , and grow an Al 0.16 Ga 0.84 As material with a thickness of 3000 nm. Use SiH 4 as the N-type dopant, and the doping concentration is 1.8×10 18 cm -3 。

[0060] (4) Growing N-type tunneling transition layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMAl, TMGa, AsH 3 , and grow an Al x2 Ga 1-x2 As material with a thickness of 10 nm. The set value of component x2 from the start of growing this structural layer is 0.2, and then it gradually changes to 0.02, with a gradual change rate of 0.018 / nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 2×10 18 cm -3 .

[0061] (5) Growing N-type current tunneling layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMGa, AsH 3 , and grow a GaAs material with a thickness of 40 nm. The N-type dopant used for this layer is SiH 4 , and the doping concentration is 2×10 18 cm -3 .

[0062] (6) Growing N-type confinement layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al 0.28 Ga 0.72 As material with a thickness of 320 nm, where the value of x1 is 0.28. This layer uses SiH4 as the N-type dopant, and the doping concentration is 1.5×10 18 cm -3 .

[0063] (7) Growing N-side spacer layer: Set the temperature of the reaction chamber to 680 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al 0.1 Ga 0.9 As material with a thickness of 120 nm, where the value of x4 is 0.1. This layer is undoped.

[0064] (8) Growing the first active region: Set the temperature of the reaction chamber to 680 °C, and introduce TMAl, TMGa, TMIn, AsH 3 , PH 3 , and grow a periodic cyclic structure of quantum wells and quantum barriers of In 0.18 Ga 0.82 As, (Al 0.2 Ga 0.8 ) 0.5 As 0.5 P materials. The thickness of a single-layer quantum well In 0.18 Ga 0.82 As is 9 nm, and the thickness of a single-layer quantum barrier (Al 0.2Ga 0.8 ) 0.5 As 0.5 The thickness of P is 18 nm. The number of periodic cycles is 8 pairs, and both the well / barrier are undoped.

[0065] (9)Growing the second active region: Set the temperature of the reaction chamber to 680 °C, and introduce TMAl, TMGa, TMIn, AsH 3 , PH 3 , and grow a periodic cyclic structure of quantum well and quantum barrier made of In 0.18 Ga 0.82 As, (Al 0.2 Ga 0.8 ) 0.5 As 0.5 P materials. The thickness of a single-layer quantum well In 0.18 Ga 0.82 As is 4 nm, and the thickness of a single-layer quantum barrier (Al 0.2 Ga 0.8 ) 0.5 As 0.5 P is 10 nm. The number of periodic cycles is 8 pairs, and both the well / barrier are undoped.

[0066] (10)Growing the P-side spacer layer: Set the temperature of the reaction chamber to 680 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al 0.1 Ga 0.9 As material with a thickness of 150 nm, where the value of x4 is 0.1, and this layer is undoped.

[0067] (11)Growing the P-type confinement layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMGa, TMAl, AsH 3 , and grow an Al 0.28 Ga 0.72 As material with a thickness of 400 nm, where the value range of x1 is 0.28, and CCl 4 is used as the P-type dopant with a doping concentration of 1.5×10 18 cm -3 .

[0068] (12)Growing the P-type current tunneling layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMGa, AsH 3 , and grow a GaAs material with a thickness of 40 nm. The P-type dopant used for this layer is CCl 4 , and the doping concentration is 2×10 18 cm -3 .

[0069] (13) Growing a P-type tunneling transition layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMAl, TMGa, and AsH 3 , and grow an Al x7 Ga 1-x7 As material with a thickness of 10 nm. The set value of component x7 from the start of growing this structural layer is 0.02, and then it gradually changes to 0.2 with a change rate of 0.018 / nm. The P-type dopant used for this layer is CCl 4 , and the doping concentration is 2×10 18 cm -3 .

[0070] (14) Growing a P-type current spreading layer: Set the temperature of the reaction chamber to 690 °C, and introduce TMGa, TMAl, and AsH 3 , and grow an Al 0.15 Ga 0.85 As material with a thickness of 7200 nm. Use CCl 4 as the P-type dopant, and the doping concentration is 2×10 18 cm -3 .

[0071] (15) Growing a P-side contact layer: Set the temperature of the reaction chamber to 620 °C, and introduce TMGa and AsH3, and grow a GaAs contact layer material with a thickness of 50 nm. Use CCl 4 as the P-type dopant, and the doping concentration is 5×10 19 cm -3 .

[0072] (16) Wafer taking: After the growth is completed, lower the temperature of the MOCVD reaction chamber to 110 °C, then adjust the pressure to 1000 mbar, open the reaction chamber, and take out the epitaxial wafer.

[0073] Comparative Example 1

[0074] A conventional binary opto-coupled LED epitaxial wafer is prepared by a conventional liquid phase epitaxy (LPE) growth method, and its structural schematic diagram is as Figure 1 shown.

[0075] Test Example

[0076] The emission powers of the conventional binary opto-coupled infrared LED obtained in Comparative Example 1 and the quaternary opto-coupled infrared LED obtained in Example 1 were tested at different currents, and the results are shown in Table 1 and Figure 3 shown. It can be seen that the overall power of the quaternary opto-coupled infrared LED prepared by the present invention is significantly better than that of the conventional binary opto-coupled infrared LED, and there is a significant improvement at low currents. Moreover, for opto-coupled devices for high-power applications, this solution has significant advantages.

[0077] Table 1 Emission Power at Different Currents

[0078]

[0079] In summary, through the design of the current tunneling layer and the tunneling transition layer, the present invention enables carriers to directly pass through the confinement layer into the light-emitting active region by means of tunneling effect under low currents, thus solving the problems of voltage rise and insufficient power caused by the inability of carriers to cross the barrier between the confinement layer and the current spreading layer under low currents. Through the structural design of the double-current active region in the light-emitting region, it can ensure that the optocoupler infrared LED has good power response characteristics under both high and low currents. The obtained quaternary optocoupler infrared LED epitaxial wafer has high power and good uniformity, improving the power characteristics under low currents, and can be used to replace the existing binary optocoupler infrared LED materials.

[0080] Finally, it should be emphasized that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A quaternary optical coupler infrared LED epitaxial wafer, characterized in that: The quaternary optical coupler infrared LED epitaxial wafer includes, from bottom to top, an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-side contact layer; the thickness of the second active region is less than the thickness of the first active region; The material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, wherein the Al composition x2 is gradual, starting from an initial set composition of 0.2 on the side close to the N-type current spreading layer, and then gradually changing to 0.02, and the composition gradient rate is 0.009 / nm to 0.018 / nm; the material of the N-type current tunneling layer is GaAs; The material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, wherein the Al composition x7 is gradual, starting from an initial set composition of 0.02 on the side close to the P-type confinement layer, and then gradually changes to 0.2, and the composition gradient rate is 0.009 / nm to 0.018 / nm; the material of the P-type current tunneling layer is GaAs.

2. A quaternary optical coupler infrared LED epitaxial wafer according to claim 1, characterized in that: The first active region is composed of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y1 Ga 1-y1 The thickness of As is 9nm to 11nm, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, wherein the value ranges of y1 and y2 are 0.18~0.24 and 0.2~0.4 respectively.

3. The quaternary optical coupler infrared LED epitaxial wafer according to claim 1, characterized in that: The second active region is composed of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y3 Ga 1-y3 The thickness of As is 4nm to 6nm, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm~12nm, and the value ranges of y3 and y4 are 0.18~0.24 and 0.2~0.4 respectively.

4. A method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to any one of claims 1 to 3, characterized in that: An N-type GaAs buffer layer, an N-type current spreading layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type limiting layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type limiting layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current spreading layer, and a P-surface contact layer are sequentially grown on an N-type GaAs substrate using MOCVD equipment.

5. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 4, characterized in that: The growth steps of the N-type tunneling transition layer are as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the N-type current spreading layer, and growing Al with a thickness of 10nm to 20nm. x2 Ga 1-x2 As material, in which the Al component x2 is set to 0.2 when the structure layer is grown, and then gradually changes to 0.02, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 The growth steps of the N-type current tunneling layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMGa and AsH3 into the N-type tunneling transition layer, and growing GaAs material with a thickness of 40nm to 60nm. The N-type dopant used in this layer is SiH4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 .

6. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 4, characterized in that: The growth steps of the P-type current tunneling layer are as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMGa and AsH3 into the P-type confinement layer, and growing GaAs material with a thickness of 40nm to 60nm. The P-type dopant used in this layer is CCl4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 The growth steps of the P-type tunneling transition layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the P-type current tunneling layer, and growing Al with a thickness of 10nm to 20nm. x7 Ga 1-x7 As material, in which the Al component x7 is set to 0.02 when the structure layer is grown, and then gradually changes to 0.2, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is CCl4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

7. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 4, characterized in that: The growth steps of the first active region are: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the N-side space layer, and growing quantum wells and quantum barriers of In y1 Ga 1-y1 As、(Al y2 Ga 1-y2 ) 0.5 As 0.5 The periodic cyclic structure of P materials is non-doped, and the single-layer quantum well In y1 Ga 1-y1 The thickness of As is 9nm to 11nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, and the value range of y2 is 0.2~0.

4.

8. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 4, characterized in that: The growth step of the second active region is: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the first active region, and growing quantum wells and quantum barriers of In y3 Ga 1-y3 As、(Al y4 Ga 1-y4 ) 0.5 As 0.5 The periodic cyclic structure of P materials is non-doped, and the single-layer quantum well In y3 Ga 1-y3 The thickness of As is 4nm to 6nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm~12nm, and the value range of y2 is 0.2~0.4.

Citation Information

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