A simulation method and simulation system of a power electronic converter

Abstract

The application belongs to the technical field of simulation modeling, and discloses a simulation method and a simulation system of a power electronic converter. on / R off After the switch model is further equivalent to the voltage-controlled current source model, an equivalent system state equation is constructed, the coefficient matrix in the system state equation is a constant matrix, all multiplication calculations in the state equation are multiplication operations of constants and variables, therefore, when the FPGA is implemented, the shift addition operation can be used to replace the multiplication operation, the limited number of multipliers is avoided, and the problem that the simulation scale of the power electronic converter is limited is solved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of simulation modeling, and more particularly to a simulation method and simulation system of a power electronic converter. BACKGROUND

[0002] The R on / R off switching model is one of the most commonly used switching models in real-time simulation of power electronic converters. For the R on / R off switching model, when the switch is on, the switch is equivalent to a small resistance R on ; when the switch is off, the switch is equivalent to a large resistance R off . Compared with other ideal switching models such as the companion discrete circuit model and the switching function model, the real-time simulation model of the power electronic converter established by using the R on / R off switching model has higher precision.

[0003] However, when modeling by using the R on / R off switching model, the judgment of the state of the diode and the update of the state variable all involve complex multiplication operations, and the larger the scale of the power electronic converter is, the more multiplication operations are involved. If simulation is performed based on a field programmable gate array (FPGA), due to the limited multiplier resources of the FPGA, simulation of a large-scale power electronic converter cannot be realized, so that the simulation scale is limited. SUMMARY

[0004] In view of the above defects or improvement needs of the prior art, the present application provides a simulation method and simulation system of a power electronic converter, which aims to construct a simulation model that can realize multiplication operation by using shift-add operation, so as to solve the problem of limited simulation scale.

[0005] To achieve the above-mentioned purpose, the present application provides a simulation method of a power electronic converter, which comprises:

[0006] obtaining the system parameters at time k-1 and inputting the equivalent discrete system state equation to obtain the state vector at time k; the state vector is a vector composed of the inductor current and the capacitor voltage of the converter;

[0007] The discrete system state equation is an equivalent discrete system state equation constructed after each switch on the half-bridge is equivalent to a voltage-controlled current source model, the discrete system state equation reflects the relationship between a state vector at time k and system parameters at time k-1, the voltage-controlled current source model includes an equivalent resistor R sn and an equivalent controlled current source j sw , a resistance value of the equivalent resistor R sn is equal to R off , a current of the equivalent controlled current source j sw is 0 when the switch is in an off state, and a conductance of the equivalent controlled current source j sw is R , where R on is an equivalent on-resistance of the switch, and R off is an equivalent off-resistance of the switch.

[0008] Optionally, the discrete system state equation is as follows:

[0009] x(k) = [I + Δt·A1]·x(k-1) + Δt·A2·u(k-1) + Δt·A3·j sw (k-1)

[0010] where x(k) is a state vector at time k, x(k-1) is an input vector at time k-1, u(k-1) is an input vector at time k-1, j sw (k-1) is a vector composed of currents of all equivalent controlled current sources at time k-1, Δt is a simulation step, A1, A2 and A3 are constant matrices determined by constructing a Kirchhoff voltage equation for an inductor voltage of the converter and constructing a Kirchhoff current equation for a capacitor current of the converter, respectively, and I is a unit matrix.

[0011] The system parameters at time k-1 input into the discrete system state equation include x(k-1), u(k-1) and j sw (k-1); when the switch is in an on state, a calculation formula of the equivalent controlled current source j located on an upper bridge arm of the half-bridge and a calculation formula of the equivalent controlled current source j located on a lower bridge arm of the half-bridge are as follows:

[0012]

[0013] where i h and v h are an input current and an input voltage of the half-bridge, respectively.

[0014] Optionally, the discrete system state equation is as follows:

[0015]

[0016] wherein x(k) is a state vector at k time, x(k-1) is an input vector at k-1 time, u(k-1) is an input vector at k-1 time, is a vector composed of current-related quantities of all equivalent controlled current sources at k-1 time, Δt is a simulation step, A1, A2, A3 are constant matrices determined by constructing Kirchhoff voltage equation for inductor voltage of the converter and constructing Kirchhoff current equation for capacitor current of the converter respectively, and I is a unit matrix;

[0017] wherein the system parameters at k-1 time input into the discrete system state equation include x(k-1), u(k-1) and When the switch is in an off state, the current-related quantity of the corresponding equivalent controlled current source is 0, and when the switch is in an on state, the current-related quantity of the equivalent controlled current source located on the upper arm of the half-bridge is and the current-related quantity of the equivalent controlled current source located on the lower arm of the half-bridge is The calculation formulae of i and v

[0018] are as follows:

[0019] wherein i h and v h are the input current and the input voltage of the corresponding half-bridge respectively.

[0020] Optionally, the equivalent off resistance R off is in the order of kΩ, and the equivalent on resistance R on is in the order of mΩ.

[0021] Optionally, after the state vector at k time is solved, the state of each switch at k time is determined based on the state vector at k time and the gate signal at k time, and the system parameters related to the equivalent controlled current source at k+1 time to be input into the discrete system state equation are constructed and recorded based on the state of each switch at k+1 time for simulation at k+1 time.

[0022] Optionally, the simulation method is implemented based on an FPGA chip, and shift-add operation is used in the FPGA chip to implement multiplication calculation in the discrete system state equation.

[0023] Optionally, the power electronic converter is any one of an LLC resonant converter, a series load resonant converter, a dual active bridge converter and a three-phase inverter.

[0024] The application further provides a simulation system of a power electronic converter, which comprises:

[0025] Input module, used to obtain the system parameters at time k-1 and input the equivalent discrete system state equation;

[0026] A calculation module, configured to solve the discrete system state equation to obtain a state vector at time k, wherein the state vector is a vector consisting of the inductor current and the capacitor voltage of the converter;

[0027] The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current of the equivalent controlled current source j is 0 when the switch is in the on state. sw Admittance Where R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch.

[0028] Optionally, an updating module is further included, for updating the system parameters at time k after obtaining the state vector at time k for simulation at time k+1.

[0029] Optionally, the simulation system is implemented by an FPGA chip, and shift addition operations are used in the FPGA chip to implement multiplication calculations in the discrete system state equation.

[0030] In general, the above technical solutions conceived by the present invention have the following beneficial effects compared with the prior art:

[0031] 1. The method proposed by the present invention is to on / R off After the switch model is further equivalent to a voltage-controlled current source model, an equivalent system state equation is constructed. The coefficient matrices in the system state equation are all constant matrices, and all multiplication calculations in the state equation are multiplication operations of constants and variables. Therefore, when implementing in FPGA, shift addition operations can be used instead of multiplication operations to avoid the use of a limited number of multipliers, solving the problem of limited simulation scale of power electronic converters. Moreover, since multiplication operations can be avoided, the method proposed in the present invention can achieve an extremely low simulation step size, thereby reducing the cumulative error of the numerical discretization method and enabling oversampling of the gate signal at high switching frequencies.

[0032] 2. Optionally, in one embodiment of the present invention, Inputting the corresponding system state equation can reduce the amount of calculation and consume less FPGA resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 The present invention relates to an R on / R off Equivalent switch model of switch model;

[0034] Figure 2 The present invention adopts R on / R off Schematic diagram of the half-bridge equivalent structure of the switch model and the voltage-controlled current source switch model;

[0035] Figure 3 1 is a schematic diagram of a simulation process in one embodiment of the present invention;

[0036] Figure 4 is a schematic diagram of a DAB converter circuit topology simulated in one embodiment of the present invention;

[0037] Figure 5 This is an offline simulation comparison diagram of the DAB converter model built by the present invention and the MATLAB / Simulink reference model;

[0038] FIG6( a ) is a diagram showing the inductor current i of a real-time simulation model of a DAB converter constructed according to an embodiment of the present invention and a physical experiment. Lp Waveform comparison chart;

[0039] FIG6( b ) is a diagram showing the inductor current i of the real-time simulation model of the DAB converter constructed according to an embodiment of the present invention and the actual experiment. Lp Schematic diagram of the absolute error. DETAILED DESCRIPTION

[0040] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0041] To facilitate understanding of the present invention, the traditional method of simulating a power electronic converter based on a binary resistance model is first introduced. The power electronic converter can be an LLC resonant converter, a series load resonant converter, a dual active bridge converter, a three-phase inverter, etc.

[0042] The traditional method uses R on / R offThe state equation shown in equation (1) is used to describe the behavior of the power electronic converter during modeling of the switch model:

[0043]

[0044] In the equation, x is a state vector, u is an input vector, A σ is a state matrix of the time domain system, B σ is an input matrix of the time domain system, and sigma is a switch state combination of the system.

[0045] In the equation, the state vector is a vector composed of inductor currents and capacitor voltages of the converter, and the input vector is a vector composed of external excitation signal sources of the converter.

[0046] In order to simplify the modeling calculation amount, equation (1) is discretized by using a forward Euler discretization method.

[0047]

[0048] In the equation, k is a sampling time of the discrete system, I is a unit matrix, Delta t is a simulation step, F σ is a state matrix of the discrete system, H σ is an input matrix of the discrete system.

[0049] As can be seen from equation (2), since the coefficient matrices F σ and H σ are time-varying matrices, and x and u are vectors composed of variables, all multiplication operations in the calculation of equation (2) are multiplication operations between variables. For FPGA, multiplication operations between variables need to be completed by using multipliers DSP48s. Since the number of DSP48s is small in FPGA, the traditional method using equation (2) will limit the size of the power electronic converter model due to the insufficient number of multipliers DSP48s.

[0050] In order to solve the above problems, the application proposes a new simulation method of the power electronic converter, which can complete all modeling calculations without using multipliers DSP48s of FPGA. By establishing an equivalent state equation, it is realized that the coefficient matrices are constant matrices, so that shift-add operations are used to replace multiplication operations in FPGA implementation, avoiding the use of DSP48s, and greatly increasing the real-time simulation modeling capability of FPGA for the power electronic converter.

[0051] As Figure 1 shown is a structure diagram of an R on / D off model of one switch in an embodiment of the application and an equivalent voltage-controlled current source model thereof.

[0052] For any switch tube, such as MOSFET and diode, when using R on / R off When modeling the switch model, it can be equivalent to Figure 1 The form shown. Figure 1 In, v sw is the voltage across the switch tube, with the forward direction being the conduction direction of the diode or anti-parallel diode; i sw is the current flowing through the switch tube, and its forward direction is set to the conduction direction of the diode or anti-parallel diode; g is the gate signal; R sw is the equivalent resistance of the switch. When the switch is on, R sw is a small resistor R on , when the switch is off, R sw The large resistor R off ; Usually, the equivalent off resistance R off The equivalent on-resistance is in the kΩ level and the equivalent on-resistance is in the mΩ level. on / R off The switch model is equivalent to a voltage-controlled current source model, R sn is an equivalent parallel resistance, j sw They are equivalent controlled current sources, and the two are in parallel relationship.

[0053] For the controlled current source j sw , which satisfies the following conditions (3) and (4):

[0054] j sw =G sw ·v sw (3)

[0055]

[0056] Where G sw is the switch equivalent admittance, when the switch is turned on, G sw is the admittance G on , when the switch is off, G sw is 0. A flag signal is used to record whether the switch is on and is recorded as σ sw When the switch is on, σ sw is 1, otherwise, σ sw is 0.

[0057] Therefore, the controlled current source j sw Satisfy the condition of formula (5).

[0058]

[0059] Where, as well as They are the controlled current sources when the switch is on and off, respectively.

[0060] In order to make the constructed voltage-controlled current source model equivalent to the R on / R off switch model, the conditions for the equivalence of the two models need to be analyzed.

[0061] For the R on / R off switch model, the switch current i sw is calculated as shown in the following equation (6):

[0062] If the two models are equivalent, for the same switch input characteristics, the models will always exhibit the same output characteristics. For the two switch models, the input is the switch voltage v sw , and the output is the switch current i on .

[0063] For the R off / R sw switch model, the switch current i sw is calculated as shown in the following equation (7):

[0064]

[0065] For the voltage-controlled current source switch model, the switch current i sw is calculated as shown in the following equation (7):

[0066]

[0067] Therefore, as long as the two switch currents i sw of equation (6) and equation (7) are equal under the condition of "σ sw = 1", and the two switch currents i sw of equation (6) and equation (7) are equal under the condition of "σ on = 0", the R off / R sn switch model and the voltage-controlled current source switch model are equivalent.

[0068] Therefore, the conditions for the equivalence of the two switch models are shown in equation (8).

[0069]

[0070] As long as the condition of equation (8) is met, that is, the equivalent resistance R off is equal to the equivalent off resistance R sw of the switch, the current of the equivalent controlled current source j sw is 0 when the switch is in the off state, and the admittance R on of the equivalent controlled current source j sw is equal to the on resistance R sn of the switch when the switch is in the on state.off The switch model is equivalent to the voltage-controlled current source switch model, and the same modeling accuracy can be achieved, and the R on / R off The switch model has high accuracy.

[0071] As Figure 2 shown is a switch model and a voltage-controlled current source switch model in an embodiment of the application. on / R off The switch model and the voltage-controlled current source switch model have a half-bridge equivalent structure as shown in the figure. The half-bridge structure includes an upper tube S a , a lower tube S b , a half-bridge input current i h , a half-bridge input voltage v h , a switch voltage v a of the upper tube S swa , a switch voltage v b of the lower tube S swb , a switch equivalent controlled current source j a of the upper tube S swa , and a switch equivalent controlled current source j b of the lower tube S swb . Generally, i h is an inductor current, and v h is a capacitor voltage or an input DC voltage.

[0072] When the switch is equivalent to the voltage-controlled current source model, based on the Kirchhoff's voltage law relationship of the inductor voltage of the power electronic converter and the Kirchhoff's current law relationship of the capacitor current, the system state equation of the equivalent power electronic converter can be constructed, as shown in the following formula (9):

[0073]

[0074] In the formula, x is a state variable vector, u is an input variable vector, j sw is a switch-controlled current source j sw vector formed by all switch equivalents in the system, and the dimension is consistent with the number of switches. In the formula, A1, A2, and A3 are constant matrices determined based on the Kirchhoff's voltage law relationship of the inductor voltage of the power electronic converter and the Kirchhoff's current law relationship of the capacitor current.

[0075] In order to simplify the modeling process, the forward Euler method is used to update formula (9), and the equivalent discrete system state equation is obtained as shown in formula (10):

[0076]

[0077] Where x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, u(k-1) is the input vector at time k-1, and j sw (k-1) is the vector composed of the currents of all equivalent controlled current sources at time k-1, and Δt is the simulation step size.

[0078] Through the above equivalent transformation, the time-varying matrix coefficients of the traditional solution (2) can be converted into a fixed constant matrix, thereby replacing the multiplication operation with the shift addition operation to avoid the call of the multiplier.

[0079] Among them, j sw (k-1) is the vector of currents of all equivalent controlled current sources at time k-1. Each equivalent controlled current source can be calculated to construct j sw (k-1), x(k-1), u(k-1) and j at time k-1 sw Substitute (k-1) into the above equation (10) to calculate the state vector x(k) at time k.

[0080] Specifically, the equivalent circuit topology can be analyzed to calculate each equivalent controlled current source. The specific analysis process is as follows.

[0081] According to Kirchhoff's law, for R on / R off Switch model, switch voltage v swa and v swb The switch voltage formula is also applicable to the voltage-controlled current source model when the condition of formula (8) is satisfied.

[0082]

[0083] Where R a and R b They are the equivalent resistances of the upper bridge arm and the lower bridge arm respectively. When the switch is turned on, the corresponding switch has an equivalent on-resistance R on , when the switch is turned off, the corresponding switch has an equivalent off resistance R off .

[0084] Substituting equation (11) into equation (3), we can obtain the controlled current source j swa and j swb The calculation formula is shown in formula (12):

[0085]

[0086] Where G swa and G swb Switch S a and S bEquivalent to the switch equivalent admittance of the voltage-controlled current source model.

[0087] From formula (5), we can see that if the switch is turned off, its controlled current source as well as is zero, so we only need to calculate the as well as As shown in formula (13):

[0088]

[0089] As shown in formula (13), the controlled current source in the on state is related to the resistance value of the other switch on the half-bridge arm, that is, it is related to the state of the other switch. With R b related, With R a Related, further analysis is needed.

[0090] for Figure 2 The half-bridge structure shown in the figure has only four switch state combinations of formula (14), and the half-bridge switch state combination is denoted as σ h , the four switching state combinations of the half bridge are σ h0 , σ h1 , σ h2 , σ h3 , corresponding to blocking mode, lower conduction mode, upper conduction mode and error mode respectively:

[0091]

[0092] When the upper tube S a When conducting, there are two possible modes, namely mode σ h2 and σ h3 , now manage S b When conducting, there are two possible modes, namely mode σ h1 , and σ h3 Therefore, we discuss Equation (13) in different cases and get the matrix-vector operation of Equation (15) as follows:

[0093]

[0094] Where, Switch S a and S b A controlled current source that conducts when the half-bridge is in different switching state combinations.

[0095] In fact, σ h3 The condition for existence is that the half-bridge input voltage v h<0, which is an error mode that does not normally exist, if the error mode is identified, the simulation will not be performed, and only the normal state of the system will be simulated, therefore, in the actual modeling process, only the calculation of and Then, formula (13) can be simplified to the form shown in formula (16).

[0096]

[0097] The equivalent condition of formula (8) is brought into formula (16), and formula (17) can be further obtained.

[0098]

[0099] Based on the above formula (17), the current of each equivalent controlled current source when the switch is turned on can be calculated, and when the switch is turned off, the current of the equivalent controlled current source is directly 0, thereby, the equivalent controlled current source of the half-bridge upper arm and the equivalent controlled current source of the half-bridge lower arm can be constructed

[0100] The x(k-1), u(k-1) and j sw (k-1) at the time of k-1 are substituted into the above formula (10) to solve the state vector at the time of k.

[0101] Further, in order to reduce the amount of calculation, an intermediate variable and are introduced, which are the current related quantities of the equivalent controlled current source of the half-bridge upper arm and the equivalent controlled current source of the half-bridge lower arm when the switch is turned on, and formula (17) is further transformed to obtain the following formula (18) and formula (19):

[0102]

[0103] Therefore, the variable and are introduced, which represent the current related quantities of the equivalent controlled current source of the half-bridge upper arm and the equivalent controlled current source of the half-bridge lower arm, respectively, when the switch S a is turned on is when the switch is turned off is 0. When the switch S b is turned on is when the switch is turned off is 0, and is updated according to the following formula (20) and formula (21):

[0104]

[0105] At this time, the formula (10) is adjusted in combination with the formula (18) to obtain the following optimized discrete system state equation of formula (22):

[0106]

[0107] In the formula, is a vector composed of current-related quantities of all equivalent controlled current sources at time k-1.

[0108] At this time, x(k-1), u(k-1) and The input formula (22) is calculated to obtain the state vector at time k.

[0109] Compared with the state equation of formula (17), the main improvement of formula (22) is that all controlled current sources and constitute the vector , while the state equation of formula (17) is to constitute the vector j swa and j swb . sw From the above analysis, the calculation amount of j sw is smaller than that of j h , so the formula (22) consumes less FPGA resources and has more advantages.

[0110] It can be seen that whether it is formula (17) or formula (22), the coefficient matrix [I+Δt·A1], ΔtA2, Δt·A3 or is a constant matrix and will not change with time. When updating the state equation formula (17) or (22), only the multiplication operation of variables and constants is involved (the elements in x and u are variables, and the elements in the coefficient matrix are constants), so all multiplications can be replaced by shift addition operation when writing code in FPGA.

[0111] In addition, updating formula (17) or updating formula (19) also only contains multiplication operation of variables (i h and v h ) and constants, so shift addition operation can also be used instead of multiplication operation when writing code in FPGA.

[0112] Since formula (17) or formula (19) needs to judge the switch state of the switch in advance, only when the switch is in the on state, formula (17) or formula (19) is used for calculation, otherwise, the current or current-related quantity of the equivalent controlled current source of the switch is directly taken as 0. For the judgment of the switch state, the conventional method can be used for judgment, wherein for the natural switch (such as diode) not controlled by the gate signal or the half-bridge gate signal g a (k)=0 and gb (k) = 0, the switch state combination update formula of the half bridge is shown in formula (23). For the gate signal g on the half bridge a (k) = 1 or g b When (k) = 1, the switch state combination update formula of the half bridge is shown in formula (24):

[0113]

[0114]

[0115] The multiplication in formula (23) is also the variable (i h With v h ) and constant (R on , R off In summary, all multiplication calculations in modeling can be replaced by shift and add operations.

[0116] The simulation process of the present invention is described below by taking equations (19) and (22) as examples.

[0117] like Figure 3 FIG. 1 is a flowchart of a method for simulating a power electronic converter according to an embodiment of the present invention, which includes the following steps:

[0118] Step S1: R on / R off The switch model is equivalent to a voltage-controlled current source model, and an equivalent discrete system state equation is constructed.

[0119] Specifically, the equivalent discrete system state equation can be in the form of equation (22) above, where the coefficient matrix All of them can be calculated based on the system topology.

[0120] Step S2: The input vector u(k-1) at the previous moment, the state vector x(k-1) at the previous moment, and the related quantity vector of the controlled current source at the previous moment are converted into Input the discrete system state equation and obtain the state vector x(k) at the current moment.

[0121] Step S3: Determine the switch state combination σ of each half bridge according to the current state vector x(k) h (k) and determine the controlled current source on each half bridge All controlled current sources Composition vector For simulation at time k+1.

[0122] Specifically, the controlled current source in the on-state is calculated in real time within this step And according to the half-bridge switch state combination σh (k) Thus, the controlled current source is determined Is a controlled current source in the selected conduction mode Or a controlled current source in shutdown mode Among them, all switches are controlled current sources are all zero. When updating all controlled current sources Then further set all controlled current sources Composing a controlled current source vector Used to update x(k+1) in the next simulation step. Return to step S2 at the start of the next simulation step.

[0123] Accordingly, the present invention also relates to a simulation system for a power electronic converter, comprising:

[0124] Input module, used to obtain the system parameters at time k-1 and input the equivalent discrete system state equation;

[0125] A calculation module, used to solve the discrete system state equation to obtain the state vector at time k;

[0126] The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to the equivalent off resistance R of the switch off , when the switch is in the off state, the equivalent controlled current source j sw The current of the equivalent controlled current source j is 0 when the switch is in the on state. sw Admittance Where R on is the equivalent on-resistance of the switch.

[0127] It can be understood that the above system can be used to implement the simulation method mentioned above, and each module therein can be used to implement the corresponding steps in the simulation method. For details, please refer to the above introduction and will not be repeated here.

[0128] Specifically, the system further includes an updating module for updating the system parameters at time k after obtaining the state vector at time k for simulation at time k+1.

[0129] Specifically, the simulation system is implemented by an FPGA chip.

[0130] In order to verify the practicability of the method proposed in the present invention, the present invention conducted offline simulation and real-time simulation of a dual active bridge (DAB) converter and compared the results with actual experiments. Figure 4 The simulated DAB converter includes an inductor L p 、An output capacitor C o , a load R o , a transformer with a transformation ratio of n:1. The primary side full bridge of the DAB converter model includes a first switch tube S1, a second switch tube S2, a third switch tube S3, and a fourth switch tube S4. The secondary side full bridge of the DAB converter model includes a fifth switch tube S5, a sixth switch tube S6, a seventh switch tube S7, and an eighth switch tube S8. i Lp is the current flowing through the inductor L p The current, u o is the output capacitor C o The voltage on in is the input DC voltage. g 1-4 For switch S 1-4 The gating signal, g 5-8 For switch S 5-8 The gate signal, the switching frequency is f s The control strategy of the model is single phase shift modulation, and the switching frequency is f s The frequency is 50kHz and the dead time is 200ns.

[0131] The circuit parameters of the DAB converter model are set as shown in the table:

[0132]

[0133] for Figure 4 For the DAB converter, the system state equation can be obtained by constructing the KVL equation of the inductor voltage and the KCL equation of the capacitor current.

[0134] The KVL and KCL equations are:

[0135]

[0136] Where, v sw2 , v sw4 , v sw5 , v sw7 are the switching voltages of switches S2, S4, S5, and S7 respectively. sw5 and j sw7 is the controlled current source of switches S5 and S7 updated by equation (5).

[0137] For the switching voltage to meet:

[0138]

[0139] where v sw1 , v sw3 , v sw6 , v sw8 are the switch voltages of switches S1, S3, S6, S8 respectively.j sw1 , j sw2 , j sw3 , j sw4 , j sw6 , j sw7 are the controlled current sources of switches S1, S2, S3, S4, S6, S7 updated by equation (5).

[0140] Substitute (26) and (27) into (25), we can get (28).

[0141]

[0142] Write equation (28) in matrix form, we can get the system state equation (29) of the DAB converter in continuous time domain according to the present application:

[0143]

[0144] Therefore, the A1, A2, A3 matrices in equation (22) are:

[0145]

[0146] A2=0 (31)

[0147]

[0148] Figure 5 The waveform comparison between the DAB converter model established by writing m language code in System generator software and the MATLAB / Simulink reference model is given. The model established according to the present application is recorded as "model", and the MATLAB / Simulink reference model is recorded as "reference". In order to ensure the modeling accuracy, fixed-point numbers are used to establish the model. The state variables, input variables and controlled current source variables all use 40-bit width, including 30-bit decimal, 9-bit integer and 1-bit sign bit. The model simulation step is 20 ns. Figure 5 The (a), (b), (c), (d) in (a), (b), (c), (d) respectively show the comparison of the inductor current i Lp , the comparison of the capacitor voltage v o , the absolute error of the inductor current i Lp and the absolute error of the capacitor voltage v o of the established model and the MATLAB / Simulink reference model. It can be seen from (a), (b), (c), (d) that the established model is consistent with the MATLAB / Simulink reference model. Figure 5It can be seen that the model built in the application achieves high precision compared with the MATLAB / Simulink reference model, and the absolute error of the inductor current i Lp and the capacitor voltage v o is less than 0.1 A and 1.569 V.

[0149] In order to further verify the reliability of the method proposed in the application, real-time simulation and physical experiment are compared and verified. The real-time simulation model of the DAB converter is established by writing Verilog code in the Vivado software. The real-time simulation platform of this experiment is composed of an Alinx AX7325B FPGA development board, the FPGA model is XC7K325TFFG900-2, which has 203800 lookup tables (LUTs), 840 DSP48 slices (DSP48s), 445 Block RAMs (BRAMs) and 407600 Flipflops. The digital signal generated by the FPGA is converted into an analog variable by the AD9767 digital-to-analog chip and displayed on the oscilloscope. The established DAB converter experimental platform, the model of the MOSFET S 1-8 is FF6MR12W2M1-B11, the transformer core material is ferrite EE50, and the circuit parameters refer to the circuit parameters of the DAB converter model given above.

[0150] Fig. 6(a) and Fig. 6(b) show the test waveforms of real-time simulation and physical experiment, including the inductor current i Lp and the absolute error of the inductor current i Lp . The simulation step can be as low as 20 ns, and the switching frequency is 50 kHz. It can be seen that the built model can normally run under the simulation step of 20 ns and the real-time simulation is consistent with the offline simulation, which verifies the reliability of the built model. The simulation step of 20 ns also far guarantees the oversampling requirement of the switching frequency of 50 kHz. The simulation waveform of Fig. 6(a) and the waveform of the physical experiment have high fitting degree, and it can be known from Fig. 6(b) that the maximum absolute error of the inductor current i Lp is less than 3 A. The built real-time simulation model can accurately simulate the behavior of the actual hardware circuit, so it can effectively verify the control algorithm.

[0151] The resource test results of the DAB converter real-time simulation model are shown in the following table:

[0152] Parameter Value Total amount of resources LUTs 3203(1.57％) 203800 DSP48s 0 840 BRAMs 0 445 Flipflops 121(0.03％) 407600

[0153] As can be seen from the table, the built DAB converter model has very low resource consumption and does not consume multipliers DSP48s. The most consumed is the LUTs resource, but the LUTs resource is abundant in the FPGA, so the method can significantly relieve the FPGA computing pressure, so that the FPGA has the ability to simulate larger scale power electronic converters.

[0154] In summary, the method of the present application can not only obtain high modeling accuracy as the switch model, but also because the equivalent system state equation is established, all multiplication operations can be replaced by shift addition operations, thereby greatly reducing the modeling calculation amount, so that the FPGA computing resource consumption is greatly reduced. At the same time, the built DAB converter model can also run normally under a simulation step of 20ns, which shows that the method can guarantee the oversampling of the gate signal at high switching frequency, and improves the computing efficiency of the FPGA. on / R off In summary, the method of the present application can not only obtain high modeling accuracy as the switch model, but also because the equivalent system state equation is established, all multiplication operations can be replaced by shift addition operations, thereby greatly reducing the modeling calculation amount, so that the FPGA computing resource consumption is greatly reduced. At the same time, the built DAB converter model can also run normally under a simulation step of 20ns, which shows that the method can guarantee the oversampling of the gate signal at high switching frequency, and improves the computing efficiency of the FPGA.

[0155] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described, but as long as the combinations of the technical features do not contradict, they should be considered within the scope of the present application. It should be noted that "in an embodiment of the present application", "for example", "such as" and the like are intended to illustrate the present application, but not to limit the present application.

[0156] The above-described embodiments only express several embodiments of the present application, which are described in detail and specifically, but should not be construed as limiting the scope of the patent application. It should be noted that for those skilled in the art, without departing from the concept of the present application, some modifications and improvements can be made, which are within the scope of the present application.

Claims

1. A simulation method for a power electronic converter, characterized in that: include: Get k -1 time and input the equivalent discrete system state equation to obtain k The state vector at the moment; the state vector is a vector composed of the inductor current and the capacitor voltage of the converter; The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects k The state vector at time k -1 time, the voltage-controlled current source model includes the equivalent resistance in parallel R sn and an equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current is 0, when the switch is in the on state, the equivalent controlled current source j sw Admittance , where R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch; The discrete system state equation is: Where, x( k )for k The state vector at the moment, x( k -1) k -1 time input vector, u( k -1) k The input vector at time -1, for k The vector of current-related quantities of all equivalent controlled current sources at time -1, is the simulation step size, A1, A2, and A3 are the constant matrices determined by constructing the Kirchhoff voltage equation for the inductor voltage of the converter and the Kirchhoff current equation for the capacitor current of the converter, respectively, and I is the unit matrix; Among them, the input state equation of the discrete system k -1 time system parameters include x( k -1)、u( k -1) and When the switch is in the off state, the current-related quantity of the corresponding equivalent controlled current source is 0. When the switch is in the on state, the current-related quantity of the equivalent controlled current source located in the upper arm of the half-bridge is and the current-related quantity of the equivalent controlled current source located in the lower arm of the half-bridge The calculation formula is as follows: Where, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

2. The method for simulating a power electronic converter according to claim 1, wherein: The discrete system state equation is: Where, x( k )for k The state vector at the moment, x( k -1) k -1 time input vector, u( k -1) k Input vector at time -1, j sw ( k -1) k The vector of currents of all equivalent controlled current sources at time -1, is the simulation step size, A1, A2, and A3 are the constant matrices determined by constructing the Kirchhoff voltage equation for the inductor voltage of the converter and the Kirchhoff current equation for the capacitor current of the converter, respectively, and I is the unit matrix; Among them, the input state equation of the discrete system k -1 time system parameters include x( k -1)、u( k -1) and j sw ( k -1); When the switch is in the on state, the equivalent controlled current source in the upper arm of the half bridge and the equivalent controlled current source in the lower arm of the half-bridge The calculation formula is as follows: Where, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

3. The simulation method of a power electronic converter according to claim 1, wherein: The equivalent off resistance R off In kΩ level, the equivalent on-resistance R on It is at the mΩ level.

4. The method for simulating a power electronic converter according to claim 1, wherein: In solving k After the state vector at time , based on k The state vector at time k Gating signal judgment at the moment k The status of each switch at all times, and then build and record based on the status of each switch k +1 time to be input into the discrete system state equation related to the system parameters of the equivalent controlled current source for k +1 moment of simulation.

5. The simulation method for a power electronic converter according to claim 1, wherein: The simulation method is implemented based on an FPGA chip, and shift addition operations are used in the FPGA chip to implement multiplication calculations in discrete system state equations.

6. The simulation method for a power electronic converter according to claim 1, wherein: The power electronic converter is any one of an LLC resonant converter, a series load resonant converter, a dual active bridge converter, and a three-phase inverter.

7. A simulation system for a power electronic converter, characterized in that: include: Input module, used to obtain k -1 time system parameters and input the equivalent discrete system state equation; The calculation module is used to solve the discrete system state equation to obtain k A state vector at time t, wherein the state vector is a vector composed of the inductor current and the capacitor voltage of the converter; The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects k The state vector at time k -1 time, the voltage-controlled current source model includes the equivalent resistance in parallel R sn and an equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current is 0, when the switch is in the on state, the equivalent controlled current source j sw Admittance , where R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch; The discrete system state equation is: Where, x( k )for k The state vector at the moment, x( k -1) k -1 time input vector, u( k -1) k The input vector at time -1, for k The vector of current-related quantities of all equivalent controlled current sources at time -1, is the simulation step size, A1, A2, and A3 are the constant matrices determined by constructing the Kirchhoff voltage equation for the inductor voltage of the converter and the Kirchhoff current equation for the capacitor current of the converter, respectively, and I is the unit matrix; Among them, the input state equation of the discrete system k -1 time system parameters include x( k -1)、u( k -1) and When the switch is in the off state, the current-related quantity of the corresponding equivalent controlled current source is 0. When the switch is in the on state, the current-related quantity of the equivalent controlled current source located in the upper arm of the half-bridge is and the current-related quantity of the equivalent controlled current source located in the lower arm of the half-bridge The calculation formula is as follows: Where, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

8. The simulation system for a power electronic converter according to claim 7, wherein: Also includes an update module for getting k The state vector at time t is updated k System parameters at this moment for use k +1 moment of simulation.

9. The simulation system for a power electronic converter according to claim 7 or 8, characterized in that: The simulation system is implemented by an FPGA chip, in which shift addition operations are used to implement multiplication calculations in discrete system state equations.

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