Epitaxial test piece, manufacturing method thereof and epitaxial growth test method
By forming inverse doped regions on the semiconductor substrate and performing epitaxial growth, the problem of high cost of epitaxial growth testing in the prior art is solved, and efficient thickness and resistivity testing is achieved.
Patent Information
- Application Number
- CN202510007186.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-02
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2045-01-02
AI Technical Summary
The prior art requires two semiconductor substrates with different doping concentrations in epitaxial growth tests, resulting in higher testing costs.
By inverting the first region of the semiconductor substrate to form a heavily doped region and epitaxially growing on the region and the second region, an epitaxial test sheet that can be used to test the epitaxial layer thickness and resistivity is obtained.
The epitaxial growth using a monolithic semiconductor substrate is achieved, which can not only measure the thickness of the epitaxial layer, but also measure its resistivity, significantly reducing the testing cost.
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Figure CN119812165A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial test piece and a manufacturing method thereof, and an epitaxial growth test method. Background Art
[0002] Epitaxial growth refers to the process of growing orderly arranged single crystal layers on a substrate. Epitaxial growth is widely used in semiconductor manufacturing, such as epitaxial silicon wafers in the integrated circuit industry.
[0003] Among them, monitoring the quality of epitaxial growth process is a very important issue.
[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention
[0005] In view of the problems in the prior art, the purpose of the present invention is to provide an epitaxial test piece and a method for manufacturing the same, and an epitaxial growth test method, which overcome the difficulties of the prior art and can reduce the cost of epitaxial growth testing.
[0006] A first aspect of the present disclosure provides a method for manufacturing an epitaxial test piece, comprising:
[0007] Providing a semiconductor substrate, wherein the semiconductor substrate contains a dopant substance and is divided into a first region and a second region;
[0008] Performing inversion doping in the first region to form an inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0009] After the first region is inversely doped, an epitaxial layer is formed by epitaxial growth on the inversely doped region and the second region to obtain an epitaxial test piece, wherein the epitaxial layer contains an inversely doped substance relative to the doped substance, and the inversely doped region is a heavily doped region compared to the epitaxial layer.
[0010] In some embodiments, the first region is subjected to inversion doping to form an inversion doped region, comprising:
[0011] forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer exposes the first region;
[0012] Using the patterned mask layer as a mask, an inversion doping material is implanted into the first region to form the inversion doping region, and then the patterned mask layer is removed.
[0013] In some embodiments, the patterned mask layer is a photoresist layer.
[0014] In some embodiments, the dopant in the semiconductor substrate is an N-type dopant, and the inversion doping region and the epitaxial layer contain a P-type dopant; or,
[0015] The doping material in the semiconductor substrate is a P-type doping material, and the inversion doping region and the epitaxial layer contain an N-type doping material.
[0016] In some embodiments, the doping concentration of the inversion doped region is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer.
[0017] In some embodiments, the first region is contiguous with the second region.
[0018] A second aspect of the present disclosure provides an epitaxial test piece, comprising:
[0019] A semiconductor substrate having a dopant substance contained in the semiconductor substrate, wherein the semiconductor substrate is divided into a first region and a second region;
[0020] An inversion doping region is formed in the first region, and the inversion doping region is a heavily doped region compared to the semiconductor substrate;
[0021] An epitaxial layer is formed on the inverse doping region and the second region, wherein the epitaxial layer contains an inverse doping substance relative to the doping substance, and the inverse doping region is a heavily doped region compared to the epitaxial layer.
[0022] In some embodiments, the doping concentration of the inversion doped region is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer.
[0023] A third aspect of the present disclosure provides an epitaxial growth testing method, which comprises:
[0024] Manufacturing an epitaxial test piece, the epitaxial test piece comprising a semiconductor substrate, the semiconductor substrate containing a doping substance, the semiconductor substrate being divided into a first region and a second region, an inversion doping region being formed in the first region, the inversion doping region being a heavily doped region compared to the semiconductor substrate, an epitaxial layer being formed on the inversion doping region and the second region, the epitaxial layer containing an inversion doping substance relative to the doping substance, the inversion doping region being a heavily doped region compared to the epitaxial layer;
[0025] measuring the thickness of the epitaxial layer portion on the first region using a thickness measuring instrument;
[0026] The resistivity of the epitaxial layer on the second region is measured by using a resistivity measurement tool.
[0027] In some embodiments, the step of making an epitaxial test piece includes:
[0028] Providing the semiconductor substrate and performing inversion doping in the first region to form the inversion doping region, wherein the inversion doping region is a heavily doped region compared to the semiconductor substrate;
[0029] After the first region is inversely doped, the epitaxial layer is formed by epitaxial growth on the inversely doped region and the second region to obtain the epitaxial test piece.
[0030] In this embodiment, before epitaxial growth, the first region in the semiconductor substrate is heavily doped to form the above-mentioned inversion doped region, and the inversion doped region is a heavily doped region compared to the second region in the semiconductor substrate and the epitaxial layer, so the semiconductor substrate includes a heavily doped region relative to the epitaxial layer and a lightly doped region relative to the heavily doped region. In this way, after epitaxial growth, for the position of the heavily doped region in the semiconductor substrate, the thickness of the epitaxial layer can be measured, and for the position of the lightly doped region in the semiconductor substrate, the resistivity of the epitaxial layer can be measured.
[0031] Therefore, by using the epitaxial test piece manufacturing method of the present embodiment, using the single semiconductor substrate, and performing one epitaxial growth, an epitaxial test piece for testing the thickness and resistivity of the epitaxial layer can be obtained, which reduces product cost and process cost, and further reduces testing cost.
[0032] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Other features, objectives and advantages of the present invention will become more apparent from a reading of the detailed description of non-limiting embodiments made with reference to the following accompanying drawings.
[0034] Figure 1 It is a flow chart of the method for manufacturing an epitaxial test piece provided in an embodiment of the present disclosure.
[0035] Figure 2-Figure 7 yes Figure 1 The structure diagram of the epitaxial test piece at various stages of the manufacturing process is shown.
[0036] Figure 8 A flow chart showing the epitaxial growth testing method provided by an embodiment of the present disclosure.
[0037] Fig. 9 Demonstration of use Figure 7 The schematic diagram of the principle of measuring the thickness and resistivity of the epitaxial layer of the epitaxial test piece shown. DETAILED DESCRIPTION
[0038] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the disclosure will be more comprehensive and complete and to fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
[0039] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.
[0040] In addition, the concepts such as "first" and "second" mentioned in the present disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.
[0041] In the related art, epitaxial growth testing includes measuring the thickness and resistivity of the epitaxial layer, and these two measurement parameters are related to the doping concentration in the epitaxial layer. Among them, for the measurement of the thickness of the epitaxial layer, a heavily doped semiconductor substrate relative to the epitaxial layer is used, so that due to the difference in doping concentration, the thickness measurement based on the light reflection mechanism can be achieved. For the measurement of the resistivity of the epitaxial layer, a lightly doped semiconductor substrate relative to the epitaxial layer is used.
[0042] Therefore, during epitaxial growth testing, the prior art uses two semiconductor substrates with different doping concentrations to perform thickness measurement and resistivity measurement respectively, which undoubtedly increases the testing cost.
[0043] In order to solve the cost problem existing in the prior art, the disclosed embodiment proposes a technical solution for reducing the cost of epitaxial growth testing.
[0044] like Figure 1 As shown, the embodiment of the present disclosure provides a method for manufacturing an epitaxial test piece, which includes but is not limited to the following steps:
[0045] Step 110: providing a semiconductor substrate, wherein the semiconductor substrate contains a dopant, and the semiconductor substrate is divided into a first region and a second region;
[0046] Step 120: performing inversion doping in the first region to form an inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate;
[0047] Step 130: After the first region is inversely doped, epitaxial growth is performed on the inversely doped region and the second region to form an epitaxial layer to obtain an epitaxial test piece, wherein the epitaxial layer contains an inversely doped substance relative to the doped substance, and the inversely doped region is a heavily doped region compared to the epitaxial layer.
[0048] In this embodiment, before epitaxial growth, the first region in the semiconductor substrate is heavily doped to form the above-mentioned inversion doped region, and the inversion doped region is a heavily doped region compared to the second region in the semiconductor substrate, so the semiconductor substrate includes a heavily doped region and a lightly doped region relative to the heavily doped region. In this way, after epitaxial growth, for the position of the heavily doped region in the semiconductor substrate, the thickness of the epitaxial layer can be measured, and for the position of the lightly doped region in the semiconductor substrate, the resistivity of the epitaxial layer can be measured.
[0049] Therefore, by using the epitaxial test piece manufacturing method of the present embodiment, using the single semiconductor substrate, and performing one epitaxial growth, an epitaxial test piece for testing the thickness and resistivity of the epitaxial layer can be obtained, which reduces product cost and process cost, and further reduces testing cost.
[0050] Below, detailed description Figure 1 The structure of the epitaxial test piece at various stages in the production process is shown.
[0051] like Figure 2 As shown, a semiconductor substrate 1 is provided.
[0052] In the embodiment of the present disclosure, the semiconductor substrate 1 provides a process operation basis for subsequent processes.
[0053] Optionally, the semiconductor substrate 1 may be a third generation wide bandgap semiconductor material such as silicon carbide or gallium nitride. In other embodiments, the material of the semiconductor substrate 1 may also be other materials such as silicon, germanium, silicon germanium, gallium arsenide or indium gallium, and the semiconductor substrate 1 may also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator. The material of the semiconductor substrate 1 may be a material suitable for process requirements or easy to integrate.
[0054] Doping material is formed in the semiconductor substrate 1. When the doping material is N-type, the semiconductor substrate 1 is an N-type semiconductor substrate. When the doping material is P-type, the semiconductor substrate 1 is a P-type semiconductor substrate.
[0055] Among them, the N-type doping material is a small amount of pentavalent element impurities, such as phosphorus, antimony and / or arsenic. At this time, since the pure semiconductor atoms (such as silicon atoms) before doping are replaced by the above-mentioned N-type atoms, the pentavalent element impurities (taking phosphorus as an example) interact with the pure semiconductor atoms, and four of the five outer electrons of the phosphorus atoms form covalent bonds with the surrounding semiconductor atoms, and the extra electron is almost unbound and is easier to become a free electron. As a result, the N-type semiconductor substrate becomes a semiconductor substrate with a higher concentration of free electrons, and its conductivity is mainly due to the conduction of free electrons.
[0056] Among them, the P-type doping material is a small amount of trivalent element impurities, such as boron, aluminum, gallium and / or indium. Since the semiconductor atoms (such as silicon atoms) in the semiconductor substrate 1 are replaced by impurity atoms, the impurities of the trivalent elements (boron as an example) will react with the pure semiconductor. When the three outer electrons of the boron atom form covalent bonds with the surrounding semiconductor atoms, a "hole" (electric hole) will be generated. This hole may attract bound electrons to "fill" and make the boron atom a negatively charged ion. In this way, the semiconductor substrate 1 becomes a semiconductor substrate that can conduct electricity because it contains a higher concentration of "holes" ("equivalent" to positive charges).
[0057] In this embodiment, the combination Figure 3 As shown in the top view, the semiconductor substrate 1 is divided into a first region s1 and a second region s2, wherein the first region s1 will be used as a thickness measurement region of a subsequent epitaxial layer, and the second region s2 will be used as a resistivity measurement region of a subsequent epitaxial layer.
[0058] exist Figure 3 In the example, the first area s1 and the second area s2 are adjacent to each other. This is an example. In another example, s1 and s2 may not be adjacent to each other. Figure 3 The first region s1 and the second region s2 in the figure are represented by different shapes, which is for the purpose of distinction and does not constitute a limitation on the shapes of the corresponding regions.
[0059] In addition, a plurality of groups of first regions s1 and second regions s2 are formed in the semiconductor substrate 1 , and the specific number thereof can be set according to actual test requirements, for example, one group or more groups.
[0060] like Figure 4 As shown, a patterned mask layer 2 is formed on a semiconductor substrate 1 , and the patterned mask layer 2 exposes a first region s1 .
[0061] In this embodiment, the patterned mask layer 2 is a photoresist layer. Photoresist (English: photoresist), also known as photoresist or photoresist, refers to an etching-resistant thin film material whose solubility changes after being irradiated or radiated by ultraviolet light, deep ultraviolet light, electron beam, ion beam, X-ray, etc., and is a key material in the photolithography process.
[0062] When a photoresist layer is used, the patterned mask layer 2 is made using exposure and development techniques. Specifically, a photoresist layer is laid on the semiconductor substrate 1, and then the photoresist layer in the first area s1 is exposed, and after exposure, it is placed in a developer so that the photoresist layer in the exposed area is partially dissolved to form a window exposing the first area s1. This method is applicable to positive photoresists.
[0063] In another embodiment, if a negative photoresist is used, the portion of the photoresist layer outside the first area s1 is exposed and placed in a corresponding developer after exposure, so that the portion of the photoresist at the position of the first area s1 outside the exposure area is dissolved to form a window exposing the first area s1.
[0064] like Figure 5 As shown, the patterned mask layer 2 is used as a mask to implant an inversion doping material into the first region s1 to form an inversion doping region s3 . The inversion doping region s3 is a heavily doped region compared to the semiconductor substrate 1 .
[0065] In this embodiment, an ion implantation process is used to implant an anti-type dopant in the first region s1. The anti-type dopant here refers to the dopant in the semiconductor substrate 1. When the semiconductor substrate 1 has an N-type dopant, the anti-type dopant is a P-type dopant. When the semiconductor substrate 1 has a P-type dopant, the anti-type dopant is an N-type dopant.
[0066] Ion implantation is a doping process that utilizes a high-energy charged ion beam to forcibly implant the above-mentioned inversion doping material into the semiconductor substrate 1. Using the ion implantation process, the inversion doping material can be conveniently delivered below the substrate surface, for example, to at least a portion of the depth in the semiconductor substrate 1. The present embodiment does not impose any particular limitation on the depth of the inversion doping region s3, which can be selected as required.
[0067] In another embodiment, the inversion dopant material may be doped by diffusion.
[0068] like Figure 6 As shown, the patterned mask layer 2 (as shown in Figure 5 As shown), an inversion doping region s3 is finally formed in the semiconductor substrate 1. The inversion doping region s3 is a heavily doped region relative to the semiconductor substrate 1.
[0069] In another embodiment, the patterned mask layer uses other materials, such as a hard mask material.
[0070] like Figure 7As shown, an epitaxial layer 3 is formed by epitaxial growth on the inverse doping region s3 and the second region s2 to obtain an epitaxial test piece 10, wherein the epitaxial layer 3 has an inverse doping substance relative to the doping substance in the semiconductor substrate 1, and the inverse doping region s3 is a heavily doped region compared to the epitaxial layer 3. At this time, the second region s2 of the semiconductor substrate 1 and the epitaxial layer 3 are both lightly doped regions, or the doping concentration of the second region s2 is not much different from that of the epitaxial layer 3.
[0071] Thus, the portion of the epitaxial layer above the inversion doped region s3 is used to measure the thickness, and the portion of the epitaxial layer above the second region s2 is used to measure the resistivity.
[0072] In integrated circuit manufacturing, epitaxial growth methods include solid phase epitaxy and vapor phase epitaxy. Solid phase epitaxy refers to the growth of a single crystal layer on a substrate using a solid source. For example, thermal annealing after ion implantation is actually a solid phase epitaxial process.
[0073] The growth methods of vapor phase epitaxy include chemical vapor epitaxy (CVE), molecular beam epitaxy (MBE), atomic layer epitaxy (ALE), etc. The principles of CVD and chemical vapor deposition (CVD) are basically the same, and both utilize gas mixture to produce a chemical reaction on the surface of the semiconductor substrate 1 to deposit a thin film.
[0074] The embodiments of the present disclosure do not limit the specific method of epitaxial growth, and a method is selected according to specific epitaxial growth test requirements.
[0075] In one embodiment, the doping concentration of the inversion doping region s3 is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer 3. A Fourier infrared film thickness meter is used in the thickness measurement process. It is a device that uses infrared technology to measure film thickness, and measures the thickness of the epitaxial layer 3 by measuring the transmittance of infrared light. Therefore, since the doping concentration of the inversion doping region s3 is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer 3, the infrared light can pass through the epitaxial layer 3 and form a reflection on the surface of the inversion doping region s3, and the reflected light is then transmitted from the epitaxial layer 3, so that the thickness of the epitaxial layer 3 can be measured by measuring the transmittance of infrared light.
[0076] In this embodiment, an epitaxial layer 3 is generated on a single semiconductor substrate 1 through a one-time epitaxial growth. Since an inversion doped region s3 serving as a heavily doped region is formed in advance inside the semiconductor substrate 1, thickness measurement and resistivity measurement can be completed by relying on the one-time epitaxial growth and the epitaxial layer 3 formed therefrom, thereby effectively reducing product cost and process cost.
[0077] The present disclosure also provides an epitaxial test piece, the structure of which can be as follows: Figure 7 As shown, it includes:
[0078] A semiconductor substrate 1, wherein the semiconductor substrate 1 contains a dopant, and the semiconductor substrate 1 is divided into a first region s1 and a second region s2;
[0079] An inversion doping region s3 is formed in the first region s1, and the inversion doping region s3 is a heavily doped region compared to the semiconductor substrate 1;
[0080] An epitaxial layer 3 is formed on the inversion doping region s3 and the second region s2 . The epitaxial layer 3 contains an inversion doping substance relative to the doping substance. The inversion doping region s3 is a heavily doped region compared to the epitaxial layer 3 .
[0081] Figure 7 The epitaxial test piece shown was grown using Figure 1 In another embodiment, the ground can also be prepared by other feasible methods. Figure 7 The epitaxial test piece shown.
[0082] In the embodiments of the present disclosure, Figure 7 The epitaxial test piece shown can be subsequently transferred to a corresponding epitaxial test device for epitaxial growth testing. In another embodiment, the epitaxial test piece can also be produced in real time during the epitaxial growth test.
[0083] like Figure 8 As shown, the epitaxial growth test method includes the following steps:
[0084] Step 810: manufacturing an epitaxial test piece, the epitaxial test piece comprising a semiconductor substrate, the semiconductor substrate containing a dopant, the semiconductor substrate being divided into a first region and a second region, an inversion doping region being formed in the first region, the inversion doping region being a heavily doped region compared to the semiconductor substrate, an epitaxial layer being formed on the inversion doping region and the second region, the epitaxial layer containing an inversion doping substance relative to the dopant, the inversion doping region being a heavily doped region compared to the epitaxial layer;
[0085] Step 820: using a thickness measuring instrument to measure the thickness of the epitaxial layer portion on the first region;
[0086] Step 830: Use a resistivity measurement tool to measure the resistivity of the epitaxial layer portion on the second region.
[0087] Using the epitaxial growth test method of the present embodiment, only one semiconductor substrate is needed and one epitaxial growth is performed to complete two test options, thereby significantly reducing product cost and process cost.
[0088] like Fig. 9 The direction of the arrow shown corresponds to the position of the inverse doping region s3. The thickness measuring instrument is controlled to emit infrared light, which is reflected on the surface of the epitaxial layer 3 and refracted into the epitaxial layer 3. The refracted light is reflected at the interface between the epitaxial layer 3 and the inverse doping region s3, and the reflected light passes through the epitaxial layer 3. Since the doping concentrations of the inverse doping region s3 and the epitaxial layer 3 in the semiconductor substrate 1 are different, the two have different refractive indices. Therefore, the reflection spectrum finally captured will show continuous interference fringes reflecting the thickness information of the epitaxial layer 3. When the optical path difference between the light beam reflected from the surface of the epitaxial layer 3 and the light beam reflected from the interface of the inverse doping region s3 is an integer multiple of half a wavelength, the maximum and minimum values can be observed in the final reflection spectrum. The thickness of the corresponding epitaxial layer 3 can be calculated based on the extreme peak position of the interference fringes in the reflection spectrum, the optical constant and the incident angle.
[0089] like Fig. 9 As shown, the resistivity measuring machine 9 may be a four-probe resistivity tester, or other resistivity testers may be used.
[0090] In an optional implementation, the method for making an epitaxial test piece specifically includes the following steps:
[0091] Providing the semiconductor substrate and performing inversion doping in the first region to form the inversion doping region, wherein the inversion doping region is a heavily doped region compared to the semiconductor substrate;
[0092] After the first region is inversely doped, the epitaxial layer is formed by epitaxial growth on the inversely doped region and the second region to obtain the epitaxial test piece.
[0093] The method of making epitaxial test pieces can be referred to Figure 1 The specific implementation methods thereof will not be described in detail here.
[0094] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure, which follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.
Claims
1. A method for manufacturing an epitaxial test piece, characterized in that: include: Providing a semiconductor substrate, wherein the semiconductor substrate contains a dopant substance and is divided into a first region and a second region; Performing inversion doping in the first region to form an inversion doped region, wherein the inversion doped region is a heavily doped region compared to the semiconductor substrate; After the first region is inversely doped, an epitaxial layer is formed by epitaxial growth on the inversely doped region and the second region to obtain an epitaxial test piece, wherein the epitaxial layer contains an inversely doped substance relative to the doped substance, and the inversely doped region is a heavily doped region compared to the epitaxial layer.
2. The epitaxial test piece manufacturing method according to claim 1, characterized in that: The first region is subjected to inversion doping to form an inversion doped region, comprising: forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer exposes the first region; Using the patterned mask layer as a mask, an inversion doping material is implanted into the first region to form the inversion doping region, and then the patterned mask layer is removed.
3. The epitaxial test piece manufacturing method according to claim 2, characterized in that: The patterned mask layer is a photoresist layer.
4. The epitaxial test piece manufacturing method according to claim 1, characterized in that: The doping material in the semiconductor substrate is an N-type doping material, and the inversion doping region and the epitaxial layer contain a P-type doping material; or, The doping material in the semiconductor substrate is a P-type doping material, and the inversion doping region and the epitaxial layer contain an N-type doping material.
5. The epitaxial test piece manufacturing method according to claim 1, characterized in that: The doping concentration of the inversion doping region is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer.
6. The epitaxial test piece manufacturing method according to claim 1, characterized in that: The first region is adjacent to the second region.
7. An epitaxial test piece, characterized in that: include: A semiconductor substrate having a dopant substance contained in the semiconductor substrate, wherein the semiconductor substrate is divided into a first region and a second region; An inversion doping region is formed in the first region, and the inversion doping region is a heavily doped region compared to the semiconductor substrate; An epitaxial layer is formed on the inverse doping region and the second region, wherein the epitaxial layer contains an inverse doping substance relative to the doping substance, and the inverse doping region is a heavily doped region compared to the epitaxial layer.
8. The epitaxial test piece according to claim 7, characterized in that: The doping concentration of the inversion doping region is at least 2 orders of magnitude higher than the doping concentration of the epitaxial layer.
9. An epitaxial growth test method, characterized in that: include: Manufacturing an epitaxial test piece, the epitaxial test piece comprising a semiconductor substrate, the semiconductor substrate containing a doping substance, the semiconductor substrate being divided into a first region and a second region, an inversion doping region being formed in the first region, the inversion doping region being a heavily doped region compared to the semiconductor substrate, an epitaxial layer being formed on the inversion doping region and the second region, the epitaxial layer containing an inversion doping substance relative to the doping substance, the inversion doping region being a heavily doped region compared to the epitaxial layer; measuring the thickness of the epitaxial layer portion on the first region using a thickness measuring instrument; The resistivity of the epitaxial layer on the second region is measured by using a resistivity measurement tool.
10. The epitaxial growth test method according to claim 9, characterized in that: The method of making an epitaxial test piece comprises: Providing the semiconductor substrate and performing inversion doping in the first region to form the inversion doping region, wherein the inversion doping region is a heavily doped region compared to the semiconductor substrate; After the first region is inversely doped, the epitaxial layer is formed by epitaxial growth on the inversely doped region and the second region to obtain the epitaxial test piece.
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