Preparation method of high-conductivity crystalline silicon nanowire array and temperature sensing application of high-conductivity crystalline silicon nanowire array
By preparing guide grooves and catalysts on a flexible film substrate, combined with hydrogen plasma treatment and the use of PECVD equipment, the problem of high cost and incompatible flexible substrates in the prior art is solved, and a high conductivity and easy-to-integrate nanowire array is realized for the preparation of high-sensitivity and low-cost temperature sensing units.
Patent Information
- Application Number
- CN202411933426.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-15
AI Technical Summary
The prior art requires high-precision lithography equipment when preparing highly conductive crystalline silicon nanowires, which are expensive and difficult to directly prepare nanowires on flexible thin film substrates. The nanowire structures in the traditional growth mode are incompatible with planar device processes.
Highly conductive crystalline silicon nanowire arrays were obtained by preparing guide trenches and catalyst metal strips on the surface of the silicon oxide wafer or flexible substrate, deposition of amorphous silicon using hydrogen plasma treatment and PECVD equipment, and subsequently by hydrogen plasma etching and low-temperature thermal annealing.
Directly prepared directional high-density integrated crystalline silicon nanowires on flexible film substrates, reducing the production cost. The nanowires have excellent electrical characteristics and are easy to integrate. The formed temperature sensing unit has the advantages of small size, high sensitivity, low cost and easy to integrate in large areas.
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Figure CN119822319A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the preparation of semiconductor nanomaterials and their applications in the field of sensing, and in particular to a preparation method of a highly conductive crystalline silicon nanowire array and its temperature sensing application. Background Art
[0002] Real-time temperature detection is of great significance in many fields such as industrial production, environmental monitoring, medical health, scientific research, etc. Although various inorganic and organic thermosensitive conductive materials (such as carbon materials, silver nanowire films, ion conductive hydrogels, etc.) have been widely studied as core components of real-time temperature monitoring sensors. However, the sensor devices developed based on these materials often have shortcomings such as large size, low temperature coefficient, and poor stability, which brings challenges to device integration and achieving high spatial resolution. Therefore, current research focuses on the development of temperature sensing units with micro-distributed sensors to achieve excellent sensitivity, fast response time, and stable and accurate response to temperature changes.
[0003] One-dimensional crystalline silicon nanowires have electrical properties far exceeding those of bulk materials due to their small size and high surface area to volume ratio, and are compatible with silicon-based integration processes. They are considered to be one of the ideal candidate materials for the next generation of micro-ultrasensitive sensors. More importantly, the conductivity and temperature sensing properties of silicon materials can be precisely controlled by doping concentration (Solid-state electronics 1978, 21(7), 969-974; Nano Research 2019, 12(11), 2723-2728; 20116th IEEE International Conference on Nano / Micro Engineered and Molecular Systems, IEEE: 2011; pp 630-633.). Therefore, the use of "top-down" etching or "bottom-up" growth methods combined with various doping processes to obtain highly conductive crystalline silicon nanowires has been used to prepare temperature sensor devices.
[0004] However, the inventors of the present application have found that the above technology has at least the following technical problems: "Top-down" etching requires the use of high-precision lithography equipment, which is costly. At the same time, the method of preparing crystalline silicon nanowires depends on the crystalline silicon substrate, and it is impossible to directly prepare nanowires on a flexible film substrate. On the other hand, although the growth mode of preparing crystalline silicon nanowires does not depend on the crystalline silicon substrate, the crystalline silicon nanowires grown in the traditional "gas-liquid-solid" mode are mostly vertical structures, which are difficult to be compatible with planar device processes. In application, it not only requires a complex transfer process, but also makes it difficult to achieve precise positioning on the plane.
[0005] Therefore, developing a highly conductive crystalline silicon nanowire array that can be precisely positioned and integrated is of great significance for the development of new micro-temperature sensors with high spatial resolution. Summary of the invention
[0006] In view of the above problems, the present application provides a method for preparing a highly conductive crystalline silicon nanowire array, comprising the following steps: Step 1: preparing a guide groove on the surface of a silicon oxide wafer or a flexible substrate by photolithography and etching, and then preparing a catalyst metal strip at the end of the guide groove by photolithography and evaporation; Step 2: In a PECVD device, the catalyst metal is reduced into droplets by hydrogen plasma treatment, amorphous silicon is subsequently deposited, and a crystalline silicon nanowire array is grown by heating and annealing in a vacuum; Step 3: Etch the residual amorphous silicon using hydrogen plasma, and dehydrogenate it by low-temperature thermal annealing at 450° C. to obtain a highly conductive crystalline silicon nanowire array.
[0007] Preferably, the substrate in step 1 is a silicon oxide wafer or a flexible polymer film.
[0008] Preferably, the guide groove in step 1 is in a straight line or a wavy line.
[0009] Preferably, the amorphous silicon deposited in step 2 is an intrinsic amorphous silicon layer, a p-type amorphous silicon layer or an n-type amorphous silicon layer.
[0010] The present invention also provides a micro temperature sensor device, characterized in that it includes a crystalline silicon nanowire array prepared on a silicon oxide wafer or a flexible substrate and metal electrodes prepared at both ends of the crystalline silicon nanowire array, wherein the crystalline silicon nanowire array is a defective crystalline silicon nanowire array that has been subjected to hydrogen plasma etching and low-temperature annealing treatment for dehydrogenation.
[0011] The present invention also provides a method for preparing a micro temperature sensor device, which is characterized by comprising the following steps: Step a, preparing a guide groove on the surface of a silicon oxide wafer or a flexible substrate by photolithography and etching, and then preparing a catalyst metal strip at the end of the guide groove by photolithography and evaporation; Step b: In a PECVD device, using hydrogen plasma treatment to reduce the catalyst metal into droplets, then depositing amorphous silicon, and heating and annealing in a vacuum to grow a crystalline silicon nanowire array; Step c, etching the residual amorphous silicon using hydrogen plasma, and dehydrogenating the amorphous silicon by low-temperature thermal annealing at 450° C. to obtain a highly conductive crystalline silicon nanowire array; Step d, using photolithography and lift-off processes to prepare metal electrodes at both ends of the nanowires of the high-conductivity crystalline silicon nanowire array to obtain a spatially resolvable micro-temperature sensing unit array; Step e: Connect the micro temperature sensing unit array to the test circuit by wire bonding.
[0012] The present invention also provides an application of the above-mentioned micro-temperature sensor device, which is characterized by being used for wearable temperature sensing equipment or environmental temperature change detection.
[0013] The technical solution provided by this application has at least the following technical effects or advantages: Compared with the traditional "top-down" method, this method does not require high-precision lithography equipment and can directly prepare directional high-density integrated crystalline silicon nanowires on a flexible thin film substrate.
[0014] The highly conductive crystalline silicon nanowires prepared by the present invention have excellent electrical properties, precise and controllable morphology and position, and are easy to integrate. The preparation temperature is low and no additional doping process is required. The formed temperature sensing unit has the advantages of small size, high sensitivity, low cost and easy large-area integration.
[0015] Third, compared with the VLS growth method, this method can directly and precisely grow horizontal nanowires on a plane without the need for a complicated transfer process.
[0016] Fourth, this method breaks the silicon-hydrogen bonds formed by hydrogen etching and annealing processes, introduces a large number of defect states, and can achieve highly conductive crystalline silicon nanowires without the need for additional doping processes.
[0017] 5. The spatially resolvable temperature sensor array prepared by this method has a high integration density and can achieve real-time temperature detection and high spatial resolution. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 This is a flow chart of the preparation of the highly conductive crystalline silicon nanowire array in Example 1 of the present invention.
[0019] Figure 2 This is a diagram of the electrical performance of the high-conductivity crystalline silicon nanowire array in Example 1 of the present invention.
[0020] Figure 3 This is a real-time temperature detection curve of the temperature sensing unit in Example 1 of the present invention.
[0021] Figure 4 4 is a flow chart of the preparation of a spatially resolvable temperature sensor array in Example 2 of the present invention.
[0022] Figure 5 This is a physical picture of the spatially resolvable temperature sensor array in Example 2 of the present invention.
[0023] Figure 6 This is an application diagram of a spatially resolvable temperature sensor array in Example 2 of the present invention. DETAILED DESCRIPTION
[0024] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods. Example
[0025] like Figure 1 As shown: This embodiment provides a method for preparing a high-conductivity crystalline silicon nanowire array and its temperature sensing application, and the steps are as follows: Step a: prepare a guide groove with a depth of 180 nm on the surface of a silicon oxide wafer or a polyimide film substrate by photolithography and etching, and then prepare a 30 nm thick catalytic metal indium strip at the end of the guide groove by photolithography and evaporation. Figure 1 a and Figure 1 As shown in b; Step b: In a plasma enhanced chemical vapor deposition (PECVD) device, the catalyst metal is reduced to droplets by hydrogen plasma treatment for 8 minutes, and then amorphous silicon is deposited for 7 minutes, and then heated and annealed at 300° C. in vacuum to grow a crystalline silicon nanowire array. Figure 1 c and Figure 1 As shown in d; Step c: using hydrogen plasma etching for 15 min to remove the residual amorphous silicon, and then performing dehydrogenation by thermal annealing at 450° C. to obtain a highly conductive crystalline silicon nanowire array, such as Figure 1 As shown in e; Step d: Using photolithography and lift-off process, 5 nm platinum and 45 nm gold thin film electrodes are prepared at both ends of the above nanowire array to obtain a micro temperature sensing unit, such as Figure 1 f.
[0026] Step e: Connect the micro temperature sensing unit to the test circuit by wire bonding, apply a fixed bias voltage to both ends of the sensor, and place the device in different temperature environments to monitor changes in device current caused by temperature changes.
[0027] The highly conductive crystalline silicon nanowires of this embodiment have excellent electrical properties. Their high conductivity can be achieved by introducing high conductivity defects through hydrogen etching and subsequent thermal annealing treatment to dehydrogenate, which greatly improves the conductivity of the nanowires without the need for additional doping processes, such as Figure 2 As shown. At the same time, the high-conductivity crystalline silicon nanowires prepared by the present invention have precise controllable morphology and position, are easy to integrate, and have a low preparation temperature. They can be directly prepared on a flexible polymer film substrate, and a wearable temperature sensor can be prepared based on them. In addition, the temperature sensor prepared by the temperature sensing unit in this embodiment has the advantages of small size, high sensitivity, low cost, and easy large-area integration, and can detect ambient temperature changes in real time, quickly, and accurately, such as Figure 3 shown. Example
[0028] like Figure 4 As shown: The preparation method of the crystalline silicon nanowire array in this embodiment is the same as that in embodiment 1, except that: This embodiment takes advantage of the ease of integration of highly conductive crystalline silicon nanowires, and uses photolithography and lift-off processes to prepare 5 nm platinum and 45 nm gold thin film electrodes at both ends of the prepared directional high-density integrated highly conductive nanowire array to prepare a spatially resolvable temperature sensor array, such as Figure 4 and Figure 5 Finally, by connecting each sensor to the test circuit simultaneously through wire bonding, applying a fixed bias voltage at both ends of each sensor, and placing the temperature sensor array in different temperature environments, the change in device current caused by temperature changes can be monitored and high-resolution detection of temperature changes can be achieved in space, thereby confirming the location of the heat source. Figure 6 As shown, the three sensors are at different distances from the heat source and detect different temperatures, so the location of the heat source can be distinguished through the three sensor arrays.
[0029] The above description is only a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements without departing from the principle of the present invention. These improvements should also be regarded as within the scope of protection of the present invention.
Claims
1. A method for preparing a highly conductive crystalline silicon nanowire array, characterized in that: The following steps are involved: Step 1: preparing a guide groove on the surface of a silicon oxide wafer or a flexible substrate by photolithography and etching, and then preparing a catalyst metal strip at the end of the guide groove by photolithography and evaporation; Step 2: In a PECVD device, the catalyst metal is reduced into droplets by hydrogen plasma treatment, amorphous silicon is subsequently deposited, and a crystalline silicon nanowire array is grown by heating and annealing in a vacuum; Step 3: Etch the residual amorphous silicon using hydrogen plasma, and dehydrogenate it by low-temperature thermal annealing at 450° C. to obtain a directional high-conductivity crystalline silicon nanowire array.
2. The method for preparing a highly conductive crystalline silicon nanowire array according to claim 1, wherein: The substrate in step 1 is a silicon oxide wafer or a flexible polymer film.
3. The method for preparing positionable high-conductivity crystalline silicon nanowires according to claim 1, characterized in that: The guide groove in step 1 is in a straight line or a wavy line.
4. The method for preparing positionable high-conductivity crystalline silicon nanowires according to claim 1, characterized in that: The amorphous silicon deposited in step 2 is an intrinsic amorphous silicon layer, a p-type amorphous silicon layer or an n-type amorphous silicon layer.
5. An application of the high-conductivity crystalline silicon nanowire array according to any one of claims 1 to 4, characterized in that: Used in miniature temperature sensing devices.
6. A micro temperature sensor device, characterized in that , including a crystalline silicon nanowire array prepared on a silicon oxide wafer or a flexible substrate and metal electrodes prepared at both ends of the crystalline silicon nanowire array, wherein the crystalline silicon nanowire array is a defective crystalline silicon nanowire array that has been subjected to hydrogen plasma etching and low-temperature annealing treatment for dehydrogenation.
7. A method for preparing a micro temperature sensor device, characterized in that , including the following steps: Step a, preparing a guide groove on the surface of a silicon oxide wafer or a flexible substrate by photolithography and etching, and then preparing a catalyst metal strip at the end of the guide groove by photolithography and evaporation; Step b: In a PECVD device, using hydrogen plasma treatment to reduce the catalyst metal into droplets, then depositing amorphous silicon, and heating and annealing in a vacuum to grow a crystalline silicon nanowire array; Step c, etching the residual amorphous silicon using hydrogen plasma, and dehydrogenating the amorphous silicon by low-temperature thermal annealing at 450° C. to obtain a highly conductive crystalline silicon nanowire array; Step d, using photolithography and lift-off processes to prepare metal electrodes at both ends of the nanowires of the high-conductivity crystalline silicon nanowire array to obtain a spatially resolvable micro-temperature sensing unit array; Step e: Connect the micro temperature sensing unit array to the test circuit by wire bonding.
8. An application of the micro temperature sensor device according to claim 6 or 7, characterized in that: Used in wearable temperature sensing devices, or suitable for real-time detection of ambient temperature and high spatial resolution.