High-precision airborne cable length measuring method and system

Abstract

The invention provides a high-precision airborne cable length measurement method and system, and the method comprises the steps: transmitting a test pulse signal, and generating a counter starting signal; processing the test pulse signal to obtain a processed test pulse signal, and performing shaping and signal amplification on the test pulse signal; an echo signal is obtained, the echo signal is reduced and detected in sequence, and a counter cut-off signal is generated; extracting a time interval between the processed test pulse signal and the processed echo signal based on the initial signal and the cut-off signal; the length of the cable is calculated based on the time interval and the dielectric constant of the cable. According to the invention, the pulse test signal is shaped and amplified, so that the pulse test signal can detect the cable with a long section less than one meter, and the length of the cable is calculated by reducing and detecting the echo signal and testing the time interval between the pulse signal and the echo signal. And the breakpoint position of the cable smaller than 10cm can be accurately judged.

Description

Technical Field

[0001] The present invention relates to the technical field of cable measurement, and in particular to a high-precision airborne cable length measurement method and system. Background Art

[0002] There are many devices on board general aviation aircraft, and each device is connected by cables. After the cables are successfully installed and debugged, as the aircraft flies for a long time, it is inevitable that the cables will be damaged and broken due to vibration. During maintenance, it is necessary to locate the break point and repair it.

[0003] In the prior art, when using the existing cable break point detector for maintenance, its detection range and detection accuracy cannot meet the requirements, which is specifically manifested as follows:

[0004] (1) The lower limit of the measured cable length range: Existing cable breakpoint detectors require that the measured cable length be at least 10 meters, but the cable length of airborne equipment ranges from 1 meter to 100 meters.

[0005] (2) Inaccurate breakpoint positioning: The existing cable breakpoint detector has a breakpoint positioning accuracy of 5% ± 1m. However, the onboard equipment of an aircraft is tightly arranged. Even a breakpoint that spans a length of 1m is likely to be located in two different equipment cabinets. Therefore, it is impossible to accurately determine the breakpoint location. Summary of the invention

[0006] Based on this, an object of the present invention is to provide a high-precision airborne cable length measurement method and system to at least solve the above-mentioned deficiencies in the prior art.

[0007] In a first aspect, the present invention provides a high-precision airborne cable length measurement method, the method comprising:

[0008] Transmitting a test pulse signal and generating a counter start signal;

[0009] Processing the test pulse signal to obtain a processed test pulse signal to shape and amplify the test pulse signal;

[0010] Acquire an echo signal, reduce and detect the echo signal in sequence, and generate a counter cutoff signal;

[0011] and extracting the time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal;

[0012] The length of the cable is calculated based on the time interval and a dielectric constant of the cable.

[0013] Compared with the prior art, the beneficial effects of the present invention are: by transmitting a test pulse signal, and shaping and amplifying the pulse test signal so that the pulse test signal can detect a cable section less than one meter long, and by reducing and detecting the echo signal, and calculating the length of the cable by the time interval between the test pulse signal and the echo signal, the breakpoint position of a cable less than ten centimeters can be accurately determined.

[0014] Furthermore, the step of transmitting the test pulse signal includes:

[0015] A clock with a preset frequency is input into a programmable logic device, and a test pulse signal is generated based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator.

[0016] Furthermore, the step of processing the test pulse signal includes:

[0017] Converting the test pulse signal into a sine wave to shape the test pulse signal to obtain a shaped test pulse signal;

[0018] A signal amplification circuit is used to amplify the shaped test pulse signal.

[0019] Furthermore, the steps of successively reducing and detecting the echo signals include:

[0020] Using a signal reduction circuit to reduce the echo signal to obtain a reduced echo signal;

[0021] An echo detection circuit is used to detect the reduced echo signal.

[0022] Furthermore, after the step of extracting the time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal, the method further includes:

[0023] The time interval is time-filled by the phase difference value, and the expression of the time-filling is:

[0024]

[0025] Where, t represents the time interval, M represents the maximum value of the counter, T represents the acquisition signal cycle, C max Indicates that the counter with the largest corresponding number appears first, C min Indicates the minimum corresponding sequence number of the counter that appears for the first time.

[0026] Furthermore, the expression for calculating the length of the cable is:

[0027]

[0028] Wherein, L represents the length of the cable, v represents the propagation speed of the test pulse signal in the cable, t represents the time interval, c represents the speed of light, and ε r Represents the dielectric constant.

[0029] In a second aspect, the present invention further provides a high-precision airborne cable length measurement system, the system comprising:

[0030] A transmitting module, used for transmitting a test pulse signal and generating a counter start signal;

[0031] A processing module, used for processing the test pulse signal to obtain a processed test pulse signal, so as to perform shaping and signal amplification on the test pulse signal;

[0032] An acquisition module, used for acquiring an echo signal, reducing and detecting the echo signal in sequence, and generating a counter cutoff signal;

[0033] An extraction module, configured to extract a time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal;

[0034] A calculation module is used to calculate the length of the cable based on the time interval and the dielectric constant of the cable.

[0035] Furthermore, the transmitting module includes:

[0036] The input unit is used to input a clock of a preset frequency into a programmable logic device and generate a test pulse signal based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator.

[0037] In a third aspect, the present invention further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the high-precision airborne cable length measurement method as described above when executing the computer program.

[0038] In a fourth aspect, the present invention further provides a storage medium having a computer program stored thereon, which, when executed by a processor, implements the high-precision airborne cable length measurement method as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a flow chart of a high-precision airborne cable length measurement method in a first embodiment of the present invention;

[0040] Figure 2 Schematic diagram of a waveform shaping circuit in a first embodiment of the present invention;

[0041] Figure 3is a waveform shaping simulation circuit diagram in the first embodiment of the present invention;

[0042] Figure 4 is a waveform shaping simulation waveform diagram in the first embodiment of the present invention;

[0043] Figure 5 A schematic diagram of a signal amplification / reduction circuit in a first embodiment of the present invention;

[0044] Figure 6 A signal amplification simulation circuit diagram in the first embodiment of the present invention;

[0045] Figure 7 It is a signal amplification simulation waveform diagram in the first embodiment of the present invention;

[0046] Figure 8 A schematic diagram of multiple reflections of a signal in the first embodiment of the present invention;

[0047] Fig. 9 is a schematic diagram of an echo detection circuit in a first embodiment of the present invention;

[0048] Fig.10 A signal reduction simulation circuit diagram in the first embodiment of the present invention;

[0049] Fig.11 It is a signal reduction simulation waveform diagram in the first embodiment of the present invention;

[0050] Fig.12 The echo detection simulation in the first embodiment of the present invention Figure 1 ;

[0051] Fig.13 The echo detection simulation in the first embodiment of the present invention Figure 2 ;

[0052] Fig.14 It is a time division phase shift time extraction principle diagram in the first embodiment of the present invention;

[0053] Fig.15 This is a schematic diagram of time extraction in the first embodiment of the present invention;

[0054] Fig.16 This is a minimum cable length test diagram in the first embodiment of the present invention;

[0055] Fig.17 A schematic diagram of signal transmission in the first embodiment of the present invention;

[0056] Fig.18 It is a structural block diagram of a high-precision airborne cable length measurement system in a second embodiment of the present invention;

[0057] Fig.19FIG. 4 is a schematic diagram of the hardware structure of an electronic device in a third embodiment of the present invention.

[0058] Description of main component symbols:

[0059] 10. Transmitting module; 20. Processing module; 30. Acquisition module; 40. Extraction module; 50. Calculation module;

[0060] 60. Bus; 61. Processor; 62. Memory; 63. Communication interface.

[0061] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0062] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0063] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0064] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0065] Embodiment 1

[0066] See also Figure 1 , which is a high-precision airborne cable length measurement method in a first embodiment of the present invention, and the method includes steps S1 to S5:

[0067] S1, transmits a test pulse signal and generates a counter start signal;

[0068] Specifically, the step S1 includes step S11:

[0069] S11, inputting a clock of a preset frequency into a programmable logic device, and generating a test pulse signal based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator;

[0070] It can be understood that, taking a 1m long cable as an example, in this embodiment, the frequency of the test pulse signal to be emitted is 75MHz, and the designed input clock is 50MHz, which can be generated by the internal PLL of the programmable logic device. The input clock of the programmable logic device is set to 50MHz, and the input clock is provided by an external crystal oscillator.

[0071] It should be explained that, in this embodiment, taking a 1-meter cable as an example, the transmitted test pulse signal is 75 MHz and the period T should be 13.33 ns.

[0072] S2, processing the test pulse signal to obtain a processed test pulse signal, so as to perform shaping and signal amplification on the test pulse signal;

[0073] Specifically, the step S2 includes steps S21 to S22:

[0074] S21, converting the test pulse signal into a sine wave to shape the test pulse signal to obtain a shaped test pulse signal;

[0075] S22, amplifying the shaped test pulse signal using a signal amplification circuit;

[0076] It is understandable that since the test pulse signal contains multiple harmonics and many frequency components, different frequencies have different propagation rates, which is not conducive to signal transmission and reflection. The pulse square wave is shaped into a sine wave to make it easier to propagate in the cable, such as Figure 2 As shown in the figure, the waveform shaping circuit consists of a three-stage integration circuit composed of resistors and capacitors. The emitted square wave is gradually shaped into a sine wave through the charging and discharging of the capacitor. Figure 3 As shown in the figure, XFG1 is a signal generator that simulates the pulse signal emitted by the output, and XSC1 is an oscilloscope. The simulation waveform is shown in Figure 4 As shown, it can be seen that the transmit pulse signal is shaped into a sine wave.

[0077] It should be explained that the signal amplitude produced by the programmable logic device is only 3.3V, which is easy to attenuate after long-distance transmission, which may cause the reflected echo amplitude to be very small and cannot be detected, so the transmitted signal needs to be amplified. In addition, if the signal reflection signal amplitude is too large, it is not conducive to the inspection of the echo detection circuit, and false inspection may occur. Therefore, it is necessary to control the two signals within a reasonable range through signal amplification and reduction circuits;

[0078] In this embodiment, the signal amplification / reduction circuit is as follows Figure 5 As shown, the amplification circuit is mainly composed of the integrated operational amplifier INA133U. According to the circuit principle, the amplitude of the output signal FCMC_FD is Among them, U i is the input signal FCMC_OUT signal amplitude, so the output voltage amplitude can be adjusted by adjusting the values ​​of R_13 and R_11 to achieve the purpose of signal amplification and reduction. The signal amplification simulation diagram is shown in Figure 6 As shown in the figure, XFG1 is a signal generator that simulates the sine wave signal emitted by the output, and XSC1 is an oscilloscope. The simulation waveform is shown in Figure 7 As shown, B is the emitted sine wave, and A is the amplified emitted sine wave. It can be seen from the figure that the amplitude of A is twice that of B.

[0079] S3, acquiring an echo signal, reducing and detecting the echo signal in sequence, and generating a counter cutoff signal;

[0080] It is understandable that if Figure 5 The signal reduction circuit shown in the figure reduces the echo signal. In the actual test process, there may be multiple reflections due to the bending of the cable, such as Figure 8 As shown, the reflection amplitude caused by the general bend is low, so it needs an echo detection circuit to identify it. Please refer to Fig. 9 The echo detection circuit is mainly composed of the voltage comparator AD8541, V REF is the reference voltage. When the amplitude of the input reflected signal FCMC_HB exceeds V REF When AD8541 is on, it outputs high level, otherwise it outputs low level. REF The value of can adjust the voltage amplitude of the reflection signal FCMC_HB. The signal reduction simulation diagram is as follows Fig.10 As shown in the figure, XFG1 is a signal generator that simulates the callback signal, and XSC1 is an oscilloscope. The simulation waveform is shown in Fig.11 As shown in the figure, B is the echo signal and A is the reduced echo signal. As can be seen from the figure, the amplitude of A is half of B. Echo detection, such as Fig.12 As shown, the echo signal is simulated by the signal generator XFGA. When the amplitude of the echo signal is greater than the reference voltage V REF , the 6th corner of U2 outputs a high level, thereby generating a cutoff signal for the counter, such as Fig.13 , on the contrary, when the echo signal amplitude is less than the reference voltage V REF When , the 6-corner output of U2 returns to a low level.

[0081] S4, extracting the time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal;

[0082] Specifically, after step S4, the method includes step S41:

[0083] S41, time-filling the time interval by using the phase difference value, wherein the expression of time-filling is:

[0084]

[0085] Where, t represents the time interval, M represents the maximum value of the counter, T represents the acquisition signal cycle, C max Indicates that the counter with the largest corresponding number appears first, C min Indicates the first occurrence of the minimum corresponding sequence number of the counter;

[0086] Understandably, see Fig.14 , the start signal is generated by the transmission signal, and the reflection signal generates the cut-off signal through the echo detection circuit. The ten sampling clock signals start counting when the start signal starts, and end counting when the cut-off signal arrives. Since the sampling clock cannot be completely synchronized with the start signal and the end signal, there will be a counting error, and the maximum error is one clock cycle. In order to solve this error, in this embodiment, a time padding method is used to solve it, specifically:

[0087] Time extraction consists of ten signals collected through 250MHz phase shift, corresponding to ten counters C1-C10 respectively. When the transmission signal is generated, the ten counters start counting from 1. When the signal encounters a breakpoint and the echo detection circuit generates a cutoff signal, the ten counters stop counting. Count the values ​​of counters C1-C10, and find out which signal collection clock corresponds to the first maximum and minimum values. The phase difference can be used to make up for the deviation time. Fig.15 As shown, the counter start signal is generated by the transmission signal, the cutoff signal is generated by the echo signal, and the 10 counters are triggered by the rising edges of the clocks clk_out1-clk_out10, respectively. Therefore, the 10 counter values ​​are 3, 3, 4, 4, 4, 4, 4, 4, 3. Therefore, the maximum value of the counter is 4, the first occurrence of the maximum counter number is 3, and the first occurrence of the minimum counter number is 10. Substitute them into the time-filled expressions to obtain:

[0088]

[0089] The difference from the actual time value 14.53ns is 0.27ns, and the error is within 0.4ns.

[0090] S5, calculating the length of the cable based on the time interval and the dielectric constant of the cable;

[0091] It can be understood that, in this embodiment, the expression for calculating the cable length is:

[0092]

[0093] Wherein, L represents the length of the cable, v represents the propagation speed of the test pulse signal in the cable, t represents the time interval, c represents the speed of light, and ε r Represents the dielectric constant.

[0094] Specifically, in this embodiment, 14.8 ns is substituted into the expression for calculating the cable length to calculate the actual length:

[0095]

[0096] Substituting the actual error of 0.27ns into , calculate the length error:

[0097]

[0098] According to the above analysis of "Calculation of transmit clock for minimum cable length test", the minimum length is when the transmit pulse is sent just after one cycle and the return pulse arrives, that is, the time interval is no more than 13.2ns. Fig.16 It can be seen that the rising edge counts of clock clk_out1-clk_out10 in the start signal and the end signal are 3, 3, 3, 3, 4, 4, 4, 3, 3, 3 respectively. Therefore, through the time completion expression, we can get M = 4, C max =5, C min =8, and put it into the time completion expression, we get:

[0099]

[0100] And bring 13.2ns into The minimum length can be calculated and measured:

[0101]

[0102] For explanation, see Figure 1 The "transmitted signal" on the left is a shaped and amplified signal transmitted to test the cable breakpoint, that is, the processed test pulse signal. The right side is the "echo signal" at the cable breakpoint after the "transmitted signal" encounters it after a time t. Therefore, if the cable length is required, the test time interval t is required. The core of the airborne cable is generally made of copper or aluminum, and the dielectric constant ε can be selected. r is 4.4, so for a cable of 1m in length, the time interval t is:

[0103]

[0104] Therefore, in a 1m long cable, the time from the start of the transmission signal to the transmission of the return wave after encountering a breakpoint is 13.9ns. Using the minimum time of 13.9ns as the minimum transmission period, the minimum transmission signal frequency of the 1m long cable can be obtained to be 72MHz. Since 72MHz is not conducive to PLL generation, a lower time of 13.2ns near this time can be used as the minimum transmission period, that is, the minimum transmission signal frequency is 75MHz. The specific expression is:

[0105]

[0106] Where f represents the frequency of the transmitted signal.

[0107] According to the sampling law, the frequency of the transmitted signal is 75MHz. If the reflected echo is to be successfully collected, the sampling frequency must be at least twice the frequency of the transmitted signal, that is, 150MHz. In fact, in order to ensure the sampling accuracy, a frequency of more than 8 times is required. Therefore, the sampling frequency is at least 600MHz. Considering that many chips cannot produce a frequency of 600MHz, in order to solve this problem, the present invention adopts a time-division phase shift method. By dividing the 250MHz clock phase into ten equal parts, each sampling clock phase is shifted by 36° to obtain ten sampling clocks. Ten sampling clocks can be sampled 10 times in one cycle of 250MHz, which is equivalent to a sampling frequency of 2.5GHz, which is much higher than the 600MHz frequency sampling requirement. Based on this principle, the time interval Δt corresponding to a phase deviation can be calculated as:

[0108]

[0109] Therefore, the maximum theoretical measurement distance error is:

[0110]

[0111] It is worth noting that the system hardware used in the above method is composed of ARM microprocessor, programmable logic device FPGA, waveform shaping circuit, signal amplification circuit, signal reduction circuit, echo detection circuit, LCD screen and keyboard. The functions of each module are as follows:

[0112] ARM microprocessor: used to read keyboard input, read FPGA test data, calculate actual test values, drive LCD display, etc.

[0113] Programmable logic device FPGA: transmits test pulses and generates counter start signals. Extracts the time interval between the echo signal and the transmitted pulse signal;

[0114] Waveform shaping circuit: converts the pulse digital wave emitted by FPGA into a sine wave for easy transmission;

[0115] Signal amplifier circuit: amplifies the transmitted signal to make it resistant to attenuation during transmission.

[0116] Signal reduction circuit: reduces the echo signal so that the echo signal can be detected smoothly.

[0117] Echo detection circuit: detects the echo signal and generates a counter cutoff signal.

[0118] Keyboard, LCD screen: verification value input, test result display, etc.

[0119] In summary, the high-precision airborne cable length measurement method in the above-mentioned embodiment of the present invention transmits a test pulse signal, and shapes and amplifies the pulse test signal so that the pulse test signal can detect cables less than one meter in length. The minimum test length is 1 meter, and the test accuracy is high. By reducing and detecting the echo signal and calculating the length of the cable by the time interval between the test pulse signal and the echo signal, the breakpoint position of a cable less than ten centimeters can be accurately determined.

[0120] Embodiment 2

[0121] See also Fig.18 , shown is a high-precision airborne cable length measurement system in a second embodiment of the present invention, the system comprising:

[0122] The transmitting module 10 is used to transmit a test pulse signal and generate a counter start signal;

[0123] The processing module 20 is used to process the test pulse signal to obtain a processed test pulse signal, so as to perform shaping and signal amplification on the test pulse signal;

[0124] An acquisition module 30, used for acquiring an echo signal, reducing and detecting the echo signal in sequence, and generating a counter cutoff signal;

[0125] An extraction module 40, configured to extract a time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal;

[0126] A calculation module 50, configured to calculate the length of the cable based on the time interval and the dielectric constant of the cable;

[0127] The expression for calculating the length of the cable is:

[0128]

[0129] Wherein, L represents the length of the cable, v represents the propagation speed of the test pulse signal in the cable, t represents the time interval, c represents the speed of light, and ε rRepresents the dielectric constant.

[0130] In some optional embodiments, the transmitting module 10 includes:

[0131] The input unit is used to input a clock of a preset frequency into a programmable logic device and generate a test pulse signal based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator.

[0132] In some optional embodiments, the processing module 20 includes:

[0133] A conversion unit, used for converting the test pulse signal into a sine wave, so as to shape the test pulse signal and obtain a shaped test pulse signal;

[0134] The amplification unit is used to amplify the shaped test pulse signal by using a signal amplification circuit.

[0135] In some optional embodiments, the acquisition module 30 includes:

[0136] A reduction unit, used for reducing the echo signal by using a signal reduction circuit to obtain a reduced echo signal;

[0137] The detection unit is used to detect the reduced echo signal using an echo detection circuit.

[0138] In some optional embodiments, the system further comprises:

[0139] The padding module is used to pad the time interval by a phase difference value. The expression of the time padding is:

[0140]

[0141] Where, t represents the time interval, M represents the maximum value of the counter, T represents the acquisition signal cycle, C max Indicates that the counter with the largest corresponding number appears first, C min Indicates the minimum corresponding sequence number of the counter that appears for the first time.

[0142] The functions or operation steps implemented when the above modules and units are executed are generally the same as those in the above method embodiments, and will not be repeated here.

[0143] The high-precision airborne cable length measurement system provided in the embodiment of the present invention has the same implementation principle and technical effects as those of the aforementioned method embodiment. For the sake of brief description, for matters not mentioned in the system embodiment, reference may be made to the corresponding contents in the aforementioned method embodiment.

[0144] Embodiment 3

[0145] See also Fig.19 , which is a schematic diagram of the hardware structure of the electronic device in the third embodiment of the present invention.

[0146] The electronic device may include a processor 61 and a memory 62 storing computer program instructions.

[0147] Specifically, the processor 61 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the present application.

[0148] Among them, the memory 62 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 62 may include a hard disk drive (HDD), a floppy disk drive, a solid state drive (SSD), a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 62 may include a removable or non-removable (or fixed) medium. Where appropriate, the memory 62 may be inside or outside the data processing device. In a specific embodiment, the memory 62 is a non-volatile memory. In a specific embodiment, the memory 62 includes a read-only memory (ROM) and a random access memory (RAM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (Programmable Read-Only Memory, PROM for short), an erasable PROM (Erasable ProgrammableRead-Only Memory, EPROM for short), an electrically erasable PROM (Electrically Erasable ProgrammableRead-Only Memory, EEPROM for short), an electrically alterable ROM (Electrically Alterable Read-Only Memory, EAROM for short) or a flash memory (FLASH) or a combination of two or more of these. Under appropriate circumstances, the RAM can be a static random access memory (SRAM) or a dynamic random access memory (DRAM), wherein the DRAM can be a fast page mode dynamic random access memory (FPMDRAM), an extended data output dynamic random access memory (EDODRAM), a synchronous dynamic random access memory (SDRAM), etc.

[0149] The memory 62 may be used to store or cache various data files required for processing and / or communication, as well as possible computer program instructions executed by the processor 61 .

[0150] The processor 61 implements the high-precision airborne cable length measurement method of the first embodiment by reading and executing computer program instructions stored in the memory 62 .

[0151] In some of the embodiments, the electronic device may further include a communication interface 63 and a bus 60. Fig.19 As shown, the processor 61, the memory 62, and the communication interface 63 are connected via a bus 60 and communicate with each other.

[0152] The communication interface 63 is used to realize the communication between the modules, devices, units and / or equipment in the present application. The communication interface 63 can also realize data communication with other components such as: external devices, image / data acquisition equipment, databases, external storage and image / data processing workstations.

[0153] The bus 60 includes hardware, software or both, and couples the components of the device to each other. The bus 60 includes but is not limited to at least one of the following: a data bus, an address bus, a control bus, an expansion bus, and a local bus. By way of example and not limitation, bus 60 may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses or a combination of two or more of these. Where appropriate, bus 60 may include one or more buses. Although this application describes and illustrates a particular bus, this application contemplates any suitable bus or interconnect.

[0154] The electronic device can obtain a high-precision airborne cable length measurement system and execute the high-precision airborne cable length measurement method of the first embodiment.

[0155] In addition, in combination with the high-precision airborne cable length measurement method in the above embodiment 1, the present application can provide a storage medium for implementation. The storage medium stores computer program instructions; when the computer program instructions are executed by the processor, the high-precision airborne cable length measurement method in the above embodiment 1 is implemented.

[0156] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0157] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A high-precision airborne cable length measurement method, characterized in that: The method comprises: Transmitting a test pulse signal and generating a counter start signal; Processing the test pulse signal to obtain a processed test pulse signal to shape and amplify the test pulse signal; Acquire an echo signal, reduce and detect the echo signal in sequence, and generate a counter cutoff signal; and extracting the time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal; The length of the cable is calculated based on the time interval and a dielectric constant of the cable.

2. The high-precision airborne cable length measurement method according to claim 1, characterized in that: The step of transmitting a test pulse signal comprises: A clock with a preset frequency is input into a programmable logic device, and a test pulse signal is generated based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator.

3. The high-precision airborne cable length measurement method according to claim 1, characterized in that: The step of processing the test pulse signal comprises: Converting the test pulse signal into a sine wave to shape the test pulse signal to obtain a shaped test pulse signal; A signal amplification circuit is used to amplify the shaped test pulse signal.

4. The high-precision airborne cable length measurement method according to claim 1, characterized in that: The steps of successively reducing and detecting the echo signals include: Using a signal reduction circuit to reduce the echo signal to obtain a reduced echo signal; An echo detection circuit is used to detect the reduced echo signal.

5. The high-precision airborne cable length measurement method according to claim 1, characterized in that: After the step of extracting the time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal, the method further includes: The time interval is time-filled by the phase difference value, and the expression of the time-filling is: Where, t represents the time interval, M represents the maximum value of the counter, T represents the acquisition signal cycle, C max Indicates that the counter with the largest corresponding number appears first, C min Indicates the minimum corresponding sequence number of the counter that appears for the first time.

6. The high-precision airborne cable length measurement method according to claim 1, characterized in that: The expression for calculating the length of the cable is: Wherein, L represents the length of the cable, v represents the propagation speed of the test pulse signal in the cable, t represents the time interval, c represents the speed of light, and ε r Represents the dielectric constant.

7. A high-precision airborne cable length measurement system, characterized in that: The system comprises: A transmitting module, used for transmitting a test pulse signal and generating a counter start signal; A processing module, used for processing the test pulse signal to obtain a processed test pulse signal, so as to perform shaping and signal amplification on the test pulse signal; An acquisition module, used for acquiring an echo signal, reducing and detecting the echo signal in sequence, and generating a counter cutoff signal; An extraction module, configured to extract a time interval between the processed test pulse signal and the echo signal based on the start signal and the cutoff signal; A calculation module is used to calculate the length of the cable based on the time interval and the dielectric constant of the cable.

8. The high-precision airborne cable length measurement system according to claim 7, characterized in that: The transmitting module comprises: The input unit is used to input a clock of a preset frequency into a programmable logic device and generate a test pulse signal based on a PLL in the programmable logic device, wherein the clock is provided by a crystal oscillator.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the high-precision airborne cable length measurement method according to any one of claims 1 to 6 is implemented.

10. A storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the high-precision airborne cable length measurement method according to any one of claims 1 to 6 is implemented.

Images