Epitaxial wafer and method for manufacturing epitaxial wafer

Abstract

Embodiments relate to an epitaxial wafer and a method for manufacturing an epitaxial wafer. The method for manufacturing an epitaxial wafer may include polishing a back surface and a front surface of a wafer using a double-sided polishing process, forming a protective film on the back surface of the polished wafer, forming an epitaxial layer on the front surface of the wafer on which the protective film is formed to form an epitaxial wafer, and cleaning the epitaxial wafer.

Description

Technical Field

[0001] Embodiments relate to an epitaxial wafer and a method for manufacturing the epitaxial wafer. Background Art

[0002] Epitaxial wafers are substrates on which epitaxial layers are formed on wafers and are widely used in the manufacture of semiconductor devices. That is, epitaxial wafers are used as substrates to manufacture various semiconductor devices such as microprocessors (MPU, MCU), logic devices (system IC, LCD IC), flash memory, and power semiconductor devices.

[0003] At the same time, if Figure 1A As shown in FIG. 1 , an epitaxial wafer 2 is often placed on a stage 1 for manufacturing semiconductor devices. When the roughness of the back surface of the epitaxial wafer 2 is small, the epitaxial wafer 2 may slide, causing the epitaxial wafer 2 to be damaged or fall off the stage 1. In addition, when the epitaxial wafer 2 slides, as shown in FIG. Figure 1A and Figure 1B As shown, there is a problem that particles 5 on the back side of the epitaxial wafer 2 are transferred to the front side, thereby contaminating the front side of the epitaxial wafer 2 .

[0004] Therefore, there is an urgent need to develop a technology capable of preventing the epitaxial wafer 2 from slipping. Summary of the invention

[0005] Embodiments are directed to solving the above-referenced and other problems.

[0006] Another object of an embodiment is to provide an epitaxial wafer and a method for manufacturing the epitaxial wafer, which are capable of preventing slipping.

[0007] Another object of an embodiment is to provide a method for manufacturing an epitaxial wafer capable of ensuring sufficient roughness and reducing the number of processes.

[0008] The technical problems of the embodiment are not limited to the technical problems described in this item, but include technical problems that can be understood through the description of the present invention.

[0009] According to a first aspect of an embodiment for achieving the above or other purposes, a method for manufacturing an epitaxial wafer includes: polishing the front and back sides of the wafer using a double-sided polishing process; forming a protective film on the back side of the polished wafer; forming an epitaxial layer on the front side of the wafer formed with the protective film to form an epitaxial wafer; and cleaning the epitaxial wafer.

[0010] The forming of the protective film may include forming the protective film on the side surface of the polished wafer.

[0011] The front side and the back side of the polished wafer may have a first roughness and a second roughness, respectively, and the second roughness may be equal to or greater than the first roughness.

[0012] The front side and the back side of the formed epitaxial wafer may have a third roughness and a fourth roughness, respectively, the third roughness may be less than the first roughness, and the fourth roughness may be equal to the second roughness.

[0013] Cleaning of the epitaxial wafer may include removing the protective film.

[0014] The front side and the back side of the epitaxial wafer from which the protective film has been removed may have a fifth roughness and a sixth roughness, respectively, and the sixth roughness may be the same as the second roughness.

[0015] The protective film may include an oxide film.

[0016] The oxide film can be formed using a low temperature oxidation process.

[0017] According to a second aspect of an embodiment to achieve the above or other objects, an epitaxial wafer is manufactured by a manufacturing method.

[0018] Effects of the epitaxial wafer and the method for manufacturing the epitaxial wafer according to the embodiment are as follows.

[0019] According to at least one embodiment, a protective film can be formed on the back side of the wafer before the EPI process is performed, and the protective film can be removed after the EPI process is performed. Since the roughness of the back side of the wafer subjected to the DSP process is maintained, the epitaxial wafer will not slide even if the epitaxial wafer is placed on a stage for manufacturing semiconductor devices. Therefore, not only is the epitaxial wafer prevented from falling or being damaged due to the sliding of the epitaxial wafer, but also particles on the back side of the epitaxial wafer are prevented from being transferred to the front side and contaminating the front side of the epitaxial wafer.

[0020] From the following detailed description, the other applicable scope of the embodiment will be apparent. However, since those skilled in the art can clearly understand various changes and modifications within the thought and scope of the embodiment, the detailed description and specific embodiments (such as the preferred embodiment) should be understood to be given as examples only. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1A An epitaxial wafer is shown sliding on a stage.

[0022] Figure 1B An epitaxial wafer is shown with its front side contaminated with particles.

[0023] Figure 2 A method for manufacturing an epitaxial wafer according to a comparative example is shown.

[0024] Figure 3 A method for manufacturing an epitaxial wafer according to an embodiment is shown.

[0025] Figure 4 is a power spectral density (PSD) graph showing the roughness in each of the comparative example and the embodiment.

[0026] Figure 5 is a diagram showing the topology of roughness in each of the comparative example and the embodiment.

[0027] FIG. 6 is a diagram showing a topological structure of roughness according to positions in each of the comparative example and the embodiment.

[0028] The size, shape, dimensions, etc. of the elements shown in the drawings may be different from the actual size, shape, dimensions, etc. In addition, even if the same element is shown in different sizes, shapes, dimensions, etc. between the drawings, this is just an example on the drawings, and the same element has the same size, shape, dimensions, etc. between the drawings. DETAILED DESCRIPTION

[0029] Hereinafter, the embodiments disclosed in this specification will be described in detail with reference to the accompanying drawings, but the same or similar elements have the same reference numerals, regardless of the reference numerals, and their redundant descriptions will be omitted. In view of the convenience of writing the specification, the suffixes "module" and "unit" of the elements used in the following description can be given or used interchangeably, and they themselves do not have different meanings or functions from each other. In addition, the accompanying drawings are for the convenience of understanding the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited by the accompanying drawings. In addition, when an element (such as a layer, a region or a substrate) is referred to as "on" another element, this means that it can be directly on another element, or other intermediate elements can be present between them.

[0030] Figure 2 A method for manufacturing an epitaxial wafer according to a comparative example is shown.

[0031] like Figure 2 As shown, the wafer 201 may be subjected to double-sided polishing (hereinafter referred to as DSP processing) (S110). Before the DSP processing (S110), the single crystal ingot may be obtained into a plurality of wafers 201 by slicing processing. For example, the slicing processing may be performed using a wire. In this case, mechanical damage may occur on both surfaces of the wafer 201. Such mechanical damage may be eliminated by the DSP processing (S110).

[0032] The front side and the back side of the wafer 201 subjected to the DSP process (S110) may have a first roughness 211 and a second roughness 212, respectively. The second roughness 212 may be equal to or greater than the first roughness 211.

[0033] Next, the front side of the wafer 201 may be polished using a final polishing (FP) process (S120). The roughness of the front side of the wafer 201 may be reduced by the FP process (S120). In order to manufacture the epitaxial wafer 203 described later, the roughness of the front side of the wafer 201 may be as small as possible. To this end, only the front side of the wafer 201 may be polished by the FP process (S120), thereby reducing the roughness of the front side of the wafer 201.

[0034] The front side and the back side of the wafer 201 subjected to the FP process (S120) may respectively have a third roughness 213 and a fourth roughness 214. The third roughness 213 may be smaller than the first roughness 211. For example, the third roughness 213 may be smaller than half of the first roughness 211. The fourth roughness 214 may be equal to the second roughness 212, but is not limited thereto.

[0035] Next, the wafer 201 may be cleaned using a final cleaning system (FCS) process (S130). HF, SC1 (standard clean-1, APM), SC2 (standard clean-2, HPM), etc. may be used as a cleaning solution. The FCS process (S130) may be omitted.

[0036] Next, an epitaxial layer (not shown) may be formed on the wafer 201 using an epitaxy (EPI) process (S140). The epitaxial layer may be formed of, for example, silicon including an n-dopant, but is not limited thereto.

[0037] At the same time, the front and back sides of the epitaxial wafer 203 may have a fifth roughness 215 and a sixth roughness 216, respectively. Heat may be applied for EPI processing (S140), and a gas for forming an epitaxial layer (hereinafter referred to as an epitaxial gas) may be injected into the chamber. An epitaxial layer may be formed on the front side of the wafer 201 using the epitaxial gas, and the back side of the wafer 201 may be etched by the epitaxial gas, so that the surface pattern on the back side may be reduced, thereby reducing the roughness, i.e., the sixth roughness 216. For example, the fifth roughness 215 may be the same as the third roughness 213, but is not limited thereto. The sixth roughness 216 may be less than the fourth roughness 214. For example, the sixth roughness 216 may be less than half of the fourth roughness 214.

[0038] Subsequently, a single cleaning process may be used to clean the back side of epitaxial wafer 203 (S160).

[0039] A pre-cleaning system (PCS) process may be added before S160. The surface of the epitaxial layer may be cleaned using the PCS process.

[0040] The front and back sides of the epitaxial wafer 203 subjected to a single cleaning process (S160) may have a seventh roughness 217 and an eighth roughness 218, respectively. The single cleaning process (S160) may clean only the back side of the epitaxial wafer 203, so that the roughness of the back side of the epitaxial wafer 203, i.e., the eighth roughness 218, may be increased. The seventh roughness 217 may be the same as the fifth roughness 215, but is not limited thereto. The eighth roughness 218 may be greater than the sixth roughness 216. For example, the eighth roughness 218 may be at least half of the sixth roughness 216.

[0041] By increasing the eighth roughness 218 on the back side of the epitaxial wafer 203 through a single cleaning process (S160), the epitaxial wafer 203 can be prevented from sliding even when the epitaxial wafer 203 is placed on a stage for manufacturing semiconductor devices, so that the epitaxial wafer 203 can be prevented from falling or being damaged, and particles can be prevented from contaminating the entire surface of the epitaxial wafer 203.

[0042] Next, the epitaxial wafer 203 may be cleaned using an FCS process (S170). HF, SC1 (standard clean-1, APM), SC2 (standard clean-2, HPM), etc. may be used as a cleaning solution. The FCS process (S170) may be omitted.

[0043] However, there is a problem that in the comparative example, a single cleaning process (S160) is added to restore the sixth roughness 216 on the back surface of the epitaxial wafer 203 reduced by the EPI process (S140) to its original state, thereby complicating the method and increasing the cost.

[0044] Furthermore, even if a single cleaning process (S160) is added, there is no guarantee that the original roughness will be restored, and another problem may occur due to the addition of the single cleaning process (S300).

[0045] Will refer to Figure 3 An embodiment for solving the above-mentioned problem will be described through FIG. 6 .

[0046] Figure 3 A method for manufacturing an epitaxial wafer according to an embodiment is shown.

[0047] exist Figure 3 In the process, DSP processing (S310), FP processing (S330) and FCS processing (S340) can be respectively Figure 2 The S110, S120 and S130 shown in FIG. are the same. Figure 3 In the process, the EPI process (S350) and the FCS process (S370) can be combined with Figure 2 The S140 and S170 shown in are identical.

[0048] In an embodiment, a low temperature oxidation (LTO) process (S320) may be performed between the DSP process (S310) and the FP process (S330). For example, a protective film 407 may be formed on the back side of the wafer 401 using the LTO process (S320). For example, the protective film 407 may be an oxide film including SiOx, but is not limited thereto. For example, the protective film 407 is preferably formed thinly to facilitate subsequent removal. For example, the protective film 407 may be or smaller. Preferably, the protective film 407 may be or smaller.

[0049] For example, the protective film 407 may be formed only on the back surface of the wafer 401. For example, the protective film 407 may be formed on the side surface of the wafer 401 as well as on the back surface.

[0050] For example, the protective film 407 can protect the back side of the wafer 401 from the subsequent processes (such as S330 to S350), so that the roughness of the back side of the wafer 401 can be maintained as the roughness of the wafer 401 after the DSP process (S310). That is, the roughness of the back side of the wafer 401 can be the same as the roughness of the wafer 401 after the DSP process.

[0051] The LTO process (S320) may be performed so that the protective film 407 may be formed on the back surface of the wafer 401. Therefore, even if the FP process (S330), the FCS process (S340), the EPI process (S350), etc. are performed thereafter, the roughness of the back surface of the wafer 401 (or the epitaxial wafer 403) may be maintained the same as the roughness of the wafer 401 after the DSP process (S310) by the protective film 407.

[0052] In summary, the front and back sides of the wafer 401 subjected to the DSP process (S310) may have a first roughness 411 and a second roughness 412, respectively. The front and back sides of the epitaxial wafer 403 subjected to the EPI process (S350) may have a third roughness 413 and a fourth roughness 414, respectively. The front and back sides of the epitaxial wafer 403 from which the protective film 407 is removed by the FCS process (S370) may have a fifth roughness 415 and a sixth roughness 416, respectively. For example, the second roughness 412 may be equal to or greater than the first roughness 411.

[0053] The third roughness 413 may be smaller than the first roughness 411. The fourth roughness 414 may be equal to the second roughness 412. Even if the EPI treatment (S350) is performed, the fourth roughness 414 on the back surface may remain unchanged due to the protective film 407, and the third roughness 413 on the front surface may become smaller than the first roughness 411.

[0054] In addition, the sixth roughness may be equal to the second roughness. Even if the protective film 407 is removed, the second roughness 412 of the back side of the wafer 401 subjected to the DSP process (S310) may remain as it is. Therefore, the sixth roughness 416 on the back side of the epitaxial wafer 403 from which the protective film 407 is removed may be the same as the second roughness 412 of the back side of the wafer 401 subjected to the DSP process (S310).

[0055] Meanwhile, before the FP process (S330) is performed, a protective film 407 may be formed on the back side of the wafer 401 using the LTO process (S320). Therefore, the fourth roughness 414 of the back side of the epitaxial wafer 403 that has been subjected to the EPI process (S350) may be maintained intact by the protective film 407. That is, the fourth roughness 414 of the back side of the epitaxial wafer 403 that has been subjected to the EPI process (S350) may be the same as the second roughness 412 of the back side of the wafer 401 that has been subjected to the DSP process (S310). Therefore, even if the epitaxial wafer 403 is placed on a stage for manufacturing semiconductor devices, the epitaxial wafer 403 may be prevented from sliding, so that not only the epitaxial wafer 403 may be prevented from falling or being damaged, but also the front side of the epitaxial wafer 403 may be prevented from being contaminated by particles.

[0056] Meanwhile, in the embodiment, the protective film 407 may be removed by the FCS process (S370). For example, the protective film 407 may be etched by HF or the like used in the FCS process. Even if the protective film 407 is removed by the FCS process (S370), the roughness of the back surface of the epitaxial wafer 403 subjected to the FCS process (S370) may be the same as the second roughness 412 of the back surface of the wafer 401 subjected to the DSP process (S310).

[0057] Figure 4 is a power spectral density (PSD) graph showing the roughness in each of the comparative example and the embodiment.

[0058] exist Figure 4 In the example, the comparative example is a case where the roughness of the back surface of the epitaxial wafer is formed using a single cleaning process, and the embodiment is a case where a protective film is formed on the back surface of the wafer using an LTO process and then the protective film is removed by an FCS process.

[0059] like Figure 4 As shown, when the baseline (see Figure 4When the comparative example and the embodiment are compared in the area below the thick vertical line in the figure, the intensity of the comparative example is relatively strong, which means that there are many fine roughnesses due to cleaning. In contrast, when the comparative example and the embodiment are compared in the area above the baseline, the intensity of the embodiment is relatively strong, which means that there are many macroscopic roughnesses due to polishing. Therefore, it can be seen that the roughness of the wafer surface of the embodiment includes more macroscopic roughness than the roughness of the comparative example.

[0060] like Figure 2 As shown, when roughness is formed on the back side of the epitaxial wafer using a single cleaning process as in the comparative example, the roughness may include microscopic roughness that is smaller than the reference roughness required on the back side of the epitaxial wafer so that the epitaxial wafer can slide on the stage.

[0061] In contrast, Figure 3 As shown, the protective film can be formed by LTO processing as in the embodiment, and the protective film can be removed by FCS processing at least after the EPI processing. In this case, since the roughness of the back side of the epitaxial wafer from which the protective film has been removed includes a macro roughness greater than the reference roughness, the epitaxial wafer can be prevented from slipping on the stage.

[0062] Figure 5 is a diagram showing the topological structure of roughness according to the comparative example and the embodiment.

[0063] Figure 5 (a) shows the roughness of the back side of the wafer before EPI processing, and Figure 5 (b) shows the roughness of the back surface of the epitaxial wafer when no protective film is formed and no single cleaning process is performed as a comparative example. Figure 5 (c) shows as an example when forming The roughness of the back side of the epitaxial wafer when the protective film is Figure 5 (d) shows as an example when forming The roughness of the back side of the epitaxial wafer when the protective film is formed.

[0064] like Figure 5 As shown in (b), the roughness of the back side of the epitaxial wafer in the comparative example is smaller than the roughness of the back side of the wafer before the EPI treatment ( Figure 5 (a)). The epitaxial wafer can slide on the stage.

[0065] In contrast, Figure 5 (c) or Figure 5 As shown in (d), the roughness of the back side of the epitaxial wafer in the embodiment is or greater, and is comparable to the roughness of the back side of the wafer before EPI processing ( Figure 5(a)) so the epitaxial wafer will not slip on the stage.

[0066] FIG. 6 is a diagram showing a topological structure of roughness according to positions in each of the comparative example and the embodiment.

[0067] Fig. 6A shows the roughness of the back side at a point 50 mm from the center of the epitaxial wafer, and Figure 6B The roughness of the back surface at a point 140 mm from the center is shown.

[0068] like Fig. 6A and 6B As shown, it can be seen that the roughness of the back side of the epitaxial wafer in each of Examples 1, 2, 3 and 4 is much greater than the roughness of the back side of the epitaxial wafer in the comparative example.

[0069] The above detailed description should not be interpreted as limiting in all aspects, but should be regarded as illustrative. The scope of the embodiments should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the embodiments are included in the scope of the embodiments.

Claims

1. A method for manufacturing an epitaxial wafer, comprising: polishing the front and back sides of the wafer using a double-sided polishing process; forming a protective film on the back side of the polished wafer; forming an epitaxial layer on the front surface of the wafer on which the protective film is formed to form an epitaxial wafer; and The epitaxial wafer is cleaned.

2. The method according to claim 1, comprising: The protective film is formed on the side surface of the polished wafer.

3. The method according to claim 1, wherein: The front side and the back side of the polished wafer have a first roughness and a second roughness, respectively. Wherein, the second roughness is equal to or greater than the first roughness.

4. The method according to claim 1, wherein: The front side and the back side of the formed epitaxial wafer have a third roughness and a fourth roughness, respectively. The third roughness is smaller than the first roughness, and the fourth roughness is equal to the second roughness.

5. The method according to claim 1, wherein: Cleaning of the epitaxial wafer includes removing the protective film.

6. The method according to claim 5, wherein: The front side and the back side of the epitaxial wafer from which the protective film has been removed have a fifth roughness and a sixth roughness, respectively. Wherein, the sixth roughness is equal to the second roughness.

7. The method according to claim 1, wherein: The protective film includes an oxide film.

8. The method according to claim 7, wherein: The oxide film is formed using a low temperature oxidation process.

9. The method according to claim 1, wherein: The protective film is or smaller.

10. An epitaxial wafer produced by the method according to any one of claims 1 to 9.

Images