Design method of readout circuit of monolithic multispectral detection chip

Abstract

The invention discloses a single-chip multispectral detection chip reading circuit design method. A visible light detector and an infrared detector are integrated into the same fusion detector chip, fusion is completed at a readout circuit level through pixel-level in-situ fusion and monolithic integration of a processing circuit, and related devices are processed, so that dual-band detection of a visible light band and an infrared band can be realized; and the spectrum width which can be detected by the detector is effectively improved. Besides, the process manufacturing complexity of the design method is low, the problem that a multi-spectral detection system cannot be accurately matched in the aspects of an optical axis, a field angle and the like is solved, the requirements of equipment for accurate matching, miniaturization and light weight of a multi-spectral fusion image are met, and the application scene of multi-spectral detection is widened.

Description

Technical Field

[0001] The present application belongs to the technical field of circuit design, and in particular, relates to a method for designing a readout circuit of a single-chip multi-spectral detection chip. Background Art

[0002] Modern multi-scenario applications require detectors to adapt to different environments, and detectors with a single spectrum band are difficult to meet their needs. Multi-spectral optoelectronic fusion systems have become a widely used method. This method is to integrate detectors with two different spectrum bands into the same detection system. For example, by integrating visible light detectors and uncooled infrared detectors into the same detection system, the visible light detector can not only detect targets, but also identify the detailed features of the target. This is different from infrared detectors and has relative advantages. However, the target recognition ability of visible light detectors in dark environments is limited, and infrared detectors have more advantages under such environmental conditions. Therefore, integrating visible light detectors and infrared detectors into the same detector can improve the environmental adaptability of the detection system.

[0003] However, current multi-spectral fusion optoelectronic systems basically use independent visible light, uncooled infrared detectors and optical and processing circuits. The two sensors cannot be accurately matched in terms of optical axis, field of view angle, etc., which leads to many limitations in use. Summary of the invention

[0004] The embodiment of the present application provides a method for designing a readout circuit of a single-chip multi-spectral detection chip, which is used to at least solve the problem of the inability to accurately match the optical axis, field of view angle, etc. in the related art.

[0005] The present application embodiment provides a method for designing a readout circuit of a single-chip multi-spectral detection chip, including:

[0006] Design the visible light detector readout circuit and the uncooled infrared detector readout circuit respectively;

[0007] A super pixel is obtained by fusing pixels of a visible light detector readout circuit and pixels of an uncooled infrared detector readout circuit according to a preset ratio;

[0008] Integrate the superpixel, visible light detector readout circuit processing circuit, uncooled infrared detector readout circuit processing circuit, visible light detector readout circuit IO and uncooled infrared detector readout circuit IO into the same layout to obtain a single-chip multi-spectral detection chip readout circuit layout;

[0009] The readout circuit layout of the monolithic multi-spectral detection chip is taped out, and the photosensitive device is processed, and the non-refrigeration device is processed, so as to finally obtain the monolithic multi-spectral detection chip.

[0010] The monolithic multi-spectral detection chip readout circuit design method of the embodiment of the present application integrates the visible light detector and the infrared detector into the same fusion detector chip, completes the fusion at the readout circuit level through in-situ fusion at the pixel level and monolithic integration of the processing circuit, and processes the related devices, thereby enabling dual-band detection of the visible light band and the infrared band, effectively increasing the spectral band width that the detector can detect. In addition, the process manufacturing complexity of this design method is relatively low, and it solves the problem that the multi-spectral detection system cannot be accurately matched in terms of optical axis, field of view angle, etc., meets the equipment's requirements for accurate matching of multi-spectral fusion images and miniaturization and lightweight, and broadens the application scenarios of multi-spectral detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0012] Figure 1 It is a flow chart of a method for designing a readout circuit of a single-chip multi-spectral detection chip provided in an embodiment of the present application;

[0013] Figure 2 is a schematic diagram of an uncooled readout circuit provided in an embodiment of the present application;

[0014] Figure 3 is a schematic diagram of a visible light readout circuit provided in an embodiment of the present application;

[0015] Figure 4 It is a schematic diagram of the location of the super pixel layout device provided in the embodiment of the present application;

[0016] Figure 5 It is a schematic diagram of the overall layout of superpixels provided in an embodiment of the present application;

[0017] Figure 6 It is a schematic diagram of the overall layout of the readout circuit of a single-chip multi-spectral detection chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0019] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0020] Modern multi-scenario applications require detectors to adapt to different environments, and detectors with a single spectrum are difficult to meet their needs. Multispectral detectors have excellent target recognition capabilities and will have broad application space in the future. They have become an important development direction in the field of detectors.

[0021] Currently, most multispectral detectors are implemented by using additional filters or growing semiconductor materials with different band gaps on a single substrate. However, the above approach will greatly increase the preparation and complexity of the device, and the spectral width that can be expanded is very limited.

[0022] In order not to increase the complexity of device design and processing, multi-spectral optoelectronic fusion system has become a widely used method. This method is to integrate detectors of two different spectral bands into the same detection system. For example, by integrating visible light detectors and uncooled infrared detectors into the same detection system, the visible light detector can not only realize target detection, but also identify the detailed features of the target. This is different from the infrared detector and has a relative advantage. However, the target recognition ability of the visible light detector is limited in the dark environment, and the infrared detector has more advantages under this environmental condition. Therefore, integrating the visible light detector and the infrared detector into the same detector can improve the environmental adaptability of the detection system.

[0023] However, current multi-spectral fusion optoelectronic systems basically use independent visible light, uncooled infrared detectors and optical and processing circuits. The two sensors cannot be accurately matched in terms of optical axis, field of view angle, etc., which leads to many limitations in use.

[0024] In order to solve the problems of the related art, an embodiment of the present application provides a method for designing a readout circuit of a single-chip multi-spectral detection chip.

[0025] The following, in conjunction with the accompanying drawings, describes in detail the single-chip multi-spectral detection chip readout circuit design method provided by the embodiment of the present application through specific embodiments and their application scenarios.

[0026] Firstly, two design schemes for monolithic integrated multi-spectral detection chip are proposed. The first scheme is to use TSV (Through Silicon Via) technology to realize 3D stacking of visible light detectors and uncooled infrared detectors at chip level. The second scheme is the monolithic integration of in-situ fusion and processing circuits at the pixel level, completing the fusion at the readout circuit level and subsequent device processing.

[0027] Specifically, the first solution is to use TSV technology to achieve 3D stacking of visible light detectors and uncooled infrared detectors at the chip level. This solution requires the design of an uncooled readout circuit and a visible light circuit respectively. It is necessary to ensure that the two detectors have the same array specifications and pixel size. After the two circuits are designed, the corresponding devices should be prepared separately, and then the vertical conduction between the detector chips is completed through TSV technology to achieve monolithic integration of the two detectors.

[0028] The second solution is to design the schematic diagram of the visible light readout circuit and the schematic diagram of the uncooled readout circuit separately, and then integrate the layouts of the visible light readout circuit and the uncooled readout circuit into the same layout, complete the integration at the readout circuit level, and then process and prepare the uncooled device after tape-out, thereby completing the design and processing of the monolithic multi-spectral detector integrated chip.

[0029] Furthermore, the feasibility of the two solutions is analyzed and compared, and the design, processing and implementation of the two solutions are demonstrated in detail to select the better one.

[0030] In the first solution, TSV technology is relatively clear and easy to implement in chip design, but it is difficult to interconnect in the future, with a high probability of failure. In addition, the use of TSV requires consideration of the mutual influence between the two chips. If the non-cooling chip is placed on the visible light chip, the non-cooling chip may block the visible light and affect the absorption of the visible light detector. If the visible light chip is placed on the non-cooling chip, the visible light detector chip will continue to heat up during operation, affecting the detection of the signal by the non-cooling thermistor. Therefore, the TSV solution is not suitable.

[0031] The second solution is to design the readout circuit of the visible light detector and the readout circuit of the uncooled detector separately, complete the in-situ integration of the visible light pixel layout and the uncooled pixel layout, and integrate the processing circuits of the two circuits into the same layout. The designed layout is taped out, and the wafer factory completes the processing of the readout circuit and the photosensitive device of the visible light circuit. After the tape-out is completed, the uncooled device manufacturer completes the processing of the uncooled device on the wafer. This solution uses conventional processes for tape-out and processing, which is relatively less risky and does not increase the complexity of the process. Therefore, the second solution was finally selected.

[0032] Figure 1 FIG. 2 shows a flow chart of the second solution, that is, the method for designing a readout circuit of a single-chip multi-spectral detection chip according to an embodiment of the present application. Figure 1 As shown, the single-chip multi-spectral detection chip readout circuit design method may specifically include the following steps:

[0033] S101, design a visible light detector readout circuit and an uncooled infrared detector readout circuit respectively;

[0034] S102, fusing pixels of a visible light detector readout circuit and pixels of an uncooled infrared detector readout circuit according to a preset ratio to obtain a super pixel;

[0035] S103, integrating the superpixel, the visible light detector readout circuit processing circuit, the uncooled infrared detector readout circuit processing circuit, the visible light detector readout circuit IO and the uncooled infrared detector readout circuit IO into the same layout to obtain a single-chip multi-spectral detection chip readout circuit layout;

[0036] S104, tape out the readout circuit layout of the monolithic multi-spectral detection chip, process the photosensitive device, and process the non-refrigeration device, and finally obtain the monolithic multi-spectral detection chip.

[0037] Thus, the visible light detector and the infrared detector are integrated into the same fusion detector chip, and the fusion is completed at the readout circuit level through in-situ fusion at the pixel level and monolithic integration of the processing circuit, and the related devices are processed, so that dual-band detection of the visible light band and the infrared band can be realized, effectively increasing the spectral band width that the detector can detect. In addition, the process manufacturing complexity of this design method is low, and it solves the problem that the multi-spectral detection system cannot be accurately matched in terms of optical axis, field of view angle, etc., meets the equipment's requirements for accurate matching of multi-spectral fusion images and miniaturization and lightweight, and broadens the application scenarios of multi-spectral detection.

[0038] The specific implementation methods of the above steps are introduced below.

[0039] In some embodiments, in S101, the circuit schematic design of a monolithic integrated multi-spectral detection chip is completed, mainly including the uncooled readout circuit schematic design and simulation, the visible light readout circuit schematic design and simulation, and the monolithic multi-spectral fusion circuit design.

[0040] Specifically, the design and simulation of the visible light readout circuit is completed, including the design and simulation of modules such as the visible light pixel array, PGA, sample and hold circuit, ADC, bias circuit, and LVDS digital circuit; the design and simulation of the uncooled readout circuit is completed, including the design and simulation of modules such as the pixel array, sample and hold circuit, ADC, and digital circuit. Finally, the visible light readout circuit and the uncooled readout circuit are combined into a schematic diagram of an overall monolithic multi-spectral fusion circuit.

[0041] refer to Figure 2 , is the schematic diagram of the uncooled readout circuit. Figure 2 As shown, the uncooled infrared detector readout circuit includes: an uncooled pixel array, a mirror circuit, an automatic gain correction circuit (AGC), an integral sampling circuit, a second analog-to-digital converter (column-level ADC), and a digital circuit.

[0042] Among them, the photosensitive device is a thermistor, which is used to convert the received radiation energy into a resistance change value, and the resistance value of the thermistor includes the vanadium oxide resistance and the titanium connection resistance; the integral sampling circuit includes an integrator, which is used to integrate the integral current to achieve amplification and filtering; the integrator includes an integral capacitor and a polysilicon resistor; the integral sampling circuit includes a second sample-and-hold circuit, which is used to keep the level obtained after the integration is completed on the sample-and-hold capacitor; the second sample-and-hold circuit includes a switch and a sampling capacitor.

[0043] Optionally, the pixel part only includes a control switch in the schematic diagram, and the photosensitive device of the non-cooled readout circuit is a thermistor Rs, which needs to be processed later. The function of the pixel resistor is to convert the received radiation energy into a resistance change value. The resistance value of Rs includes two parts, namely the vanadium oxide resistance and the Ti connection resistance.

[0044] Optionally, the function of the mirror circuit is mainly to subtract the fixed current flowing through the resistor Rd from the induced current flowing through the pixel resistor Rs to obtain the integral current Iint, and at the same time, it can suppress the noise of the input bias voltages GSK, Veb and DETCOM to a certain extent. The mirror circuit includes three vanadium oxide resistors, Rd, Rdm and Rsm, and corresponding saturation tubes Mp, Mpm and Mnm. Rd, Rdm and Rsm are dummy units, whose temperatures are approximately equal to the substrate temperature and have nothing to do with the target temperature. Rsm adopts a non-released dummy structure with basically no Ti resistors. The resistance of Rd is 4Rs, and the ratio of the size of the mirror column to the readout column is 16 / 1. Rd is obtained by connecting two parallel and two series of Rdu. The resistance of Rdu is 4Rs, which is a LongDummy unit resistor. The volume is about 15 times that of Rs, and the flicker noise can be significantly suppressed. Rdm is obtained by connecting 16 Rd in parallel. In order to solve the problem of uneven OCC calibration under high and low temperatures, Rsm is set to multiple gears to improve the accuracy. 2R, 4R, 8R, 16R, and 32R are optional, and the control data is 13 bits.

[0045] Optionally, the function of the automatic gain correction circuit is to convert the integrated current into a voltage, and at the same time, the integrated current is changed from being very sensitive to the substrate temperature to being almost unaffected by the substrate temperature, which can greatly reduce the sensitivity of Vint and the response rate to the substrate. The automatic gain correction circuit includes vanadium oxide resistors Rd2 and Rdm2, an operational amplifier, and a filter capacitor.

[0046] Optionally, the integrator integrates the integrated current, plays the role of amplification and filtering, and the sampling and holding circuit holds the level obtained after the integration is completed on the sampling and holding capacitor. The integrator includes an integration capacitor Cint, a polysilicon resistor Rpl, an operational amplifier, and the sampling and holding circuit includes a corresponding switch and a sampling capacitor.

[0047] Optionally, the function of the second analog-to-digital converter is to convert the sampled voltage of a row of integrators into a 14-bit Gray code serial signal through a column selection switch, and then convert it into a 4-way parallel signal output. When the readout circuit is working, the row selection signal selects a row of pixels, and the ADC of each column converts the sample and hold signal of each column into a digital signal, which is then selected one by one through the column selection switch and then output to the outside of the chip.

[0048] Optional, uncooled readout circuit array size 960 × 540, pixel center spacing 24μm.

[0049] refer to Figure 3 , is the schematic diagram of the visible light readout circuit. Figure 3As shown, the visible light detector readout circuit includes: a visible light pixel array, a row drive and timing control module, a programmable operational amplifier (PGA), a first sample and hold circuit, a first analog-to-digital converter (ADC), a bias circuit, and a low voltage differential signal digital circuit (LVDS).

[0050] Among them, the row drive and timing control module uses a shift register chain to generate a row selection signal for the visible light pixel array; the bias circuit provides the required bias voltage and current for each module of the readout circuit; the visible light pixel array uses an 8T voltage domain global pixel to convert the induced charge into an integral voltage and store it on a holding capacitor; the programmable operational amplifier and the first sample-and-hold circuit work together to complete the sampling and holding of the integral voltage, so that the sample-and-hold voltage is quantized by the first analog-to-digital converter and output through the low voltage differential signal digital circuit.

[0051] Optionally, the programmable operational amplifier includes an amplifier, a timing switch, and a capacitor.

[0052] Optionally, the visible light readout circuit array has a specification of 1920×1080 and a pixel pitch of 12 μm.

[0053] Furthermore, in some embodiments, in S102, the design of the visible light and uncooled pixel fusion super-pixel needs to take into account the characteristics of the two readout circuits and combine with the device to arrange the pixel structure. For the visible light CMOS image sensor, the photosensitive element and the processing circuit are designed together, and the generated photoelectric signal is weaker. Therefore, the super-pixel fusion design needs to ensure that the photosensitive element has a sufficiently large duty cycle. Therefore, in the super-pixel structure, the uncooled long-wave infrared pixel is located at the center of the super-pixel, and the visible light pixels are distributed at the four corners of the super-pixel, and the spatial distribution uniformity of the visible light pixels needs to be ensured.

[0054] As an optional embodiment, the visible light readout circuit pixels and the uncooled readout circuit pixels may be integrated into a super pixel at a ratio of 4:1, wherein the uncooled readout circuit pixels are located at the center of the super pixel.

[0055] Figure 4 Figure 2 shows a schematic diagram of the location of the super pixel layout device. Figure 4 As shown, the four quadrilaterals in the super-pixel are the photosensitive areas of the visible light readout circuit, that is, the positions of the four pixels; the two octagons are the positions of the bridge piers required for the processing of the vanadium oxide resistor device of the non-cooled readout circuit pixel, and the two bridge piers determine the two ends of the vanadium oxide resistor.

[0056] Figure 5 Figure 2 shows a schematic diagram of the overall layout of superpixels. Figure 5As shown in the figure, the entire super pixel integrates four visible light pixels and one uncooled pixel. The visible light pixel and the uncooled pixel work independently without interfering with each other. The super pixel design ensures dual-band detection of the visible spectrum and the infrared spectrum.

[0057] Furthermore, in some embodiments, in S103, the layout design of the monolithic integrated multi-spectral detection chip is completed, mainly including the layout design of the non-cooling processing circuit, the layout design of the visible light processing circuit, and the monolithic multi-spectral layout fusion design.

[0058] refer to Figure 6 , is a schematic diagram of the overall layout of the readout circuit of a single multi-spectral detection chip. Figure 6 As shown, the overall layout of the readout circuit of the monolithic multi-spectral detection chip mainly includes superpixels, uncooled readout circuit processing circuits, visible light readout circuit processing circuits, uncooled readout circuit IO, and visible light readout circuit IO. Among them, the uncooled readout circuit processing circuit structure is distributed on the upper and right sides of the superpixel layout, and the visible light readout circuit processing circuit structure is distributed on the lower, left, and right sides of the superpixel layout; the uncooled readout circuit IO is distributed on the upper and right sides of the overall layout, and the visible light readout circuit processing circuit IO is distributed on the lower, left, and right sides of the superpixel layout.

[0059] In this way, the layout design of the single-chip multi-spectral fusion circuit is completed, including the layout design of the fusion superpixel, and the layout design of the signal processing circuit of the visible light digital circuit and the uncooled digital circuit. The pixels of the two circuits are in the same area on the layout, the processing circuit of the uncooled readout circuit is located above and to the right of the pixel, and the processing circuit of the visible light readout circuit is located below, to the left and to the right of the pixel. Finally, the IO design of the fusion circuit is completed.

[0060] In addition, it should be noted that in view of the design timing control requirements of the monolithic multi-spectral fusion circuit, this design adopts the method of performing timing control on the uncooled readout circuit and the visible light readout circuit separately. That is, in the readout circuit of the monolithic multi-spectral detection chip, the timing control is performed on the visible light detector readout circuit and the uncooled infrared detector readout circuit separately.

[0061] Furthermore, in some embodiments, in S104, after the layouts of the two circuits are integrated, the chip tape-out is completed, and the visible light sensing device is processed during the chip tape-out. After the tape-out is completed, the wafer is sent to a non-cooling device manufacturer for non-cooling device processing, thereby completing the design process of a single-chip multi-spectral hybrid chip.

[0062] In summary, the implementation method of the design method of the readout circuit of the monolithic multi-spectral detection chip of the embodiment of the present application mainly includes three parts, first, the schematic design of the non-cooled and visible light readout circuits, second, the pixel-level fusion super-pixel design of the visible light readout circuit and the non-cooled readout circuit, and finally, the layout design and device processing design of the monolithic multi-spectral fusion circuit. Finally, a monolithic multi-spectral fusion circuit with an array specification of 1920×1080 for the visible light readout circuit and a center spacing of 12μm for the visible light pixel, an array specification of 960×540 for the non-cooled readout circuit, and a center spacing of 24μm for the non-cooled readout circuit pixel can be obtained.

[0063] In this way, the fusion design of the visible light detector chip and the non-refrigerated detector chip is completed at the readout circuit level, realizing a dual-band detector that takes into account both the visible light band and the infrared band, and effectively increasing the spectral band width that the detector can detect. In addition, this method solves the problem that the existing multi-spectral fusion optoelectronic system cannot accurately match the optical axis, field of view angle, etc., and broadens the application scenarios of multi-spectral detection. In addition, the design method of the embodiment of the present application can take into account the current visible light photosensitive devices and non-refrigerated devices in terms of process processing. Both devices can be processed using conventional processes without increasing the complexity of process manufacturing. At the same time, the design method is simple to understand and easy to operate and implement.

[0064] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0065] Reference to "embodiment" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiment may be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments.

[0066] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", and "attached" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0067] In the embodiments of the present application, the same reference numerals represent the same components, and for the sake of brevity, detailed descriptions of the same components are omitted in different embodiments. It should be understood that the thickness, length, width and other dimensions of various components in the embodiments of the present application shown in the drawings, as well as the overall thickness, length, width and other dimensions of the integrated device are only exemplary descriptions and should not constitute any limitation to the present application.

[0068] The term "plurality" used in the present application refers to two or more (including two).

[0069] Although the present application has been described with reference to preferred embodiments, various modifications may be made thereto and parts thereof may be replaced with equivalents without departing from the scope of the present application. In particular, the various technical features mentioned in the various embodiments may be combined in any manner as long as there is no structural conflict. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

[0070] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0071] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A method for designing a readout circuit for a single-chip multi-spectral detection chip, characterized in that: include: Design the visible light detector readout circuit and the uncooled infrared detector readout circuit respectively; A super pixel is obtained by fusing pixels of a visible light detector readout circuit and pixels of an uncooled infrared detector readout circuit according to a preset ratio; Integrate the superpixel, visible light detector readout circuit processing circuit, uncooled infrared detector readout circuit processing circuit, visible light detector readout circuit IO and uncooled infrared detector readout circuit IO into the same layout to obtain a single-chip multi-spectral detection chip readout circuit layout; The readout circuit layout of the monolithic multi-spectral detection chip is taped out, and the photosensitive device is processed, and the non-refrigeration device is processed, so as to finally obtain the monolithic multi-spectral detection chip.

2. The method according to claim 1, characterized in that The uncooled infrared detector readout circuit pixel is located at the center point of the superpixel.

3. The method according to claim 1, characterized in that In the readout circuit of the single-chip multi-spectral detection chip, the timing control is performed on the visible light detector readout circuit and the uncooled infrared detector readout circuit respectively.

4. The method according to claim 1, characterized in that: The visible light detector readout circuit includes: a visible light pixel array, a row drive and timing control module, a programmable operational amplifier, a first sample and hold circuit, a first analog-to-digital converter, a bias circuit, and a low voltage differential signal digital circuit; The row drive and timing control module uses a shift register chain to generate a row selection signal for the visible light pixel array; The bias circuit provides bias voltage and current; The visible light pixel array adopts 8T voltage domain global pixel to convert the induced charge into an integrated voltage and store it on the holding capacitor; The programmable operational amplifier and the first sample-and-hold circuit work together to complete the sampling and holding of the integrated voltage, so that the sample-and-hold voltage is quantized by the first analog-to-digital converter and then output through the low voltage differential signal digital circuit.

5. The method according to claim 4, characterized in that The programmable operational amplifier comprises an amplifier, a timing switch and a capacitor.

6. The method according to claim 1, characterized in that The uncooled infrared detector readout circuit comprises: an uncooled pixel array, a mirror circuit, an automatic gain correction circuit, an integral sampling circuit, and a second analog-to-digital converter.

7. The method according to claim 1, characterized in that The photosensitive device is a thermistor, which is used to convert the received radiation energy into a resistance change value. The resistance value of the thermistor includes the vanadium oxide resistance value and the titanium connection resistance value.

8. The method according to claim 6, characterized in that The integral sampling circuit includes an integrator for integrating the integral current to achieve amplification and filtering; The integrator includes an integrating capacitor and a polysilicon resistor.

9. The method according to claim 6, characterized in that The integration sampling circuit includes a second sample-and-hold circuit for holding the level obtained after the integration is completed on the sample-and-hold capacitor; The second sample-and-hold circuit includes a switch and a sampling capacitor.

10. The method according to claim 1, characterized in that In the readout circuit of the monolithic multi-spectral detection chip, the visible light detector readout circuit array specification is 1920×1080, the visible light detector readout circuit pixel center spacing is 12 μm, the uncooled infrared detector readout circuit array specification is 960×540, and the uncooled infrared detector readout circuit pixel center spacing is 24 μm.

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