Light emitting diode and light emitting device

Abstract

The invention provides a light-emitting diode and a light-emitting device.The light-emitting diode comprises a substrate and a semiconductor lamination layer located on the front face of the substrate, the horizontal projection of the substrate has a square outer edge contour, and the semiconductor lamination layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are stacked in sequence; the horizontal projection of the semiconductor lamination has a circular outer edge contour; the first bonding pad electrode is formed on the semiconductor lamination layer and is electrically connected with the first semiconductor layer; and the second bonding pad electrode is formed on the semiconductor lamination layer and is electrically connected with the second semiconductor layer. The circular light-emitting surface is more favorable for realizing the effects of current expansion and uniform distribution, the current density and the light-emitting brightness of the chip are more uniform, and meanwhile, the undesirable phenomena of over-high local temperature, poorer heat dissipation performance and the like caused by current density difference in the use process of the product are improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a light emitting diode and a light emitting device. Background Art

[0002] Light Emitting Diode (LED) is a semiconductor device whose basic structure includes a PN junction between a P-type semiconductor and an N-type semiconductor. When a forward voltage is applied to the LED, electrons and holes recombine at the junction of the PN junction to release energy, which is emitted in the form of photons to form light radiation.

[0003] In the prior art, LED products with rectangular light-emitting surfaces will have a phenomenon of alternating light and dark spots during use, which is not enough to meet the use fields with high requirements for light spots, such as the lighting market of car lights, flashlights, etc. In addition, during long-term use, this uneven current distribution and heat dissipation problem will also cause a significant decline in the electrical performance of the product and shorten the product life. Therefore, it is necessary to provide a technical solution to solve or improve the above problems. Summary of the invention

[0004] In view of the defects and shortcomings of the prior art LED products mentioned above, the purpose of this application is to provide a light emitting diode and a light emitting device to improve the current distribution and heat dissipation performance of the chip, improve the light uniformity and light brightness, and meet the increasingly high requirements for the use of LED products.

[0005] According to one aspect of the present application, a light emitting diode is provided, comprising:

[0006] a substrate having opposite front and back surfaces,

[0007] The horizontal projection of the substrate has a square outer edge contour;

[0008] A semiconductor stack is located on the front side of the substrate, the semiconductor stack comprises a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, and a horizontal projection of the semiconductor stack has a circular outer edge profile;

[0009] A first pad electrode is formed on the semiconductor stack and is electrically connected to the first semiconductor layer;

[0010] A second pad electrode is formed on the semiconductor stack and is electrically connected to the second semiconductor layer; wherein the horizontal projection is defined as the projection of the light emitting diode in the top-view direction.

[0011] According to one aspect of the present application, there is also provided a light emitting device, comprising:

[0012] Package substrate;

[0013] At least one light emitting diode, the light emitting diode comprising:

[0014] A substrate having a front side and a back side opposite to each other, wherein a horizontal projection of the substrate has a square outer edge contour, and the front side of the substrate has a first portion and a second portion;

[0015] A semiconductor stack is located on a first portion of the front side of the substrate, the semiconductor stack comprises a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, a horizontal projection of the first portion of the front side of the substrate has a circular outer edge contour, and the horizontal projection is defined as a projection of the light emitting diode in a top-view direction;

[0016] An insulating adhesive layer is formed on the second portion of the front surface of the substrate and contacts the packaging substrate.

[0017] Compared with the prior art, the light emitting diode and the light emitting device provided by the present application have at least the following beneficial effects:

[0018] The technical solution of the present application provides a light-emitting diode with a circular light-emitting surface, the light-emitting diode includes a substrate and a semiconductor stack located on the front side of the substrate, the semiconductor stack includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, and the horizontal projection of the semiconductor stack has a circular outer edge contour. The circular semiconductor stack is more conducive to achieving the effect of current expansion and uniform distribution, and the current density and luminous brightness are more uniform. At the same time, it improves the undesirable phenomena such as local excessive temperature and poor heat dissipation performance caused by the difference in current density during the use of the product. Compared with existing LED products, the judge diode provided by this technical solution has higher quality reliability and longer service life.

[0019] In addition, the light-emitting device provided in the present application includes the light-emitting diode provided by the above technical solution, so the light-emitting device also has the above good technical effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of a top view of the structure of a light emitting diode provided in Example 1 of the present application;

[0021] Figure 2 for Figure 1 Schematic diagram of the cross-sectional structure along the middle line AA;

[0022] Figure 3 for Figure 1 A schematic diagram of the local enlarged structure at B in the middle;

[0023] Figure 4a to Figure 4h A schematic diagram of the manufacturing process of a light emitting diode provided in Example 1 of the present application;

[0024] Figure 5A schematic diagram of a top view of the structure of a light emitting diode provided in Example 2 of the present application;

[0025] Figure 6 A schematic diagram of the through hole and electrode structure of a light emitting diode provided in the second embodiment of the present application;

[0026] Figure 7 This is a schematic diagram of the structure of the light-emitting device provided in Example 3 of the present application.

[0027] List of reference numerals:

[0028] 10 Substrate

[0029] 101 Insulation layer

[0030] 20 Semiconductor stack

[0031] 210 first semiconductor layer

[0032] 220 Active layer

[0033] 230 Second semiconductor layer

[0034] 201 Through hole

[0035] 202 Peripheral part

[0036] 202a First outer side wall

[0037] 203 Semiconductor Platform

[0038] 203a Second outer side wall

[0039] 30 Transparent conductive layer

[0040] 40 First insulation layer

[0041] 50 Reflection layer

[0042] 60 Second insulation layer

[0043] 71 first contact electrode

[0044] 72 second contact electrode

[0045] 80 Third insulation layer

[0046] 91 first pad electrode

[0047] 911 First Edge Part 1

[0048] 912 First Edge Part 2

[0049] 92 second pad electrode

[0050] 921 Second Edge Part 1

[0051] 922 The Second Edge Part 2

[0052] 100 Buffer

[0053] 1 Lighting device

[0054] 11 Package substrate

[0055] 12 Light-emitting element

[0056] OP1 First opening

[0057] OP2 Second opening

[0058] OP3 Third opening

[0059] OP4 Fourth opening

[0060] OP5 Fifth opening

[0061] S1 First Area

[0062] S2 Second Area

[0063] S3 Third Region DETAILED DESCRIPTION

[0064] The following specific embodiments illustrate the implementation of the present application, and those familiar with the technology can easily understand other advantages and effects of the present application from the content disclosed in this specification. The present application can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0065] It should be noted that the diagrams provided in the embodiments of the present application are only schematic illustrations of the basic concept of the present application. Although the diagrams only show the components related to the present application rather than the number, shape and size of the components in the actual implementation, the form, quantity and proportion of each component can be changed at will during the actual implementation, and the component layout form may also be more complex. The structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the restrictive conditions that can be implemented in the present application, so they have no technical substantive significance. Any modification of the structure, change in the proportional relationship or adjustment of the size should still fall within the scope of the technical content disclosed in the present application without affecting the effects and purposes that can be achieved by the present application.

[0066] For ease of description, the direction from the substrate to the semiconductor stack is defined as upward, and the opposite direction is defined as downward. The projection from the top view direction of the light emitting diode downward to the horizontal plane is defined as horizontal projection.

[0067] Embodiment 1:

[0068] This embodiment provides a light emitting diode, see Figure 1 and Figure 2 , Figure 1 and Figure 2 The top view and cross-sectional view of the light emitting diode provided in this embodiment are shown respectively. The light emitting diode comprises a substrate 10, the substrate 10 having a front side and a back side opposite to each other, and a semiconductor stack 20, a transparent conductive layer 30, a first insulating layer 40, a reflective layer 50, an insulating structure, and an electrode structure formed sequentially on the front side of the substrate. The size of the light emitting diode provided in this embodiment is greater than 1000 μm*1000 μm.

[0069] In one embodiment, the substrate 10 is used as an epitaxial growth substrate, and a conductive material, an insulating material, or a light-transmitting material with excellent thermal conductivity can be used, such as a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a gallium arsenide substrate, or a silicon substrate. In this embodiment, the substrate 10 is a surface-patterned sapphire substrate to improve the epitaxial quality of the semiconductor stack 20 and scatter the light emitted from the semiconductor stack 20. Furthermore, the front projection of the substrate 10 is a rectangle, and the horizontal projection area of ​​the substrate 10 is larger than the horizontal projection area of ​​the semiconductor stack 20.

[0070] Further, see Figure 2 The substrate 10 has a front side and a back side opposite to each other. The horizontal projection of the substrate 10 has a square outer edge profile. The front side of the substrate 10 has a first part and a second part. The first part occupies between 40% and 90% of the front side of the substrate. The semiconductor stack 20 is located on the first part of the front side of the substrate 10. An insulating adhesive layer 101 is arranged on the second part of the front side of the substrate 10. The insulating adhesive layer 101 contacts the package substrate. The insulating adhesive layer 101 is a reflective adhesive layer or a light shielding layer.

[0071] See also Figure 1 and 2The semiconductor stack 20 has a circular outer edge projection profile, including a first semiconductor layer 210, an active layer 220 and a second semiconductor layer 230 stacked in sequence. The semiconductor stack 20 is located at the first part of the front surface of the substrate, that is, the center of the substrate 10. There is a minimum spacing D between the edge projection of the semiconductor stack 20 and each sidewall edge projection of the substrate 10, and the spacing D is between 0μm and 200μm, for example, 50μm, 80μm, 100μm or 120μm. The semiconductor stack 20 is formed on the substrate 10 by methods such as organic metal chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD) or ion plating. The first semiconductor layer 210, the active layer 220 and the second semiconductor layer 230 can be formed of a compound semiconductor of the III-group gallium nitride series, for example, GaN, AlN, InGaN, AlGaN, InAlGaN and at least one of the above materials. The first semiconductor layer 210 is a layer that provides electrons and can be formed by injecting n-type dopants (e.g., Si, Ge, Se, Te, C, etc.). The second semiconductor layer 230 is a layer that provides holes and can be formed by injecting p-type dopants (e.g., Mg, Zn, Be, Ca, Sr, Ba, etc.). The active layer 220 is a layer that outputs light of a predetermined wavelength by combining the electrons provided by the first semiconductor layer 210 and the holes provided by the second semiconductor layer 230 again. It can be formed by a semiconductor thin film of a single layer or a multi-layer quantum well structure with alternately stacked potential well layers and barrier layers. The active layer 220 will select different material compositions or ratios according to the different wavelengths of the output light. The active layer 220 can use group III to group V compound semiconductor materials, for example, at least one of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs or GaP (InGaP) / AlGaP.

[0072] See below Figure 1 To Figure 4, where Figure 4a to Figure 4h A schematic diagram of the manufacturing process of the light emitting diode provided in this embodiment.

[0073] First, a semiconductor stack 20 is formed on a first portion of the substrate 10, and a horizontal projection area of ​​the semiconductor stack 20 accounts for 40% to 90% of the horizontal projection area of ​​the substrate 10. Further, a horizontal projection area of ​​the semiconductor stack 20 accounts for 50% to 80% of the horizontal projection area of ​​the substrate 10.

[0074] The semiconductor stack 20 includes a through hole 201, a peripheral portion 202 and a semiconductor platform 203. The semiconductor stack 20 is patterned by photolithography, etching and the like to form the through hole 201, and the through hole 201 is etched to expose a portion of the surface of the first semiconductor layer 210 by etching the second semiconductor layer 230, the active layer 220 and a portion of the first semiconductor layer 210. The peripheral portion 202 is a portion of the surface of the first semiconductor layer 210 exposed by removing the second semiconductor layer 230, the active layer 220 and a portion of the first semiconductor layer 210 by etching and the like, and the peripheral portion 202 surrounds the semiconductor platform 203, and the peripheral portion 202 includes a first outer side wall 202a connected to the substrate 10, and the semiconductor platform 203 includes a second outer side wall 203b connected to the peripheral portion 202.

[0075] The through holes 201 may be regularly distributed on the semiconductor platform 203. It should be understood that the configuration and number of the through holes 201 may be changed in various ways. The exposed area of ​​the first semiconductor layer 210 is not limited to a shape corresponding to the shape of the through hole 201. For example, the exposed area of ​​the first semiconductor layer 210 may have a linear shape or a combination of a hole and a linear shape, so that the downstream client can easily distinguish the first pad electrode 91 and the second pad electrode 92.

[0076] In an alternative embodiment, see Figure 1 , the through holes 201 are arranged in a circular array, and the through holes 201 are all located in the area of ​​the semiconductor platform 203 and do not contact the peripheral portion 202. Further, the through holes 201 are arranged in a circular array with equal spacing, and the through holes 201 are evenly distributed within the semiconductor stack 200, and the spacing between adjacent through holes 201 is between 100nm and 300nm, such as 120μm to 150μm, 160μm to 200μm, 220μm to 260μm, etc. The edge of the through hole 201 has a distance from the side of the first outer side wall 202a of the semiconductor stack 20 away from the edge of the substrate 10, and the distance is between 50μm and 100μm. Further, in the radial direction from the center of the light-emitting diode to the outer edge, the number of array circles of the through hole 201 is n, 3≤n≤8, to provide a suitable current density.

[0077] This embodiment aims at the special structure of circular light-emitting diodes, and optimizes the traditional single large-area through-hole into multiple through-holes with smaller areas to form circular multi-point uniform contact, which can effectively disperse the charge, thereby reducing the local electric field strength. It can also improve the large-area pits on the upper surface of the electrode when the traditional large-size through-hole is used to make the pad electrode, thereby ensuring the structural strength of the chip and improving the structural stability of the product. In an optional embodiment, the diameter of the through-hole 201 is between 20μm and 80μm, for example, 25μm to 45μm, 55μm to 65μm or 70μm to 75μm. The through-hole 201 is a non-light-emitting hole in the light-emitting area, so the diameter of the through-hole 201 should not be too large, otherwise it will cause black spots, but if the diameter of the through-hole 201 is too small, it will cause current crowding and affect the electrical performance of the product. Furthermore, the diameter of the through-hole 201 is between 40μm and 60μm. In the optional embodiment, continue to refer to Figure 1 The horizontal projection shape of the through hole 201 includes one or more of a circle, an ellipse or a polygon with an arc chamfer. The through hole 201 provided in this embodiment is a circle and a square. The side length of the square through hole 201 is equal to the diameter parameter of the circular through hole 201 to achieve a relatively uniform charge distribution. The square through holes are distributed in the second area S2, that is, the area covered by the second pad electrode 92. The second area S2 includes two different shapes of through hole structures, a circle and a square. The through holes 201 are set to different shapes to facilitate downstream identification of electrode positions and directions.

[0078] Continue to see Figure 1 To Figure 4, Figure 4a and Figure 4b The figure is a schematic diagram of a process of forming a transparent conductive layer 30 on a semiconductor platform 203. The projection shape of the transparent conductive layer 30 depends on the shape of the semiconductor stack 20 and is also circular. The material of the transparent conductive layer 30 may be ITO, InO, SnO, CTO, ATO, ZnO, GaP or a combination thereof. The transparent conductive layer 30 may be formed on the semiconductor platform 203 by physical vapor deposition or chemical vapor deposition, and contact the second semiconductor layer 230. In an optional embodiment, the thickness of the transparent conductive layer 30 is between 5nm and 100nm. In an optional embodiment, there is a distance between the edge projection of the transparent conductive layer 30 and the side of the first outer side wall 202a of the semiconductor stack 20 away from the edge of the substrate 10, and the distance is between 0μm and 10μm.

[0079] Continue to see Figure 1 To Figure 4, Figure 4b and Figure 4cSchematic diagram of the process of forming the first insulating layer 40. The first insulating layer 40 is formed on the transparent conductive layer 30 by physical vapor deposition or chemical vapor deposition, and then the first insulating layer 40 is patterned by photolithography and etching. The projection shape of the first insulating layer 40 depends on the shape of the semiconductor stack 20 and is also circular. The first insulating layer 40 may include a plurality of first openings OP1 to expose the surface of the transparent conductive layer 30. The first insulating layer 40 may cover a portion of the surface of the transparent conductive layer 30, a portion of the surface of the first semiconductor layer 210, a portion of the surface of the peripheral portion 202, and a first outer sidewall 202a. In an optional embodiment, the first insulating layer 40 includes SiO2, SiN, SiO x N y , TiO2, Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO, TaO2 and MgF2. In an optional embodiment, the first insulating layer 40 may have a multilayer film structure in which insulating film layers with different refractive indices are alternately stacked, and the multilayer film structure includes a DBR structure in which a first insulating film and a second insulating film with different first and second refractive indices are alternately stacked. In an optional embodiment, the first insulating layer 40 may be formed of a material having a refractive index lower than the refractive index of the second semiconductor layer 230. The first insulating layer 40 may form a total reflector (ODR) together with the reflective layer 50 thereover to improve the light extraction efficiency of the product. Further, the thickness of the first insulating layer 40 is between 200nm and 1500nm. When the thickness of the first insulating layer 40 is less than 200nm, it cannot effectively block the current, resulting in current crowding and reducing the light extraction efficiency; if the thickness of the first insulating layer 40 exceeds 1500nm, it may increase the scattering and absorption of light, thereby reducing the light output power of the LED.

[0080] In an optional embodiment, the first openings OP1 are evenly distributed above the semiconductor stack 20, and the sum of the horizontal projection areas of the first openings OP1 accounts for 1% to 20% of the horizontal projection area of ​​the light-emitting diode, which helps to reduce the current crowding effect, thereby improving the light emission uniformity of the LED. Further, the sum of the horizontal projection areas of the first openings OP1 accounts for 2% to 10% of the horizontal projection area of ​​the light-emitting diode, so as to achieve a good balance between the current blocking effect and the light-emitting efficiency.

[0081] In an optional embodiment, the horizontal projection shape of the first opening portion OP1 is the same as the horizontal projection shape of the through hole 201, for example, it can be circular or square, and the diameter or side length of the first opening portion OP1 is between 10μm and 40μm. The appropriate opening size is conducive to achieving current uniformity and voltage stability. Furthermore, the diameter of the first opening portion OP1 is between 2μm and 20μm. It can be understood that the sum of the horizontal projection areas of the first opening portion OP1 depends on the diameter of the first opening portion OP1 and the number of the first opening portions OP1. In the actual manufacturing process, the number range and diameter range of the first opening portion OP1 are adjusted according to the distribution of the through hole 201 to achieve a better current blocking effect for the total etching area of ​​the first opening portion OP1.

[0082] Continue to see Figure 1 To Figure 4, Figure 4c and Figure 4d Schematic diagram of the process of forming a reflective layer 50 on the first insulating layer 40. The projection shape of the reflective layer 50 depends on the shape of the semiconductor stack 20 and is also circular. The reflective layer 50 contacts the transparent conductive layer 30 through the first opening OP1 of the first insulating layer 40 and is electrically connected to the second semiconductor layer 230. The outer edge of the reflective layer 50 can be located inside or outside the edge of the transparent conductive layer 30, or arranged to overlap and align with the transparent conductive layer 30. Furthermore, the outer edge of the reflective layer 50 is located inside the edge of the transparent conductive layer 30, and the horizontal projection area of ​​the reflective layer 50 is smaller than the area of ​​the second semiconductor layer, which optimizes the internal current distribution of the LED, reduces the influence of the interlayer structural stress on the structural strength of the product, and improves the reliability and stability of the product. Further, the semiconductor stack 20 includes a semiconductor platform 203 and a peripheral portion 202 surrounding the semiconductor platform 203, wherein the peripheral portion 202 is a ring-shaped platform formed by removing a portion of the second semiconductor layer 230, the active layer 220, and a portion of the first semiconductor layer 210 from the edge; the peripheral portion 202 has a first outer sidewall 202a, and the semiconductor platform 203 has a second outer sidewall 203a. In order to effectively reduce the risk of short circuit of the light-emitting diode due to the rupture of the first insulating layer 40 and meet the requirements of light reflection, the reflective layer 50 should have a suitable coverage area, and there is a minimum distance d between the reflective layer 50 and the second outer sidewall 203a, and the minimum distance d is between 1μm and 20μm, for example, 2μm to 4μm, 5μm to 7μm, 8μm to 10μm, or 12μm to 16μm.

[0083] In an optional embodiment, the reflective layer 50 may be formed as a single layer structure or a multilayer structure of a conductive material having ohmic characteristics with the transparent conductive layer 30. The reflective layer 50 may be formed of one or more materials such as gold (Au), tungsten (W), platinum (Pt), iridium (Ir), silver (Ag), aluminum (Al), copper (Cu), nickel (Ni), titanium (Ti), chromium (Cr), etc. and alloys thereof. The material of the reflective layer 50 provided in this embodiment is Ag.

[0084] Continue to see Figure 1 As shown in Figure 4, the light-emitting diode also includes a second insulating layer 60 and contact electrodes, and the contact electrodes include a first contact electrode 71 and a second contact electrode 72, wherein the second insulating layer 60 is located above and on the sidewalls of the semiconductor stack 20, and has a plurality of second openings OP2 and a plurality of third openings OP3; the second opening OP2 is located above the through hole 201, and the horizontal projection of the second opening OP2 is located within the horizontal projection range of the through hole 201, and the first contact electrode 71 is electrically connected to the first semiconductor layer 210 through the second opening OP2; the third opening OP3 is located above the second semiconductor layer 230, and the second contact electrode 72 is electrically connected to the second semiconductor layer 230 through the third opening OP3.

[0085] See also Figure 1 , Figure 2 and Figure 4e , a second insulating layer 60 is formed on the semiconductor platform 203 by physical vapor deposition or chemical vapor deposition, and then the second insulating layer 60 is patterned by photolithography and etching. The first insulating layer 40 covering the through hole 201 is partially etched away to form a second opening OP2 to expose a portion of the surface of the first semiconductor layer 210; the second insulating layer 60 also forms a third opening OP3 to expose a portion of the surface of the reflective layer 50. The material of the second insulating layer 60 can be formed of the same material as the first insulating layer 40, or it can be different, for example, it can be a single layer of insulating material or a DBR structure to reflect light of different specific wavelengths. See Figure 1, the semiconductor stack includes two opposite first regions S1 and second regions S2, the first pad electrode 91 is formed on the first region S1, and the second pad electrode 92 is formed on the second region S2; the area of ​​the first region S1 is greater than or equal to the area of ​​the second region S2, and the third opening OP3 is distributed within any light-emitting region, such as the second region S2, so as to facilitate the later production of the second pad electrode 92. Relatively, the first region S1 is the region for producing the first pad electrode 91. Within the scope of the second region S2, the third opening OP3 and the second opening OP2 are evenly spaced to achieve good electrical insulation effect and uniform current distribution. Further, there is a minimum distance between the adjacent third opening OP3 and the second opening OP2 to ensure the structural strength and good insulation performance of the second insulating layer 60 and the chip, and the distance is between 40μm and 100μm, for example, it can be 50μm, 60μm, 70μm, or 80μm.

[0086] Subsequently, a first contact electrode 71 and a second contact electrode 72 are formed by physical vapor deposition or magnetron sputtering. The first contact electrode 71 is filled in the through hole 201 and covers the second opening OP2 to contact the first semiconductor layer 210, and extends to cover a portion of the surface of the second insulating layer 60, wherein the first contact electrode 71 is insulated from the second semiconductor layer 230 by the second insulating layer 60. The second contact electrode 72 covers the third opening OP3 to contact the partial reflective layer 50, and extends to cover a portion of the surface of the second insulating layer 60, and the area of ​​the second contact electrode 72 is larger than the area of ​​the third opening OP3, or the minimum distance between the second contact electrode 72 and the first contact electrode 71 is smaller than the minimum distance between the third opening OP3 and the first contact electrode 71. The number of the second contact electrodes 72 corresponds to the number of the third openings OP3 and is electrically connected to the second semiconductor layer 230 through the third openings OP3. The second contact electrodes 72 and the through holes 201 do not overlap in a projection direction perpendicular to the semiconductor stack 20. The third openings OP3 are distributed within the second region S2. Figure 1 and Figure 4f It can be understood that the upper half (first region S1) of the circular light emitting diode is the N side, and the lower half (second region S2) is the P side. The projection of the first contact electrode 71 is circular, and the second contact electrode 72 is located within the projection range of the first contact electrode 71 and is insulated from the first contact electrode 71 by the second insulating layer 60.

[0087] See also Figure 1, the semiconductor stack 200 includes a third region S3, and a first region S1 and a second region S2 located on both sides of the third region S3. The third region S3 is a semiconductor stack region between the first pad electrode 91 and the second pad electrode 92, and is a long strip region that runs through the circular semiconductor stack 200. The first region S1 and the second region S2 on both sides of the third region S3 are approximately semicircular regions. In an optional embodiment, the area of ​​the first region S1 is greater than or equal to the area of ​​the second region S2, and the areas of the first region S1 and the second region S2 determine the areas of the first pad electrode 91 and the second pad electrode 92 to a certain extent. Furthermore, the area of ​​the first region S1 is equal to the area of ​​the second region S2, and the third region S3 is located at the center of the semiconductor stack 200.

[0088] In an alternative embodiment, see Figure 1 and Figure 4f The light emitting diode further includes a buffer portion 100, which is located between the second insulating layer 60 and the third insulating layer 80 and is covered by the second insulating layer 60 and the third insulating layer 80. At the same time, the buffer portion 100 is electrically isolated from the first contact electrode 71 and the second contact electrode 72. The horizontal projection of the buffer portion 100 is located within the range of the third region S3, and its horizontal projection shape is any one of a circle, an ellipse, or a polygon with an arc chamfer. Further, the buffer portion 100 is located at the exact center of the light emitting diode.

[0089] In the optional implementation mode, continue to see Figure 1 and Figure 4fThe buffer portion 100 is a rectangular structure with chamfers to match the third strip-shaped region S3 between the first pad electrode 91 and the second pad electrode 92. The long side of the buffer portion 100 is parallel to the first edge first portion 911 of the first pad electrode 91 and the second edge first portion 921 of the second pad electrode 92. The long side of the buffer portion 100 is between 200 μm and 400 μm, for example, 220 μm to 240 μm, 260 μm to 280 μm or 300 μm to 340 μm; the short side of the buffer portion 100 is between 20 μm and 200 μm, for example, 40 μm to 60 μm, 80 μm to 100 μm or 120 μm to 160 μm. It can be understood that the short side size of the buffer portion 100 is adapted to the distance between the first pad electrode 91 and the second pad electrode 92, for example, the distance between the first edge first portion 911 and the second edge first portion 921 is between 100μm and 200μm, and the short side size of the buffer portion 100 is between 60μm and 80μm. Further, in order to effectively electrically isolate the buffer portion 100 from the first contact electrode 71 and the second contact electrode 72, there is a first insulation distance between the buffer portion 100 and the first contact electrode 71, which is between 10μm and 30μm; there is a second insulation distance between the buffer portion 100 and the second contact electrode 72, which can also be between 10μm and 30μm. Further, the first insulation distance is equal to the second insulation distance, for example, it can be 20μm, so as to provide better electrical insulation performance, avoid short circuit, and retain sufficient contact electrode area.

[0090] In an optional embodiment, the material of the buffer portion 100 includes metal, and contains the same metal material as the first contact electrode 71 or the second contact electrode 72, such as nickel (Ni), platinum (Pt), palladium (Pd), silver (Ag), chromium (Cr), aluminum (Al), titanium (Ti), gold (Au) or a combination of the above materials. The thickness of the buffer portion 100 is designed based on its strength to withstand the detachment of the ejector pin, and can be greater than or equal to the thickness of the second contact electrode 72. The thickness of the buffer portion 100 provided in this embodiment can be the same as the thickness of the second contact electrode 72, so as to simplify the manufacturing process, and can also prevent the semiconductor stack 20 from being damaged during the detachment of the ejector pin and the occurrence of short circuits due to cracks in the second insulating layer 60 during the detachment of the ejector pin.

[0091] Continue to see Figure 1As shown in Figure 4, the light-emitting diode also includes a third insulating layer 80 and a pad electrode, the pad electrode includes a first pad electrode 91 and a second pad electrode 92, wherein the third insulating layer 80 is located above and on the side walls of the second insulating layer 60 and the contact electrode, and has a plurality of fourth openings OP4 and a plurality of fifth openings OP5; the fourth opening OP4 is located above the first contact electrode 71, and the first pad electrode 91 is electrically connected to the first semiconductor layer 210 through the fourth opening OP4; the fifth opening OP5 is located above the third opening OP3, and the horizontal projection of the fifth opening OP5 is located within the horizontal projection range of the third opening OP3, and the second pad electrode 92 is electrically connected to the second semiconductor layer 230 through the fifth opening OP5.

[0092] See also Figure 1 , Figure 2 and Figure 4g , a third insulating layer 80 is formed on the semiconductor stack 20 by physical vapor deposition or chemical vapor deposition, and then the third insulating layer 80 is patterned by photolithography and etching to form a fourth opening OP4 and a fifth opening OP5 to expose the first contact electrode 71 and the second contact electrode 72 respectively. The material selection and structural setting of the third insulating layer 80 are similar to those of the second insulating layer 60, and are not described in detail here. In an optional embodiment, the thickness of the third insulating layer 80 is between 500nm and 1500nm.

[0093] Then, see Figure 4hThe first pad electrode 91 and the second pad electrode 92 are formed on the third insulating layer 80 by electroplating, physical vapor deposition or chemical vapor deposition. The materials of the first pad electrode 91 and the second pad electrode 92 include a single material of gold (Au), tin (Sn), nickel (Ni), lead (Pb), silver (Ag), indium (In), chromium (Cr), germanium (Ge), silicon (Si), titanium (Ti), tungsten (W) and platinum (Pt), or a single film of an alloy of at least two of these materials, or a multilayer structure including a combination thereof. The first pad electrode 91 is formed in the fourth opening OP4 to contact the first contact electrode 71 and covers a portion of the surface of the third insulating layer 80. The fourth opening OP4 is distributed within the range of the first region S1. The second pad electrode 92 is formed in the fifth opening OP5 to electrically connect with the second contact electrode 72 and covers a portion of the surface of the third insulating layer 80. The fifth opening OP5 is located within the range of the second region S2. The first pad electrode 91 has a straight first edge first portion 911 parallel to the radial direction of the semiconductor stack 200, and an arc-shaped first edge second portion 912 surrounding the edge of the semiconductor stack 200; the second pad electrode 92 has a straight second edge first portion 921 parallel to the radial direction of the semiconductor stack 200, and an arc-shaped second edge second portion 922 surrounding the edge of the semiconductor stack 200. It can be understood that the horizontal projection of the first pad electrode 91 is semicircular and located within the range of the first area S1, the horizontal projection of the second pad electrode 92 is semicircular and located within the range of the second area S2, and the pad-free structure area between the first edge second portion 912 and the second edge second portion 922 is the third area S3. The total projection area of ​​the first pad electrode 91 and the second pad electrode 92 accounts for more than 50% of the area of ​​the semiconductor stack 20, and the larger pad electrode area provides better electrical connection and heat dissipation performance. In an optional implementation, the area of ​​the first pad electrode 91 is greater than or equal to the area of ​​the second pad electrode 92. By increasing the area of ​​the first pad electrode 91, the current can be dispersed more effectively, which helps to reduce the current density and reduce the thermal effect, thereby improving the stability and reliability of the LED. The area of ​​the first pad electrode 91 provided in this embodiment is equal to the area of ​​the second pad electrode 92, that is, the first pad electrode 91 and the second pad electrode 92 are symmetrically distributed. To achieve stable structural strength on both sides.

[0094] Embodiment 2:

[0095] like Figure 5 and Figure 6As shown, this embodiment also provides a light-emitting diode with a circular semiconductor stack, the light-emitting diode comprising a substrate 10, the substrate 10 having a front side and a back side opposite to each other, and a semiconductor stack 20, a transparent conductive layer, an insulating structure, and an electrode structure, etc., which are sequentially formed on the front side of the substrate. The similarities between this embodiment and the first embodiment are not described one by one, and the differences between this embodiment and the first embodiment are described in detail below.

[0096] Continue to see Figure 5 and Figure 6 The semiconductor stack 20 is patterned by photolithography, etching, etc. to form a through hole 201, which is a circular or elliptical structure. The circular semiconductor stack 200 includes a complementary first region S1 and a second region S2, and the first region S1 and the second region S2 are respectively approximately semicircular semiconductor stack regions.

[0097] The through holes 201 are not arranged in a regular annular array with equal spacing throughout the semiconductor stack, but the positions of the through holes 201 are optimized for the first area S1 and the second area S2 respectively.

[0098] In an optional embodiment, the through holes 201 within the first region S1 are arranged in an arc-shaped array with equal spacing within the region to effectively disperse the charge and thereby reduce the local electric field strength. Furthermore, the number of arc-shaped array layers of the through holes 201 is between 2 and 6, such as 3, 4 or 5 layers.

[0099] In an optional embodiment, the through holes 201 within the second region S2 are distributed in multiple rows of horizontal arrays. Further, there are two rows of through holes 201 within the first region S1, and the through holes 201 in each row are consistent with the minimum spacing of the second region S2, so as to provide a relatively uniform current density and improve the overall light uniformity of the two light-emitting regions.

[0100] See also Figure 6 The first contact electrode 71 has a main body portion that is approximately semicircular and located above the first area S1, an outer edge portion that surrounds the second contact electrode 72 at the edge of the second area S2, and an extension portion that extends from the straight line segment and the arc segment of the semicircular second area S2 into the second area respectively, the outer edge portion and the extension portion cover the through hole 201 in the above-mentioned semiconductor stacking area and are electrically connected to the first semiconductor layer through the through hole 201; the second contact electrode 72 is complementary in shape to the first contact electrode 71, the first pad electrode 91 is approximately semicircular and is located above the main body portion of the first contact electrode 71, and the second pad electrode 92 is located above the second contact electrode 72.

[0101] Embodiment three:

[0102] See also Figure 1 , Figure 2and Figure 7 This embodiment provides a light-emitting device 1, which is a flip-chip LED product, including a package substrate 11 and at least one light-emitting element 12, the light-emitting element 12 is arranged on the surface of the package substrate 11, and the package substrate 11 is electrically connected to the electrode structure of the light-emitting element 12. The light-emitting element 12 is a light-emitting diode provided in the first embodiment of the present application, including:

[0103] A substrate 10 having a front side and a back side opposite to each other, wherein a horizontal projection of the substrate 10 has a square outer edge contour, and the front side of the substrate has a first portion and a second portion;

[0104] The semiconductor stack 20 is located on the first front portion of the substrate 10. The semiconductor stack 20 includes a first semiconductor layer 210, an active layer 220 and a second semiconductor layer 230 stacked in sequence. The horizontal projection of the first front portion of the substrate has a circular outer edge contour. The horizontal projection is defined as the projection of the light emitting diode in the top view direction.

[0105] The insulating adhesive layer 101 is formed on the second portion of the front surface of the substrate 10 and contacts the package substrate 11. The light emitting diode is electrically connected to the package substrate 11 through the first pad electrode 91 and the second pad electrode 92.

[0106] In an optional embodiment, the insulating adhesive layer 101 is a reflective adhesive layer, for example, a white adhesive composed of resin silicone and fluorescent powder, etc., which has a good reflective effect on light. The reflective adhesive layer covers the second part and the side wall of the front side of the substrate 10 and contacts the packaging substrate 11. The reflective adhesive layer reflects the light from the light-emitting area to the inside of the chip, and then the light is reflected and refracted multiple times inside the chip and emitted from the back side of the substrate 10 to limit the propagation path of the light, prevent lateral light leakage, and improve the uniformity of the light spot and the light extraction efficiency. Furthermore, the reflective adhesive layer also covers the back side of the substrate 10, and does not overlap with the horizontal projection of the first part of the front side of the substrate 10. The back side of the substrate 10 can also be a white adhesive with a light-reflecting effect.

[0107] In an optional embodiment, the insulating adhesive layer 101 is a light-shielding layer; for example, black glue including components such as epoxy resin or silicone resin, so that it has a good light-absorbing effect, and the light-shielding layer covers the second part of the front side of the substrate 10 and the side wall, and is in contact with the packaging substrate 11. The light-shielding layer effectively solves the problem of light leakage from the side wall and the front side of the substrate, so that the light-emitting diode exhibits the characteristic of axial light emission. Furthermore, the light-shielding layer also covers the back side of the substrate 10, extending from the outer edge of the back side of the substrate to the center, forming an annular light-shielding area and a non-light-shielding area located in the annular light-shielding area, and the non-black glue area is in a vertical projection relationship with the light-emitting area. The horizontal projection of the area on the back side of the substrate 10 that is not covered by the light-shielding layer is located within the horizontal projection of the first part of the front side of the substrate, and the area that is not covered by the light-shielding layer is in a vertical projection relationship with the first part. By setting a light-shielding layer on the back edge of the substrate 10, the edge size of the light-emitting area is controlled, the light propagation path is optimized, and the edge leakage is reduced, thereby improving the optical performance of the light-emitting device.

[0108] In an optional embodiment, the insulating adhesive layer 101 includes a reflective adhesive layer or a light shielding layer, for example, white adhesive with a reflective effect and black adhesive with a light shielding effect are respectively used. The reflective adhesive layer covers the second part of the front side and the side wall of the substrate 10, and the light shielding layer covers the back side of the substrate 10. The reflective adhesive layer reflects the light from the light emitting area to the inside of the chip, and then the light is emitted from the back side of the substrate 10 after multiple reflections and refractions from the inside of the chip, so as to limit the propagation path of the light, prevent lateral light leakage, and improve the uniformity and light extraction efficiency of the light spot; the light shielding layer extends from the outer edge of the back side of the substrate to the center, and the horizontal projection of the area of ​​the back side of the substrate 10 that is not covered by the light shielding layer is located within the horizontal projection of the first part of the front side of the substrate, and the area that is not covered by the light shielding layer is in a vertical projection relationship with the first part. The light shielding layer controls the edge size of the light emitting area, optimizes the light propagation path, and reduces edge light leakage. By setting the light shielding layer on the back edge of the substrate 10 and setting the reflective adhesive layer on the front side and side wall of the substrate 10, the optical performance of the light emitting device is further improved.

[0109] In summary, the light emitting diode and the light emitting device provided by the present application effectively overcome various shortcomings in the prior art and have high industrial utilization value.

[0110] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. A light emitting diode, characterized in that: include: A substrate having opposite front and back surfaces, wherein a horizontal projection of the substrate has a square outer edge profile; A semiconductor stack is located on the front side of the substrate, the semiconductor stack comprises a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, and a horizontal projection of the semiconductor stack has a circular outer edge profile; A first pad electrode is formed on the semiconductor stack and is electrically connected to the first semiconductor layer; A second pad electrode is formed on the semiconductor stack and is electrically connected to the second semiconductor layer; The horizontal projection is defined as the projection of the light emitting diode in the top-down direction.

2. The light emitting diode according to claim 1, characterized in that: The total area of ​​the first pad electrode and the second pad electrode accounts for more than 50% of the area of ​​the semiconductor stack.

3. The light emitting diode according to claim 1, characterized in that: The semiconductor stack has through holes, and the through holes are exposed through etching the second semiconductor layer, the active layer and part of the first semiconductor layer to expose a part of the surface of the first semiconductor layer; the through holes are arranged in a ring array.

4. The light emitting diode according to claim 3, characterized in that: In the radial direction from the center to the outer edge of the light emitting diode, the number of array circles of the through holes is n, and 3≤n≤8.

5. The light emitting diode according to claim 1, characterized in that: The horizontal projection shape of the through hole includes one or more of a circle, an ellipse, or a polygon with an arc chamfer.

6. The light emitting diode according to claim 1, characterized in that: It also includes a first insulating layer, which is located on the second semiconductor layer and has a plurality of first openings; the sum of the horizontal projection areas of the first openings accounts for 1% to 20% of the horizontal projection area of ​​the light emitting diode.

7. The light emitting diode according to claim 6, characterized in that: The horizontal projection of the first opening is a circle, and the diameter of the first opening is between 10 μm and 40 μm.

8. The light emitting diode according to claim 6, characterized in that: It also includes a reflective layer, which is located on the first insulating layer and is electrically connected to the second semiconductor layer through the first opening. The horizontal projection area of ​​the reflective layer is smaller than the area of ​​the second semiconductor layer.

9. The light emitting diode according to claim 8, characterized in that: The semiconductor stack includes a semiconductor platform and a peripheral portion surrounding the semiconductor platform, wherein the peripheral portion is an annular platform formed by removing the edge second semiconductor layer, the active layer and a part of the first semiconductor layer; The peripheral portion has a first outer side wall, and the semiconductor platform has a second outer side wall; There is a minimum distance d between the reflective layer and the second outer side wall, and the minimum distance d is between 1 μm and 20 μm.

10. The light emitting diode according to claim 8, characterized in that: The material of the reflective layer includes Ag.

11. The light emitting diode according to claim 1, characterized in that: It also includes a second insulating layer and contact electrodes, wherein the contact electrodes include a first contact electrode and a second contact electrode, wherein: The second insulating layer is located above and on the sidewalls of the semiconductor stack and has a plurality of second openings and a plurality of third openings; The second opening is located above the through hole, and a horizontal projection of the second opening is located within a horizontal projection range of the through hole, and the first contact electrode is electrically connected to the first semiconductor layer through the second opening; The third opening portion is located above the second semiconductor layer, the number of the second contact electrodes corresponds to the number of the third opening portions and the second contact electrodes are electrically connected to the second semiconductor layer through the third opening portions; the area of ​​the second contact electrode is larger than the area of ​​the third opening portion or the minimum distance between the second contact electrode and the first contact electrode is smaller than the minimum distance between the third opening portion and the first contact electrode.

12. The light emitting diode according to claim 11, characterized in that: The semiconductor stack includes a first region and a second region relative to each other, the first pad electrode is formed on the first region, and the second pad electrode is formed on the second region; the area of ​​the first region is greater than or equal to the area of ​​the second region, and the third opening is distributed within the range of the second region.

13. The light emitting diode according to claim 12, characterized in that: It also includes a third insulating layer and a pad electrode, wherein the pad electrode includes a first pad electrode and a second pad electrode, wherein: The third insulating layer is located above and on the sidewalls of the second insulating layer and the contact electrode, and has a plurality of fourth openings and a plurality of fifth openings; The fourth opening is located above the first contact electrode, and the first pad electrode is electrically connected to the first semiconductor layer through the fourth opening; The fifth opening is located above the second opening, and a horizontal projection of the fifth opening is located within a horizontal projection range of the third opening. The second pad electrode is electrically connected to the second semiconductor layer through the fifth opening.

14. The light emitting diode according to claim 13, characterized in that: The fourth openings are distributed within the first region, and the fifth openings are located within the second region.

15. The light emitting diode according to claim 13, characterized in that: The semiconductor stack further includes a third region, which is a semiconductor stack region between the first pad electrode and the second pad electrode; wherein, The horizontal projection of the first pad electrode is semicircular and located within the range of the first area, and the horizontal projection of the second pad electrode is semicircular and located within the range of the second area; An area of ​​the first pad electrode is greater than or equal to an area of ​​the second pad electrode.

16. The light emitting diode according to claim 13, characterized in that: It also includes a buffer portion, which is located between the second insulating layer and the third insulating layer and is electrically isolated from the first contact electrode and the second contact electrode; and a horizontal projection of the buffer portion is located within the range of the third region.

17. The light emitting diode according to claim 16, characterized in that: The horizontal projection shape of the buffer portion is any one of a circle, an ellipse or a polygon with an arc chamfer.

18. The light emitting diode according to claim 16, characterized in that: The buffer portion is made of metal and contains the same metal material as the first contact electrode or the second contact electrode.

19. The light emitting diode according to claim 1, characterized in that: The substrate is one of a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a gallium arsenide substrate or a silicon substrate.

20. The light emitting diode according to claim 1, characterized in that The horizontal projection area of ​​the substrate is larger than the horizontal projection area of ​​the semiconductor stack, and the horizontal projection area of ​​the semiconductor stack accounts for 40% to 80% of the horizontal projection area of ​​the substrate.

21. The light emitting diode according to claim 20, characterized in that There is a minimum distance D between the edge projection of the semiconductor stack and the edge projection of the substrate, 0 μm≤D≤200 μm.

22. The light emitting diode according to claim 1, characterized in that: The size of the light emitting diode is greater than 1000 μm*1000 μm.

23. A light emitting device, characterized in that: include: Package substrate; At least one light emitting diode, the light emitting diode comprising: A substrate having a front side and a back side opposite to each other, wherein a horizontal projection of the substrate has a square outer edge contour, and the front side of the substrate has a first portion and a second portion; A semiconductor stack is located on a first portion of the front side of the substrate, the semiconductor stack comprises a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, a horizontal projection of the first portion of the front side of the substrate has a circular outer edge contour, and the horizontal projection is defined as a projection of the light emitting diode in a top-view direction; An insulating adhesive layer is formed on the second portion of the front surface of the substrate and contacts the packaging substrate.

24. The light emitting device according to claim 23, characterized in that: The insulating adhesive layer is a reflective adhesive layer or a light-shielding layer; The insulating adhesive layer also covers the side wall of the substrate; The insulating adhesive layer also covers the back side of the substrate and does not overlap with the horizontal projection of the first part of the front side of the substrate.

25. The light emitting device according to claim 23, characterized in that: The insulating adhesive layer is a reflective adhesive layer or a light-shielding layer; The insulating adhesive layer also covers the side wall of the substrate; The insulating adhesive layer also covers the back side of the substrate, and the horizontal projection of the area of ​​the back side of the substrate not covered by the insulating adhesive layer is located within the horizontal projection of the first part of the front side of the substrate.

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