Wafer chuck

Abstract

The invention discloses a wafer chuck. The wafer chuck comprises a substrate and a heating / cooling wafer. The substrate includes a first surface facing a wafer to be loaded and a second surface opposite to the first surface. The heating / cooling wafer is disposed on the first surface of the substrate and includes a plurality of heating / cooling units arranged in an array. In the direction perpendicular to the first surface, the positions of the plurality of heating / cooling units correspond to the positions of the plurality of crystal grains contained in the wafer to be carried, and the heating / cooling units can independently heat or cool the corresponding crystal grains.

Description

Technical Field

[0001] The present invention relates to a chuck used in semiconductor manufacturing process, and in particular to a wafer chuck used in semiconductor manufacturing process. Background Art

[0002] Generally speaking, using a semiconductor wafer as a substrate and forming various film layers / structures / elements thereon is a common method of forming a semiconductor device. During the manufacturing process, the semiconductor wafer needs to remain flat and be able to be transported to the corresponding position for the corresponding manufacturing process. Vacuum chucks and electrostatic chucks are wafer carriers that meet the above requirements. Both of them fix the semiconductor wafer thereon based on different principles.

[0003] A vacuum chuck is a method of fixing a semiconductor wafer on it by vacuum. However, the suction force generated by the vacuum is easily affected by some factors. For example, as the size of the semiconductor wafer increases and the number of film layers / structures / components stacked on it increases, the semiconductor wafer itself has a larger deformation (such as warping) and deviates from the perfect plane, or particles generated during the manufacturing process are sucked between the vacuum chuck and the semiconductor wafer, causing the semiconductor wafer to deviate from the perfect plane. These situations will cause a gap between the vacuum chuck and the semiconductor wafer, causing gas leakage and failure to generate the required pressure difference to fix the semiconductor wafer on the vacuum chuck.

[0004] An electrostatic chuck (ESC) is a method of fixing a semiconductor wafer on it by polarizing charges. Specifically, a voltage can be applied to the electrostatic chuck so that the charges distributed on the back of the wafer and the charges distributed on the carrier have opposite polarities, so that the semiconductor wafer can be fixed on the electrostatic chuck by electrostatic adsorption. In this way, the electrostatic chuck will not have the problem of gas leakage and being unable to generate the required pressure difference to fix the semiconductor wafer on it.

[0005] In order to further improve the yield of the semiconductor manufacturing process, the electrostatic chuck must also discharge the heat generated in the semiconductor manufacturing process (for example, the heat generated when performing a chemical vapor deposition process on the wafer through plasma or an etching process). Therefore, the portion of the electrostatic chuck facing the wafer is designed to have multiple channels for the flow of cooling gas (such as helium) to discharge the waste heat generated in the manufacturing process by providing gas on the back side of the wafer.

[0006] However, the above design will cause some problems. For example, when the particles generated in the manufacturing process adhere to the electrostatic chuck and the semiconductor wafer, there may be some leakage of cooling gas which does not affect the manufacturing process. However, the leakage will cause the machine executing the manufacturing process to perform unnecessary shutdown procedures, which will affect the entire manufacturing process. On the other hand, in the step of removing the electrostatic force used to clamp the semiconductor wafer, if there is unexhausted cooling gas remaining in the channel, the pressure on the back of the wafer will be greater than the pressure on the front of the wafer. Therefore, once the electrostatic force clamping the semiconductor wafer is removed, the wafer will be blown away by the cooling gas remaining in the channel and cause crushed fragments. Such a result will have a considerable impact on various aspects of the semiconductor manufacturing process. Summary of the invention

[0007] The present invention provides a wafer chuck, wherein a heating / cooling wafer is arranged on a surface of a substrate facing a wafer to be carried and comprises a plurality of heating / cooling units arranged in an array. In this way, the heat generated in the semiconductor manufacturing process can be cooled by the heating / cooling wafer without cooling by cooling gas. Therefore, in the step of removing the electrostatic force used to clamp the wafer, the wafer will not be blown away by the cooling gas remaining in the channel, thereby avoiding the result of pulverizing fragments. In addition, even if the particles generated in the manufacturing process adhere to the wafer chuck and the wafer, there will be no unnecessary downtime caused by a slight leakage of cooling gas that does not affect the manufacturing process.

[0008] On the other hand, since the positions of the heating / cooling units are designed to correspond to the positions of the plurality of dies contained in the wafer to be loaded, the heating / cooling units can heat or cool the corresponding dies individually.

[0009] An embodiment of the present invention provides a wafer chuck, which includes a substrate and a heating / cooling wafer. The substrate includes a first surface facing a wafer to be carried and a second surface opposite to the first surface. The heating / cooling wafer is arranged on the first surface of the substrate and includes a plurality of heating / cooling units arranged in an array, wherein in a direction perpendicular to the first surface, the positions of the plurality of heating / cooling units correspond to the positions of a plurality of grains contained in the wafer to be carried, and the heating / cooling units can heat or cool the corresponding grains individually.

[0010] In one embodiment of the present invention, the plurality of heating / cooling units overlap with the plurality of dies in a direction perpendicular to the first surface.

[0011] In one embodiment of the present invention, the wafer chuck further comprises a clamping device disposed between the base plate and the heating / cooling wafer and comprising a plurality of electrodes.

[0012] In one embodiment of the present invention, the clamping device does not include a channel for gas circulation.

[0013] In one embodiment of the present invention, there is no channel for cooling gas to flow between the first surface of the substrate and the wafer to be carried.

[0014] In one embodiment of the present invention, the substrate includes a pipeline buried in the substrate. The pipeline includes an inlet and an outlet at opposite ends of the pipeline. The inlet and the outlet are opened on the second surface of the substrate.

[0015] In one embodiment of the present invention, each heating / cooling unit includes a first electrode and a second electrode, a conductor layer, a first semiconductor layer, and a second semiconductor layer. The first electrode and the second electrode are spaced apart from each other. The conductor layer is above the first electrode and the second electrode. The first semiconductor layer is between the first electrode and the conductor layer and has a first conductivity type. The second semiconductor layer is between the second electrode and the conductor layer and is spaced apart from the first semiconductor layer, wherein the second semiconductor layer has a second conductivity type different from the first conductivity type.

[0016] In one embodiment of the present invention, the conductor layer contacts the die.

[0017] Based on the above, in the wafer chuck of the above embodiment, the heating / cooling wafer is arranged on the surface of the substrate facing the wafer to be carried and includes a plurality of heating / cooling units arranged in an array. In this way, the heat generated in the semiconductor manufacturing process can be cooled by the heating / cooling wafer without cooling by the cooling gas. Therefore, in the step of removing the electrostatic force used to clamp the wafer, the wafer will not be blown away by the cooling gas remaining in the channel, thereby avoiding the result of crushing fragments. In addition, even if the particles generated in the manufacturing process are attached between the wafer chuck and the wafer, there will be no unnecessary downtime caused by a slight leakage of the cooling gas that does not affect the manufacturing process.

[0018] On the other hand, since the positions of the heating / cooling units are designed to correspond to the positions of the plurality of dies contained in the wafer to be loaded, the heating / cooling units can heat or cool the corresponding dies individually. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a cross-sectional schematic diagram of a wafer chuck according to an embodiment of the present invention;

[0020] Figure 2 Schematic diagram of the relative positions of a wafer chuck clamping device and a wafer to be loaded according to an embodiment of the present invention;

[0021] Figure 3 It is a cross-sectional schematic diagram of a clamping device according to an embodiment of the present invention.

[0022] Explanation of symbols

[0023] 10: Wafer chuck

[0024] 20: Wafer

[0025] 100:Substrate

[0026] 110: Chuck body

[0027] 120: Pipeline

[0028] 120a: Entrance

[0029] 120b: Exit

[0030] 200: Clamping device

[0031] 210: Grassroots

[0032] 220: Electrode

[0033] 300: Heating / cooling wafer

[0034] 302: Dielectric layer

[0035] 304a: first electrode

[0036] 304b: second electrode

[0037] 306a: first semiconductor layer

[0038] 306b: second semiconductor layer

[0039] 308: Conductor layer

[0040] 1000: Heating / Cooling Unit

[0041] 2000: Grain

[0042] R1, R2: Area DETAILED DESCRIPTION

[0043] The present invention is more fully described with reference to the accompanying drawings of the present embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the accompanying drawings are exaggerated for clarity. The same or similar reference numbers represent the same or similar elements, and the following paragraphs will not be repeated one by one.

[0044] It should be understood that when, for example, an element is referred to as being "on" or "connected to" another element, it may be directly on or connected to another element, or there may be an intermediate element. If an element is referred to as being "directly on" or "directly connected to" another element, there are no intermediate elements. As used herein, "connection" may refer to physical and / or electrical connection, and "electrical connection" or "coupling" may be the presence of other elements between two elements. As used herein, "electrical connection" may include physical connection (e.g., wired connection) and physical disconnection (e.g., wireless connection).

[0045] As used herein, "about", "approximately" or "substantially" includes the referenced value and an average value within an acceptable deviation range of the particular value that can be determined by a person of ordinary skill in the art, taking into account the measurement in question and the particular amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, as used herein, "about", "approximately" or "substantially" can select a more acceptable deviation range or standard deviation depending on the optical property, etching property or other property, and can apply to all properties without a single standard deviation.

[0046] The terms used herein are used to describe exemplary embodiments only and are not intended to limit the present invention. In this case, unless otherwise explained in the context, the singular form includes the plural form.

[0047] Figure 1 FIG. 4 is a cross-sectional schematic diagram of a wafer chuck according to an embodiment of the present invention. Figure 2 It is a schematic diagram of the relative positions of a clamping device of a wafer chuck and a wafer to be loaded according to an embodiment of the present invention. Figure 3 It is a cross-sectional schematic diagram of a clamping device according to an embodiment of the present invention.

[0048] Please refer to Figure 1 , the wafer chuck 10 includes a substrate 100 and a heating / cooling wafer 300. The substrate 100 includes a first surface facing the wafer 20 to be loaded and a second surface opposite to the first surface. In some embodiments, the substrate 100 may include a chuck body 110 and a pipe 120 buried therein. The chuck body 110 may be formed using any suitable material. In some embodiments, the chuck body 110 may be made of a dielectric material (such as aluminum oxide or aluminum nitride), or may include silicon carbide having good thermal conductivity. The pipe 120 may include an inlet 120a and an outlet 120b at opposite ends thereof, wherein the inlet 120a and the outlet 120b may be opened on the second surface of the substrate 100. In some embodiments, cooling water may flow in the pipe 120 to exchange heat with the heating / cooling wafer 300.

[0049] The heating / cooling wafer 300 is disposed on the first surface of the substrate 100 and includes a plurality of heating / cooling units (eg, Figure 2 or Figure 3 The heating / cooling unit 1000 shown in the figure). In this way, the heat generated by the semiconductor manufacturing process of the wafer 20 can be cooled by the heating / cooling wafer 300 in the wafer chuck 10 without cooling by cooling gas. Therefore, in the step of removing the electrostatic force used to clamp the wafer 20, the wafer 20 will not be blown away by the residual cooling gas, thereby avoiding the risk of pulverizing fragments. In addition, even if the particles generated in the manufacturing process are attached between the wafer chuck 10 and the wafer 20, a shutdown procedure caused by leakage of cooling gas will not occur. In some embodiments, there is no channel or channel for cooling gas to flow between the first surface of the substrate 100 of the wafer chuck 10 and the wafer 20 to be carried.

[0050] Please refer to Figure 1 and Figure 2 In the direction perpendicular to the first surface of the substrate 100, the positions of the plurality of heating / cooling units 1000 correspond to the positions of the plurality of dies 2000 contained in the wafer 20 to be loaded, and the heating / cooling units 1000 can heat or cool the corresponding dies 2000 individually. In this way, the wafer chuck 10 can accurately control the temperature of each die 2000 in the wafer 20, so that the wafer 20 has the same or similar temperature in each area. In some embodiments, since the heating / cooling units 1000 can heat or cool the corresponding dies 2000 individually, a specific temperature distribution can be obtained according to the manufacturing process requirements. In some embodiments, the heating / cooling units 1000 overlap with the dies 2000 in the direction perpendicular to the first surface of the substrate 100. For example, the position of the heating / cooling unit 1000 in the region R1 of the heating / cooling wafer 300 corresponds to the position of the dies 2000 in the region R2 of the wafer 20 and overlaps in the direction perpendicular to the first surface of the substrate 100.

[0051] In some embodiments, the wafer chuck 10 includes a clamping device 200, which is disposed between the substrate 100 and the heating / cooling wafer 300. The clamping device 200 may include a base layer 210 and a plurality of electrodes 220 embedded in the base layer 210. The electrodes 220 may be connected to an external power supply (not shown), which may provide a voltage to the electrodes 220 to generate an electrostatic force sufficient to hold the wafer 20 in place. In other words, the clamping device 200 may be an electrostatic clamping device. The electrodes 220 may include a conductive material, such as a metal, a metal alloy, a metal nitride, a metal silicide, or a combination thereof. The base layer 210 may include an insulating ceramic material. In some embodiments, the clamping device 200 does not include a channel for gas circulation.

[0052] In some embodiments, Figure 3 As shown, the heating / cooling unit 1000 may include a dielectric layer 302, a first electrode 304a and a second electrode 304b, a first semiconductor layer 306a and a second semiconductor layer 306b, and a conductor layer 308. The first electrode 304a and the second electrode 304b are spaced apart from each other and formed in the dielectric layer 302. The conductor layer 308 is formed in the dielectric layer 302 and disposed above the first electrode 304a and the second electrode 304b. The first semiconductor layer 306a is formed in the dielectric layer 302 and disposed between the first electrode 304a and the conductor layer 308 and has a first conductivity type (e.g., N-type). The second semiconductor layer 306b is formed in the dielectric layer 302 and disposed between the second electrode 304b and the conductor layer 308 and is spaced apart from the first semiconductor layer 306a. The second semiconductor layer 306b has a second conductivity type (e.g., P-type) different from the first conductivity type. The first electrode 304a and the second electrode 304b can be electrically connected to an external power supply (not shown) respectively, and the power supply can generate a voltage difference between the first electrode 304a and the second electrode 304b so that the current flows from the first semiconductor layer 306a to the second semiconductor layer 306b. In this case, the temperature of the conductor layer 308 located at the top of the first semiconductor layer 306a and the second semiconductor layer 306b will decrease to form a heat absorption end, and the temperature of the first electrode 304a and the second electrode 304b located at the bottom of the first semiconductor layer 306a and the second semiconductor layer 306b will rise to form a heat release end. In this way, the heat generated by the semiconductor manufacturing process of the wafer 20 can be cooled by the conductor layer 308, and the heat generated by the first electrode 304a and the second electrode 304b can be transferred to the substrate 100 and transferred to the outside through, for example, the cooling water in the pipeline 120. That is, the heat generated by the semiconductor manufacturing process of the wafer 20 can be transferred to the wafer chuck 10 below and further transferred to the outside.

[0053] Based on the above, since the heating / cooling of the wafer 300 is not performed by providing a cooling gas (such as helium) on the back side of the wafer 20 to remove the heat energy generated in the manufacturing process, the temperature of the manufacturing process can be adjusted or compensated.

[0054] In some embodiments, the conductor layer 308 in the heating / cooling unit 1000 is in contact with or directly in contact with the die 2000 .

[0055] In some embodiments, the dielectric layer 302, the first electrode 304a and the second electrode 304b, the first semiconductor layer 306a and the second semiconductor layer 306b, and the conductor layer 308 can be integrated into a semiconductor manufacturing process, such as a manufacturing process for forming an internal connection. Since each heating / cooling unit 1000 is manufactured in a chip mode, it can also be called a heating / cooling chip. In some embodiments, a semiconductor manufacturing process can be used to form a heating / cooling wafer 300, and before being integrated with the clamping device 200, a thinning manufacturing process is performed on the back side of the heating / cooling wafer 300 without a cutting manufacturing process.

[0056] In some embodiments, each heating / cooling unit 1000 may include a temperature sensor (not shown) to measure the temperature of the corresponding die 2000. In some embodiments, the heating / cooling wafer 300 may include a controller (not shown), wherein the controller is capable of receiving a signal from the temperature sensor and adjusting the voltage difference provided between the first electrode 304a and the second electrode 304b. In some embodiments, the controller may adjust the voltage difference provided between the first electrode 304a and the second electrode 304b (control the output current) with reference to the ambient temperature (as a safety reference point) as well as a single-point set temperature and a single-point feedback temperature.

[0057] In summary, in the wafer chuck of the above embodiment, the heating / cooling wafer is arranged on the surface of the substrate facing the wafer to be carried and includes a plurality of heating / cooling units arranged in an array. In this way, the heat generated in the semiconductor manufacturing process can be cooled by the heating / cooling wafer without cooling by the cooling gas. Therefore, in the step of removing the electrostatic force used to clamp the wafer, the wafer will not be blown away by the cooling gas remaining in the channel, thereby avoiding the result of crushing fragments. In addition, even if the particles generated in the manufacturing process are attached between the wafer chuck and the wafer, there will be no unnecessary downtime caused by a slight leakage of the cooling gas that does not affect the manufacturing process.

[0058] On the other hand, since the positions of the heating / cooling units are designed to correspond to the positions of the plurality of dies contained in the wafer to be loaded, the heating / cooling units can heat or cool the corresponding dies individually.

Claims

1. A wafer chuck, comprising: A substrate, comprising a first surface facing a wafer to be carried and a second surface opposite to the first surface; as well as A heating / cooling wafer is arranged on the first surface of the substrate and includes a plurality of heating / cooling units arranged in an array, wherein in a direction perpendicular to the first surface, positions of the plurality of heating / cooling units correspond to positions of a plurality of grains contained in the wafer to be carried, and the heating / cooling units are capable of heating or cooling corresponding grains individually. 2 . The wafer chuck as claimed in claim 1 , wherein a plurality of the heating / cooling units overlap with a plurality of the dies in the direction perpendicular to the first surface.

3. The wafer chuck according to claim 1, further comprising: A clamping device is disposed between the substrate and the heating / cooling wafer and includes a plurality of electrodes.

4. The wafer chuck of claim 3, wherein the clamping device does not include a channel for gas flow. 5 . The wafer chuck as claimed in claim 1 , wherein there is no channel for cooling gas to flow between the first surface of the substrate and the wafer to be carried.

6. The wafer chuck as claimed in claim 1, wherein the substrate comprises a pipeline buried in the substrate, the pipeline comprises an inlet and an outlet at opposite ends of the pipeline, and the inlet and the outlet are opened on the second surface of the substrate.

7. The wafer chuck of claim 1 , wherein each of the heating / cooling units comprises: A first electrode and a second electrode, spaced apart from each other; a conductor layer, above the first electrode and the second electrode; a first semiconductor layer, between the first electrode and the conductor layer and having a first conductivity type; as well as A second semiconductor layer is between the second electrode and the conductor layer and spaced apart from the first semiconductor layer, wherein the second semiconductor layer has a second conductivity type different from the first conductivity type.

8. The wafer chuck of claim 7, wherein the conductor layer contacts the die.

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