Flip chip and pre-molded clip power module

Abstract

Devices and methods for a high power inverter module (100) with enhanced thermal and mechanical properties for an electric vehicle are disclosed. The disclosed device features an enlarged clip (108) that covers the entire die (104) to disperse mechanical forces, thereby preventing the die from cracking to improve reliability. In these power modules, a semiconductor die (104) is sandwiched between a three-layer direct bond metal (DBM) structure (102) and an enlarged clip. A pre-molded clip assembly (105) including an integrated metallization (107) may be used to eliminate the need for external wire bonding. Alternatively, the semiconductor die (104) may be inverted into a flip chip configuration (701) to face the modified DBM structure (702) integrated with the metallization (707). Simulation results of the disclosed power inverter show that the efficiency of dissipating heat is improved.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the benefit of U.S. patent application No. 18 / 344,292, filed on June 29, 2023, and entitled “Flip Chip and Pre-Molded Clip Power Modules,” which is incorporated herein by reference in its entirety. Technical Field

[0003] The present invention relates to assembling and packaging semiconductor device modules, semiconductor device assemblies, and semiconductor devices. More particularly, the present invention relates to semiconductor device modules having improved thermal performance and / or reduced mechanical stress. Background Art

[0004] Semiconductor device assemblies (e.g., chip assemblies including power semiconductor devices) can be implemented using multiple semiconductor dies, substrates (e.g., direct bond metal (DBM) substrates, die attach pads (DAPs)), electrical interconnects, and molding compounds. Power transistors may include, for example, insulated gate bipolar transistors (IGBTs), power metal oxide semiconductor field effect transistors (MOSFETs), and the like. Fast recovery diodes (FRDs) may be used in conjunction with power transistors. Electrical interconnects within a high-power semiconductor device module may include, for example, bonding wires, conductive spacers, and conductive clips. Polymer molding compounds may be used as encapsulants to protect components of the device assembly. Such high-power chip assemblies encapsulated as semiconductor device modules can be used in a variety of applications, including electric vehicles (EVs), hybrid electric vehicles (HEVs), and industrial applications. Summary of the invention

[0005] In some aspects, the technology described herein relates to a device comprising: a semiconductor die; a direct bond metal (DBM) structure coupled to a first side of the semiconductor die and providing single-sided cooling; a clip coupled to a second side of the semiconductor die; an integrated metal wiring layer providing an electrical path to terminals of the semiconductor die; and a molding compound encapsulating the semiconductor die, the DBM structure and the clip and the integrated metal wiring layer to form a power module.

[0006] In some aspects, the technology described herein relates to an apparatus that also includes a lead frame coupled to the integrated metal wiring layer; and a mounting bracket coupled to the DBM structure.

[0007] In some aspects, the technology described herein relates to a device in which a semiconductor die is in a flip-chip configuration and an integrated metal wiring layer is embedded in a top metal layer of a DBM structure.

[0008] In some aspects, the technology described herein relates to a device in which an integrated metal routing layer is embedded in a pre-molded clip assembly.

[0009] In some aspects, the technology described herein relates to an apparatus in which the semiconductor die is a silicon carbide (SiC) chip.

[0010] In some aspects, the technology described herein relates to an apparatus in which the semiconductor die includes an insulated gate bipolar transistor (IGBT).

[0011] In some aspects, the technology described herein relates to an apparatus in which a semiconductor die is attached to both a DBM structure and a chip through respective sintered silver layers.

[0012] In some aspects, the technology described herein relates to a device in which a semiconductor die is attached to a DBM structure by a sintered silver layer and to a clip by a lead-based solder layer.

[0013] In some aspects, the technology described herein relates to an apparatus wherein the lead-based solder includes lead-selenium-silver (PbSnAg).

[0014] In some aspects, the technology described herein relates to an apparatus in which a power module is configured as an inverter for electric vehicles (EVs) and hybrid electric vehicles (HEVs).

[0015] In some aspects, the technology described herein relates to a device wherein the DBM includes a Si3N4 ceramic layer.

[0016] In some aspects, the technology described herein relates to a method comprising: forming a pre-molded clip assembly including a first encapsulant; attaching a semiconductor die to a direct bond metal (DBM) structure; attaching the pre-molded clip assembly to the semiconductor die; and encapsulating the semiconductor die, the pre-molded clip assembly, and the DBM structure in a second encapsulant to form a power module.

[0017] In some aspects, the technology described herein relates to a method in which forming a pre-molded clip assembly includes forming an integrated metal wiring layer therein.

[0018] In some aspects, the technology described herein relates to a method wherein forming a pre-molded clip assembly further comprises forming a metal clip between an integrated metal wiring layer and a semiconductor die.

[0019] In some aspects, the technology described herein relates to a method in which forming a pre-molded clip assembly includes: dimensioning an integrated metal wiring layer to be larger than a semiconductor die; and forming gate and source contacts to the semiconductor die in the integrated metal wiring layer.

[0020] In some aspects, the technology described herein relates to a method wherein a first encapsulant and a second encapsulant are made of similar epoxy molding compound (EMC).

[0021] In some aspects, the technology described herein relates to a method comprising: attaching a metal clip to cover a bottom surface of a semiconductor die; attaching the semiconductor die to a top metal layer of a direct bond metal (DBM) structure; and encapsulating the semiconductor die, the metal clip, and the DBM structure in an epoxy molding compound to form a power module.

[0022] In some aspects, the technology described herein relates to a method in which a top metal layer includes a central source contact and a gate contact following a perimeter of the top metal layer.

[0023] In some aspects, the technology described herein relates to a method in which attaching a semiconductor die to a top metal layer of a DBM structure includes turning the semiconductor die upside down in a flip chip process.

[0024] In some aspects, the technology described herein relates to a method in which a semiconductor die attached to a top metal layer of a DBM structure can be subjected to single-sided cooling. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1A is a perspective view of an integrated power module configured with a pre-molded clip according to an embodiment of the present disclosure.

[0026] Figure 1B According to the embodiments of the present disclosure Figure 1A A side cross-sectional view of the integrated power module along cutting plane AA' is shown.

[0027] Figure 1C According to the embodiments of the present disclosure Figure 1B An enlarged view of the central area of ​​an integrated power module is shown.

[0028] Figure 2A is a top side perspective view of a pre-molded clip assembly according to an embodiment of the present disclosure.

[0029] Figure 2B According to the embodiments of the present disclosure Figure 2A A bottom side perspective view of a pre-molded clip assembly is shown.

[0030] Figure 2CAccording to the embodiments of the present disclosure Figure 2B A side cross-sectional view of the pre-molded clip assembly is shown along a cutting plane BB' parallel to the xz plane.

[0031] Figure 3A is a perspective view of an integrated power module configured with a pre-molded clip according to an embodiment of the present disclosure.

[0032] Figure 3B According to the embodiments of the present disclosure Figure 3A A side cross-sectional view of the integrated power module along cutting plane AA' is shown.

[0033] Figure 3C According to the embodiments of the present disclosure Figure 1B An enlarged view of the central area of ​​an integrated power module is shown.

[0034] Figure 4A is a top side perspective view of a pre-molded clip assembly according to an embodiment of the present disclosure.

[0035] Figure 4B According to the embodiments of the present disclosure Figure 4A A bottom side perspective view of a pre-molded clip assembly is shown.

[0036] Figure 4C According to the embodiments of the present disclosure Figure 4B A side cross-sectional view of the pre-molded clip assembly is shown along a cutting plane BB' parallel to the xz plane.

[0037] Figure 5 is a flow chart illustrating a method of manufacturing an integrated power module according to an embodiment of the present disclosure.

[0038] Fig. 6A and Figure 6B is a graph showing simulation results of thermal resistance of an integrated power module according to an embodiment of the present disclosure.

[0039] Fig. 7A is a perspective view of a flip-chip power module according to an embodiment of the present disclosure.

[0040] Figure 7B According to the embodiments of the present disclosure Fig. 7A A side cross-sectional view of the flip-chip power module is shown along a cutting plane AA′ parallel to the xz plane.

[0041] FIG. 7C is a diagram according to an embodiment of the present disclosure. Figure 7B A magnified view of the center area of ​​a flip-chip power module is shown.

[0042] Figure 8is a top plan view of integrated metallization for a flip chip power module according to an embodiment of the present disclosure.

[0043] Fig. 9A is a perspective view of a flip-chip power module according to an embodiment of the present disclosure.

[0044] Fig. 9B According to the embodiments of the present disclosure Fig. 9A A side cross-sectional view of the flip-chip power module is shown along a cutting plane AA′ parallel to the xz plane.

[0045] FIG. 9C is a diagram according to an embodiment of the present disclosure. Fig. 9B A magnified view of the center area of ​​a flip-chip power module is shown.

[0046] Fig.10 is a top plan view of integrated metallization for a flip chip power module according to an embodiment of the present disclosure.

[0047] Fig.11 is a flow chart illustrating a method of manufacturing a flip-chip power module according to an embodiment of the present disclosure.

[0048] Fig. 12A and Fig. 12B is a graph showing simulation results of thermal resistance of a flip chip power module according to an embodiment of the present disclosure.

[0049] Fig.13A and Fig. 13B is a graph showing simulation results of thermal resistance of a flip chip power module according to an embodiment of the present disclosure.

[0050] When read together with the accompanying drawings, the various aspects of the present disclosure are best understood from the following detailed description. It should be noted that, according to the convention in the industry, various features are not necessarily drawn to scale. For the clarity of discussion, the sizes of various features may be increased or reduced arbitrarily. In the accompanying drawings, the same reference symbol may indicate the same and / or similar parts (elements, structures, etc.) in different views. The accompanying drawings generally illustrate various embodiments discussed in the present disclosure by way of example and not limitation. The reference symbols shown in one accompanying drawing may not be repeated for the same and / or similar elements in the related views. The reference symbols repeated in multiple figures may not be specifically discussed with respect to each figure in these figures, but are provided for the context between the related views. In addition, not all similar elements in the accompanying drawings are specifically referenced with reference symbols when multiple instances of the element are shown. DETAILED DESCRIPTION

[0051] The safety and reliability of high-power electronic devices used in electric vehicles are important. Rigid metal clips that enable electrical connections and heat dissipation within power inverters may cause cracks in the semiconductor die to which they are attached. The cracks may be caused by uneven heating and / or different mechanical forces on the parts of the die in contact with the clip. When the power density of the clip increases, such situations may be caused during high-temperature operation or high-frequency operation. In addition, the wire bonding used to access high-power devices on the semiconductor chip is itself susceptible to damage or breakage, and therefore may cause reliability failures. These problems are particularly important for high-power modules, for example, modules that operate at 650V carrying large currents such as 200A and dissipating a lot of heat. These power inverters may include expensive materials such as silicon carbide (SiC), high-tech ceramics (Si3N4) made of silicon nitride, and direct bonded metal (DBM) structures such as direct bonded copper (DBC) structures. When such high-power modules are manufactured in large quantities, improving yield and reliability can save millions of dollars.

[0052] The present disclosure relates to embodiments of power modules that feature an enlarged clip that covers the entire die rather than a small portion of the die to avoid hot spots. The enlarged clip is bonded to the die to distribute mechanical forces over the entire area of ​​the die to prevent die cracking. In these power modules, the semiconductor die is sandwiched between a three-layer DBM structure and the enlarged clip.

[0053] In some embodiments, the enlarged clip takes the form of a pre-molded clip assembly that includes integrated metallization to eliminate the need for external wire bonds. Thus, the pre-molded clip assembly provides a modular solution for electrical connections to a semiconductor die.

[0054] In some embodiments, the semiconductor die is inverted into an inverted "flip chip" configuration so that the terminals of the semiconductor device face the DBM structure. In the flip chip configuration, the metallization is integrated into the top layer of the DBM rather than into the pre-molded clip assembly. In the flip chip configuration, an enlarged clip is attached to the back side of the die facing upward.

[0055] Figure 1A , Figure 1B and Figure 1C Different views of a power module implemented with two side-by-side semiconductor dies and a pre-molded clip assembly including integrated metallization are shown.

[0056] Figure 1Ais a perspective view of a high power semiconductor device module or integrated power module 100 according to a first embodiment of the present disclosure. In some embodiments, the integrated power module 100 includes a high power semiconductor chip assembly or an integrated electronic power assembly 101. The integrated electronic power assembly 101 includes a single-sided direct bond metal (DBM) structure 102, a die attach pad (DAP), one or more electronic components such as a semiconductor die or chip assembly 104, and a pre-molded clip assembly 105. In some embodiments, the integrated electronic power assembly 101 operates at high voltage and high current, for example, at about 650 volts and 200 amps.

[0057] The integrated power module 100 also includes a power source pin 106, a power drain pin 112, and lead frame columns 114 and 116. In some embodiments, the power source pin 106, the power drain pin 112, and the lead frame columns 114 and 116 can be cut or stamped from a thin rolled sheet of a metal such as copper. The power drain pin 112 and the power source pin 106 provide mechanical coupling and electrical coupling at either end of the integrated power module 100, while the lead frame columns 114 and 116 provide electrical coupling for the integrated power module 100. Specifically, the lead frame columns 114 and 116 provide signal paths from the integrated electronic power component 101 to external connectors (e.g., temperature sensing connectors and gate control connectors), respectively. In some embodiments, the lead frame column 114 acts as a temperature sensing pin, and the lead frame column 116 acts as a gate pin. In some implementations, the power drain pin 112 functions as a power pin that provides power to a drain terminal of the chip assembly 104 , and the power source pin 106 provides power to a source terminal of the chip assembly 104 .

[0058] The power drain pin 112 can be used to mount the integrated power module 100 to an external connection such as a bus (not shown). The power drain pin 112 can be directly mechanically coupled to the DAP. The power drain pin 112 can be shaped to include one or more bends so that an outer portion of the power drain pin 112 can be substantially coplanar with an outer portion of the power source pin 106.

[0059] The integrated electronic power component 101 and the power source pins 106 and the power drain pins 112 may be at least partially encapsulated by an encapsulant 110 to complete the integrated power module 100. In some embodiments, the encapsulant 110, such as a polymer material, may be an epoxy molding compound (EMC) that is used to seal and protect the various components of the integrated electronic power component 101.

[0060] Figure 1B yes Figure 1AA side cross-sectional view of the integrated electronic power component 101 is shown along a cutting plane AA′ parallel to the xz plane. Figure 1B The various elements of the integrated electronic power assembly 101 according to the first embodiment of the present disclosure are shown in the encapsulant 110. These elements include the DBM structure 102, the chip assembly 104 and the pre-molded clip assembly 105 together with a portion of the power source pin 106 and a portion of the power drain pin 112. Figure 2C Further describing the details of the pre-molded clip assembly 105, Figure 2C 1 is characterized by an enlarged view of the pre-molded clip assembly 105.

[0061] The DBM structure 102 acts as a substrate and heat sink for the chip assembly 104. In some embodiments, the DBM structure 102 can be a direct bond copper (DBC) type structure, a direct electroplated copper (DPC) type structure, or a direct bond aluminum (DBA) type structure. The DBM structure 102 can be referred to as a heat sink, which can perform single-sided cooling on the chip assembly 104 and the pre-molded clip assembly 105. In some embodiments, the direct bond metal (DBM) structure 102 is designed as a three-layer DBM structure, which includes an upper metal layer 102a and a lower metal layer 102c separated by a dielectric layer 102b. In some embodiments, the total thickness of the DBM structure 102 is in the range of about 0.5mm to about 3.0mm. The upper metal layer 102a acts as a die attach pad for the chip assembly 104. In some embodiments, the dielectric layer 102b acts as a heat storage body disposed between two outer metal layers to absorb and / or absorb heat. The dielectric layer 102b can also electrically insulate the upper metal layer 102a and the lower metal layer 102c of the DBM structure. In some embodiments, the dielectric layer 102b can be a ceramic, such as silicon nitride (Si3N4) or aluminum oxide (Al2O3), and Si3N4 is a ceramic material that is much more expensive than Al2O3. In some embodiments, the thickness of the dielectric layer 102b is in the range of about 0.30mm to about 0.34mm, and the thickness of the upper metal layer 102a and the lower metal layer 102c are each in the range of about 0.6mm to about 1.0mm. In some embodiments, the dielectric layer 102b can have a larger coverage area extending beyond the boundary of the upper metal layer 102a and the lower metal layer 102c.

[0062] Figure 1C According to the first embodiment of the present disclosure Figure 1B An enlarged cross-sectional view of a central portion of the integrated electronic power assembly 101 is shown as a dashed box. Figure 1CAn enlarged view of various components of DBM structure 102, chip assembly 104a, and pre-molded clip assembly 105 are shown. Pre-molded clip assembly 105 includes metal wiring layer 107, one or more clips 108 (two are shown), and encapsulant 109. Pre-molded clip assembly 105 completely covers chip assembly 104 to prevent die cracking.

[0063] Metal wiring layer 107 connects chip assembly 104 to lead frame pillars 114 and to power source pins 106. In some embodiments, metal wiring layer 107 is a copper (Cu) metallization layer, an aluminum (Al) metallization layer, or an AlCu alloy metallization layer having a thickness ranging from about 0.20 mm to about 0.24 mm.

[0064] Clips 108, such as a first metal; clip 108 and a second metal clip 108, couple the metal wiring layer 107 to the chip assembly 104 and to the power source pin 106. In some embodiments, the thickness of the chip assembly 104 is in the range of about 0.08 mm to about 0.12 mm. Clips 108 provide mechanical and electrical connections to the terminals of the semiconductor device on the chip assembly 104. Clips 108 are also used to dissipate heat from the chip assembly 104. In some embodiments, clips 108 may be made of copper or another conductive material such as Al or AlCu with a thickness in the range of about 0.4 mm to about 0.8 mm. In some embodiments, clips 108 may be separated by insulating materials. Clips 108 may provide separate connections to different terminals of the devices within the chip assembly 104.

[0065] Encapsulant 109 may be an epoxy molding compound (EMC) similar to encapsulant 110. In some embodiments, the thickness of encapsulant 109 above and below metal wiring layer 107 is in a range of about 1.3 mm to about 1.7 mm, which defines the thickness of pre-molded clip assembly 105 as a modular unit. In some embodiments, the thickness t1 of encapsulant 109 above the top surface of metal wiring layer 107 is similar to the thickness t2 of encapsulant 109 below the bottom surface of metal wiring layer 107. In some embodiments, the thickness t1 of encapsulant 109 above the top surface of metal wiring layer 107 may be different from the thickness t2 of encapsulant 109 below metal wiring layer 107. Figure 2C Additional details of encapsulant 109 are also shown and described.

[0066] Figure 1CAlso shown is a bonding layer that holds the integrated electronic power assembly 101 together. In some embodiments, the pre-molded clip assembly 105 can be attached to the chip assembly 104 by a first bonding agent 118 (e.g., a lead-based solder with a thickness in the range of about 0.03 mm to about 0.20 mm, such as a lead-selenium silver (PbSnAg) adhesive). For example, it is mounted on or coupled to the chip assembly. The chip assembly 104 is attached to the top surface of the tube die attachment pad by a second bonding agent 120 (e.g., a conductive epoxy, solder, silver (Ag) sintered material and / or a conductive adhesive). In some embodiments, the thickness of the second bonding agent 120 is also in the range of about 0.03 mm to about 0.20 mm. The chip assembly 104, together with the first bonding agent 118 and the second bonding agent 120, is disposed in the gap between the pre-molded clip assembly 105 and the DBM structure 102. The thickness of the gap may be substantially equal to the sum of the thickness of the chip assembly 104 and the first bonding agent 118 and the second bonding agent 120 without intervening materials. The space surrounding the chip assembly 104 within the gap is filled with the encapsulant 110 .

[0067] Figure 2A , Figure 2B and Figure 2C A view of the pre-molded clip assembly 105 is shown, and specifically the electrical connections to the clip 108 within the pre-molded clip assembly 105 .

[0068] Figure 2A is a top side perspective view of a pre-molded clip assembly 105 according to a first embodiment of the present disclosure. Figure 2A The layout of the encapsulant 109 of the pre-molded clip assembly 105 and the metal wiring layer 107 embedded in the pre-molded clip assembly 105 is shown. The metal wiring layer 107 is characterized by having a wrap-around gate contact 107a and a source contact 107b. In some embodiments, the upper metal layer 102a is designed to be substantially linear, while the dielectric layer 102b is designed to be substantially planar. The wrap-around gate contact 107a is routed around the perimeter of the pre-molded clip assembly 105 to directly couple the gate terminal of the chip assembly 104 to the lead frame column 116; the source contact 107b is routed to directly couple the source terminal of the chip assembly 104 to the lead frame column 114. Figure 2A The encapsulant 109 is also shown to form a sleeve around the metal wiring layer 107, so that the encapsulant 109 surrounds the metal wiring layer 107 except for one end where the wrap-around gate contact 107a and the source contact 107b extend from the encapsulant 109 to the power source pin 106 to form a connection with the power source pin 106 and the lead frame columns 114 and 116.

[0069] Figure 2Bis a bottom side perspective view of a pre-molded clip assembly 105 according to a first embodiment of the present disclosure. Figure 2B The encapsulant 109 of the pre-molded clip assembly 105, the layout of the metal wiring layer 107, and the first bonding agent 118 are shown, which attaches the underside of the pre-molded clip assembly 105 to the chip components 104a and 104b (not shown), and to the power source pins 106. The first bonding agent 118 forms a pair of connections, such as solder connections, between the integrated metallization, such as the metal wiring layer 107 and the clip 108, and the chip component 104 in the center of the pre-molded clip assembly 105. Although the chip components 104a and 104b are not part of the pre-molded clip assembly 105, Figure 2B The footprint of the first bonding agent 118 shown indicates the location of the chip assembly 104a on the left and the chip assembly 104b on the right. The first bonding agent 118 also forms a connection, such as a solder connection, to the power source pin 106 at the lower end of the pre-molded clip assembly 105.

[0070] Figure 2C is a side cross-sectional view of the pre-molded clip assembly 105 along a cutting plane BB′ parallel to the xz plane according to the first embodiment of the present disclosure. Figure 2C The encapsulant 109, metal wiring layers 107, clips 108 (three are shown), and first bonding agent 118 of the pre-molded clip assembly 105 are shown. In some embodiments, the encapsulant 109 surrounds five sides of the metal wiring layer 107. In some embodiments, the encapsulant 109 extends around one end of the metal wiring layer 107, for example, around the left end that is not coupled to the clip 108, as shown in FIG. Figure 2C As shown, the encapsulant 109 completely surrounds one end of the metal wiring layer 107 .

[0071] The two clips 108 in the center of the pre-molded clip assembly 105 form connections, such as solder connections, between the metal wiring layer 107 and corresponding terminals, such as gate terminals and source terminals, of the chip assembly 104a via the first bonding agent 118. The clip 108 in the center of the pre-molded clip assembly 105 extends all the way through the encapsulant 109 below the metal wiring layer 107, so that the lower surface of the clip 108 is exposed and can be connected to the chip assembly 104 via the first bonding agent 118. The clip 108 at the right end of the pre-molded clip assembly 105 forms a connection, such as a solder connection, between the metal wiring layer 107 and the power source pin 106 via the first bonding agent 118.

[0072] Figure 3A , Figure 3B and Figure 3CDifferent views of a power module are shown, implemented with vertically arranged diode semiconductor dies (eg, FRDs) and transistor semiconductor dies (eg, IGBTs), and a pre-molded clip assembly including integrated metallization. Figure 3A , Figure 3B and Figure 3C The semiconductor die and metallization of the power module shown are Figure 1A , Figure 1B and Figure 1C Different than shown.

[0073] Figure 3A is a perspective view of a high power semiconductor device module or integrated power module 300 according to a second embodiment of the present disclosure. In some embodiments, the integrated power module 300 includes a high power semiconductor chip assembly or an integrated electronic power assembly 301. The integrated electronic power assembly 301 includes a single-sided direct bond metal (DBM) structure 102, a die attach pad (DAP), one or more electronic components such as a semiconductor die or chip assembly 304, and a pre-molded clip assembly 305. In some embodiments, the integrated electronic power assembly 301 operates at high voltage and high current, for example, at about 650 volts and 200 amps.

[0074] The integrated power module 300 also includes a power source pin 106, a power drain pin 112, and lead frame posts 114 and 116. In some embodiments, the power source pin 106, the power drain pin 112, and the lead frame posts 114 and 116 can be cut or stamped from a thin rolled sheet of metal such as copper. The power drain pin 112 and the power source pin 106 provide mechanical and electrical coupling at either end of the integrated power module 300, while the lead frame posts 114 and 116 provide electrical coupling for the integrated power module 300. Specifically, the lead frame posts 114 and 116 provide signal paths from the integrated electronic power component 301 to the external temperature sensing connector and the gate connector, respectively.

[0075] The power drain pin 112 can be used to mount the integrated power module 300 to an external device such as a bus (not shown). The power drain pin 112 can be directly mechanically coupled to the DAP. The power drain pin 112 can be shaped to include one or more bends so that an outer portion of the power drain pin 112 can be substantially coplanar with an outer portion of the power source pin 106.

[0076] The integrated electronic power component 301 and the power source pins 106 and the power drain pins 112 may be at least partially encapsulated by an encapsulant 110 to complete the integrated power module 300. In some embodiments, the encapsulant 110, such as a polymer material, may be an epoxy molding compound (EMC) that is used to seal and protect the various components of the integrated electronic power component 301.

[0077] Figure 3B yes Figure 3A A side cross-sectional view of the integrated electronic power component 301 is shown along a cutting plane AA′ parallel to the xz plane. Figure 3B The various elements of an integrated electronic power assembly 301 according to a first embodiment of the present disclosure are shown included in the encapsulant 110. These elements include the DBM structure 102, the chip assembly 304 and the pre-molded clip assembly 305 along with a portion of the power source pin 106 and a portion of the power drain pin 112.

[0078] The DBM structure 102 acts as a substrate and heat sink for the chip assembly 304. In some embodiments, the DBM structure 102 can be a direct bond copper (DBC) type structure, a direct electroplated copper (DPC) type structure, or a direct bond aluminum (DBA) type structure. The DBM structure 102 can be referred to as a heat sink, which can perform single-sided cooling of the chip assembly 304 and the pre-molded clip assembly 305. In some embodiments, the direct bond metal (DBM) structure 102 is designed as a three-layer DBM structure, which includes an upper metal layer 102a and a lower metal layer 102c separated by a dielectric layer 102b. In some embodiments, the total thickness of the DBM structure 102 is in the range of about 0.5mm to about 3.0mm. The upper metal layer 102a acts as a die attach pad for the chip assembly 304. The dielectric layer 102b is as described above with reference to the integrated power module 100.

[0079] Figure 3C According to the second embodiment of the present disclosure Figure 3B An enlarged side cross-sectional view of a central portion of the integrated electronic power assembly 301 is shown as a dashed box. Figure 3C An enlarged view of various components of DBM structure 102, chip assembly 304a, and pre-molded clip assembly 305 are shown. Pre-molded clip assembly 305 includes metal wiring layers 307, clips 308 (two shown), and encapsulant 309. Pre-molded clip assembly 305 completely covers chip assembly 304 to prevent die cracking.

[0080] The metal wiring layer 307 connects the chip assembly 304 to one or both of the lead frame pillars 114, 116 and to the power source pin 106. In some embodiments, the metal wiring layer 307 is a copper (Cu) metallization layer, an aluminum (Al) metallization layer, or an AlCu alloy metallization layer having a thickness in a range of about 0.56 mm to about 0.68 mm.

[0081] Clip 308 couples metal wiring layer 307 to chip assembly 304 and to power source pin 106. In some embodiments, the thickness of chip assembly 304 is in the range of about 0.08 mm to about 0.12 mm. Clip 308 provides mechanical and electrical connections to the terminals of diode devices and transistor devices on chip assembly 304. Clip 308 and metal wiring layer 307 are also used to dissipate heat from chip assembly 304. In some embodiments, clip 308 can be made of copper or another conductive material such as Al or AlCu with a thickness in the range of about 0.16 mm to about 0.20 mm. In some embodiments, clip 308 can be separated by insulating material. Clip 308 can provide separate connections to different terminals of devices within chip assembly 304.

[0082] Encapsulant 309 may be an epoxy molding compound (EMC) similar to encapsulant 110. In some embodiments, the thickness of encapsulant 309 is in the range of about 0.8 mm to about 1.2 mm, which defines the thickness of pre-molded clip assembly 305 as a modular unit.

[0083] Figure 3C Also shown is a bonding layer that holds the integrated electronic power assembly 301 together. Specifically, the pre-molded clip assembly 305 can be attached to the chip assembly 304 by a first bonding agent 118 (e.g., a lead-based solder having a thickness in the range of about 0.03 mm to about 0.20 mm, such as a lead-selenium silver (PbSnAg) adhesive). For example, it is mounted on or coupled to the chip assembly. The chip assembly 304 is attached to the top surface of the tube die attachment pad by a second bonding agent 120 (e.g., an epoxy resin, solder, a silver (Ag) sintered material and / or an adhesive). In some embodiments, the thickness of the second bonding agent 120 is also in the range of about 0.03 mm to about 0.20 mm.

[0084] Figure 4A is a top side perspective view of a pre-molded clip assembly 305 according to a second embodiment of the present disclosure. Figure 4AThe layout of the encapsulant 309 of the pre-molded clip assembly 305 and the metal wiring layer 307 embedded in the pre-molded clip assembly 305 is shown. The layout of the metal wiring layer 307 is different from the layout of the metal wiring layer 107. The metal wiring layer 307 is characterized by having an L-shaped gate contact 307a and a large source contact 307b. The L-shaped gate contact 307a is wired to directly couple the gate terminal of the IGBT chip assembly 304b to the lead frame column 116; the source contact 307b is wired to directly couple the source terminal of the chip assembly 304 to the lead frame column 114.

[0085] Figure 4B is a bottom side perspective view of a pre-molded clip assembly 305 according to a second embodiment of the present disclosure. Figure 4B The encapsulant 309 of the pre-molded clip assembly 305, the layout of the metal wiring layer 307, and the footprint of the first bonding agent 118 (five are shown) that attaches the pre-molded clip assembly 305 to the chip assemblies 304a and 304b (not shown), and to the power source pins 106. The first bonding agent 118 forms four connections, such as solder connections, to the chip assemblies 304a and 304b. Although the chip assembly 304 is not part of the pre-molded clip assembly 305, Figure 4B The footprint of the first bonding agent 118 is shown to indicate the location of the chip assembly 304. For example, in Figure 4B , the first bonding agent 118 forms a single connection with the FRD die and three connections with the IGBT die: one connection with the gate terminal of the IGBT via the L-shaped gate contact 307a on the far left, and two connections with the source terminal of the IGBT at the center of the pre-molded clip assembly 305. The first bonding agent 118 also forms a connection, such as a solder connection, to the power source pin 106 at the lower end of the pre-molded clip assembly 305.

[0086] Figure 4C According to the second embodiment of the present disclosure Figure 4B A side cross-sectional view of the pre-molded clip assembly 305 is shown along a cutting plane BB' parallel to the xz plane. Figure 4CThe encapsulant 309 of the pre-molded clip assembly 305, the layout of the metal wiring layer 307, the clips 308 (three are shown), and the first bonding agent 118 are shown. The two clips 308 in the center of the pre-molded clip assembly 305 form connections, such as solder connections, between the metal wiring layer 307 and the chip assembly 304a (FRD) on the left and the chip assembly 304b (iGBT) on the right via the first bonding agent 118. The clip 308 at the right end of the pre-molded clip assembly 305 forms connections, such as solder connections, between the metal wiring layer 307 and the power source pin 106 (not shown) via the first bonding agent 118.

[0087] Figure 5 is a flowchart illustrating a method 500 for manufacturing a power module such as the integrated power module 100 or the integrated power module 300 according to some embodiments of the present disclosure. Figure 1A , Figure 1B , Figure 1C , Figure 2A , Figure 2B , Figure 2C , Figure 3A , Figure 3B , Figure 3C ,as well as Figure 4A , Figure 4B and Figure 4C In some embodiments described, operations 502 to 508 of method 500 may be performed to form integrated power modules 100 and 300. The operations of method 500 may be performed in a different order or not performed, depending on the specific application. It should be noted that method 500 may not produce a complete integrated power module 100. Therefore, it should be understood that additional processes may be provided before, during, or after method 500, and some of these additional processes may be briefly described herein.

[0088] At 502, method 500 includes forming a pre-molded clip assembly, such as pre-molded clip assembly 105 or pre-molded clip assembly 305, according to one embodiment of the present disclosure. The pre-molded clip assembly may be formed as two patterned metal layers: a first metal layer defining a clip, such as clip 108 or clip 308, followed by a second metal layer defining a metal wiring layer, such as metal wiring layer 107 or metal wiring layer 307. The clip and the metal wiring layer may then be encapsulated in, for example, encapsulant 109 or encapsulant 309, by an injection molding process to complete the pre-molded clip assembly.

[0089] At 504, method 500 includes attaching the back side of chip assembly 104 or chip assembly 304 to a DAP, which is a top layer of DBM structure 102, according to one embodiment of the present disclosure. Attaching chip assemblies 104 and 304 may be accomplished using second bonding agent 120. Power drain pin 112 may also be attached to the DAP during operation 504.

[0090] At 506, method 500 includes attaching a pre-molded clip assembly, such as pre-molded clip assembly 105 or pre-molded clip assembly 305, to a top surface of a chip assembly, such as chip assembly 104 or chip assembly 304, and to power source pin 106, according to an embodiment of the present disclosure. Figure 2B and Figure 2C The first bonding agent 118 is shown attaching the pre-molded clip assembly 105 to the chip assembly 104 and the power source pins 106 to form the integrated electronic power assembly 101. Figure 4B and Figure 4C As shown, a pre-molded clip assembly 305 may be attached to the chip assembly 304 and the power source pins 106 to form an integrated electronic power assembly 301 .

[0091] At 508, method 500 includes an encapsulation operation according to one embodiment of the present disclosure. An encapsulant such as epoxy molding compound may be placed around an integrated electronic power component such as integrated electronic power component 101 or integrated electronic power component 301 to complete the manufacture of a packaged integrated power module such as integrated power module 100 or integrated power module 300. Encapsulation may be accomplished by, for example, an injection molding process or a transfer molding process.

[0092] Fig. 6A and Figure 6B Simulation results showing the thermal performance improvements associated with pre-molded clip assembly 105 are shown. Fig. 6A A graph 600 showing computer simulation results of a junction-to-fluid thermal resistance parameter (Rthjf) according to some embodiments of the present disclosure. Rthjf has units of degrees Celsius per Watt and characterizes the amount of heat radiated by a power module during its operation. Thus, measuring the Rthjf of an integrated power module 100 indicates the efficiency of the heat sink implemented by the pre-molded clip assembly 105 within the integrated power module 100. Lower thermal resistance is associated with faster heat transfer provided by a more efficient heat sink.

[0093] The first data set 602 is calculated as a representation of the maximum thermal resistance within a power module that is not equipped with a pre-molded clip assembly 105. The second data set 604 is calculated as a representation of the maximum thermal resistance within a packaged integrated power module 100 equipped with a pre-molded clip assembly 105. Fig. 6AThe improvement indicated by the first simulation data graph in shows that the maximum thermal resistance Rthjf attributable to the pre-molded clip assembly 105 is reduced by 2.8%.

[0094] The third data set 606 is calculated as a representation of the average thermal resistance within a power module that is not equipped with the pre-molded clip assembly 105. The fourth data set 608 is calculated as a representation of the average thermal resistance within the packaged integrated power module 100 equipped with the pre-molded clip assembly 105. Fig. 6A The improvement indicated in the second simulation data graph in shows a 2.0% reduction in the average thermal resistance Rthjf attributable to the pre-molded clip assembly 105 .

[0095] Figure 6B A graph 610 showing computer simulation results of a junction-to-case thermal resistance parameter (Rthjc) according to some embodiments of the present disclosure. Rthjc has units of degrees Celsius per Watt and characterizes the amount of heat radiated by the integrated power module 100 during its operation. Thus, measuring the Rthjc of the integrated power module 100 indicates the efficiency of the heat sink implemented by the pre-molded clip assembly 105 within the integrated power module 100. Lower thermal resistance is associated with faster heat transfer provided by a more efficient heat sink.

[0096] The first data set 612 is calculated as a representation of the maximum thermal resistance within a power module that is not equipped with a pre-molded clip assembly 105. The second data set 614 is calculated as a representation of the maximum thermal resistance within a packaged integrated power module 100 equipped with a pre-molded clip assembly 105. Figure 6B The improvement indicated in the first simulation data graph shows that the maximum thermal resistance Rthjc attributable to the pre-molded clip assembly 105 is reduced by 3.5%.

[0097] The third data set 616 is calculated as a representation of the average thermal resistance within a power module that is not equipped with the pre-molded clip assembly 105. The fourth data set 618 is calculated as a representation of the average thermal resistance within the packaged integrated power module 100 equipped with the pre-molded clip assembly 105. Figure 6B The improvement indicated in the second simulation data graph in shows that the average thermal resistance Rthjc attributable to the pre-molded clip assembly 105 is reduced by 1.9%.

[0098] Fig. 7A , Figure 7B 7C shows a different view of a flip chip power module 700 implemented with a chip assembly 104 in a flip chip configuration. The flip chip power module 700 includes a drain clip completely covering the chip assembly 104 and a DAP including integrated metallization with an upper metal layer.

[0099] Fig. 7Ais a perspective view of a high power semiconductor device module or flip chip power module 700 according to a third embodiment of the present disclosure. In some embodiments, the flip chip power module 700 includes a high power semiconductor chip assembly or flip chip electronic power assembly 701. The flip chip electronic power assembly 701 includes a single-sided direct bond metal (DBM) structure 702, a die attach pad (DAP) 702a, one or more electronic components such as a semiconductor die or chip assembly 104, and a drain clip 705. In some embodiments, the flip chip electronic power assembly 701 operates at high voltage and high current, for example, at about 650 volts and 200 amps.

[0100] The flip chip power module 700 also includes a power source pin 106, a power drain pin 112, and lead frame posts 114 and 116. In some embodiments, the power source pin 106, the power drain pin 112, and the lead frame posts 114 and 116 can be cut or stamped from a thin rolled sheet of metal such as copper. The power drain pin 112 and the power source pin 106 provide mechanical coupling at either end of the flip chip power module 700, while the lead frame posts 114 and 116 provide electrical coupling for the flip chip power module 700. Specifically, the lead frame posts 114 and 116 provide a signal path from the flip chip electronic power component 701 to the external temperature sensing connector and the gate connector.

[0101] The power drain pin 112 can be used to attach the flip chip power module 700 to an external connector such as a bus (not shown). The power drain pin 112 can be directly mechanically coupled to a clip 705, which is attached to the back side of the chip assembly 104 by a first bonding agent 118. The power drain pin 112 can be shaped to include one or more bends so that an outer portion of the power drain pin 112 can be substantially coplanar with an outer portion of the power source pin 106.

[0102] The flip chip electronic power component 701 and the power source pins 106 and the power drain pins 112 can be encapsulated by an encapsulant 110 to complete the flip chip power module 700. In some embodiments, the encapsulant 110, such as a polymer material, can be an epoxy molding compound (EMC) that is used to seal and protect the various components of the flip chip electronic power component 701.

[0103] Figure 7B yes Fig. 7A A side cross-sectional view of the flip chip electronic power component 701 is shown along a cutting plane AA' parallel to the xz plane. Figure 7BThe various elements of a flip chip electronic power assembly 701 according to a third embodiment of the present disclosure are shown included in the encapsulant 110. These elements include the DBM structure 702, the chip assembly 104, and the drain clip 705 together with a portion of the power source pin 106 and a portion of the power drain pin 112 connected to the drain clip 705.

[0104] The DBM structure 702 acts as a substrate and heat sink for the chip assembly 104. In some embodiments, the DBM structure 702 can be a direct bond copper (DBC) type structure, a direct electroplated copper (DPC) type structure, or a direct bond aluminum (DBA) type structure. The DBM structure 702 can be referred to as a heat sink, which can perform single-sided cooling of the chip assembly 104 and the drain clip 705. In some embodiments, the direct bond metal (DBM) structure 702 is designed as a three-layer DBM structure, which includes an upper metal layer and a lower metal layer separated by a dielectric layer 102b. In some embodiments, the total thickness of the DBM structure 102 is in the range of about 0.5mm to about 3.0mm.

[0105] The upper metal layer acts as a DAP 702a for the chip assembly 104, and also acts as a metal wiring layer 707 that provides electrical connections between the chip assembly 104, the power source pins 106, and the lead frame columns 114 and 116. The DAP 702a provides mechanical and electrical connections to the terminals of the semiconductor device on the chip assembly 104. The chip assembly 104 is inverted so that the source and gate terminals of the semiconductor device thereon are flip-chip contacted with the DAP 702a.

[0106] In some embodiments, the dielectric layer 102b acts as a heat reservoir disposed between two outer metal layers to absorb and absorb heat. The dielectric layer 102b may also electrically insulate the DAP 702a from the lower metal layer 102c of the DBM structure. In some embodiments, the dielectric layer 102b may be a ceramic, such as silicon nitride (Si3N4) or aluminum oxide (Al2O3), Si3N4 being a ceramic material much more expensive than Al2O3. In some embodiments, the thickness of the dielectric layer 102b is in the range of about 0.30 mm to about 0.34 mm, and the thickness of the upper metal layer and the lower metal layer is in the range of about 0.6 mm to about 1.0 mm. In some embodiments, the dielectric layer 102b may have a larger coverage area extending beyond the boundary of the DAP 702a and the lower metal layer 102c.

[0107] 7C is an enlarged cross-sectional view of a central portion of a flip chip electronic power assembly 701 shown in a dashed box according to a third embodiment of the present disclosure. FIG7C shows an enlarged view of a DBM structure 702 , a chip assembly 104 a , and a drain clip 705 .

[0108] The drain clip 705 completely covers the inverted chip assembly 104 to prevent the die from cracking. The drain clip 705 may also act as an additional heat sink to dissipate heat from the chip assembly 104. In some embodiments, the thickness of the chip assembly 104 is in the range of about 0.08 mm to about 0.20 mm. In some embodiments, the drain clip 705 may be made of copper or another conductive material such as Al or AlCu with a thickness in the range of about 0.36 mm to about 0.40 mm. The drain clip 705 may provide an electrical path to the drain terminal of the semiconductor device through the exposed substrate of the chip assembly 104.

[0109] FIG. 7C also illustrates a bonding layer that holds the flip chip electronic power assembly 701 together. Specifically, the drain clip 705 can be attached to the chip assembly 104 by a first bonding agent 118 (e.g., sintered silver (Ag) having a thickness in the range of about 0.03 mm to about 0.20 mm), such as being mounted on or coupled to the chip assembly. The chip assembly 104 is attached to the top surface of the die attach pad by a second bonding agent 120 (e.g., sintered silver (Ag)), such as being mounted on or coupled to the top surface. In some embodiments, the thickness of the second bonding agent 120 is also in the range of about 0.03 mm to about 0.20 mm.

[0110] Figure 8 is a top side plan view of a flip chip electronic power component 701 according to a third embodiment of the present disclosure. Figure 8 Shown are dielectric layer 102b, power source pin 106, lead frame posts 114 and 116, DAP 702a, source contact 707a, and wraparound gate contact 707b of metal wiring layer 707. The footprint of dielectric layer 102b extends beyond the boundaries of the upper metal layer of DBM structure 702, which is DAP 702a.

[0111] Figure 8 Also indicated by a dashed box is the inverted position that the flip chip assembly 104 will occupy on top of the DAP 702a, and the outline of the drain clip 705 attached to the back side of the flip chip assembly 104 by the first bonding agent 118 (e.g., by soldering or silver sintering). In some embodiments, the chip assembly 104 may include, for example, a first SiC transistor chip assembly 104a and a second SiC transistor chip assembly 104b. The chip assembly 104 may be arranged side by side and may be mounted on the DAP 702a in a flip chip configuration, in which both dies are reversed. In some embodiments, other types of semiconductor dies may be used as one or more of the chip assemblies 104 in the flip chip electronic power assembly 701. In some embodiments, the term "chip assembly 304" may refer to a single semiconductor die.

[0112] The chip assembly 104 can be manufactured on various types of semiconductor substrates, such as semiconductor wafers, such as silicon (Si), silicon carbide (SiC), gallium (Ga), gallium nitride (GaN), aluminum gallium nitride (AlGaN), gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium phosphide (InP), glass substrates, sapphire substrates, etc. In some embodiments, the chip assembly 104 can be manufactured on different substrates. For example, the chip assembly 104a can be manufactured on a silicon substrate, while the chip assembly 104b can be manufactured on a SiC substrate. In some embodiments, the chip assembly 104 is manufactured on a SiC substrate.

[0113] Figure 8 Also shown are the layout, relative sizes, and electrical connections, such as wiring, between the various components of a flip chip electronic power assembly 701 according to a third embodiment of the present disclosure. A source contact 707a of a metal wiring layer 707 patterned in a DAP 702a couples the source terminals of chip assembly 104a and chip assembly 104b directly to a lead frame column 114. A wraparound gate contact 707b patterned in a metal wiring layer 707 in a DAP 702a couples the gate terminal of chip assembly 104 directly to a lead frame column 116. In some embodiments, the wraparound gate contact 707b follows the perimeter of the drain clip 705. The source contact 707a and the wraparound gate contact 707b are insulated from each other by a gap 800 in the metal wiring layer 707. Therefore, by using DAP 702 a to integrate metal wiring layer 707 , wire bonding is not required to couple the terminals of chip assembly 304 to leadframe columns 114 and 116 .

[0114] Fig. 9A , Fig. 9B 9C shows a different view of a power module implemented with a chip assembly 304 in a flip-chip configuration with a drain clip and a source DAP including integrated metallization.

[0115] Fig. 9A is a perspective view of a high power semiconductor device module or flip chip power module 900 according to a fourth embodiment of the present disclosure. In some embodiments, the flip chip power module 900 includes a high power semiconductor chip assembly or flip chip electronic power assembly 901. The flip chip electronic power assembly 901 includes a single-sided direct bond metal (DBM) structure 902, a die attach pad (DAP) 902a, one or more electronic components such as a semiconductor die or chip assembly 304, and a drain clip 705. In some embodiments, the flip chip electronic power assembly 901 operates at high voltage and high current, for example, at about 650 volts and 200 amperes.

[0116] The flip chip power module 900 also includes a power source pin 106, a power drain pin 112, and lead frame posts 114 and 116. In some embodiments, the power source pin 106, the power drain pin 112, and the lead frame posts 114 and 116 can be cut or stamped from a thin rolled sheet of metal such as copper. The power drain pin 112 and the power source pin 106 provide both the primary electrical and mechanical coupling at either end of the flip chip power module 900, while the lead frame posts 114 and 116 provide electrical coupling for the flip chip power module 900. Specifically, the lead frame posts 114 and 116 provide signal paths from the flip chip electronic power assembly 901 to external temperature sensing connections and gate control connections, respectively.

[0117] The power drain pin 112 can be used to attach the flip chip power module 900 to an external heat sink (not shown). The power drain pin 112 can be directly mechanically coupled to the DAP 902a. The power drain pin 112 can be shaped to include one or more bends so that an outer portion of the power drain pin 112 can be substantially coplanar with an outer portion of the power source pin 106.

[0118] The flip chip electronic power component 901 and the power source pins 106 and the power drain pins 112 can be encapsulated by an encapsulant 110 to complete the formation of the flip chip power module 900. In some embodiments, the encapsulant 110, such as a polymer material, can be an epoxy molding compound (EMC) that is used to seal and protect the various components of the flip chip electronic power component 901.

[0119] Fig. 9B yes Fig. 9A A side cross-sectional view of the flip chip electronic power component 901 is shown along a cutting plane AA' parallel to the xz plane. Fig. 9B The various elements of a flip chip electronic power assembly 901 according to a fourth embodiment of the present disclosure are shown included in the encapsulant 110. These elements include the DBM structure 902, the chip assembly 304 and the drain clip 705 along with a portion of the power source pin 106 and a portion of the power drain pin 112.

[0120] The DBM structure 902 acts as a substrate and heat sink for the chip assembly 304. In some embodiments, the DBM structure 902 can be a direct bond copper (DBC) type structure, a direct electroplated copper (DPC) type structure, or a direct bond aluminum (DBA) type structure. The DBM structure 902 can be referred to as a heat sink, which can provide single-sided cooling for the chip assembly 304 and the drain clip 705. In some embodiments, the direct bond metal (DBM) structure 902 is designed as a three-layer DBM structure, which includes an upper metal layer or DAP 902a and a lower metal layer 102c separated by a dielectric layer 102b. In some embodiments, the total thickness of the DBM structure 102 is in the range of about 0.5 mm to about 3.0 mm.

[0121] The upper metal layer serves as the DAP 902a for the chip assembly 304, and also serves as the metal wiring layer 907 that provides electrical connections between the chip assembly 304, the power source pins 106, and the lead frame columns 114 and 116. The DAP 902a provides mechanical and electrical connections to the terminals of the semiconductor device on the chip assembly 304. The chip assembly 304 is inverted so that the terminals of the semiconductor device thereon are in contact with the DAP 902a.

[0122] In some embodiments, the dielectric layer 102b acts as a heat storage body disposed between two outer metal layers to absorb and absorb heat. The dielectric layer 102b can also electrically insulate the DAP 902a of the DBM structure from the lower metal layer 102c. In some embodiments, the dielectric layer 102b can be a ceramic, such as silicon nitride (Si3N4) or aluminum oxide (Al2O3), and Si3N4 is a ceramic material that is much more expensive than Al2O3. In some embodiments, the thickness of the dielectric layer 102b is in the range of about 0.30mm to about 0.34mm, and the thickness of the upper metal layer and the lower metal layer is in the range of about 0.6mm to about 1.0mm. In some embodiments, the dielectric layer 102b may have a larger coverage area extending beyond the boundary of the DAP 902a and the lower metal layer 102c.

[0123] 9C is an enlarged cross-sectional view of a central portion of a flip-chip electronic power component 901 shown in a dashed box according to a fourth embodiment of the present disclosure. FIG9C shows an enlarged view of a DBM structure 902 , a chip component 304 a , and a drain clip 705 .

[0124] The drain clip 705 completely covers the inverted chip assembly 304 to prevent the die from cracking. The drain clip 705 can also act as an additional heat sink to dissipate heat from the chip assembly 304. In some embodiments, the thickness of the chip assembly 304 is in the range of about 0.08 mm to about 0.20 mm. In some embodiments, the drain clip 705 can be made of copper or another conductive material such as Al or AlCu with a thickness in the range of about 0.36 mm to about 0.40 mm. The drain clip 705 can provide an electrical path to the drain terminal of the semiconductor device through the exposed substrate of the chip assembly 304.

[0125] 9C also shows the bonding layer that holds the flip chip electronic power assembly 901 together. Specifically, the drain clip 705 can be attached to the chip assembly 304 by a first bonding agent 118 (e.g., sintered silver (Ag) with a thickness in the range of about 0.03 mm to about 0.20 mm), such as being mounted on or coupled to the chip assembly. The chip assembly 304 is attached to the top surface of the DAP 902a by a second bonding agent 120 (e.g., sintered silver (Ag)), such as being mounted on or coupled to the top surface. In some embodiments, the thickness of the second bonding agent 120 is also in the range of about 0.03 mm to about 0.20 mm.

[0126] Fig.10 is a top side plan view of a flip chip electronic power component 901 according to a fourth embodiment of the present disclosure. Fig.10 Shown are dielectric layer 102b, power source pin 106, lead frame posts 114 and 116, DAP 902a, source contact 907a, and L-shaped contact 907b of metal wiring layer 907. The footprint of dielectric layer 102b extends beyond the boundaries of the upper metal layer of DBM structure 902, which is DAP 902a.

[0127] Fig.10 The inverted position that the chip assembly 304 will occupy on top of the DAP 902a is also indicated by a dashed box, as well as the outline of the drain clip 705. In some embodiments, the chip assembly 304 may include, for example, an IGBT (transistor) chip assembly 304a and a FRD (diode) chip assembly 304b. The chip assembly 304 may be arranged vertically and may be mounted on the DAP 902a in a flip-chip configuration, in which the IGBT die and the FRD die are reversed. In some embodiments, other types of semiconductor dies may be used as one or more of the chip assemblies 304 in the flip-chip electronic power assembly 901. In some embodiments, the term "chip assembly 304" may refer to a single semiconductor die.

[0128] The chip assembly 304 can be manufactured on various types of semiconductor substrates, such as semiconductor wafers, such as silicon (Si), silicon carbide (SiC), gallium (Ga), gallium nitride (GaN), aluminum gallium nitride (AlGaN), gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium phosphide (InP), glass substrates, sapphire substrates, etc. In some embodiments, the chip assembly 904 can be manufactured on different substrates. For example, the IGBT chip assembly 304a can be manufactured on a silicon substrate, while the FRD chip assembly 304b can be manufactured on a SiC substrate. In some embodiments, both chip assemblies 304 are manufactured on a SiC substrate.

[0129] Fig.10 Also shown are the layout, relative dimensions, and electrical connections, such as wiring, between various components of a flip chip electronic power assembly 901 according to a fourth embodiment of the present disclosure. The source contact 907a of the metal wiring layer 907 patterned in the DAP 902a directly couples the source terminals of the FRD chip assembly 304a and the IGBT chip assembly 304b to the power source pin 106 and the lead frame column 114. The L-shaped contact 907b in the metal wiring layer 907 patterned in the DAP 902a directly couples the gate terminal of the IGBT chip assembly 304b to the lead frame column 116. The source contact 907a and the L-shaped contact 907b are insulated from each other by the gap 1000 in the metal wiring layer 907. It should be noted that the FRD chip assembly 304a, which is a diode, does not have a gate contact. Therefore, by using DAP 902a to integrate metal wiring layer 907, wire bonding is not required to couple the terminals of chip assembly 304 to power source pins 106, lead frame pillars 114, or lead frame pillars 116. Similarly, as shown in FIG. Fig. 9B As shown, no wire bonding is required to couple the power clip 705 to the power drain pin 112 .

[0130] Fig.11 is a flow chart illustrating a method 1100 for manufacturing a flip chip power module, such as the flip chip power module 700 or the flip chip power module 900, according to some embodiments of the present disclosure. Fig. 7A , Figure 7B Figure 7C Figure 8 , Fig. 9A , Fig. 9B , Figure 9C and Fig.10In some embodiments described, operations 1102 to 1106 of method 1100 may be performed to form integrated power modules 700 and 900. The operations of method 1100 may be performed in a different order or not performed, depending on the specific application. It should be noted that method 1100 may not produce a complete integrated power module. Therefore, it should be understood that additional processes before, during, or after method 1100 may be provided, and some of these additional processes may be briefly described herein.

[0131] At 1102, method 1100 includes attaching a chip assembly, such as chip assembly 104 or chip assembly 304, to a drain clip, such as drain clip 705, according to an embodiment of the present disclosure. Drain clip 705 may contact a drain terminal associated with a device on chip assembly 104 or chip assembly 304.

[0132] At 1104, method 1100 includes flip-chip attaching the front side of chip assembly 104 to DAP 702a, or flip-chip attaching chip assembly 304 to DAP 902a as the top layer of the DBM structure, according to an embodiment of the present disclosure. Attaching chip assemblies 104 and 304 may be accomplished using a second bonding agent 120, such as sintered silver. Power drain pin 112 may also be attached to the back side of the flip chip via drain clip 705. During operation 1104, power source pin 106 may be attached to a DAP, such as DAP 702a or DAP 902a.

[0133] At 1106, method 1100 includes an encapsulation operation according to one embodiment of the present disclosure. An encapsulant such as epoxy molding compound may be placed around an integrated electronic power component such as flip chip electronic power component 701 or flip chip electronic power component 901 to complete the manufacture of a packaged integrated power module such as flip chip power module 700 or flip chip power module 900. Encapsulation may be accomplished by, for example, an injection molding process or a transfer molding process.

[0134] Fig. 12A and Fig. 12B Simulation results showing the improvement in thermal performance of the flip chip power module 700 are shown. Fig. 12A A graph 1200 showing computer simulation results of a junction-to-fluid thermal resistance parameter (Rthjf) according to some embodiments of the present disclosure. Rthjf has units of degrees Celsius per Watt and characterizes the amount of heat radiated by the flip-chip power module 700 during its operation. Thus, measuring the Rthjf of the flip-chip power module 700 indicates the efficiency of the heat sink implemented by the drain clip 705 and the DAP 702a within the flip-chip power module 700. Lower thermal resistance is associated with faster heat transfer provided by a more efficient heat sink.

[0135] The first data set 1202 is calculated as a representation of the maximum thermal resistance within a power module that does not employ a flip-chip configuration, including the drain clip 705 and metal wiring layer 707 in the DAP 702a. The second data set 1204 is calculated as a representation of the maximum thermal resistance within the packaged flip-chip power module 700. Fig. 12A The improvement indicated in the first simulation data graph shows a 5.3% reduction in the maximum thermal resistance Rthjf attributable to the flip-chip configuration.

[0136] The third data set 1206 is calculated as a representation of the average thermal resistance within a power module that does not employ a flip-chip configuration. The fourth data set 1208 is calculated as a representation of the average thermal resistance within the packaged flip-chip power module 700. Fig. 12A The improvement indicated in the second simulation data graph shows a 4.3% reduction in the average thermal resistance Rthjf attributable to the flip-chip configuration.

[0137] Fig. 12B A graph 1210 showing computer simulation results of a junction-to-case thermal resistance parameter (Rthjc) according to some embodiments of the present disclosure. Rthjc has units of degrees Celsius per Watt and characterizes the amount of heat radiated by the flip-chip power module 700 during its operation. Thus, measuring the Rthjc of the flip-chip power module 700 indicates the efficiency of the heat transfer provided by the flip-chip configuration. Lower thermal resistance is associated with faster heat transfer provided by a more efficient heat sink.

[0138] The first data set 1212 is calculated as a representation of the maximum thermal resistance within a power module that does not include a large clip, such as drain clip 705. The second data set 1214 is calculated as a representation of the maximum thermal resistance within a packaged flip chip power module 700 that includes drain clip 705. Fig. 12B The improvement indicated by the first simulation data graph in shows that the maximum thermal resistance Rthjc attributable to the flip-chip configuration featuring the drain clip 705 is reduced by 8.0%.

[0139] The third data set 1216 is calculated as a representation of the average thermal resistance within a power module that does not include a large clip, such as drain clip 705. The fourth data set 1218 is calculated as a representation of the average thermal resistance within a packaged flip-chip power module 700 that includes drain clip 705. Fig. 12B The improvement indicated by the second simulation data graph in shows a 6.3% reduction in the average thermal resistance Rthjc attributable to the flip-chip configuration featuring the drain clip 705 .

[0140] Fig.13A and Fig. 13BSimulation results showing the thermal performance improvements associated with flip chip power module 900 are shown. Fig.13A A graph 1300 showing computer simulation results of a junction-to-fluid thermal resistance parameter (Rthjf) according to some embodiments of the present disclosure. Rthjf has units of degrees Celsius per Watt and characterizes the amount of heat radiated by the flip-chip power module 900 during its operation. Thus, measuring the Rthjf of the flip-chip power module 900 indicates the efficiency of the heat sink implemented by the drain clip 705 and the DAP 902a within the flip-chip power module 900.

[0141] The first data set 1302 is calculated as a representation of the maximum thermal resistance within a power module in which the IGBT die is not in a flip-chip configuration. The second data set 1304 is calculated as a representation of the maximum thermal resistance of the IGBT die in the flip-chip power module 900. Fig.13A The improvement indicated in the first simulation data graph shows a 2.9% reduction in the maximum thermal resistance Rthjf attributable to the flip-chip configuration.

[0142] The third data set 1306 is calculated as a representation of the average thermal resistance within a power module in which the IGBT die is not in a flip-chip configuration. The fourth data set 1308 is calculated as a representation of the average thermal resistance of the IGBT die in the flip-chip power module 900. Fig.13A The improvement indicated in the second simulation data graph shows a 3.5% reduction in the average thermal resistance Rthjf attributable to the flip chip configuration.

[0143] The fifth data set 1312 is calculated as a representation of the maximum thermal resistance within a power module in which the FRD die is not in a flip-chip configuration. The sixth data set 1314 is calculated as a representation of the maximum thermal resistance of the FRD die in the flip-chip power module 900. Fig.13A The improvement indicated in the third simulation data graph shows that the maximum thermal resistance Rthjf attributable to the flip-chip configuration is reduced by 2.5%.

[0144] The seventh data set 1316 is calculated as a representation of the average thermal resistance within a power module in which the FRD die is not in a flip-chip configuration. The eighth data set 1318 is calculated as a representation of the average thermal resistance of the FRD in the flip-chip power module 900. Fig.13A The improvement indicated in the fourth simulation data graph shows a 2.6% reduction in the average thermal resistance Rthjf attributable to the flip-chip configuration.

[0145] It should also be noted that Fig.13A The simulated values ​​of thermal resistance in data sets 1312, 1314, 1316, and 1318 for the FRD die are shown to be greater than Fig.13ACorresponding thermal resistance simulation values ​​in data sets 1302 , 1304 , 1306 , and 1308 for an IGBT die are shown.

[0146] Fig. 13B A graph 1320 showing computer simulation results of a junction-to-case thermal resistance parameter (Rthjc) according to some embodiments of the present disclosure. Rthjc has units of degrees Celsius per Watt and characterizes the amount of heat radiated by the flip-chip power module 900 during its operation. Thus, measuring the Rthjc of the flip-chip power module 900 indicates the efficiency of the heat sink implemented by the drain clip 705 and the DAP 902a within the flip-chip power module 900.

[0147] The first data set 1322 is calculated as a representation of the maximum thermal resistance within a power module 900 where the IGBT die is not in a flip-chip configuration. The second data set 1324 is calculated as a representation of the maximum thermal resistance of the IGBT die in a flip-chip power module 900 . Fig. 13B The first simulation data graph in indicates roughly equivalent performance, which shows a 4.5% increase in the low-level maximum thermal resistance Rthjc attributable to the flip-chip configuration. This indicates a small increase in thermal resistance fluctuations.

[0148] The third data set 1326 is calculated as a representation of the average thermal resistance within the power module 900 in which the IGBT die is not in a flip-chip configuration. The fourth data set 1328 is calculated as a representation of the average thermal resistance of the IGBT die in the flip-chip power module 900. Fig. 13B The improvement indicated in the second simulation data graph shows a 7.9% reduction in the average thermal resistance Rthjc attributable to the flip-chip configuration.

[0149] The fifth data set 1330 is calculated as a representation of the maximum thermal resistance within a power module in which the FRD die is not in a flip-chip configuration. The sixth data set 1332 is calculated as a representation of the maximum thermal resistance of the FRD die in the flip-chip power module 900. Fig. 13B The improvement indicated in the third simulation data graph shows that the maximum thermal resistance Rthjf attributable to the flip-chip configuration is reduced by 6.8%.

[0150] The seventh data set 1334 is calculated as a representation of the average thermal resistance within a power module in which the FRD die is not in a flip-chip configuration. The eighth data set 1336 is calculated as a representation of the average thermal resistance of the FRD in the flip-chip power module 900. Fig. 13B The improvement indicated in the fourth simulation data graph shows a 10.8% reduction in the average thermal resistance Rthjf attributable to the flip-chip configuration.

[0151] As described above, various embodiments of power modules featuring integrated metallization and oversized clips can reduce thermal resistance to improve heat dissipation by up to 10%. At the same time, the integrated metallization also replaces wire bonding for improved reliability. The metallization can be embedded in the modular pre-molded clip or in the upper layer of the single-sided DBM for use with a flip-chip configuration. Different bonding materials can be used for flip-chip configurations and pre-molded clip embodiments.

[0152] It should be understood that in the foregoing description, when an element such as a layer, a region or a substrate is mentioned on another element, is connected to another element, is electrically connected to another element, is coupled to another element or is electrically coupled to another element, the element may be directly on another element, connected or coupled to another element or may have one or more intermediate elements. On the contrary, when an element is mentioned directly on another element or layer, is directly connected to another element or layer or is directly coupled to another element or layer, there is no intermediate element or layer. Although the term may not be used directly on, directly connected to or directly coupled to in the entire specific embodiment, the element that is shown as being directly located on the element, directly connected or directly coupled can be mentioned in this manner. The claims of the present application may be revised to narrate the exemplary relationship described in the specification or shown in the accompanying drawings.

[0153] As used in this specification, unless the context clearly indicates a particular case, the singular form may include the plural form. In addition to the orientation shown in the drawings, spatial relative terms (e.g., above, on, above, below, below, below, under, at the top, at the bottom, etc.) are intended to cover different orientations of the device in use or operation. In some embodiments, the relative terms above and below may include vertically above and vertically below, respectively. In some embodiments, the term adjacent may include lateral adjacent or horizontal adjacent.

[0154] Some embodiments may be implemented using various semiconductor processing and / or packaging techniques. Some embodiments may be implemented using various types of semiconductor device processing techniques associated with semiconductor substrates, including but not limited to, for example, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), etc.

[0155] Although certain features of the described embodiments have been described as described herein, those skilled in the art will now recognize many modifications, alternatives, variations, and equivalents. For example, features shown with respect to one embodiment may also be included in other embodiments where appropriate. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of the embodiments. It should be understood that these modifications and variations are presented only by way of example and not limitation, and that various changes in form and detail may be made. In addition to mutually exclusive combinations, any part of the apparatus and / or method described herein may be combined in any combination. The embodiments described herein may include various combinations and / or sub-combinations of the functions, components, and / or features of the different embodiments described.

Claims

1. A device, comprising: a semiconductor die (104); a direct bond metal structure (102) coupled to a first side of the semiconductor die and configured to dissipate heat from the first side of the semiconductor die (104); a pre-molded clip assembly (105) coupled to the second side of the semiconductor die; and A molding compound (110) at least partially encapsulates the semiconductor die (104), the direct bond metal structure (102), and the pre-molded clip assembly (105) to form an integrated power module (100).

2. The device according to claim 1, wherein: The pre-molded clip assembly (105) is an encapsulated modular unit.

3. The device according to claim 1, wherein: The pre-molded clip assembly (105) includes an integrated metal wiring layer (107) coupled to terminals of the semiconductor die (104).

4. The device according to claim 3, further comprising: a lead frame coupled to the integrated metal wiring layer (107); and A power drain pin (112) is coupled to the direct bond metal structure (102).

5. The device according to claim 1, wherein: The semiconductor die (104) is a silicon carbide (SiC) chip.

6. The device according to claim 1, wherein: The semiconductor die (104) includes one or more insulated gate bipolar transistors (IGBTs).

7. The device according to claim 1, wherein: The semiconductor die (104) is attached to both the direct bond metal structure (102) and the pre-molded clip assembly (105) through respective sintered silver layers.

8. The device according to claim 1, wherein: The semiconductor die (104) is attached to the direct bond metal structure (102) via a sintered silver layer and to the pre-molded clip assembly (105) via a lead-based solder layer.

9. The device according to claim 8, wherein: The lead-based solder includes lead-selenium-silver PbSnAg.

10. The device according to claim 1, wherein: The power module (100) is configured as an inverter for electric vehicles and hybrid electric vehicles.

11. The device according to claim 1, wherein: The direct bonded metal structure (102) includes a Si3N4 ceramic layer (102b).

12. A pre-molded clip assembly (105), the pre-molded clip assembly comprising: Encapsulating agent (109); a metal wiring layer (107) centered within the encapsulant (109); a first metal clip (108) coupled to a lower surface of the metal wiring layer (107) and extending through the encapsulant (109); and A second metal clip (108) is coupled to the lower surface of the metal wiring layer (107) and extends through the encapsulant (109), the second metal clip (108) being separated from the first metal clip (108) by an insulating material.

13. The pre-molded clip assembly (105) of claim 12, wherein: A first end portion of the metal wiring layer (107) is surrounded by the encapsulant (109), and a second end portion of the metal wiring layer (107) extends through the encapsulant (109) to contact a first external element.

14. The pre-molded clip assembly (105) of claim 12, wherein: The first metal clip (108) and the second metal clip (108) are configured to contact respective portions of a second external element.

15. The pre-molded clip assembly (105) of claim 14, wherein: The second external component is a semiconductor die (104), and the pre-molded clip assembly (105) is disposed within an electronically integrated power module (100).

16. A method comprising: forming (502) a pre-molded clip assembly (105) comprising a first encapsulant (109); attaching (504) the pre-molded clip assembly (105) to a semiconductor die (104); attaching (506) the semiconductor die (104) to a direct bond metal structure (102); as well as The semiconductor die (104), the pre-molded clip assembly (105), and the direct bonded metal structure (102) are encapsulated (508) in a second encapsulant (110) to form an integrated power module (100).

17. The method according to claim 16, wherein: Forming the pre-molded clip assembly (105) includes forming an integrated metal wiring layer (107).

18. The method according to claim 17, wherein: Forming the pre-molded clip assembly (105) also includes forming a metal clip (108) between the integrated metal wiring layer (107) and the semiconductor die (104).

19. The method according to claim 17, wherein: Forming the pre-molded clip assembly (105) includes: sizing the integrated metal wiring layer (107) to be larger than the semiconductor die (104); and Gate and source contacts (107a, 107b) to the semiconductor die (104) are formed in the integrated metal wiring layer (107).

20. The method according to claim 17, wherein: The first encapsulant (109) and the second encapsulant (110) are made of similar epoxy molding compound.

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