Repair method of integrated circuit

Abstract

The invention discloses a method for repairing an integrated circuit, relates to the technical field of integrated circuits, and aims to improve the real-time performance, the repairing precision and the repairing effect of aging repairing of the integrated circuit so as to improve the performance of the integrated circuit in the long-time working process. The method for repairing the integrated circuit comprises the following steps: firstly, providing the integrated circuit to be repaired; next, acquiring a first performance correlation parameter and a performance degradation correlation parameter of the integrated circuit to be repaired; and establishing a circuit aging model. Next, simulating the integrated circuit to be repaired, and determining a transistor to be repaired and first fault time in the integrated circuit to be repaired; next, acquiring a second performance correlation parameter of the transistor to be repaired; next, determining repair parameters corresponding to the transistor to be repaired; and then, repairing the transistor to be repaired according to the first fault time and the repair parameter by adopting a gate-induced drain leakage current repair mode.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a method for repairing an integrated circuit. Background Art

[0002] After working for a long time, the performance of the integrated circuit will degrade, which may cause the integrated circuit to fail to work normally within the designed life. In the overall design of the integrated circuit, in order to extend the life of the integrated circuit, it is necessary to optimize the design in combination with the post-production test.

[0003] In the prior art, the aging of integrated circuits is repaired by performing a life test on the integrated circuits after the integrated circuits are manufactured. The failure causes of the integrated circuits are found by statistics based on the aging conditions of the integrated circuits during actual applications, and then the device parameters and structural parameters of the integrated circuits are optimized to extend their life. This repair method requires the actual life test and the adjustment of parameters based on the actual aging conditions after production, which is a redesign of the integrated circuit. In the process of testing and modifying parameters, a lot of time is consumed and a large number of integrated circuits with short lifespans are produced, resulting in low repair efficiency and lack of real-time performance. At the same time, since the method of adjusting parameters has many restrictions, it is difficult to accurately and effectively extend the life of the integrated circuit, which affects the performance of the integrated circuit during long-term operation. Summary of the invention

[0004] The object of the present invention is to provide a repair method for an integrated circuit, which is used to improve the real-time performance, repair accuracy and repair effect of aging repair of the integrated circuit, thereby improving the performance of the integrated circuit during long-term operation.

[0005] In order to achieve the above-mentioned purpose, the present invention provides the following technical solutions: First, an integrated circuit to be repaired is provided. Next, a first performance-related parameter and a performance degradation-related parameter of the integrated circuit to be repaired are obtained; and a circuit aging model is established according to the first performance-related parameter. Next, the integrated circuit to be repaired is simulated to obtain simulation performance-related parameters; and according to the circuit aging model, the simulation performance-related parameters and the performance degradation-related parameters, the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined. Next, a second performance-related parameter of the transistor to be repaired is obtained. Next, according to the second performance-related parameter, the simulation performance-related parameter and the performance degradation-related parameter, the repair parameters of the transistor to be repaired are determined. Next, a gate-induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameters.

[0006] In the case of adopting the above technical solution, before repairing the integrated circuit to be repaired, the first performance-related parameter and the performance degradation-related parameter of the integrated circuit to be repaired are obtained in advance, and the first performance-related parameter can characterize the working state of the integrated circuit to be repaired and the corresponding working parameters under the working state. Based on this, a circuit aging model of a single transistor included in the integrated circuit to be repaired is established according to the first performance-related parameter, so as to facilitate targeted aging evaluation of the integrated circuit to be repaired, so as to accurately know the performance degradation of each transistor of the integrated circuit to be repaired, and improve the simulation accuracy. In addition, the performance degradation-related parameter will be used as the judgment threshold standard of the integrated circuit to be repaired. Afterwards, according to the obtained simulation performance-related parameter, that is, the simulation result, it is compared with the performance degradation-related parameter to judge the aging condition and the first fault time of each transistor in the integrated circuit to be repaired. If the simulation performance-related parameter of a certain transistor meets the degradation standard in the performance degradation-related parameter, then the part is identified as the transistor to be repaired, and the transistor to be repaired is repaired in the subsequent repair process. Secondly, the ratio of the simulation performance-related parameter and the performance degradation-related parameter is used as a parameter to measure the degradation of the transistor to be repaired, so as to facilitate the subsequent repair of the transistor to be repaired; and the first fault time is considered to be the simulation performance-related parameter of the transistor to be repaired after the first fault time meets the degradation standard in the performance degradation-related parameter. After that, the second performance-related parameter of the transistor to be repaired is obtained, and the second performance-related parameter is used as the basic device parameter of the transistor to be repaired, which will be used as the basis for determining the specific means of the subsequent repair method. Next, according to the second performance-related parameter, the simulation performance-related parameter and the performance degradation-related parameter, the degradation of the transistor to be repaired is obtained, and the repair parameters for repairing the transistor to be repaired are determined in combination with the degradation of the transistor to be repaired and the basic device parameters of the transistor to be repaired. Finally, according to the first fault time and the repair parameter, the gate-induced drain leakage current repair method is used to repair the transistor to be repaired. Compared with the prior art, the aging transistor to be repaired is repaired by thermal annealing. The integrated circuit to be repaired needs to be thermally annealed as a whole, which will inevitably interrupt the normal operation of the system using the integrated circuit to be repaired, and the repair time is longer. The present invention uses a gate induced drain leakage current repair method to repair the transistor to be repaired. Compared with the prior art, the integrated circuit to be repaired can be repaired without interrupting the normal operation of the system using the integrated circuit to be repaired, which greatly reduces the repair time.Furthermore, the repair method provided by the present invention does not repair the integrated circuit by adjusting the device parameters of the integrated circuit and then remanufacturing the integrated circuit, which solves the problems of low efficiency and low real-time performance of the indirect repair method in the prior art that requires detection after the integrated circuit is produced to adjust the parameters of the integrated circuit to extend its life; and because the transistor to be repaired is directly repaired during the repair, the problems of low repair accuracy and poor repair caused by low accuracy of simulation results can be solved by using more conservative repair parameters, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0007] As a possible implementation scheme, the first performance-related parameters include: designed operating temperature, designed maximum voltage stress, designed operating time, designed threshold voltage, designed saturation leakage current and designed circuit turn-on delay time.

[0008] In the case of adopting the above technical solution, the first performance-related parameter is used as a parameter to enable the integrated circuit to be repaired to work normally, and is used to establish a circuit aging model, so as to use the circuit aging model for simulation. In this case, the designed operating temperature, the designed maximum voltage stress and the designed operating time can fully characterize the working state of the integrated circuit to be repaired, and the integrated circuit to be repaired needs to operate at the designed operating temperature for at least the designed continuous operating time; the designed threshold voltage, the designed saturated leakage current and the designed circuit conduction delay time are parameters that can fully characterize the various parameters required by the integrated circuit to be repaired in the working state, so that the circuit aging model established based on the first performance-related parameter can accurately characterize the actual situation of the integrated circuit to be repaired, improve the accuracy of the simulation results, and help improve the repair effect of the repair method provided by the present invention.

[0009] As a possible implementation scheme, the performance degradation-related parameters include: circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit turn-on delay time; wherein the circuit type includes: memory, operator or amplifier.

[0010] When the above technical solution is adopted, the performance degradation associated parameters are used as the standard for judging the aging condition of the integrated circuit to be repaired. The standard for the aging condition of the integrated circuit to be repaired is determined based on the four parameters of circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit conduction delay time. This can comprehensively characterize the various parameters required by the integrated circuit to be repaired in the working state, so that the judgment result of using the performance degradation associated parameters to judge the integrated circuit to be repaired is more effective, and the transistor to be repaired can be accurately determined, which is beneficial to improving the repair effect of the repair method provided by the present invention.

[0011] As a possible implementation scheme, when the integrated circuit to be repaired is a memory, the difference between the degraded threshold voltage and the designed threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturated leakage current and the designed saturated leakage current is greater than or equal to 15%; the degradation ratio between the designed circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%. When the integrated circuit to be repaired is an arithmetic unit, the difference between the degraded threshold voltage and the designed threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturated leakage current and the designed saturated leakage current is greater than or equal to 15%; the degradation ratio between the designed circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%. When the integrated circuit to be repaired is an amplifier, the difference between the degraded threshold voltage and the designed threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturated leakage current and the designed saturated leakage current is greater than or equal to 15%; the degradation ratio between the designed circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%.

[0012] When the above technical solution is adopted, since different types of integrated circuits to be repaired have different uses, the fault standards of different types of integrated circuits to be repaired on different parameters may be the same or different. Therefore, according to the working characteristics of different types of integrated circuits to be repaired, appropriate fault standards are selected on different parameters, thereby improving the pertinence of the repair method provided by the present invention and ultimately improving the effect of the integrated circuit repair method provided by the present invention.

[0013] As a possible implementation scheme, the second performance-related parameters include: a drop in threshold voltage, a subthreshold swing, transconductance, electric field intensity distribution, saturation leakage current, an overlapping length between the gate region and the drain region, and a thickness of a gate dielectric layer.

[0014] When the above scheme is adopted, the second performance-related parameter is used as the device parameter of the transistor to be repaired, and the device aging of the transistor to be repaired is repaired in combination with the second performance-related parameter when the transistor to be repaired is subsequently repaired. Common device aging, such as hot carrier degradation (HCD), originates from heating and subsequent injection of carriers into the gate oxide layer, resulting in the formation of local and uneven interface states and oxide layer charge accumulation near the drain junction of the transistor. The defects generated will cause threshold voltage drift, transconductance degradation, leakage current reduction, etc., and ultimately cause device failure. In addition, since the lateral electric field near the drain junction causes carrier heating and avalanche, and the lateral electric field affects the injection of carriers into the gate oxide layer, the electric field distribution within the transistor will also have an important impact on the hot carrier degradation of the transistor. In this case, specific parameters such as the drop in threshold voltage, subthreshold swing, transconductance, electric field strength distribution, drop in saturated leakage current, overlapping length of the gate region and the drain region, and thickness of the gate dielectric layer are used as device parameters of the transistor to be repaired, which can effectively characterize the hot carrier degradation of the transistor to be repaired, thereby facilitating the subsequent accurate calculation of the first fault time and repair parameters, and improving the repair effect of the repair method provided by the present invention.

[0015] As a possible implementation, the relationship of the circuit aging model includes:

[0016] Wherein, Vth is the threshold voltage, A is the threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is the threshold voltage degradation parameter 2, t is the operating time, and n is the time index.

[0017] When the above scheme is adopted, the above circuit aging model is to determine the specific value of the parameter (fill in the letter code of the parameter here). In this case, the threshold voltage in the circuit aging model can effectively characterize the aging of the integrated circuit to be repaired using the above relationship. The circuit aging model is more accurate, which is conducive to improving the repair effect of the repair method provided by the present invention.

[0018] As a possible implementation scheme, the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined according to the circuit aging model, simulation performance-related parameters and performance degradation-related parameters, including: calculating the first fault time according to the circuit aging model and performance degradation-related parameters; determining the transistor to be repaired according to the first fault time and simulation performance-related parameters.

[0019] When the above scheme is adopted, an accurate first fault time can be obtained, and the transistor to be repaired can be subsequently repaired based on the first fault time, which can ensure that the performance degradation of the transistor to be repaired does not exceed the design value, thereby ensuring the effectiveness of the repair method provided by the present invention.

[0020] As a possible implementation scheme, the simulation performance-related parameters include: circuit type, simulation threshold voltage, simulation saturation leakage current and simulation circuit turn-on delay time. The repair parameters include: gate-drain voltage and repair time.

[0021] In the case of adopting the above scheme, the simulation performance-related parameters are used as the results of the circuit aging model simulation. The simulation performance-related parameters have the same parameter type as the performance degradation-related parameters. By comparing with the performance degradation-related parameters, the aging of the integrated circuit to be repaired and the transistor to be repaired in the integrated circuit to be repaired can be more effectively judged. The repair parameters are used as operating parameters for subsequent repairs. Since the repair method provided by the present invention adopts a gate-induced drain leakage current repair method for repair, obtaining the gate-drain voltage and repair time used during the repair can further improve the repair effect and ensure that the repair effect meets the design expectations.

[0022] As a possible implementation scheme, the repair parameters of the transistor to be repaired are determined according to the second performance-related parameters, the simulation performance-related parameters and the performance degradation-related parameters, including: determining the gate-drain voltage and repair time in the repair parameters according to the threshold voltage drop, subthreshold swing, transconductance, electric field strength distribution, saturation leakage current drop, overlapping length of the gate region and the drain region, gate dielectric layer thickness in the second performance-related parameters and the simulated threshold voltage, simulated saturation leakage current and simulated circuit turn-on delay time in the simulation performance-related parameters.

[0023] In the case of adopting the above scheme, the gate-drain voltage and repair time in the above repair parameters are obtained by combining and analyzing the threshold voltage drop, subthreshold swing, transconductance, electric field strength distribution, saturation leakage current drop, overlapping length of gate region and drain region, gate dielectric layer thickness and simulated threshold voltage, simulated saturation leakage current and simulated circuit conduction delay time in the second performance-related parameters, which are used to repair the transistor to be repaired. Based on the threshold voltage, subthreshold swing, saturation leakage current, overlapping length of gate region and drain region, gate dielectric layer thickness and simulated threshold voltage, simulated saturation leakage current and simulated circuit conduction delay time in the second performance-related parameters, the gate-drain voltage and repair time when repairing the transistor to be repaired can be accurately determined, thereby improving the repair effect of the integrated circuit repair method provided by the present invention.

[0024] As a possible implementation scheme, a gate induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameters, including: after timing to the first fault time, according to the repair parameters, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level to induce gate induced drain leakage current; re-timing, and repeating the above operation.

[0025] When the above scheme is adopted, after the first fault time is counted, the transistor to be repaired is repaired using gate induced drain leakage current. The repair method is relatively simple, and the corresponding repair circuit is also relatively simple, which can reduce the design difficulty of the integrated circuit repair method provided by the present invention and reduce the design overhead and power consumption overhead on the repair circuit.

[0026] As a possible implementation scheme, a gate induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameter, including: after the timing reaches the first fault time, a real-time performance test is performed on the transistor to be repaired to obtain a third performance-related parameter; and the current performance degradation ratio is determined according to the third performance-related parameter and the performance degradation-related parameter. Next, if the current performance degradation ratio is greater than or equal to the performance degradation threshold, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level according to the repair parameter, so as to induce a gate induced drain leakage current. Next, if the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined according to the third performance-related parameter and the performance degradation-related parameter; and after the timing reaches the second fault time, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level according to the repair parameter, so as to induce a gate induced drain leakage current; and the first fault time is updated according to the second fault time. Re-timing is performed, and the above operation is repeated.

[0027] In the case of adopting the above scheme, the second fault time and the first fault time have the same time starting point; and the performance degradation threshold can be obtained manually according to actual needs, or it can be the threshold of the difference between the degradation threshold voltage and the design threshold voltage, the threshold of the degradation ratio between the degraded saturated leakage current and the design saturated leakage current, and the threshold of the degradation ratio between the design circuit conduction delay time and the degraded circuit conduction delay time. And the third performance-related parameter includes the threshold voltage, saturated leakage current and circuit conduction delay time of the transistor to be repaired. According to the third performance-related parameter and the performance degradation-related parameter, the current performance degradation ratio is judged to be the current performance degradation ratio of the threshold voltage, saturated leakage current and circuit conduction delay time of the transistor to be repaired, and it is judged whether the current performance degradation ratio exceeds the above-mentioned performance degradation threshold included in the performance degradation-related parameter. In this case, the present invention provides another repair method, which improves the scope of application of the integrated circuit repair method provided by the present invention. Furthermore, since a real-time performance test is performed on the transistor to be repaired and a third performance-related parameter is obtained before the transistor to be repaired is repaired, and then the current performance degradation ratio is determined based on the third performance-related parameter and the performance degradation-related parameter, the transistor to be repaired is repaired only when the current performance degradation ratio is greater than or equal to the performance degradation threshold, thereby reducing the number of repair times, avoiding invalid repairs or multiple repairs that may damage the device structure of the transistor to be repaired, and effectively extending the life of the integrated circuit to be repaired.

[0028] As a possible implementation scheme, using a gate induced drain leakage current repair method and repairing the transistor to be repaired according to the first fault time and the repair parameter also includes: using a gate induced drain leakage current repair method, using a repair circuit to repair the transistor to be repaired according to the first fault time and the repair parameter; the repair circuit includes: a timer and a repair module; the timer is triggered every first fault time; the repair module is connected to at least the gate, source, drain and substrate of the transistor to be repaired; after the timer is triggered, the repair module tests the performance of the transistor to be repaired to obtain a third performance-related parameter; and judging the current performance degradation according to the third performance-related parameter and the performance degradation-related parameter ratio; if the current performance degradation ratio is greater than or equal to the performance degradation threshold, according to the repair parameters, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, and sets the drain of the transistor to be repaired to a high level, thereby inducing a gate induced drain leakage current; if the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined according to the third performance-related parameter and the performance degradation-related parameter, and after the timer times to the second fault time, according to the repair parameters, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, and sets the drain of the transistor to be repaired to a high level, thereby inducing a gate induced drain leakage current; and the first fault time is updated according to the second fault time.

[0029] When the above scheme is adopted, the beneficial effects of this implementation scheme please refer to the relevant description of the beneficial effects corresponding to "after timing to the first fault time,..., and repeating the above operation" in the previous text, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0031] Figure 1 A flowchart of a method for repairing an integrated circuit provided by an embodiment of the present invention;

[0032] Figure 2 It is a flow chart of an implementation scheme of a gate induced drain leakage current repair method in an embodiment of the present invention;

[0033] Figure 3 A flow chart of another implementation scheme of a gate induced drain leakage current repair method in an embodiment of the present invention. DETAILED DESCRIPTION

[0034] In order to make the technical problems, technical solutions and beneficial effects to be solved by the embodiments of the present invention more clearly understood, the embodiments of the present invention are further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the embodiments of the present invention and are not used to limit the embodiments of the present invention.

[0035] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined. "Several" means one or more, unless otherwise clearly and specifically defined.

[0037] In the description of the embodiments of the present invention, it should be understood that the directions or positional relationships indicated by the terms "up", "down", "front", "back", "left", "right", etc. are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the embodiments of the present invention.

[0038] In the description of the embodiments of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present invention can be understood according to specific circumstances.

[0039] The purpose of the embodiment of the present invention is to provide a repair method for an integrated circuit, which is used to improve the real-time performance and speed of integrated circuit aging design, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0040] After working for a long time, the performance of the integrated circuit will degrade, which may cause the integrated circuit to fail to work normally within the designed life. In the overall design of the integrated circuit, in order to extend the life of the integrated circuit, it is necessary to optimize the design in combination with the post-production test.

[0041] In the prior art, the aging of integrated circuits is repaired by performing a life test on the integrated circuits after the integrated circuits are manufactured. The aging of the integrated circuits in the actual application process after the integrated circuits are applied is combined with statistics to find the cause of the failure of the integrated circuits, and then the device parameters and structural parameters of the integrated circuits are optimized to extend the life. This repair method requires actual life testing and adjusts the parameters in combination with the actual aging conditions after production. It is a redesign of the integrated circuit, not a direct modification or repair of the integrated circuit that has been designed and produced. A lot of time will be consumed in the process of testing and modifying parameters, and a large number of integrated circuits with short lifespans will be produced, resulting in low repair efficiency and lack of real-time performance. At the same time, since the method of adjusting parameters has many restrictions, it is difficult to accurately and effectively extend the life of the integrated circuit, which affects the performance of the integrated circuit during long-term operation.

[0042] In addition, in the prior art, when designing integrated circuits, a simulation program with integrated circuit emphasis (SPICE) model is used to adjust parameters. However, the SPICE model generally does not have a circuit aging model or only has an imperfect circuit aging model. The aging design still needs to be implemented through the above-mentioned post-production testing and statistical methods, and still has the same defects, and the integrated circuit cannot be effectively repaired.

[0043] In order to improve the efficiency, real-time performance, repair accuracy and repair effect of the repair method for repairing integrated circuit aging, thereby improving the performance of the integrated circuit to be repaired during long-term operation, please refer to Figure 1 , an embodiment of the present invention provides a method for repairing an integrated circuit. The method for repairing an integrated circuit includes the following steps: first, providing an integrated circuit to be repaired. Next, obtaining a first performance-related parameter and a performance degradation-related parameter of the integrated circuit to be repaired, and establishing a circuit aging model based on the first performance-related parameter. Next, simulating the integrated circuit to be repaired according to the circuit aging model to obtain simulation performance-related parameters, and determining the transistor to be repaired in the integrated circuit to be repaired based on the simulation performance-related parameters and the performance degradation-related parameters. Next, obtaining a second performance-related parameter of the transistor to be repaired. Next, determining a first fault time and repair parameter of the transistor to be repaired based on the second performance-related parameter, the simulation performance-related parameter, and the performance degradation-related parameter. Next, adopting a gate induced drain leakage current repair method, and repairing the transistor to be repaired based on the first fault time and the repair parameter.

[0044] In the case of adopting the above technical solution, before repairing the integrated circuit to be repaired, the first performance-related parameter and the performance degradation-related parameter of the integrated circuit to be repaired are obtained in advance, and the first performance-related parameter can characterize the working state of the integrated circuit to be repaired and the corresponding working parameters under the working state. Based on this, a circuit aging model of a single transistor included in the integrated circuit to be repaired is established according to the first performance-related parameter, so as to facilitate targeted aging evaluation of the integrated circuit to be repaired, so as to accurately know the performance degradation of each transistor of the integrated circuit to be repaired, and improve the simulation accuracy. In addition, the performance degradation-related parameter will be used as the judgment threshold standard of the integrated circuit to be repaired. Afterwards, according to the obtained simulation performance-related parameter, that is, the simulation result, it is compared with the performance degradation-related parameter to judge the aging condition and the first fault time of each transistor in the integrated circuit to be repaired. If the simulation performance-related parameter of a certain transistor meets the degradation standard in the performance degradation-related parameter, then the part is identified as the transistor to be repaired, and the transistor to be repaired is repaired in the subsequent repair process. Secondly, the ratio of the simulation performance-related parameter and the performance degradation-related parameter is used as a parameter to measure the degradation of the transistor to be repaired, so as to facilitate the subsequent repair of the transistor to be repaired; and the first fault time is considered to be the simulation performance-related parameter of the transistor to be repaired after the first fault time meets the degradation standard in the performance degradation-related parameter. After that, the second performance-related parameter of the transistor to be repaired is obtained, and the second performance-related parameter is used as the basic device parameter of the transistor to be repaired, which will be used as the basis for determining the specific means of the subsequent repair method. Next, according to the second performance-related parameter, the simulation performance-related parameter and the performance degradation-related parameter, the degradation of the transistor to be repaired is obtained, and the repair parameters for repairing the transistor to be repaired are determined in combination with the degradation of the transistor to be repaired and the basic device parameters of the transistor to be repaired. Finally, according to the first fault time and the repair parameter, the gate-induced drain leakage current repair method is used to repair the transistor to be repaired. Compared with the prior art, the aging transistor to be repaired is repaired by thermal annealing. The integrated circuit to be repaired needs to be thermally annealed as a whole, which will inevitably interrupt the normal operation of the system using the integrated circuit to be repaired, and the repair time is longer. The present invention uses a gate induced drain leakage current repair method to repair the transistor to be repaired. Compared with the prior art, the integrated circuit to be repaired can be repaired without interrupting the normal operation of the system using the integrated circuit to be repaired, which greatly reduces the repair time.Furthermore, the repair method provided by the present invention does not repair the integrated circuit by adjusting the device parameters of the integrated circuit and then remanufacturing the integrated circuit, which solves the problems of low efficiency and low real-time performance of the indirect repair method in the prior art that requires detection after the integrated circuit is produced to adjust the parameters of the integrated circuit to extend its life; and because the transistor to be repaired is directly repaired during the repair, the problems of low repair accuracy and poor repair caused by low accuracy of simulation results can be solved by using more conservative repair parameters, thereby improving the performance of the integrated circuit to be repaired during long-term operation.

[0045] In actual application, the embodiment of the present invention does not specifically limit the type of integrated circuit to be repaired, as long as its performance degradation can be repaired by using the gate induced drain leakage current repair method. For example, the integrated circuit to be repaired can be a memory, an operator, an amplifier or other possible types.

[0046] Next, a first performance-related parameter and a performance degradation-related parameter of the integrated circuit to be repaired are obtained; and a circuit aging model is established according to the first performance-related parameter.

[0047] The first performance-related parameter is used to characterize the working state of the integrated circuit to be repaired and the corresponding working parameters under the working state, effectively supporting the establishment of the circuit aging model. The parameter types specifically included in the first performance-related parameter can be determined according to the type of integrated circuit and the actual application scenario, and the embodiment of the present invention does not specifically limit it.

[0048] Exemplarily, the first performance-related parameters may include a designed operating temperature, a designed maximum voltage stress, a designed operating time, a designed threshold voltage, a designed saturated leakage current, and a designed circuit conduction delay time. In this case, the designed threshold voltage, the designed saturated leakage current, and the designed circuit conduction delay time can comprehensively characterize the various parameters required by the integrated circuit to be repaired in the working state, so that the circuit aging model established based on the first performance-related parameters can accurately characterize the actual situation of the integrated circuit to be repaired, improve the accuracy of the simulation results, and help improve the repair effect of the repair method provided in the embodiment of the present invention.

[0049] The designed threshold voltage, the designed saturated leakage current and the designed circuit conduction delay time can be calculated from the design parameters of the integrated circuit to be repaired, or can be obtained by measuring with an oscilloscope, for example.

[0050] The above-mentioned design operating temperature, design maximum voltage stress and design operating time are design values ​​when designing the integrated circuit to be repaired. The integrated circuit to be repaired needs to withstand the design maximum voltage stress at the design operating temperature for at least the design operating time, and still maintain the design threshold voltage, design saturation leakage current and design circuit turn-on delay time within the degradation range specified by the performance degradation associated parameters.

[0051] Regarding the relationship of the circuit aging model, the embodiment of the present invention is not limited to the relationship of the threshold voltage, but may also include the relationship of the saturation leakage current and the relationship of the turn-on delay time. For example, when the relationship of the circuit aging model is the relationship of the threshold voltage, the relationship is: Wherein, Vth is the threshold voltage, A is the threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is the threshold voltage degradation parameter 2, t is the operating time, and n is the time index.

[0052] When the above solution is adopted, the above circuit aging model is to determine the specific value of the parameter (fill in the letter code of the parameter here). In this case, the threshold voltage in the circuit aging model can effectively characterize the aging of the integrated circuit to be repaired using the above relationship. The circuit aging model is more accurate, which is conducive to improving the repair effect of the repair method provided by the embodiment of the present invention.

[0053] Furthermore, in one embodiment, the specific method for establishing a circuit aging model based on the first performance-related parameters including the designed operating temperature, the designed continuous operation time, the designed threshold voltage, the designed saturation leakage current and the designed circuit conduction delay time is as follows: at different temperatures included in the designed operating temperature, a single transistor in the integrated circuit is subjected to a designed maximum voltage stress for continuous testing, and the specific values ​​of the threshold voltage, saturation leakage current and circuit conduction delay time of the transistor are measured after a plurality of different test times. Based on the specific values, the relationship between the threshold voltage, saturation leakage current and conduction delay time of the integrated circuit to be repaired and the operating time and operating temperature of the integrated circuit to be repaired is fitted to the above-mentioned relational expression through statistical software to obtain the specific values ​​in the relational expression.

[0054] It should be noted that the method for determining other relational expressions included in the circuit aging model is substantially the same as the above-mentioned relational expression for the threshold voltage and the method for determining parameters, and will not be described in detail here.

[0055] As for the above-mentioned performance degradation associated parameters, which serve as standards for judging the aging condition of the integrated circuit to be repaired, the parameter types specifically included in the performance degradation associated parameters can be based on the type of integrated circuit and the type of judgment parameters required for the gate induced drain leakage current repair method adopted, and the embodiments of the present invention do not specifically limit them.

[0056] Exemplarily, the performance degradation-related parameters include: circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit conduction delay time. Wherein, the circuit type includes: memory, operator or amplifier.

[0057] When the above technical solution is adopted, the performance degradation associated parameters are used as the standard for judging the aging condition of the integrated circuit to be repaired. The standard for the aging condition of the integrated circuit to be repaired is determined based on the four parameters of circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit conduction delay time. This can comprehensively characterize the various parameters required by the integrated circuit to be repaired in the working state, so that the judgment result of using the performance degradation associated parameters to judge the integrated circuit to be repaired is more effective, the transistor to be repaired can be accurately determined, the accuracy of the simulation results is improved, and it is beneficial to improve the repair effect of the repair method provided in the embodiment of the present invention.

[0058] Specifically, regarding the range of performance degradation associated parameters, when the integrated circuit to be repaired is a memory, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%.

[0059] When the integrated circuit to be repaired is an arithmetic unit, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%.

[0060] When the integrated circuit to be repaired is an amplifier, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%.

[0061] When the above technical solution is adopted, since different types of integrated circuits to be repaired have different uses, the fault standards of different types of integrated circuits to be repaired on different parameters may be the same or different. Therefore, according to the working characteristics of different types of integrated circuits to be repaired, appropriate fault standards are selected on different parameters, thereby improving the pertinence of the repair method provided by the present invention and ultimately improving the effect of the integrated circuit repair method provided by the present invention.

[0062] Exemplarily, different types of integrated circuits to be repaired have different fault standards on different parameters. For example, if the integrated circuit to be repaired is a memory, it is relatively less sensitive to the degradation of device parameters, and a more relaxed fault standard can be selected than when the integrated circuit to be repaired is an operator, for example: the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 35mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 17%; the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 35%. If the integrated circuit to be repaired is an amplifier, it is more sensitive to the degradation of device parameters than when the integrated circuit to be repaired is an operator, and a more relaxed fault standard can be selected, for example: the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 25mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 10%; the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 25%.

[0063] Next, the integrated circuit to be repaired is simulated according to the circuit aging model to obtain simulation performance associated parameters; and the transistor to be repaired and the first fault time in the integrated circuit to be repaired are determined according to the circuit aging model, the simulation performance associated parameters and the performance degradation associated parameters.

[0064] Exemplarily, according to the relationship of the above-mentioned circuit aging model, the time when the simulation performance-related parameters of any integrated circuit to be repaired exceed the performance degradation-related parameters is calculated, and this time is recorded as the failure duration t0. Integrated circuit simulation software including Cadence, ANSYS and Empyrean are used to simulate the devices of each transistor in the integrated circuit to be repaired, and the working cycle length T1 of the integrated circuit to be repaired and the time t of each transistor under voltage stress in one working cycle are obtained. The working cycle is the minimum cycle of repetitive work of the integrated circuit to be repaired in the actual working process. Next, the design working time is divided by T1 to obtain the design operation cycle number N. Next, transistors with t greater than or equal to t0 / N are screened out and set as transistors to be repaired.

[0065] Next, the first fault time is determined according to the failure duration working time t0 and the actual situation. When the transistor to be repaired is subsequently repaired, the accumulated time that the transistor to be repaired is subjected to voltage stress is timed and compared with the first fault time. Under the above implementation scheme, the first fault time can be the failure duration working time t0; the first fault time can also be earlier or later than the failure duration working time t0, and can be determined according to the actual manufacturing situation of the integrated circuit to be repaired. Specifically, if it is hoped that the aging of the transistor to be repaired can be warned in advance and a more conservative repair method can be implemented, a first fault time that is shorter and significantly shorter than the failure duration working time t0 can be selected; and the circuit aging model device simulation is only a theoretical simulation. In the actual application process, the actual device parameters, actual working environment and working conditions of different integrated circuits to be repaired after production can be combined with the failure duration working time t0, and the specific value of the first fault time can be adjusted based on the fault warning time, thereby improving the repair accuracy and repair accuracy of the repair method provided in the embodiment of the present invention. For example, if the manufacturing process of the integrated circuit to be repaired is perfect and the yield is high, the first fault time can be appropriately delayed compared to the failure duration working time t0, thereby reducing the number of repairs and reducing the secondary damage caused by the repair, thereby further extending the life of the integrated circuit to be repaired; if the manufacturing process of the integrated circuit to be repaired is not perfect and the yield is low, the first fault time can be appropriately advanced compared to the failure duration working time t0, thereby further ensuring the life of the integrated circuit to be repaired.

[0066] Exemplarily, the value range of the first fault time may be greater than or equal to 80% of the failure continuous working time t0 and less than or equal to 110% of the failure continuous working time t0.

[0067] The above-mentioned simulation performance-related parameters are the results of simulation of the circuit aging model. The simulation performance-related parameters and the performance degradation-related parameters have the same parameter type. By comparing them with the performance degradation-related parameters, the aging condition of the integrated circuit to be repaired and the transistor to be repaired in the integrated circuit to be repaired can be more effectively judged.

[0068] Exemplarily, the simulation performance-related parameters include: circuit type, simulation threshold voltage, simulation saturation leakage current, and simulation circuit turn-on delay time.

[0069] Next, the second performance-related parameter of the transistor to be repaired is obtained. The second performance-related parameter is used as a device parameter of the transistor to be repaired. When the transistor to be repaired is subsequently repaired, the device aging of the transistor to be repaired is repaired in combination with the second performance-related parameter. In order to achieve a better repair effect, different transistors to be repaired need to have different second performance-related parameters to achieve a better repair effect.

[0070] Exemplarily, the second performance-related parameters include: a drop in threshold voltage, a subthreshold swing, a transconductance, an electric field strength distribution, a drop in saturation drain current, an overlapping length between a gate region and a drain region, and a thickness of a gate dielectric layer.

[0071] In the case of adopting the above scheme, common device aging such as hot carrier degradation (HCD) is caused by heating and subsequent injection of carriers into the gate oxide layer, resulting in the formation of local and uneven interface states and oxide layer charge accumulation near the drain junction of the transistor. The defects generated will cause threshold voltage drift, transconductance degradation, leakage current reduction, etc., and ultimately cause device failure. In addition, since the lateral electric field near the drain junction causes carrier heating and avalanche, and the lateral electric field affects the injection of carriers into the gate oxide layer, the electric field distribution in the transistor will also have an important impact on the hot carrier degradation of the transistor. In this case, the specific parameters such as the drop in threshold voltage, subthreshold swing, transconductance, electric field intensity distribution, drop in saturated leakage current, overlap length of the gate region and the drain region, and gate dielectric layer thickness are used as device parameters of the transistor to be repaired, which can effectively characterize the hot carrier degradation of the transistor to be repaired, thereby facilitating the subsequent accurate calculation of the first fault time and repair parameters, and improving the repair effect of the repair method provided in the embodiment of the present invention.

[0072] Next, the repair parameters of the transistor to be repaired are determined according to the second performance-related parameters, the simulation performance-related parameters, and the performance degradation-related parameters. Specifically, the gate-drain voltage and repair time in the repair parameters are determined according to the threshold voltage, subthreshold swing, and saturation leakage current in the second performance-related parameters and the simulated threshold voltage, simulated saturation leakage current, and simulated circuit conduction delay time in the simulation performance-related parameters, so as to ensure that the subsequent steps are effective in repairing the transistor to be repaired.

[0073] The above-mentioned repair parameters are used as operating parameters for subsequent repair. Since the repair method provided in the embodiment of the present invention adopts a gate induced drain leakage current repair method for repair, obtaining the gate-drain voltage and repair time used during the repair can further improve the repair effect and ensure that the repair effect meets the design expectations.

[0074] Optionally, the gate-drain voltage is determined according to at least one of the overlapping length between the gate region and the drain region of the transistor to be repaired and the thickness of the gate dielectric layer; and the repair time is determined according to the degradation of the transistor to be repaired.

[0075] In the case of adopting the above scheme, the gate-drain voltage and repair time in the above repair parameters are obtained by combining and analyzing the threshold voltage drop, subthreshold swing, transconductance, electric field strength distribution, saturation leakage current drop, overlapping length of gate region and drain region, gate dielectric layer thickness and simulation threshold voltage, simulation saturation leakage current and simulation circuit conduction delay time in the second performance-related parameters, which are used to repair the transistor to be repaired. Based on the threshold voltage, subthreshold swing, saturation leakage current, overlapping length of gate region and drain region, gate dielectric layer thickness and simulation threshold voltage, simulation saturation leakage current and simulation circuit conduction delay time in the second performance-related parameters, the gate-drain voltage and repair time when repairing the transistor to be repaired can be accurately determined, thereby improving the repair effect of the integrated circuit repair method provided by the embodiment of the present invention.

[0076] Next, a gate induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameter.

[0077] The embodiment of the present invention does not specifically limit the above-mentioned method of using the gate induced drain leakage current repair method and repairing the transistor to be repaired according to the first fault time and the repair parameter, and can be determined according to actual design requirements such as life and power consumption. For example, please refer to Figure 2 and Figure 3 The integrated circuit repair method provided in the embodiment of the present invention provides two possible implementation schemes.

[0078] As a possible implementation, please refer to Figure 2 , using a gate induced drain leakage current repair method, and repairing the transistor to be repaired according to the first fault time and the repair parameter, including: after timing to the first fault time, according to the repair parameter, setting the gate, source and substrate of the transistor to be repaired to a low level, and setting the drain of the transistor to be repaired to a high level, to induce a gate induced drain leakage current. Re-timing, and repeating the above operation.

[0079] When the above scheme is adopted, after the first fault time is counted, the transistor to be repaired is repaired using gate induced drain leakage current. The repair method is relatively simple, and the corresponding repair circuit is also relatively simple, which can reduce the design difficulty of the integrated circuit repair method provided in the embodiment of the present invention, and reduce the design overhead and power consumption overhead on the repair circuit.

[0080] As another possible implementation, see Figure 3, using a gate induced drain leakage current repair method, and repairing the transistor to be repaired according to the first fault time and the repair parameter, including: first, after timing to the first fault time, performing a real-time performance test on the transistor to be repaired to obtain a third performance-related parameter; and judging the current performance degradation ratio according to the third performance-related parameter and the performance degradation-related parameter. Next, if the current performance degradation ratio is greater than or equal to the performance degradation threshold, then according to the repair parameter, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level, inducing a gate induced drain leakage current. Next, if the current performance degradation ratio is less than the performance degradation threshold, then determining the second fault time according to the third performance-related parameter and the performance degradation-related parameter; and after timing to the second fault time, according to the repair parameter, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level, inducing a gate induced drain leakage current; and updating the first fault time according to the second fault time. Re-timing, and repeating the above operation.

[0081] In the case of adopting the above scheme, the second fault time and the first fault time have the same time starting point; and the performance degradation threshold can be obtained manually according to actual needs, or it can be the threshold of the difference between the degradation threshold voltage and the design threshold voltage, the threshold of the degradation ratio between the degraded saturated leakage current and the design saturated leakage current, and the threshold of the degradation ratio between the design circuit conduction delay time and the degraded circuit conduction delay time. And the third performance-related parameter includes the threshold voltage, saturated leakage current and circuit conduction delay time of the transistor to be repaired. According to the third performance-related parameter and the performance degradation-related parameter, the current performance degradation ratio is judged to be the current performance degradation ratio of the threshold voltage, saturated leakage current and circuit conduction delay time of the transistor to be repaired, and it is judged whether the current performance degradation ratio exceeds the above-mentioned performance degradation threshold included in the performance degradation-related parameter. In this case, the embodiment of the present invention provides another repair method, which improves the scope of application of the integrated circuit repair method provided by the embodiment of the present invention. Furthermore, since a real-time performance test is performed on the transistor to be repaired and a third performance-related parameter is obtained before the transistor to be repaired is repaired, and then the current performance degradation ratio is determined based on the third performance-related parameter and the performance degradation-related parameter, the transistor to be repaired is repaired only when the current performance degradation ratio is greater than or equal to the performance degradation threshold, thereby reducing the number of repair times, avoiding invalid repairs or multiple repairs that may damage the device structure of the transistor to be repaired, and effectively extending the life of the integrated circuit to be repaired.

[0082] When the integrated circuit repair method provided by the embodiment of the present invention is specifically applied, a repair circuit is usually used to repair the transistor to be repaired according to the first fault time and the repair parameter. The embodiment of the present invention does not specifically limit the structure of the repair circuit corresponding to the above implementation scheme and the specific functions corresponding to each structure, which can be determined according to actual requirements such as the power consumption of the repair structure.

[0083] Exemplarily, the repair circuit includes: a timer and a repair module; the timer is triggered every first fault time; the repair module is connected to at least the gate, source, drain and substrate of the transistor to be repaired; after the timer is triggered, the repair module tests the performance of the transistor to be repaired to obtain a third performance-related parameter; and determines the current performance degradation ratio according to the third performance-related parameter and the performance degradation-related parameter; if the current performance degradation ratio is greater than or equal to the performance degradation threshold, according to the repair parameter, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, and sets the drain of the transistor to be repaired to a high level, thereby inducing a gate-induced drain leakage current; if the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined according to the third performance-related parameter and the performance degradation-related parameter, and after the timer times to the second fault time, according to the repair parameter, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, and sets the drain of the transistor to be repaired to a high level, thereby inducing a gate-induced drain leakage current; and the first fault time is updated according to the second fault time.

[0084] It should be noted that the voltage difference between the high level and the low level is determined by the repair parameter.

[0085] The specific type of the above timer can be set according to the actual application scenario. For example, the timer can use the built-in timer of the single-chip microcomputer for timing, and the first fault time is stored in the built-in storage of the single-chip microcomputer.

[0086] As for the specific structure of the above-mentioned repair module, it can be set according to the actual application scenario. For example, the repair module may include a single-chip microcomputer, a digital-to-analog converter, and a repair circuit connected to the gate, source, drain and substrate of the transistor to be repaired. The built-in storage of the single-chip microcomputer stores the repair parameters, the performance degradation associated parameters, the program for collecting the third performance associated parameters, the program for determining the current performance degradation ratio and the program for calculating the second fault time.

[0087] When the above solution is adopted, please refer to the relevant description of the above another possible implementation scheme for the beneficial effects of this implementation scheme, which will not be repeated here.

[0088] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0089] The above are only specific implementations of the embodiments of the present invention, but the protection scope of the embodiments of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the embodiments of the present invention, which should be included in the protection scope of the embodiments of the present invention. Therefore, the protection scope of the embodiments of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for repairing an integrated circuit, characterized in that: include: providing an integrated circuit to be repaired; Acquiring a first performance-related parameter and a performance degradation-related parameter of the integrated circuit to be repaired; and establishing a circuit aging model according to the first performance-related parameters; Simulating the integrated circuit to be repaired to obtain simulation performance-related parameters; and determining the transistor to be repaired and the first fault time in the integrated circuit to be repaired according to the circuit aging model, the simulation performance-related parameters and the performance degradation-related parameters; Acquiring a second performance-related parameter of the transistor to be repaired; Determining a repair parameter corresponding to the transistor to be repaired according to the second performance-related parameter, the simulation performance-related parameter and the performance degradation-related parameter; A gate induced drain leakage current repair method is adopted, and the transistor to be repaired is repaired according to the first fault time and the repair parameter.

2. The integrated circuit repair method according to claim 1, characterized in that: The first performance-related parameters include: designed operating temperature, designed maximum voltage stress, designed operating time, designed threshold voltage, designed saturation leakage current and designed circuit conduction delay time; And / or, the performance degradation associated parameters include: circuit type, degradation threshold voltage, degradation saturation leakage current and degradation circuit turn-on delay time; wherein, the circuit type includes: memory, operator or amplifier.

3. The method for repairing an integrated circuit according to claim 2, characterized in that: When the integrated circuit to be repaired is a memory, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%; When the integrated circuit to be repaired is an arithmetic unit, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30 mV; the degradation ratio between the degradation saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degradation circuit turn-on delay time is greater than or equal to 30%; When the integrated circuit to be repaired is an amplifier, the difference between the degradation threshold voltage and the design threshold voltage is greater than or equal to 30mV; the degradation ratio between the degraded saturation leakage current and the design saturation leakage current is greater than or equal to 15%; the degradation ratio between the design circuit turn-on delay time and the degraded circuit turn-on delay time is greater than or equal to 30%.

4. The method for repairing an integrated circuit according to claim 1, characterized in that: The second performance-related parameters include: a decrease in threshold voltage, a subthreshold swing, a transconductance, an electric field intensity distribution, and a decrease in saturation leakage current.

5. The integrated circuit repair method according to claim 1, characterized in that: The relationship of the circuit aging model includes: Wherein, Vth is the threshold voltage, A is the threshold voltage degradation parameter 1, k is the Boltzmann constant, T is the operating temperature, Vg is the stress bias, b is the threshold voltage degradation parameter 2, t is the operating time, and n is the time index; And / or, determining the transistor to be repaired and the first fault time in the integrated circuit to be repaired according to the circuit aging model, the simulation performance associated parameters and the performance degradation associated parameters, includes: calculating the first fault time according to the circuit aging model and the performance degradation associated parameters; determining the transistor to be repaired according to the first fault time and the simulation performance associated parameters.

6. The integrated circuit repair method according to claim 4, characterized in that: The simulation performance-related parameters include: circuit type, simulation threshold voltage, simulation saturation leakage current and simulation circuit conduction delay time; The repair parameters include: gate-drain voltage and repair time.

7. The integrated circuit repair method according to claim 6, characterized in that: Determining the repair parameter of the transistor to be repaired according to the second performance-related parameter, the simulation performance-related parameter and the performance degradation-related parameter includes: The gate-drain voltage and repair time in the repair parameters are determined based on the threshold voltage drop, subthreshold swing, transconductance, electric field strength distribution, saturation leakage current drop, overlapping length of the gate region and the drain region, gate dielectric layer thickness in the second performance-related parameters and the simulated threshold voltage, simulated saturation leakage current and simulated circuit turn-on delay time in the simulation performance-related parameters.

8. The integrated circuit repair method according to claim 1, characterized in that: The method of repairing the transistor to be repaired by using a gate induced drain leakage current repair method and repairing the transistor to be repaired according to the first fault time and the repair parameter includes: After the first fault time is counted, according to the repair parameter, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level, thereby inducing a gate induced drain leakage current; Restart the time and repeat the above steps.

9. The integrated circuit repair method according to claim 1, characterized in that: The method of repairing the transistor to be repaired by using a gate induced drain leakage current repair method and repairing the transistor to be repaired according to the first fault time and the repair parameter includes: After the first fault time is counted, a real-time performance test is performed on the transistor to be repaired to obtain a third performance-related parameter; and a current performance degradation ratio is determined according to the third performance-related parameter and the performance degradation-related parameter; If the current performance degradation ratio is greater than or equal to the performance degradation threshold, then according to the repair parameter, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level, thereby inducing a gate induced drain leakage current; If the current performance degradation ratio is less than the performance degradation threshold, a second fault time is determined according to the third performance-related parameter and the performance degradation-related parameter; and after timing to the second fault time, according to the repair parameter, the gate, source and substrate of the transistor to be repaired are set to a low level, and the drain of the transistor to be repaired is set to a high level, so as to induce a gate-induced drain leakage current; and the first fault time is updated according to the second fault time; Restart the time and repeat the above steps.

10. The integrated circuit repair method according to claim 9, characterized in that: The repairing of the transistor to be repaired by using a gate induced drain leakage current repairing method and according to the first fault time and the repairing parameter further comprises: Adopting a gate induced drain leakage current repair method, using a repair circuit to repair the transistor to be repaired according to the first fault time and the repair parameter; The repair circuit comprises: a timer and a repair module; the timer is triggered every first fault time; the repair module is connected to at least the gate, source, drain and substrate of the transistor to be repaired; After the timer is triggered, the repair module tests the performance of the transistor to be repaired to obtain a third performance-related parameter; and determines the current performance degradation ratio according to the third performance-related parameter and the performance degradation-related parameter; If the current performance degradation ratio is greater than or equal to the performance degradation threshold, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level and sets the drain of the transistor to be repaired to a high level according to the repair parameter, thereby inducing a gate induced drain leakage current; If the current performance degradation ratio is less than the performance degradation threshold, the second fault time is determined according to the third performance-related parameter and the performance degradation-related parameter, and after the timer times to the second fault time, according to the repair parameter, the repair module sets the gate, source and substrate of the transistor to be repaired to a low level, and sets the drain of the transistor to be repaired to a high level, thereby inducing a gate-induced drain leakage current; and the first fault time is updated according to the second fault time.

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