Dynamic ring amplifier and electronic equipment

Abstract

The invention discloses a dynamic ring amplifier and electronic equipment. The amplifier comprises a first-stage amplification sub-circuit, a second-stage amplification sub-circuit and a third-stage amplification sub-circuit, the first-stage amplification sub-circuit and the third-stage amplification sub-circuit are connected with the second-stage amplification sub-circuit; the second-stage amplification sub-circuit comprises a first field effect transistor, a second field effect transistor, a third field effect transistor and a fourth field effect transistor; the source electrode of the first field effect transistor is connected with the drain electrode of the second field effect transistor; the source electrode of the second field effect transistor is connected with the source electrode of the third field effect transistor; the drain electrode of the third field effect transistor is connected with the source electrode of the fourth field effect transistor; the drain electrode of the first field effect transistor is connected with the power supply; the drain electrode of the fourth field effect transistor is grounded; the grid electrode of the first field effect transistor is connected with the grid electrode of the fourth field effect transistor; the grid electrode of the second field effect transistor is connected with the drain electrode of the third field effect transistor; the grid electrode of the third field effect transistor is connected with the drain electrode of the second field effect transistor. The invention can be applied to the technical field of electronic circuits.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a dynamic ring amplifier and electronic equipment. Background Art

[0002] Amplifiers are widely used in integrated circuit design. There are many amplifier structures. Ring amplifier is a high-efficiency closed-loop amplifier.

[0003] In the related art, the ring amplifier is usually composed of three stages of inverters. However, in advanced processes, due to the reduction of intrinsic gain, the overall gain of the ring amplifier is a problem that needs to be improved. At the same time, in the face of changes in ambient temperature, voltage and process angle, how to maintain its own stability is still a technical problem that needs to be solved. Summary of the invention

[0004] The purpose of this application is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0005] Therefore, an object of an embodiment of the present application is to provide a dynamic ring amplifier having relatively high amplification stability.

[0006] In order to achieve the above technical objectives, the technical solution adopted by the embodiment of the present application includes: a dynamic ring amplifier includes: a first-stage amplifier subcircuit, a second-stage amplifier subcircuit and a third-stage amplifier subcircuit; the first-stage amplifier subcircuit and the third-stage amplifier subcircuit are connected to the second-stage amplifier subcircuit; wherein the first-stage amplifier subcircuit is coupled with a second capacitor between the input signal; the second-stage amplifier subcircuit includes a first field effect transistor, a second field effect transistor, a third field effect transistor and a fourth field effect transistor; the source of the first field effect transistor is connected to the drain of the second field effect transistor; the source of the second field effect transistor is connected to the source of the third field effect transistor; the drain of the third field effect transistor is connected to the source of the fourth field effect transistor; the drain of the first field effect transistor is connected to a power supply; the drain of the fourth field effect transistor is grounded; the gate of the first field effect transistor is connected to the gate of the fourth field effect transistor; the gate of the second field effect transistor is connected to the drain of the third field effect transistor; the gate of the third field effect transistor is connected to the drain of the second field effect transistor.

[0007] In addition, a dynamic ring amplifier according to the above embodiment of the present invention may also have the following additional technical features:

[0008] Furthermore, in an embodiment of the present application, the dynamic ring amplifier further includes a feedback subcircuit; the first-stage amplification subcircuit and the third-stage amplification subcircuit are connected to the feedback subcircuit.

[0009] Furthermore, in an embodiment of the present application, the feedback subcircuit includes a first switch, a second switch, a third switch and a switch capacitor; one end of the first switch and one end of the second switch are connected to the input signal; the other end of the first switch, the other end of the second switch, one end of the third switch and one end of the switch capacitor are connected to the input end of the first-stage amplifier subcircuit; the other end of the third switch and the other end of the switch capacitor are connected to the output end of the third-stage amplifier subcircuit.

[0010] Furthermore, in an embodiment of the present application, the state ring amplifier also includes a first capacitor, a fourth switch, a fifth switch and a sixth switch; one end of the first capacitor and one end of the second capacitor are connected to one end of the fourth switch; the other end of the second capacitor is connected to the first-stage amplifier sub-circuit; the other end of the fourth switch is connected to the input signal; the other end of the first capacitor and one end of the fifth switch are connected to one end of the sixth switch; the other end of the sixth switch is connected to the output end of the third-stage amplifier sub-circuit; the other end of the fifth switch is connected to the input signal.

[0011] Furthermore, in an embodiment of the present application, the first-stage amplifier sub-circuit includes a fifth field effect transistor and a sixth field effect transistor; the gate of the fifth field effect transistor and the gate of the sixth field effect transistor are connected, the gate of the fifth field effect transistor serves as the input end of the first-stage amplifier sub-circuit and is coupled with the second capacitor; the source of the fifth field effect transistor is connected to the source of the sixth field effect transistor; the source of the fifth field effect transistor serves as the output end of the first-stage amplifier sub-circuit and is connected to the gate of the first field effect transistor; the drain of the fifth field effect transistor is connected to the power supply; and the drain of the sixth field effect transistor is grounded.

[0012] Furthermore, in the embodiment of the present application, the fifth field effect transistor is a P-channel field effect transistor, and the sixth field effect transistor is an N-channel field effect transistor.

[0013] Further, in an embodiment of the present application, the third-stage amplifier sub-circuit includes a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor and a tenth field effect transistor; the source of the seventh field effect transistor is connected to the drain of the eighth field effect transistor; the source of the eighth field effect transistor is connected to the source of the ninth field effect transistor; the drain of the ninth field effect transistor is connected to the source of the tenth field effect transistor; the gate of the seventh field effect transistor is connected to the source of the first field effect transistor; the gate of the eighth field effect transistor and the gate of the ninth field effect transistor are connected to the source of the second field effect transistor; the gate of the tenth field effect transistor is connected to the source of the fourth field effect transistor; the drain of the tenth field effect transistor is grounded, and the drain of the seventh field effect transistor is connected to the power supply.

[0014] Furthermore, in the embodiment of the present application, the first field effect transistor and the second field effect transistor are P-channel field effect transistors.

[0015] Furthermore, in the embodiment of the present application, the third field effect transistor and the fourth field effect transistor are N-channel field effect transistors.

[0016] On the other hand, an embodiment of the present application further provides an electronic device, comprising the dynamic ring amplifier as described in any of the above items.

[0017] The advantages and benefits of the present application will be partially given in the following description, and partially become apparent from the following description, or be understood through the practice of the present application:

[0018] The present application can adopt a ring amplifier structure of three-stage inverter cascade, a coupling capacitor is added to the first-stage amplifier subcircuit to compensate for the input common mode and the static bias error of the three-stage inverter, a pair of field effect tubes are added to the second-stage amplifier subcircuit to realize the dead zone voltage, and the output common source and common gate stage is used to increase the output impedance. The first two stages use the minimum size, which will not affect the secondary main pole while increasing the gain. At the same time, the common source and common gate structure can reduce the output tube drain impedance, improve the influence of Miller capacitance on the output stage, avoid the appearance of the right half plane zero point, and ensure that the circuit has a good phase and frequency response. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a module schematic diagram of a dynamic ring amplifier in a specific embodiment of the present invention.

[0020] Figure 2 The figure is a schematic diagram of the circuit structure of a dynamic ring amplifier in a specific embodiment of the present invention.

[0021] Figure 3 It is a schematic diagram of the structure of a closed-loop amplifier circuit in another specific embodiment of the present invention.

[0022] Figure 4 It is a timing diagram of a closed-loop amplifier circuit in a specific embodiment of the present invention.

[0023] Figure 5 This is a transient output waveform of a dynamic ring amplifier in a specific embodiment of the present invention when the input is 10mv and the amplification factor is 3. DETAILED DESCRIPTION

[0024] The embodiments of the present invention are described in detail below with reference to the accompanying drawings to illustrate the principle and process of the dynamic ring amplifier in the embodiments of the present invention.

[0025] Reference Figure 1The present application provides a dynamic ring amplifier. The dynamic ring amplifier may include a first-stage amplifier subcircuit 1, a second-stage amplifier subcircuit 2, and a third-stage amplifier subcircuit 3. The first-stage amplifier subcircuit 1 and the third-stage amplifier subcircuit 3 may be connected to the second-stage amplifier subcircuit 2. Among them, the first-stage amplifier subcircuit 1 may couple a second capacitor C2 with the input signal. The second-stage amplifier subcircuit 2 may include a first field effect transistor MP2, a second field effect transistor MP4, a third field effect transistor MN2, and a fourth field effect transistor MN4. The source of the first field effect transistor MP2 may be connected to the drain of the second field effect transistor MP4. The source of the second field effect transistor MP4 may be connected to the source of the third field effect transistor MN2. The drain of the third field effect transistor MN2 may be connected to the source of the fourth field effect transistor MN4. The drain of the first field effect transistor MP2 may be connected to a power supply. The drain of the fourth field effect transistor MN4 is grounded. The gate of the first field effect transistor MP2 may be connected to the gate of the fourth field effect transistor MN4. The gate of the second field effect transistor MP4 may be connected to the drain of the third field effect transistor MN2. The gate of the third field effect transistor MN2 may be connected to the drain of the second field effect transistor MP4.

[0026] Further, in some feasible embodiments of the present application, referring to Figure 1 The dynamic ring amplifier may further include a feedback subcircuit 4. The first-stage amplifying subcircuit 1 and the third-stage amplifying subcircuit 3 may be connected to the feedback subcircuit 4.

[0027] Further, in some feasible embodiments of the present application, referring to Figure 2 , the feedback subcircuit may include a first switch φ1, a second switch φ2, a third switch φ3, and a switch capacitor CF. One end of the first switch φ1 and one end of the second switch φ2 may be connected to the input signal Vin. The other end of the first switch φ1, the other end of the second switch φ2, one end of the third switch φ3, and one end of the switch capacitor CF may be connected to the input end of the first stage amplifier subcircuit. The other end of the third switch φ3 and the other end of the switch capacitor CF may be connected to the output end of the third stage amplifier subcircuit.

[0028] Further, in some feasible embodiments of the present application, referring to Figure 1The state ring amplifier may further include a first capacitor C1, a fourth switch φs, a fifth switch φ4, and a sixth switch φamp. One end of the first capacitor C1 and one end of the second capacitor C2 may be connected to one end of the fourth switch φs. The other end of the second capacitor C2 may be connected to the first-stage amplifier sub-circuit. The other end of the fourth switch φs may be connected to the input signal. The other end of the first capacitor C1 and one end of the fifth switch φ4 may be connected to one end of the sixth switch φamp. The other end of the sixth switch φamp may be connected to the output end of the third-stage amplifier sub-circuit. The other end of the fifth switch φ4 may be connected to the input signal.

[0029] Further, in some feasible embodiments of the present application, referring to Figure 2 The first stage amplifier sub-circuit may include a fifth field effect transistor MP1 and a sixth field effect transistor MN1. The gate of the fifth field effect transistor MP1 and the gate of the sixth field effect transistor MN1 are connected, and the gate of the fifth field effect transistor MP1 serves as the input end of the first stage amplifier sub-circuit and can be coupled with the second capacitor. The source of the fifth field effect transistor MP1 can be connected to the source of the sixth field effect transistor MN1. The source of the fifth field effect transistor MP1 serves as the output end of the first stage amplifier sub-circuit and can be connected to the gate of the first field effect transistor MP2. The drain of the fifth field effect transistor MP1 can be connected to a power supply. The drain of the sixth field effect transistor MN1 is grounded.

[0030] Further, in some feasible embodiments of the present application, the fifth field effect transistor is a P-channel field effect transistor, and the sixth field effect transistor is an N-channel field effect transistor.

[0031] Further, in some feasible embodiments of the present application, the third-stage amplifier subcircuit may include a seventh field effect transistor MP3, an eighth field effect transistor MP5, a ninth field effect transistor MN5, and a tenth field effect transistor MN3. The source of the seventh field effect transistor MP3 may be connected to the drain of the eighth field effect transistor MP5. The source of the eighth field effect transistor MP5 may be connected to the source of the ninth field effect transistor MN5. The drain of the ninth field effect transistor MN5 may be connected to the source of the tenth field effect transistor MN3. The gate of the seventh field effect transistor MP3 may be connected to the source of the first field effect transistor MP2. The gate of the eighth field effect transistor MP5 and the gate of the ninth field effect transistor MN5 may be connected to the source of the second field effect transistor MP4. The gate of the tenth field effect transistor MN3 may be connected to the source of the fourth field effect transistor MN2. The drain of the tenth field effect transistor MN3 is grounded, and the drain of the seventh field effect transistor MP3 may be connected to a power supply.

[0032] Furthermore, in some feasible embodiments of the present application, the first field effect transistor MP2 and the second field effect transistor MP4 are P-channel field effect transistors.

[0033] Furthermore, in some feasible embodiments of the present application, the third field effect transistor MN4 and the fourth field effect transistor MN2 are N-channel field effect transistors.

[0034] The specific structure and control principle of this application are described below with reference to the accompanying drawings:

[0035] Reference Figure 2 , Figure 3 as well as Figure 4 , the ring amplifier includes a first-stage output. The first-stage output may include a field effect transistor MN1 and a field effect transistor MP1. The field effect transistor MN1 and the field effect transistor MP1 are connected in the form of an inverter, and the output is connected to the second-stage input field effect transistor MN2 and the field effect transistor MP2. The output stage of MN2 and MP2 is also connected to the field effect transistor MP4 and the field effect transistor MN4, and these two field effect transistors use the self-biasing method to establish offset voltages VP and VN. The last stage is composed of input field effect transistors MP3 and MN3 and common-gate field effect transistors MP5 and MN5. VP is used as the input of MP3, and VN is used as the input of MN3. The common-gate tube achieves gain improvement and increases the output impedance by another intrinsic gain multiple. The circuit is designed as a pseudo-differential structure. The common-mode feedback module composed of capacitors C1, C2 and switch capacitors will detect the deviation of the output common mode during the amplification process and correct it.

[0036] The basic principle is as follows: when the input is a common-mode level, the pull-up and pull-down capabilities of the field effect transistor MN1 and the field effect transistor MP1 are equivalent, and the first-stage output will be near the common-mode level Vcm, so that the field effect transistors MN2 and MP2 of the second stage also have equivalent driving capabilities. The leakage current of the second stage makes the dead-zone setting field effect transistors MP4 and MN4 work in the saturation region. The gate voltages of the field effect transistors MP4 and MN4 are biased by the leakage current and generate bias VP and VN to the gate voltage input to the third stage. VP makes the gate voltage of the field effect transistor MP3 greater than Vcm, and VN makes the gate voltage of the field effect transistor MN3 less than Vcm. The output stage works in the subthreshold region, and the output impedance is large, thereby forming a main pole.

[0037] When there is a differential input, when the input on one side is greater than the common mode Vcm, the field effect transistor MN1 is overdriven more and the first-stage output is pulled to a low potential. At this time, the gate-source driving capability of the field effect transistor MP2 is stronger, and the second-stage output is pulled to a high level, so that the third-stage field effect transistor MN3 is turned on, and the output is pulled low, through the feedback capacitor to the input, forming a negative feedback.

[0038] More specifically, in this embodiment, the residual amplifier circuit in the pipeline structure can be used. When the common mode Vcm is at a high level, the first stage is quantized, the amplifier input and output are short-circuited, the outputs of the field effect transistors MP3 and MN3 of the third stage are connected to the field effect transistors MN1 and the input of the field effect transistor MP1 for reset and zeroing, the gain of the three-stage inverter sets the reset point voltage near the common mode level, and the common mode feedback module pulls both ends of C1 to Vcm and clears the charge. At this time, the ring amplifier is at a low level, and the first-stage capacitor array is disconnected from the amplifier.

[0039] After the first stage is completed, the ring amplifier is at a high level, the residual is connected to the amplifier input, and the feedback capacitor CF is connected to the loop. Figure 2 In the circuit, the input will pass through the inverter field effect tube MP1 and field effect tube MN1 to obtain the output result. If the input is greater than the common mode level, the first stage output is less than the common mode level Vcm, so that the field effect tube MP2 drives more than the field effect tube MN2, VP and VM and VN are pulled to a high level, and the field effect tube MN3 and field effect tube MN5 pull the output down to a low level. This structure is connected in a negative feedback form, and the input level will also decrease at the same time. When the input level decreases to less than the common mode level Vcm, the first stage output will be greater than the common mode level Vcm, so that the second stage field effect tube MN2 is turned on and the second stage output is pulled to a low potential. In this cycle, it can be considered as an oscillation process, but when the input is close to the common mode level Vcm, the driving capabilities of the first stage field effect tube MN1 and field effect tube MP1 are closer, and the output of the first stage is close to the common mode voltage Vcm. Therefore, the field effect tube MN2 and field effect tube MP2 of the second stage input also have similar driving capabilities, so that the field effect tube MP3 and field effect tube MN3 of the third stage input both enter the subthreshold region. When VP and VN enter the dead zone, the three levels of the circuit tend to be stable, and the output changes from oscillation to stability.

[0040] The common-mode feedback module works at this time. The charge of C1 is cleared in the reset state. In the amplification state, the upper plate of C1 is connected to the output terminal, and the differential output value is monitored and coupled to the lower plate of C1. The lower plate of C1 is connected to the lower plate of C2, so it is coupled to the output of the first stage through C2 to form negative feedback. This common-mode feedback method does not involve active devices, does not introduce new zeros and poles, and greatly improves the frequency response of the amplifier circuit.

[0041] During the amplification process, the bias point VM of FET MP5 and FET MN5 will dynamically fluctuate with the establishment of the offset dead zone. When the input is lower than Vcm, the gate voltage of the third-stage FET PM3 is very low. The gate voltage of FET MP5 should be lower than the source-drain saturation voltage of FET PM3, which is about 70mV. If FET MP5 is set to a fixed bias, the dead zone fluctuation cannot be met. Both FET MP5 and FET MP3 are in the saturation zone. If FET MP5 enters the linear zone, the slew rate is limited by MP5, affecting the output establishment. Figure 5 VP, VN and offset voltage change dramatically at the initial state of amplification, and become stable only after several cycles, which makes the overdrive variation range of the third-stage input very large. A larger overdrive means a larger drain-source saturation voltage, which is a great challenge to the bias setting of the field effect transistor MP5 and the field effect transistor MN5. VM, as the common mode of the VP and VM points, can follow the oscillation process and dynamically bias the field effect transistor MN5 and the field effect transistor MP5 to ensure that they work in the saturation zone.

[0042] In addition, the present application also provides an electronic device, which may include any of the above-mentioned dynamic ring amplifiers.

[0043] In summary, this application has the following advantages:

[0044] 1. Since the present application adopts a common source and common gate structure, compared with the method of increasing the gate length to improve the gain, the common gate tube reduces the impedance of the third-stage input tube (approximately one-nth of the transconductance of the common gate tube), thereby reducing the gate-drain capacitance equivalent to the second-stage output end, avoiding the deterioration of the output pole frequency of the first two stages.

[0045] 2. Since the present application adopts the method of setting the dead zone voltage by field effect tube, the dead zone offset will have better robustness. Compared with the form of generating dead zone voltage by resistor, the circuit can track the changes of process angle and stabilize the dead zone voltage. For example, at a slow process angle, the leakage current of the second-stage output is reduced. At the same time, the dead zone tube still needs a larger gate-source voltage to achieve at a lower current, thereby providing a stable bias for the third-stage input.

[0046] 3. Since the present application adopts a dynamic bias structure, the output stage bias has better robustness. The common-gate tube of the output stage is provided by the dead-zone bias tubes MP4 and MN4 of the second-stage output. The VM voltage can be regarded as the common mode of the second-stage output. During dynamic amplification, the bias point can change dynamically with the second-stage output to achieve a larger slew rate.

[0047] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0048] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

[0049] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the described embodiments. Technical personnel familiar with the field may make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A dynamic ring amplifier, characterized in that: include: A first-stage amplifying sub-circuit, a second-stage amplifying sub-circuit, and a third-stage amplifying sub-circuit; The first-stage amplifying sub-circuit and the third-stage amplifying sub-circuit are connected to the second-stage amplifying sub-circuit; Wherein, a second capacitor is coupled between the first-stage amplifying subcircuit and the input signal; the second-stage amplifying subcircuit includes a first field effect transistor, a second field effect transistor, a third field effect transistor and a fourth field effect transistor; The source of the first field effect transistor is connected to the drain of the second field effect transistor; the source of the second field effect transistor is connected to the source of the third field effect transistor; the drain of the third field effect transistor is connected to the source of the fourth field effect transistor; the drain of the first field effect transistor is connected to a power supply; the drain of the fourth field effect transistor is grounded; the gate of the first field effect transistor is connected to the gate of the fourth field effect transistor; the gate of the second field effect transistor is connected to the drain of the third field effect transistor; the gate of the third field effect transistor is connected to the drain of the second field effect transistor.

2. A dynamic ring amplifier according to claim 1, characterized in that: The dynamic ring amplifier further includes a feedback subcircuit; the first-stage amplification subcircuit and the third-stage amplification subcircuit are connected to the feedback subcircuit.

3. A dynamic ring amplifier according to claim 2, characterized in that: The feedback subcircuit includes a first switch, a second switch, a third switch and a switch capacitor; one end of the first switch and one end of the second switch are connected to the input signal; the other end of the first switch, the other end of the second switch, one end of the third switch and one end of the switch capacitor are connected to the input end of the first-stage amplifier subcircuit; the other end of the third switch and the other end of the switch capacitor are connected to the output end of the third-stage amplifier subcircuit.

4. A dynamic ring amplifier according to claim 1, characterized in that: The state ring amplifier also includes a first capacitor, a fourth switch, a fifth switch and a sixth switch; one end of the first capacitor and one end of the second capacitor are connected to one end of the fourth switch; the other end of the second capacitor is connected to the first-stage amplifier sub-circuit; the other end of the fourth switch is connected to the input signal; the other end of the first capacitor and one end of the fifth switch are connected to one end of the sixth switch; the other end of the sixth switch is connected to the output end of the third-stage amplifier sub-circuit; the other end of the fifth switch is connected to the input signal.

5. The dynamic ring amplifier according to claim 1, characterized in that: The first-stage amplifier subcircuit includes a fifth field effect transistor and a sixth field effect transistor; the gate of the fifth field effect transistor and the gate of the sixth field effect transistor are connected, the gate of the fifth field effect transistor serves as the input end of the first-stage amplifier subcircuit and is coupled with the second capacitor; the source of the fifth field effect transistor is connected with the source of the sixth field effect transistor; the source of the fifth field effect transistor serves as the output end of the first-stage amplifier subcircuit and is connected to the gate of the first field effect transistor; the drain of the fifth field effect transistor is connected to the power supply; the drain of the sixth field effect transistor is grounded.

6. A dynamic ring amplifier according to claim 5, characterized in that: The fifth field effect transistor is a P-channel field effect transistor, and the sixth field effect transistor is an N-channel field effect transistor.

7. A dynamic ring amplifier according to claim 1, characterized in that: The third-stage amplifier subcircuit includes a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor and a tenth field effect transistor; the source of the seventh field effect transistor is connected to the drain of the eighth field effect transistor; the source of the eighth field effect transistor is connected to the source of the ninth field effect transistor; the drain of the ninth field effect transistor is connected to the source of the tenth field effect transistor; the gate of the seventh field effect transistor is connected to the source of the first field effect transistor; The gate of the eighth field effect transistor and the gate of the ninth field effect transistor are connected to the source of the second field effect transistor; The gate of the tenth field effect tube is connected to the source of the fourth field effect tube; the drain of the tenth field effect tube is grounded, and the drain of the seventh field effect tube is connected to the power supply.

8. The dynamic ring amplifier according to claim 1, characterized in that: The first field effect transistor and the second field effect transistor are P-channel field effect transistors.

9. The dynamic ring amplifier according to claim 1, characterized in that: The third field effect transistor and the fourth field effect transistor are N-channel field effect transistors.

10. An electronic device, characterized in that: A dynamic ring amplifier comprising the method described in any one of claims 1 to 9.

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