A method of adjusting deep trench sidewall oxide thickness

Abstract

The application provides a method for adjusting the thickness of deep trench sidewall oxide, which comprises the following steps: providing a substrate, forming an epitaxial layer on the surface of the substrate, and forming a stack on the surface of the epitaxial layer, wherein the stack comprises a pad oxide layer, a nitride layer, a polysilicon layer and a hard mask layer from bottom to top; etching the stack, the epitaxial layer and the substrate by using a photolithography etching process to form a deep trench; etching the hard mask layer to make the opening of the deep trench at the position of the hard mask layer larger, and expose a polysilicon layer with a certain size; growing an oxide layer on the surface of the deep trench; etching and removing the oxide layer formed at the bottom of the deep trench to make the bottom of the deep trench communicate with the substrate; and filling the deep trench with polysilicon. The application realizes the protection of the top sidewall oxide layer of the deep trench by adding the step of etching the hard mask layer to expose the polysilicon layer with a certain size, so that the top sidewall oxide layer of the deep trench is not etched too much, the thickness is thickened, and the adjustment of the thickness of the deep trench sidewall oxide is realized.

Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuits, and more specifically to a method for adjusting the oxide thickness of deep trench sidewalls. Background Technology

[0002] In the BCD (Bottom-Channel Die) deep trench isolation (DTI) process, trench etching is performed first, followed by trench sidewall oxidation, and then bottom etching of the trench oxide to obtain a structure communicating with the substrate. This structure requires the bottom of the DTI to communicate with the substrate, while the top sidewall oxide needs to have a certain thickness to meet voltage withstand requirements. However, in actual etching, if... Figure 1 As shown, the etching rate of the oxide at the top of the trench is always greater than that at the bottom. When the bottom oxide is etched through, the top oxide is often etched very thin, which eventually leads to insufficient voltage withstand of the chip and failure.

[0003] Therefore, it is urgent to improve the existing deep trench process to solve the problem that the oxide thickness on the top sidewall of the existing deep trench is insufficient, which leads to insufficient voltage withstand performance and easy failure of the chip. Summary of the Invention

[0004] To address the problems existing in the prior art, the present invention provides a method for adjusting the oxide thickness of the sidewalls of deep trenches, thereby optimizing the deep trench process, ensuring the oxide thickness of the top sidewalls of the trench, and improving the chip's voltage withstand capability.

[0005] This invention provides a method for adjusting the oxide thickness of the sidewall of a deep trench, comprising the following steps:

[0006] Step 1: Provide a substrate, on the surface of which an epitaxial layer is formed, and on the surface of the epitaxial layer a stack is formed, the stack comprising, from bottom to top, an oxide pad layer, a nitride layer, a polysilicon layer and a hard mask layer;

[0007] Step 2: Use photolithography etching to etch the stack, the epitaxial layer, and the substrate to form deep trenches;

[0008] Step 3: Etch the hard mask layer to enlarge the opening of the deep trench located at the hard mask layer, exposing the polysilicon layer of a certain size;

[0009] Step 4: Grow an oxide layer on the surface of the deep trench;

[0010] Step 5: Etch away the oxide layer formed at the bottom of the deep trench to make the bottom of the deep trench communicate with the substrate;

[0011] Step 6: Fill the deep trench with polycrystalline silicon.

[0012] Preferably, the substrate in step one is a silicon substrate.

[0013] Preferably, the material of the hard mask layer in step one is silicon oxide.

[0014] Preferably, the etching described in steps two and three is dry etching.

[0015] Preferably, the size of the polycrystalline silicon layer exposed in step three is 50–100 nm.

[0016] Preferably, the oxide layer in step four is formed by thermal oxidation.

[0017] Preferably, during step four, the side surface of the polycrystalline silicon layer is oxidized.

[0018] Preferably, the polysilicon layer exposed in step three will form an oxide protrusion in step four, which will protect the top sidewall oxide of the deep trench in step five.

[0019] Preferably, the etching in step five is dry etching.

[0020] Preferably, the step of removing the hard mask layer is included after step five and before step six.

[0021] After completing the DTI etching to form a deep trench, this invention performs dry etching to remove part of the hard mask layer covering the polysilicon layer, exposing it. During the DTI thermal oxidation growth of the oxide layer, more polysilicon is exposed, forming a more prominent oxide layer. When etching through the bottom oxide layer of the DTI, it can better protect the top oxide sidewalls of the DTI, thus achieving the goals of optimizing the deep trench process, improving the uniformity of sidewall oxide thickness, and improving the chip's withstand voltage. Attached Figure Description

[0022] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0023] Figure 1 This diagram illustrates the morphology of deep trenches formed by existing DTI processes.

[0024] Figures 2 to 4 The diagram shows the structure of the existing DTI process.

[0025] Figure 5 The flowchart shown is a method for adjusting the oxide thickness of the deep trench sidewall according to an embodiment of the present invention;

[0026] Figures 6 to 8 The diagram shows the structural schematics of each step in the method for adjusting the oxide thickness of the deep trench sidewall according to an embodiment of the present invention.

[0027] Figure 9 The diagram shown illustrates the morphology of the deep trench in an embodiment of the present invention. Detailed Implementation

[0028] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0029] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0030] Unless the context explicitly requires it, words such as "including" or "contains" throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".

[0031] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0032] Deep trench (DTI) structures require both the bottom SiO2 to be etched through to the substrate and the top to have sufficiently thick SiO2 sidewalls, a very difficult balance to achieve. Current technologies primarily attempt to balance this by adjusting the bottom oxide etching process of the DTI, but this results in very narrow margins. Figures 3 to 5 The diagram shown illustrates the structure of an existing DTI process. Figure 3 As shown, deep trenches are formed using photolithography etching; such as Figure 4 As shown, an oxide layer is grown thermally and oxygenally in a deep trench, where the sides of the polycrystalline silicon layer are oxidized to form an oxide layer as well; for example... Figure 5 As shown, the oxide layer at the bottom of the deep trench was etched through. It can be seen that while etching through the oxide layer at the bottom of the deep trench, the oxide layer at the top was still etched very thinly, as... Figure 5 As shown in the middle circle. Therefore, this invention proposes a method for adjusting the oxide thickness of the deep trench sidewalls to optimize the deep trench process, thereby ensuring the oxide thickness of the top sidewalls of the trench and improving the chip's voltage withstand capability. The technical solution of this invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0033] Figure 5 The flowchart shown is a method for adjusting the oxide thickness of the deep trench sidewall according to an embodiment of the present invention; Figures 6 to 8The diagram shows the structural schematics of each step in the method for adjusting the oxide thickness of the deep trench sidewalls according to an embodiment of the present invention. Figure 5 As shown, the method for adjusting the oxide thickness of the deep trench sidewall in this embodiment of the invention includes the following steps:

[0034] Step 1: Provide a substrate. An epitaxial layer is formed on the surface of the substrate. A stack is formed on the surface of the epitaxial layer. The stack consists of an oxide pad layer, a nitride layer, a polysilicon layer, and a hard mask layer from bottom to top.

[0035] The substrate material can be silicon, germanium, silicon-germanium, or silicon carbide, or silicon-on-insulator (SOI) or germanium-on-insulator (GOI), or other materials such as gallium arsenide or other group III and V compounds. In this embodiment, the substrate is a silicon substrate, and further, it can be an undoped or lightly doped silicon substrate. An epitaxial layer is formed on the substrate surface by epitaxial growth. From bottom to top, an oxide pad layer, a nitride layer, a polysilicon layer, and a hard mask layer are formed sequentially on the surface of the epitaxial layer. The hard mask (HM) layer can be made of various materials; in this embodiment, the HM layer is made of silicon oxide. The formation methods for each layer can be chemical vapor deposition (CVD) or physical vapor deposition (PVD), or other suitable methods.

[0036] Step 2: Use photolithography etching to etch the stacked layers, epitaxial layers, and substrate to form deep trenches.

[0037] The photolithography etching process includes: defining the deep trench formation area, exposure and development, dry etching of the HM layer, forming the deep trench using Bosch and Bevel Etch processes, and resist removal. The formed deep trenches are as follows: Figure 3 As shown.

[0038] Step 3: Etch the hard mask layer to enlarge the opening of the deep trench located at the hard mask layer, exposing a polysilicon layer of a certain size.

[0039] like Figure 6 As shown, removing part of the HM layer on the surface of the polysilicon layer exposes a portion of the polysilicon layer, thus enlarging the opening of the deep trench located at the hard mask layer, facilitating subsequent oxidation. In this embodiment of the invention, dry etching is used, and the exposed polysilicon layer has a size of 50–100 nm.

[0040] Step 4: Grow an oxide layer on the surface of the deep trench.

[0041] In this embodiment of the invention, an oxide layer is grown on the surface of a deep trench via thermal oxidation. The oxide layer is distributed on the bottom surface and sidewall surfaces of the deep trench, and also includes an oxide layer formed at the location of the polysilicon layer. Compared to existing processes, such as... Figure 4As shown, an oxide layer is formed on the side of the polycrystalline silicon layer, as in the embodiments of the present invention. Figure 7 As shown, due to the greater exposure of the polysilicon layer, a more prominent oxide layer is formed, which is thicker than the oxide layer grown on the sidewalls of the deep trench, thus protecting the oxide on the top sidewalls of the deep trench.

[0042] Step 5: Etch away the oxide layer formed at the bottom of the deep trench to make the bottom of the deep trench connected to the substrate.

[0043] In this embodiment of the invention, dry etching is used to etch the oxide layer at the bottom of the deep trench through to the substrate. During etching, due to the aforementioned protruding oxide layer, the oxide layer on the top sidewalls of the deep trench is not excessively etched. Compared to existing technologies, such as... Figure 8 As shown in the middle circle, the thickness of the oxide layer on the top sidewall of the deep trench is increased, which meets the requirements of the deep trench structure: the bottom SiO2 must be etched through to the substrate, and the top must have a sufficiently thick SiO2 sidewall.

[0044] Step 6: Fill the deep trench with polycrystalline silicon.

[0045] In addition, a step of removing the hard mask layer is included after step five and before step six.

[0046] Figure 9 The diagram shown illustrates the deep trench morphology according to an embodiment of the present invention. Figure 9 As shown, the thickness of the oxide layer on the top sidewall of the deep trench is 527 nm. (Comparison) Figure 1 The thickness of the oxide layer on the top sidewall of the deep trench is 346 nm. Clearly, compared to the prior art, the increased thickness of the oxide layer on the top sidewall of the deep trench in this embodiment of the invention helps improve the uniformity of the DTI sidewall oxide thickness, achieving the goal of improving the uniformity of the sidewall oxide thickness and enhancing the chip's withstand voltage.

[0047] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for adjusting the oxide thickness of the sidewall of a deep trench, characterized in that, Includes the following steps: Step 1: Provide a substrate, on the surface of which an epitaxial layer is formed, and on the surface of the epitaxial layer a stack is formed, the stack comprising, from bottom to top, an oxide pad layer, a nitride layer, a polysilicon layer and a hard mask layer; Step 2: Use photolithography etching to etch the stack, the epitaxial layer, and the substrate to form deep trenches; Step 3: Etch the hard mask layer to enlarge the opening of the deep trench located at the hard mask layer, exposing the polysilicon layer of a certain size; Step 4: An oxide layer is grown on the surface of the deep trench and the sidewall of the polysilicon layer, wherein the oxide layer on the sidewall of the polysilicon layer is more prominent than the oxide layer grown on the surface of the deep trench. Step 5: Etch away the oxide layer formed at the bottom of the deep trench to make the bottom of the deep trench communicate with the substrate; Step 6: Fill the deep trench with polycrystalline silicon.

2. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The substrate mentioned in step one is a silicon substrate.

3. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The material of the hard mask layer mentioned in step one is silicon oxide.

4. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The etching described in steps two and three is dry etching.

5. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The size of the polycrystalline silicon layer exposed in step three is 50-100 nm.

6. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The oxide layer described in step four is formed using a thermal oxidation method.

7. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 6, characterized in that, During step four, the sides of the polycrystalline silicon layer are oxidized.

8. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 7, characterized in that, The polysilicon layer exposed in step three will form an oxide protrusion in step four, which will protect the top sidewall oxide of the deep trench in step five.

9. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The etching described in step five is dry etching.

10. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that, The step between step five and step six also includes the step of removing the hard mask layer.

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