Manufacturing method of active region of semiconductor device
By manufacturing the T-shaped deep trench and silicon oxide structure in the active region of the semiconductor device, the problem of blocking the etching of the wide-out of the top end of the isolation structure is solved, and a more complete etching effect of the active region is achieved.
Patent Information
- Application Number
- CN202510039635.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-09
- Publication Date
- 2025-05-09
AI Technical Summary
Prior Art During the active region etching process of semiconductor devices, the wider portion of the top end of the isolation structure will block etching, resulting in the problem of sharp corner residue.
By forming a T-shaped deep trench on the semiconductor substrate and depositing a T-shaped silicon oxide structure, after removing the mask layer, the active region located between the two adjacent T-shaped silicon oxide structures is etched to remove the lateral extension to avoid barriers.
It effectively avoids the blockage of the wide part of the top end of the isolation structure to etch, reduces sharp corner residues, and ensures the integrity of the etching in the active area.
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Figure CN119965154A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, and in particular to a method for manufacturing an active region of a semiconductor device. Background Art
[0002] In advanced semiconductor manufacturing processes, in order to adjust the height difference between devices with different voltages, it is usually necessary to perform an etching process on the active area of the substrate.
[0003] In the prior art, when manufacturing the isolation structure, the width of the top portion of the isolation structure that extends beyond the substrate is greater than the width of the bottom portion located in the substrate. That is, the top portion of the isolation structure covers the substrate, so that when the active area etching process of removing the mask layer is subsequently performed, the wide portion of the top of the isolation structure will block the etching, resulting in incomplete etching and the problem of sharp corners remaining. Summary of the invention
[0004] The present application provides a method for manufacturing an active region of a semiconductor device, which can solve the problem of residual sharp corners in active region etching in the related art.
[0005] In order to solve the technical problem in the background technology, the present application provides a method for manufacturing an active region of a semiconductor device, and the method for manufacturing an active region of a semiconductor device comprises the following steps:
[0006] providing a semiconductor substrate;
[0007] Forming a mask layer with an etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer, and forming a T-shaped deep trench in the semiconductor substrate;
[0008] Depositing a T-shaped silicon oxide structure into the T-shaped deep trench, wherein the T-shaped silicon oxide structure comprises a straight longitudinal extension portion and a lateral extension portion formed on the straight longitudinal extension portion, wherein the top of the straight longitudinal extension portion is higher than the upper surface of the semiconductor substrate;
[0009] The mask layer is removed, and the lower surface of the lateral extension portion of the T-shaped silicon oxide structure is suspended relative to the upper surface of the semiconductor substrate;
[0010] Etching an active area of the semiconductor substrate between two adjacent T-shaped silicon oxide structures;
[0011] The lateral extension portion of the T-shaped silicon oxide structure is removed.
[0012] Optionally, the step of forming a mask layer with an etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer, and forming a T-shaped deep trench in the semiconductor substrate includes:
[0013] Forming a mask layer with a first etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer with the first etching pattern to form a straight longitudinally extending groove of the T-shaped deep groove in the semiconductor substrate;
[0014] Filling the straight longitudinally extending groove to form a first dielectric structure, wherein the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate and lower than the upper surface of the mask layer;
[0015] Laterally widening and back-etching the first etched pattern of the mask layer to form a second etched pattern in the mask layer;
[0016] Filling a second dielectric structure into the second etching pattern of the mask layer, wherein the second dielectric structure is integrated with the first dielectric structure to form a T-shaped dielectric structure;
[0017] The T-shaped dielectric structure is removed to form a T-shaped deep trench.
[0018] Optionally, in the step of filling the straight longitudinally extending groove to form a first dielectric structure, wherein the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate and lower than the upper surface of the mask layer, the upper surface of the first dielectric structure is 500A to 1000A higher than the upper surface of the semiconductor substrate.
[0019] Optionally, the step of laterally widening and back-etching the first etched pattern of the mask layer to form a second etched pattern in the mask layer includes:
[0020] forming a photoresist layer on the mask layer, and forming a second etching pattern in the photoresist layer by a photolithography process; the second etching pattern is aligned with the first etching pattern, and the width of the second etching pattern is greater than that of the first etching pattern;
[0021] The upper surface of the first dielectric structure is used as an etching stop layer, and the mask layer is etched based on the photoresist layer with the second etching pattern, so that the second etching pattern is transferred to the upper part of the mask layer; the etching pattern in the mask layer is T-shaped, including a first etching pattern located at the lower part and a second etching pattern located at the upper part, and the lateral width of the second etching pattern is greater than the width of the first etching pattern.
[0022] Optionally, the first medium structure and the second medium structure are made of organic carbon.
[0023] Optionally, in the step of depositing a T-shaped silicon oxide structure into the T-shaped deep trench, the T-shaped silicon oxide structure comprising a straight longitudinal extension portion and a lateral extension portion formed on the straight longitudinal extension portion, the top of the straight longitudinal extension portion being higher than the upper surface of the semiconductor substrate, the single-side width of the lateral extension portion in the lateral direction exceeds the single-side width of the straight longitudinal extension portion in the lateral direction by a range less than or equal to 100A.
[0024] Optionally, the step of etching the active region of the semiconductor substrate between two adjacent T-shaped silicon oxide structures includes: etching the active region of the semiconductor substrate between two adjacent T-shaped silicon oxide structures by a dry etching process.
[0025] The technical solution of the present application includes at least the following advantages: since the lower surface of the lateral extension portion of the T-shaped silicon oxide structure is suspended relative to the upper surface of the semiconductor substrate, when the subsequent active area substrate etching is performed, the lateral extension portion will not block the etching due to the subsidizing of the substrate upper surface, resulting in the problem of sharp corners of the substrate etching. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0027] Figure 1 A method for manufacturing an active region of a semiconductor device provided by an embodiment of the present application is shown;
[0028] Figure 2 A schematic diagram of a cross-sectional structure of the device after step S22 is completed is shown;
[0029] Figure 3 A schematic diagram of a cross-sectional structure of the device after step S23 is completed is shown;
[0030] Figure 4 A schematic diagram of a cross-sectional structure of the device after step S24 is completed is shown;
[0031] Figure 5 A schematic diagram of a cross-sectional structure of the device after step S25 is completed is shown;
[0032] Figure 6 A schematic diagram of the cross-sectional structure of the device after step S4 is completed is shown;
[0033] Figure 7 A schematic diagram of the cross-sectional structure of the device after step S5 is completed is shown;
[0034] Figure 8 FIG. 4 shows a schematic diagram of a cross-sectional structure of the device after step S6 is completed. DETAILED DESCRIPTION
[0035] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0036] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0037] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0038] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.
[0039] Figure 1 The present invention shows a method for manufacturing an active region of a semiconductor device according to an embodiment of the present invention. Figure 1 It can be seen that the method for manufacturing the active region of the semiconductor device includes the following steps:
[0040] Step S1: providing a semiconductor substrate.
[0041] Step S2: forming a mask layer with an etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer, and forming a T-shaped deep trench in the semiconductor substrate.
[0042] The etching pattern in the mask layer is T-shaped.
[0043] Step S21: forming a mask layer with a first etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer with the first etching pattern, and forming a straight longitudinally extending groove of the T-shaped deep trench in the semiconductor substrate.
[0044] After step S21 is completed, the isolation region of the semiconductor substrate is exposed from the first etching pattern of the mask layer. The sidewalls of the first etching pattern of the mask layer are vertical, and the width of the straight longitudinally extending grooves of the T-shaped deep grooves gradually decreases from top to bottom.
[0045] Step S22: filling the straight longitudinally extending trench with a first dielectric structure, wherein the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate and lower than the upper surface of the mask layer.
[0046] Reference Figure 2 , which shows a schematic diagram of the cross-sectional structure of the device after step S22 is completed. Figure 2 It can be seen that the semiconductor substrate 100 is covered with a mask layer 200 with a first etching pattern 210, and a straight longitudinally extending groove is etched in the semiconductor substrate 100 based on the first etching pattern 210. The first dielectric structure 300 is filled in the straight longitudinally extending groove, and the upper surface of the first dielectric structure 300 is the upper surface of the semiconductor substrate 100, which is lower than the upper surface of the mask layer 200.
[0047] Exemplarily, the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate by 500A to 1000A. The material of the first dielectric structure may be organic carbon.
[0048] Step S23: performing lateral widening and back etching on the first etched pattern of the mask layer to form a second etched pattern in the mask layer.
[0049] Reference Figure 3 , which shows a schematic diagram of the cross-sectional structure of the device after step S23 is completed. Figure 3 As can be seen from the figure, the mask layer 200 is etched back to form a second etched pattern 220, and the lateral width of the second etched pattern 220 is greater than Figure 2 The width of the first etched pattern 210 is shown, thereby forming a groove with a width greater than the first dielectric structure 300 in the mask layer 200 on top of the first dielectric structure 300 .
[0050] Exemplarily, step S23 may be implemented by the following steps:
[0051] Step S231: forming a photoresist layer on the mask layer, and forming a second etching pattern in the photoresist layer by a photolithography process; the second etching pattern is aligned with the first etching pattern, and the width of the second etching pattern is greater than that of the first etching pattern.
[0052] Step S232: using the upper surface of the first dielectric structure as an etching stop layer, etching the mask layer based on the photoresist layer carrying the second etching pattern, so that the second etching pattern is transferred to the upper part of the mask layer; the etching pattern in the mask layer is T-shaped, including a first etching pattern located at the lower part and a second etching pattern located at the upper part, the lateral width of the second etching pattern is greater than the width of the first etching pattern, and illustratively, the range in which the lateral single-side width of the second etching pattern exceeds the lateral single-side width of the first etching pattern is any value less than or equal to 100A.
[0053] Step S24: filling the second etching pattern of the mask layer with a second dielectric structure, wherein the second dielectric structure is integrated with the first dielectric structure to form a T-shaped dielectric structure.
[0054] Reference Figure 4 , which shows a schematic diagram of the cross-sectional structure of the device after step S24 is completed. Figure 4 It can be seen from the figure that the filled second dielectric structure 320 is filled in the second etched pattern 220 , and the second dielectric structure 320 is connected with the first dielectric structure 310 as a whole to form a T-shaped dielectric structure.
[0055] Step S25: removing the T-shaped dielectric structure to form a T-shaped deep trench.
[0056] Reference Figure 5 , which shows a schematic diagram of the cross-sectional structure of the device after step S25 is completed. Figure 5 It can be seen that removing Figure 4 The T-type dielectric structure is formed after Figure 5 The T-shaped deep groove is shown.
[0057] Step S3: depositing a T-shaped silicon oxide structure into the T-shaped deep trench, wherein the T-shaped silicon oxide structure comprises a straight longitudinal extension portion and a lateral extension portion formed on the straight longitudinal extension portion, wherein the top of the straight longitudinal extension portion is higher than the upper surface of the semiconductor substrate.
[0058] Step S4: removing the mask layer, and the lower surface of the lateral extension portion of the T-shaped silicon oxide structure is suspended relative to the upper surface of the semiconductor substrate.
[0059] Reference Figure 6 , which shows a schematic diagram of the cross-sectional structure of the device after step S4 is completed, from Figure 6 It can be seen that Figure 5 After the T-shaped deep trench is filled with silicon oxide, a T-shaped silicon oxide structure 400 is formed, which includes a lateral extension 410 and a straight longitudinal extension 420. After removing the mask layer, the lower surface of the lateral extension 410 of the T-shaped silicon oxide structure 400 is suspended relative to the upper surface of the semiconductor substrate 100.
[0060] Since the lower surface of the lateral extension portion 410 of the T-shaped silicon oxide structure 400 is suspended relative to the upper surface of the semiconductor substrate 100, during the subsequent active area substrate etching, the lateral extension portion 410 will not block the etching due to the substrate upper surface, resulting in the problem of sharp corners in substrate etching.
[0061] Step S5: etching the active area of the semiconductor substrate between two adjacent T-shaped silicon oxide structures.
[0062] Reference Figure 7 , which shows a schematic diagram of the cross-sectional structure of the device after step S5 is completed. Figure 7 It can be seen from the figure that the active region of the semiconductor substrate 100 is uniformly etched and thinned.
[0063] Step S6: removing the lateral extension portion of the T-shaped silicon oxide structure.
[0064] Reference Figure 8 , which shows a schematic diagram of the cross-sectional structure of the device after step S6 is completed, from Figure 8 It can be seen that the lateral extension portion 410 of the T-shaped silicon oxide structure is removed.
[0065] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.
Claims
1. A method for manufacturing an active region of a semiconductor device, characterized in that: The method for manufacturing the active region of the semiconductor device comprises the following steps: providing a semiconductor substrate; Forming a mask layer with an etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer, and forming a T-shaped deep trench in the semiconductor substrate; Depositing a T-shaped silicon oxide structure into the T-shaped deep trench, wherein the T-shaped silicon oxide structure comprises a straight longitudinal extension portion and a lateral extension portion formed on the straight longitudinal extension portion, wherein the top of the straight longitudinal extension portion is higher than the upper surface of the semiconductor substrate; The mask layer is removed, and the lower surface of the lateral extension portion of the T-shaped silicon oxide structure is suspended relative to the upper surface of the semiconductor substrate; Etching an active area of the semiconductor substrate between two adjacent T-shaped silicon oxide structures; The lateral extension portion of the T-shaped silicon oxide structure is removed.
2. The method for manufacturing an active region of a semiconductor device according to claim 1, wherein: The step of forming a mask layer with an etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer, and forming a T-shaped deep trench in the semiconductor substrate comprises: Forming a mask layer with a first etching pattern on the semiconductor substrate, etching the semiconductor substrate based on the mask layer with the first etching pattern to form a straight longitudinally extending groove of the T-shaped deep groove in the semiconductor substrate; Filling the straight longitudinally extending groove to form a first dielectric structure, wherein the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate and lower than the upper surface of the mask layer; Laterally widening and back-etching the first etched pattern of the mask layer to form a second etched pattern in the mask layer; Filling a second dielectric structure into the second etching pattern of the mask layer, wherein the second dielectric structure is integrated with the first dielectric structure to form a T-shaped dielectric structure; The T-shaped dielectric structure is removed to form a T-shaped deep trench.
3. The method for manufacturing an active region of a semiconductor device according to claim 2, characterized in that: In the step of filling the straight longitudinally extending groove to form a first dielectric structure, wherein the upper surface of the first dielectric structure is higher than the upper surface of the semiconductor substrate and lower than the upper surface of the mask layer, the upper surface of the first dielectric structure is 500A to 1000A higher than the upper surface of the semiconductor substrate.
4. The method for manufacturing an active region of a semiconductor device according to claim 2, wherein: The step of laterally widening and back-etching the first etched pattern of the mask layer to form a second etched pattern in the mask layer comprises: forming a photoresist layer on the mask layer, and forming a second etching pattern in the photoresist layer by a photolithography process; the second etching pattern is aligned with the first etching pattern, and the width of the second etching pattern is greater than that of the first etching pattern; The upper surface of the first dielectric structure is used as an etching stop layer, and the mask layer is etched based on the photoresist layer with the second etching pattern, so that the second etching pattern is transferred to the upper part of the mask layer; the etching pattern in the mask layer is T-shaped, including a first etching pattern located at the lower part and a second etching pattern located at the upper part, and the lateral width of the second etching pattern is greater than the width of the first etching pattern.
5. The method for manufacturing an active region of a semiconductor device according to claim 2, wherein: The material of the first medium structure and the second medium structure is organic carbon.
6. The method for manufacturing an active region of a semiconductor device according to claim 1, wherein: In the step of depositing a T-shaped silicon oxide structure into the T-shaped deep trench, wherein the T-shaped silicon oxide structure includes a straight longitudinal extension portion and a lateral extension portion formed on the straight longitudinal extension portion, wherein the top of the straight longitudinal extension portion is higher than the upper surface of the semiconductor substrate, the single-side width of the lateral extension portion in the lateral direction exceeds the single-side width of the straight longitudinal extension portion in the lateral direction by a range less than or equal to 100A.
7. The method for manufacturing an active region of a semiconductor device according to claim 1, wherein: The step of etching the active region of the semiconductor substrate between two adjacent T-shaped silicon oxide structures comprises: etching the active region of the semiconductor substrate between two adjacent T-shaped silicon oxide structures by a dry etching process.