ADC Calibration Method and System for Motor Control

Abstract

This application provides an ADC calibration method and system for motor control, applicable to an ADC calibration device. The device includes a first variable delay module and a second variable delay module. The method includes: performing offset calibration on a first-phase ADC signal and a second-phase ADC signal to obtain a first calibration signal and a second calibration signal; performing gain calibration on the first calibration signal and the second calibration signal to determine a third calibration signal and a fourth calibration signal; performing phase calibration on the third calibration signal and the fourth calibration signal respectively in the first variable delay module and the second variable delay module to obtain a first output signal and a second output signal; synthesizing the third output signal; determining a first delay value and a second delay value according to a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal; and performing phase calibration on the third calibration signal and the fourth calibration signal respectively according to the first delay value and the second delay value.

Description

Technical Field

[0001] This application relates to the field of motor control technology, and in particular to an ADC calibration method and system for motor control. Background Technology

[0002] Currently, with the continuous development of new energy technologies, electric motors are playing an increasingly important role in new energy vehicles, robotics, and industrial control, which correspondingly increases the requirements for the safety and reliability of motor controllers. As a key component for detecting motor phase, speed, and direction, the accuracy of the ADC (Analog-to-Digital Converter) is crucial for the accuracy and sensitivity of motor control. Phase current acquisition and reconstruction is a critical technical step in AC three-phase motor control. Currently, the most commonly used methods are single-resistor, dual-resistor, and three-resistor acquisition methods. Among these, the dual-resistor current acquisition method has become the choice for many applications due to its moderate cost and complexity. In the dual-resistor current acquisition method, the two-phase current is first amplified by amplifiers and then input to two ADCs for acquisition. The ADCs convert the acquired analog signals into digital quantities. Then, in the digital domain, based on the principle that the sum of the three-phase currents is zero, the third-phase current is obtained, and the motor's operating state is regulated through control logic.

[0003] Since the phase current is acquired by two ADCs and then reconstructed in the digital domain, the signal after ADC quantization will have offset and gain error due to the mismatch between the two ADC sampling channels. At the same time, the jitter of the sampling clock will also cause the phase of the output signal to shift, which will reduce the accuracy of the three-phase current reconstruction, thereby increasing the power loss of the motor and reducing the efficiency of the motor. Summary of the Invention

[0004] This application provides an ADC calibration method and system for motor control, which improves the quality of three-phase control signals, reduces motor power loss, and improves motor operating efficiency.

[0005] In a first aspect, embodiments of this application provide an ADC calibration method for motor control, the method comprising:

[0006] The first-phase ADC signal and the second-phase ADC signal of the motor are respectively offset calibrated to obtain the first calibration signal and the second calibration signal.

[0007] The calibration gain signal is determined based on the first calibration signal and the second calibration signal;

[0008] Based on the calibration gain signal, the third calibration signal and the fourth calibration signal are determined according to the first calibration signal and the second calibration signal, respectively.

[0009] The third calibration signal and the fourth calibration signal are respectively input into the first variable delay module and the second variable delay module. The third calibration signal and the fourth calibration signal are phase-calibrated according to the preset phase difference to obtain the first output signal and the second output signal.

[0010] A third output signal is determined based on the first output signal and the second output signal. A first delay value and a second delay value are determined based on a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal.

[0011] Based on the first delay value and the second delay value, the third calibration signal and the fourth calibration signal are phase calibrated respectively until the phase difference between any two corresponding pairs of the first output signal, the second output signal and the third output signal reaches the preset convergence condition.

[0012] In some embodiments, the ADC calibration device further includes: a first moving average filter and a second moving average filter, wherein the offset calibration of the first-phase ADC signal and the second-phase ADC signal of the motor to obtain a first calibration signal and a second calibration signal includes:

[0013] The first phase ADC signal is input into the first moving average filter to obtain the first offset signal;

[0014] The first calibration signal is obtained by subtracting the first offset signal from the first phase ADC signal.

[0015] The second phase ADC signal is input into the second moving average filter to obtain the second offset signal;

[0016] The second calibration signal is obtained by subtracting the second offset signal from the second phase ADC signal.

[0017] In some embodiments, the ADC calibration apparatus further includes: a first gain filter and a second gain filter, wherein a calibration gain signal is determined based on the first calibration signal and the second calibration signal;

[0018] The absolute values ​​of the first calibration signal and the second calibration signal are taken respectively to obtain the first absolute value signal and the second absolute value signal;

[0019] The first absolute value signal is input into the first gain filter to obtain the first gain signal;

[0020] The second absolute value signal is input into the second gain filter to obtain the second gain signal;

[0021] The average value of the first gain signal and the second gain signal is used as the calibration gain signal.

[0022] In some embodiments, determining the third calibration signal and the fourth calibration signal based on the calibration gain signal, respectively, according to the first calibration signal and the second calibration signal, includes:

[0023] The quotient of the calibration gain signal and the first absolute value signal is calculated to obtain the first amplitude scaling signal;

[0024] The third calibration signal is obtained by multiplying the first calibration signal and the first amplitude scaling signal.

[0025] The quotient of the calibration gain signal and the second absolute value signal is calculated to obtain the second amplitude scaling signal;

[0026] The product of the second calibration signal and the first amplitude scaling signal is calculated to obtain the fourth calibration signal.

[0027] In some embodiments, both the first variable delay module and the second variable delay module include multiple calibration switches. The step of performing phase calibration on the third calibration signal and the fourth calibration signal according to a preset phase difference to obtain a first output signal and a second output signal includes:

[0028] An initial delay value is generated based on the preset phase difference, and an initial number of conductions is determined based on the initial delay value;

[0029] Based on the initial number of conductions, the first variable delay module is controlled to turn on the corresponding calibration switch transistor, and the third calibration signal is converted into the first output signal;

[0030] Based on the initial number of conductions, the second variable delay module is controlled to turn on the corresponding calibration switch, converting the fourth calibration signal into the second output signal.

[0031] In some embodiments, the ADC calibration device further includes a phase shift module and an LMS module, wherein determining the first delay value and the second delay value based on a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal includes:

[0032] The phase shift module is used to align the first output signal, the second output signal and the third output signal to obtain the aligned first output signal and the aligned second output signal.

[0033] The first phase difference is determined based on the aligned first output signal and the third output signal;

[0034] The second phase difference is determined based on the aligned second output signal and the third output signal;

[0035] Based on the LMS module, the first delay value is determined according to the first phase difference and the preset adaptive algorithm, and the second delay value is determined according to the second phase difference and the preset adaptive algorithm.

[0036] In some embodiments, determining the first delay value based on the first phase difference and the preset adaptive algorithm, and determining the second delay value based on the second phase difference and the preset adaptive algorithm, includes:

[0037] Set the initial delay, iteration step size, and convergence factor;

[0038] The first output signal is phase-shifted according to the first phase difference to obtain the phase-shifted first output signal. The third output signal is subtracted from the phase-shifted first signal to obtain the first input signal.

[0039] Subtracting the first input signal from the third output signal yields the first error value;

[0040] If the first error is not less than the convergence factor, it is determined that the error has not converged, and the first delay update value is determined according to the first initial delay, the iteration step size and the first error.

[0041] The phase of the first output signal is adjusted according to the first delay update value, and the process is repeated until the first error is less than the convergence factor. The error is then determined to have converged, and the first delay update value corresponding to the error convergence time is taken as the first delay value.

[0042] Secondly, embodiments of this application provide an ADC calibration system for motor control, used to implement the ADC calibration method for motor control as described in any of the embodiments of this application.

[0043] This application provides an ADC calibration method for motor control, applied to an ADC calibration device including a first variable delay module and a second variable delay module. The method includes: performing offset calibration on the first-phase ADC signal and the second-phase ADC signal of the motor respectively to obtain a first calibration signal and a second calibration signal; determining a calibration gain signal based on the first calibration signal and the second calibration signal; determining a third calibration signal and a fourth calibration signal based on the calibration gain signal, respectively, according to the first calibration signal and the second calibration signal; inputting the third calibration signal and the fourth calibration signal into the first variable delay module and the second variable delay module respectively, and performing phase calibration on the third calibration signal and the fourth calibration signal according to a preset phase difference to obtain a first output signal and a second output signal; determining the third output signal based on the first output signal and the second output signal, and determining a first delay value and a second delay value according to a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal; performing phase calibration on the third calibration signal and the fourth calibration signal according to the first delay value and the second delay value, until the phase difference between any two corresponding phases of the first output signal, the second output signal, and the third output signal reaches a preset convergence condition. In the above method, by performing offset and gain calibration after the ADC module in the motor control system, the difference in amplitude of the three-phase reconstructed signal of the motor system is reduced, and the phase of the three-phase control signal is recalibrated by an adaptive algorithm, thereby eliminating the phase error of the three-phase control signal during multi-channel ADC quantization, which can effectively improve the quality of the reconstructed three-phase control signal of the motor system. Attached Figure Description

[0044] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 A schematic flowchart illustrating an ADC calibration method for motor control provided in this application embodiment;

[0046] Figure 2 A schematic diagram illustrating offset and gain calibration provided for an embodiment of this application;

[0047] Figure 3 A schematic diagram of phase calibration provided for an embodiment of this application;

[0048] Figure 4 A circuit diagram of a variable delay module provided in an embodiment of this application;

[0049] Figure 5A schematic diagram illustrating a phase error convergence process provided in an embodiment of this application;

[0050] Figure 6 A schematic diagram of a three-phase signal reconstruction process provided in an embodiment of this application;

[0051] Figure 7 A schematic diagram of a three-phase control signal before calibration provided in an embodiment of this application;

[0052] Figure 8 This is a schematic diagram of a calibrated three-phase control signal provided in an embodiment of this application. Detailed Implementation

[0053] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0054] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0055] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0056] It should also be further understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0057] ADC is an abbreviation for "Analog-to-Digital Converter". In electronic circuits, an ADC is a device or circuit that converts continuously changing analog signals into discrete digital signals.

[0058] Please see Figure 1 , Figure 1 This is a schematic flowchart illustrating an ADC calibration method for motor control provided in an embodiment of this application. Figure 1The method shown is applied to an ADC calibration device, which includes a first variable delay module and a second variable delay module. For example... Figure 1 The ADC calibration method shown is applied to motor control, and the specific steps include: S101-S106.

[0059] S101. The first phase ADC signal and the second phase ADC signal of the motor are respectively offset calibrated to obtain the first calibration signal and the second calibration signal.

[0060] For example, the first phase of the motor's three-phase electrical signal is quantized using an ADC to obtain the first-phase ADC signal. Similarly, the second phase of the motor's three-phase electrical signal is quantized using an ADC to obtain the second-phase ADC signal. It should be noted that the phase difference between the first and second phase electrical signals is 120°. The initial first-phase and second-phase ADC signals contain offset signals; therefore, this offset signal needs to be analyzed to perform offset calibration, thereby obtaining the first and second calibration signals.

[0061] S102. Determine the calibration gain signal based on the first calibration signal and the second calibration signal.

[0062] For example, based on the first and second calibration signals, a suitable gain value can be determined as the calibration gain for the entire system. In simple cases, the average of these two gain values ​​can be directly taken. However, in more complex cases, it may be necessary to find a gain value that provides good performance throughout the entire operating range through interpolation or other mathematical methods.

[0063] S103. Based on the calibration gain signal, determine the third calibration signal and the fourth calibration signal according to the first calibration signal and the second calibration signal, respectively.

[0064] For example, based on the determined calibration gain signal, the first calibration signal and the second calibration signal are calibrated to ensure that the amplitudes of the calibrated three-phase control signals are basically consistent.

[0065] S104. Input the third calibration signal and the fourth calibration signal into the first variable delay module and the second variable delay module respectively, and perform phase calibration on the third calibration signal and the fourth calibration signal according to the preset phase difference to obtain the first output signal and the second output signal.

[0066] For example, in this embodiment of the application, the third calibration signal and the fourth calibration signal may have phase lag due to clock jitter. The phase calibration of the third calibration signal and the fourth calibration signal is achieved by the first variable delay module and the second variable delay module, respectively. Thus, the phase calibration of the third calibration signal and the fourth calibration signal can be performed independently, improving the accuracy of the calibration.

[0067] During the first calibration, both the first and second variable delay modules perform phase calibration with reference to a preset phase difference. In subsequent calibrations, the phase difference between the first and second output signals gradually converges based on the received delay values.

[0068] S105. Determine the third output signal based on the first output signal and the second output signal, and determine the first delay value and the second delay value based on the preset adaptive algorithm, the first output signal, the second output signal and the third output signal.

[0069] For example, a third output signal is synthesized from the first and second output signals after phase calibration. The first, second, and third output signals constitute the three-phase control signals of the motor. Then, a first delay value and a second delay value are determined based on the third output signal and the first and second output signals, respectively. The first delay value describes the error between the phase difference between the first and third output signals and a preset phase difference. Similarly, the second delay value describes the error between the phase difference between the second and third output signals and a preset phase difference.

[0070] For example, this application provides an adaptive algorithm that calculates a delay value that can be received and used by the first variable delay module and the second variable delay module, thereby continuously optimizing the phase of the three-phase control signal.

[0071] S106. Based on the first delay value and the second delay value, perform phase calibration on the third calibration signal and the fourth calibration signal respectively, until the phase difference between any two corresponding pairs of the first output signal, the second output signal and the third output signal reaches the preset convergence condition.

[0072] For example, the preset phase difference is 120°, which is the ideal phase difference of the three-phase control signals. Through this application, the phase difference between each pair of the first output signal, the second output signal and the third output signal will gradually approach 120°.

[0073] This application provides an ADC calibration method for motor control, applied to an ADC calibration device including a first variable delay module and a second variable delay module. The method includes: performing offset calibration on the first-phase ADC signal and the second-phase ADC signal of the motor respectively to obtain a first calibration signal and a second calibration signal; determining a calibration gain signal based on the first calibration signal and the second calibration signal; determining a third calibration signal and a fourth calibration signal based on the calibration gain signal, respectively, according to the first calibration signal and the second calibration signal; inputting the third calibration signal and the fourth calibration signal into the first variable delay module and the second variable delay module respectively, and performing phase calibration on the third calibration signal and the fourth calibration signal according to a preset phase difference to obtain a first output signal and a second output signal; determining the third output signal based on the first output signal and the second output signal, and determining a first delay value and a second delay value according to a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal; performing phase calibration on the third calibration signal and the fourth calibration signal according to the first delay value and the second delay value, until the phase difference between any two corresponding phases of the first output signal, the second output signal, and the third output signal reaches a preset convergence condition. In the above method, by performing offset and gain calibration after the ADC module in the motor control system, the difference in amplitude of the three-phase reconstructed signal of the motor system is reduced, and the phase of the three-phase control signal is recalibrated by an adaptive algorithm, thereby eliminating the phase error of the three-phase control signal during multi-channel ADC quantization, which can effectively improve the quality of the reconstructed three-phase control signal of the motor system.

[0074] To more clearly illustrate the technical solution of this application, the technical solution of this application will be described below through specific embodiments. It should be noted that the specific embodiments are used to expand the description of the technical solution of this application, and are not intended to limit this application.

[0075] In some embodiments, the ADC calibration device further includes: a first moving average filter and a second moving average filter, which respectively performs offset calibration on the first phase ADC signal and the second phase ADC signal of the motor to obtain a first calibration signal and a second calibration signal, including: inputting the first phase ADC signal into the first moving average filter to obtain a first offset signal; subtracting the first offset signal from the first phase ADC signal to obtain the first calibration signal; inputting the second phase ADC signal into the second moving average filter to obtain a second offset signal; and subtracting the second offset signal from the second phase ADC signal to obtain the second calibration signal.

[0076] For example, please refer to Figure 2 , Figure 2 This is a schematic diagram of offset and gain calibration provided in an embodiment of this application. Figure 2As shown, the first ADC module 111 and the second ADC module 112 output the first phase ADC signal (Do1) and the second phase ADC signal (Do2), respectively. During offset calibration, the required modules of the ADC calibration device are: the first moving average filter 121 and the second moving average filter 122. First, the first phase ADC signal (Do1) and the second phase ADC signal (Do2) are input into the first moving average filter 121 and the second moving average filter 122, respectively, to obtain the first offset signal and the second offset signal. Then, the first offset signal is subtracted from the first phase ADC signal (Do1) to obtain the first calibration signal (Dg1), and the second offset signal is subtracted from the second phase ADC signal (Do2) to obtain the second calibration signal (Dg2). This process eliminates the offset.

[0077] In some embodiments, the ADC calibration apparatus further includes: a first gain filter and a second gain filter; determining a calibration gain signal based on the first calibration signal and the second calibration signal; taking the absolute value of the first calibration signal and the second calibration signal respectively to obtain a first absolute value signal and a second absolute value signal; inputting the first absolute value signal into the first gain filter to obtain a first gain signal; inputting the second absolute value signal into the second gain filter to obtain a second gain signal; and using the average value of the first gain signal and the second gain signal as the calibration gain signal.

[0078] like Figure 2 As shown, the ADC calibration device modules required during the offset calibration process are: a first sliding filter 131 and a second sliding filter 132. During the gain calibration process, the absolute values ​​of the first calibration signal (Dg1) and the second calibration signal (Dg2) are first taken, and then the gain information is obtained through the first sliding filter 131 and the second sliding filter 132 respectively. The average value of the obtained first gain information (G1) and second gain information (G2) is taken to obtain the calibration gain signal [(G1+G2) / 2].

[0079] In some embodiments, determining a third calibration signal and a fourth calibration signal based on a calibration gain signal, respectively, according to a first calibration signal and a second calibration signal, includes: calculating the quotient of the calibration gain signal and a first absolute value signal to obtain a first amplitude scaling signal; calculating the product of the first calibration signal and the first amplitude scaling signal to obtain a third calibration signal; calculating the quotient of the calibration gain signal and a second absolute value signal to obtain a second amplitude scaling signal; and calculating the product of the second calibration signal and the first amplitude scaling signal to obtain a fourth calibration signal.

[0080] For example, such as Figure 2As shown, the calibration gain signal [(G1+G2) / 2] is then divided by the first gain information (G1) and the second gain information (G2) respectively to obtain the calibration gains of the first calibration signal (Dg1) and the second calibration signal (Dg2), which are the first amplitude scaling signal [(G1+G2) / 2] / G1 and the second amplitude scaling signal [(G1+G2) / 2] / G2 respectively. Finally, the first calibration signal (Dg1) and the second calibration signal (Dg2) are multiplied by the first amplitude scaling signal [(G1+G2) / 2] / G1 and the second amplitude scaling signal [(G1+G2) / 2] / G2 respectively to scale the signal amplitude, resulting in the third calibration signal (DM1) and the fourth calibration signal (DM2). Thus, the amplitude of the first calibration signal (Dg1) and the second calibration signal (Dg2) after gain calibration is ±(G1+G2) / 2, and the amplitude of the reconstructed third phase signal will also be ±(G1+G2) / 2.

[0081] In some embodiments, both the first variable delay module and the second variable delay module include multiple calibration switches. They perform phase calibration on the third calibration signal and the fourth calibration signal according to a preset phase difference to obtain a first output signal and a second output signal. This includes: generating an initial delay value based on the preset phase difference; determining an initial conduction quantity based on the initial delay value; controlling the first variable delay module to turn on the corresponding calibration switch according to the initial conduction quantity, converting the third calibration signal into the first output signal; and controlling the second variable delay module to turn on the corresponding calibration switch according to the initial conduction quantity, converting the fourth calibration signal into the second output signal.

[0082] Please see Figure 3 , Figure 3 This is a schematic diagram illustrating a phase calibration method provided in an embodiment of this application. Figure 3 As shown, the modules of the ADC calibration device 100 required during the phase calibration process are: a first variable delay module 141 and a second variable delay module 142.

[0083] For example, after offset and gain calibration, the deviation caused by clock jitter may cause phase lag in the results of the first ADC module 111 and the second ADC module 112. Therefore, it is necessary to adjust the phase of both the third calibration signal (DM1) and the fourth calibration signal (DM2) to obtain the first output signal (OUT1) and the second output signal (OUT2) so as to ensure that the phase difference between the three-phase control signals is 120°.

[0084] For example, please refer to Figure 4 , Figure 4 This is a circuit diagram of a variable delay module provided in an embodiment of this application. Figure 4As shown, the first variable delay module (or the second variable delay module) includes: a first input switch Q1, a second input switch Q2, and a first calibration switch td. <1> Second calibration switch td <2> The third calibration switch td <3> ..., Nth calibration switch td <n>The first output switch Q3 and the second output switch Q4.

[0085] The controlled terminals of the first input switch Q1 and the second input switch Q2 serve as the input terminals for the third calibration signal (or the fourth calibration signal). The first terminal of the first input switch Q1 is connected to the first terminal of the first output switch Q3, and the second terminal of the first input switch Q1 is connected to the first terminal of the second input switch Q2. The second terminal of the first input switch Q1 is also connected to the first terminal of each calibration switch, as well as to the controlled terminals of the first output switch Q3 and the second output switch Q4. The second terminal of the first output switch Q3 is connected to the first terminal of the second output switch Q4, and the second terminal of the second output switch Q4 is connected to the second terminal of the second input switch Q2 and the second terminal of each calibration switch.

[0086] The control unit controls the number of calibration switches turned on based on the initial delay value, delaying the first output signal (DM1) and the second output signal (DM2) by a corresponding time, thereby achieving phase shift of the overall signal. The amount of phase shift is controlled by the LMS algorithm module, thereby performing initial phase calibration on the third calibration signal (DM1) and the fourth calibration signal (DM2) to obtain the first output signal (OUT1) and the second output signal (OUT2).

[0087] In some embodiments, such as Figure 3 As shown, the ADC calibration device 100 also requires the following modules during the offset calibration process: a first phase shift module 151, a second phase shift module 152, a first LMS module 161, and a second LMS module 162. Determining the first and second delay values ​​based on a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal includes: aligning the phases of the first, second, and third output signals using the phase shift modules to obtain aligned first and second output signals; determining the first phase difference based on the aligned first and third output signals; determining the second phase difference based on the aligned second and third output signals; and determining the first delay value based on the first phase difference and the preset adaptive algorithm using the LMS module, and determining the second delay value based on the second phase difference and the preset adaptive algorithm.

[0088] After phase adjustment, the first output signal (OUT1) and the second output signal (OUT2) are the signals finally input to the motor control logic. Based on the principle that the sum of the three-phase signals is 0, the third output signal (OUT3) can then be reconstructed. In the LMS algorithm module, the first output signal (OUT1) and the second output signal (OUT2) first need to pass through the first phase shift module 151 and the second phase shift module 152 respectively to align their phases with OUT3. After phase alignment, the difference is calculated to obtain the first phase difference and the second phase difference, which are used as the inputs of the first LMS module 161 and the second LMS module 162 respectively. The first LMS module 161 and the second LMS module 162 use an adaptive algorithm to generate the first delay value (td1) and the second delay value (td2) to adjust the phases of the third calibration signal (DM1) and the fourth calibration signal (DM2) in real time until the phase difference between any two three-phase control signals converges to a very small value.

[0089] In some embodiments, determining a first delay value based on a first phase difference and a preset adaptive algorithm, and determining a second delay value based on a second phase difference and a preset adaptive algorithm, includes: S201-S205.

[0090] S201. Set the first initial delay, iteration step size, and convergence factor.

[0091] For example, the first initial delay of the first LMS algorithm module is set to td1(0), the iteration step size is u, and the convergence factor is beta.

[0092] S202. The first output signal is phase-shifted according to the first phase difference to obtain the phase-shifted first output signal. The third output signal is subtracted from the phase-shifted first signal to obtain the first input signal.

[0093] For example, the first phase difference is 120°, and the first output signal is OUT1(n), where n is the iteration time, n=0, 1, 2, 3... After shifting the first output signal OUT1(n) by 120°, the phase-shifted first output signal ∆OUT1(n) is obtained. The third output signal is then subtracted from the phase-shifted first signal.

[0094] ∆OUT1(n)-OUT3(n)=INL1(n);

[0095] Wherein, INL1(n) is the first input signal.

[0096] S203. Subtract the first input signal from the third output signal to obtain the first error.

[0097] For example, the formula for calculating the first error quantity e1(n) is: e1(n) = OUT3(n) - INL1(n).

[0098] S204. If the first error is not less than the convergence factor, it is determined that the error has not converged. The first delay update value is determined based on the first initial delay, the iteration step size and the first error.

[0099] For example, if the first error value INL1(n) is greater than or equal to the convergence factor beta, then the error has not converged, and the first delay update value td1[n+1] needs to be re-determined. The formula for the first delay update value is:

[0100] td1[n+1]=td1[n]+u*e1[n]*INL1[n];

[0101] S205. Adjust the phase of the first output signal according to the first delay update value, and iterate cyclically until the first error is less than the convergence factor. Determine that the error has converged, and take the first delay update value corresponding to the error convergence time as the first delay value.

[0102] For example, when INL1(n+1) is less than the convergence factor beta, the first delay update value td1[n+1] corresponding to the error convergence time (n+1) is used as the first delay value.

[0103] In other embodiments, the second delay value is determined based on the second phase difference and a preset adaptive algorithm, including: S301-S305.

[0104] S301, Set the second initial delay, iteration step size, and convergence factor.

[0105] S302. The second output signal is phase-shifted according to the second phase difference to obtain the phase-shifted second output signal. The third output signal is subtracted from the phase-shifted second signal to obtain the second input signal.

[0106] S303. Subtract the second input signal from the third output signal to obtain the second error.

[0107] S304. If the second error is not less than the convergence factor, it is determined that the error has not converged. The second delay update value is determined based on the second initial delay, the iteration step size, and the second error.

[0108] S305. Adjust the phase of the second output signal according to the second delay update value, and iterate cyclically until the second error is less than the convergence factor. Determine that the error has converged, and take the second delay update value corresponding to the error convergence time as the second delay value.

[0109] It should be noted that the process for determining the second delay value is the same as that for determining the first delay value, and will not be repeated here.

[0110] In some embodiments, please refer to Figure 5 , Figure 5 This is a schematic diagram illustrating a phase error convergence process provided in an embodiment of this application. Figure 5 As shown, after the adaptive algorithm adjusts the phase, the error of the three-phase control signal after phase alignment gradually converges and stabilizes to a very small value.

[0111] In some embodiments, please refer to Figure 6 , Figure 6 This is a schematic diagram illustrating a three-phase signal reconstruction process provided in an embodiment of this application. Figure 6 As shown, the three-phase control signal gradually converges under the adaptive algorithm adjustment, and the amplitude of the three-phase control signal tends to a stable value as the adaptive adjustment time increases.

[0112] In some embodiments, please refer to Figure 7 , Figure 7 This is a schematic diagram of a three-phase control signal before calibration, provided as an embodiment of this application. Figure 7 As shown, the amplitudes of the three-phase control signals before calibration are significantly different, and the phase difference also has errors.

[0113] In some embodiments, please refer to Figure 8 , Figure 8 This is a schematic diagram of a calibrated three-phase control signal provided in an embodiment of this application. Figure 8 As shown, after the adaptive algorithm converges, a segment of the signal is extracted. It can be seen that the amplitudes of the calibrated three-phase control signals are basically the same, and the phase difference tends to 120° by measurement.

[0114] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.< / n>

Claims

1. An ADC calibration method for motor control, characterized in that, Applied to an ADC calibration device, the ADC calibration device including a first variable delay module and a second variable delay module, the method includes: The first-phase ADC signal and the second-phase ADC signal of the motor are respectively offset calibrated to obtain the first calibration signal and the second calibration signal. The calibration gain signal is determined based on the first calibration signal and the second calibration signal; Based on the calibration gain signal, the third calibration signal and the fourth calibration signal are determined according to the first calibration signal and the second calibration signal, respectively. The third calibration signal and the fourth calibration signal are respectively input into the first variable delay module and the second variable delay module. The third calibration signal and the fourth calibration signal are phase-calibrated according to the preset phase difference to obtain the first output signal and the second output signal. A third output signal is determined based on the first output signal and the second output signal. A first delay value and a second delay value are determined based on a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal. Based on the first delay value and the second delay value, the third calibration signal and the fourth calibration signal are phase calibrated respectively until the phase difference between any two corresponding pairs of the first output signal, the second output signal and the third output signal reaches the preset convergence condition.

2. The ADC calibration method for motor control as described in claim 1, characterized in that, The ADC calibration device further includes: a first moving average filter and a second moving average filter. The step of offset calibration of the first-phase ADC signal and the second-phase ADC signal of the motor to obtain a first calibration signal and a second calibration signal includes: The first phase ADC signal is input into the first moving average filter to obtain the first offset signal; The first calibration signal is obtained by subtracting the first offset signal from the first phase ADC signal. The second phase ADC signal is input into the second moving average filter to obtain the second offset signal; The second calibration signal is obtained by subtracting the second offset signal from the second phase ADC signal.

3. The ADC calibration method for motor control as described in claim 1, characterized in that, The ADC calibration device further includes: a first gain filter and a second gain filter, wherein a calibration gain signal is determined based on the first calibration signal and the second calibration signal; The absolute values ​​of the first calibration signal and the second calibration signal are taken respectively to obtain the first absolute value signal and the second absolute value signal; The first absolute value signal is input into the first gain filter to obtain the first gain signal; The second absolute value signal is input into the second gain filter to obtain the second gain signal; The average value of the first gain signal and the second gain signal is used as the calibration gain signal.

4. The ADC calibration method for motor control as described in claim 3, characterized in that, The step of determining the third calibration signal and the fourth calibration signal based on the calibration gain signal, respectively, according to the first calibration signal and the second calibration signal, includes: The quotient of the calibration gain signal and the first absolute value signal is calculated to obtain the first amplitude scaling signal; The third calibration signal is obtained by multiplying the first calibration signal and the first amplitude scaling signal. The quotient of the calibration gain signal and the second absolute value signal is calculated to obtain the second amplitude scaling signal; The product of the second calibration signal and the first amplitude scaling signal is calculated to obtain the fourth calibration signal.

5. The ADC calibration method for motor control as described in claim 1, characterized in that, Both the first variable delay module and the second variable delay module include multiple calibration switches. The step of performing phase calibration on the third calibration signal and the fourth calibration signal according to a preset phase difference to obtain a first output signal and a second output signal includes: An initial delay value is generated based on the preset phase difference, and an initial number of conductions is determined based on the initial delay value; Based on the initial number of conductions, the first variable delay module is controlled to turn on the corresponding calibration switch transistor, and the third calibration signal is converted into the first output signal; Based on the initial number of conductions, the second variable delay module is controlled to turn on the corresponding calibration switch, converting the fourth calibration signal into the second output signal.

6. The ADC calibration method for motor control as described in claim 1, characterized in that, The ADC calibration device further includes a phase shift module and an LMS module. The step of determining the first delay value and the second delay value based on a preset adaptive algorithm, the first output signal, the second output signal, and the third output signal includes: The phase shift module is used to align the first output signal, the second output signal and the third output signal to obtain the aligned first output signal and the aligned second output signal. The first phase difference is determined based on the aligned first output signal and the third output signal; The second phase difference is determined based on the aligned second output signal and the third output signal; Based on the LMS module, the first delay value is determined according to the first phase difference and the preset adaptive algorithm, and the second delay value is determined according to the second phase difference and the preset adaptive algorithm.

7. The ADC calibration method for motor control as described in claim 6, characterized in that, Determining the first delay value based on the first phase difference and the preset adaptive algorithm includes: Set the initial delay, iteration step size, and convergence factor; The first output signal is phase-shifted according to the first phase difference to obtain the phase-shifted first output signal. The third output signal is subtracted from the phase-shifted first signal to obtain the first input signal. Subtracting the first input signal from the third output signal yields the first error value; If the first error is not less than the convergence factor, it is determined that the error has not converged, and the first delay update value is determined according to the first initial delay, the iteration step size and the first error. The phase of the first output signal is adjusted according to the first delay update value, and the process is repeated until the first error is less than the convergence factor. The error is then determined to have converged, and the first delay update value corresponding to the error convergence time is taken as the first delay value.

8. An ADC calibration system for motor control, characterized in that, Used to implement the ADC calibration method for motor control as described in any one of claims 1 to 7.

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