Equipment state detection method and device, equipment and medium

Abstract

The invention provides an equipment state detection method and device, equipment and a medium, and is applied to the technical field of equipment state detection.The equipment state detection method comprises the steps that a target event counter corresponding to a target event is enabled based on configuration information of a control register, and an event statistical period corresponding to the target event counter is determined, the target event is an event selected from various events obtained based on equipment state classification; counting the occurrence frequency of the target event in the event counting period based on a target event counter; and writing the occurrence frequency into a result register, so that a host acquires the occurrence frequency in the result register, and realizes equipment state detection based on comparison between the occurrence frequency and an expected value corresponding to the target event. Therefore, equipment state detection can be flexibly carried out, possible faults of the equipment can be found in advance, and timely problem finding is guaranteed. Moreover, by enabling the target event counters corresponding to various events, comprehensive detection of the equipment state can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of device status detection, and particularly to a device status detection method, device, equipment and medium. Background Art

[0002] To meet the data transmission requirements of the server, there are multiple devices mounted in the server. During the power-on stage, the server initializes each device and establishes a link connection. During operation, it is necessary to detect the device status to discover possible faults of the device.

[0003] Currently, how to flexibly perform device status detection and discover problems in a timely manner is an issue that those skilled in the art need to solve. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a device status detection method, device, equipment and medium, which can flexibly perform device status detection and discover problems in a timely manner. The specific solutions are as follows:

[0005] In a first aspect, the present invention provides a device status detection method, including:

[0006] Enabling a target event counter corresponding to a target event based on the configuration information of a control register, and determining an event statistical period corresponding to the target event counter, where the target event is an event selected from various events classified based on device status;

[0007] Counting the number of occurrences of the target event within the event statistical period based on the target event counter;

[0008] Writing the number of occurrences into a result register, so that the host can obtain the number of occurrences in the result register and compare the number of occurrences with an expected value corresponding to the target event to implement device status detection.

[0009] Optionally, it further includes:

[0010] When the control register is configured in the active reporting mode, encapsulating the number of occurrences into a data packet in a preset format and reporting the data packet to the host.

[0011] Optionally, counting the number of occurrences of the target event within the event statistical period based on the target event counter includes:

[0012] After the target event counter is enabled, start counting the target event, and at the same time, a timer corresponding to the target event counter starts timing;

[0013] When the timing time of the timer reaches the event statistics period, the step of writing the occurrence count into the result register is triggered.

[0014] Optionally, enabling the target event counter corresponding to the target event based on the configuration information of the control register and determining the event statistics period corresponding to the target event counter includes:

[0015] Determining the target event group based on the corresponding bit position of the event group in the configuration information of the control register, and determining the target event in the target event group based on the corresponding bit position of the event in the configuration information of the control register;

[0016] When it is determined to enable the target event counter corresponding to the target event based on the enable bit position corresponding to the event counter in the configuration information of the control register, enabling the target event counter corresponding to the target event;

[0017] Determining the event statistics period based on the corresponding bit position of the event statistics period in the configuration information of the control register;

[0018] Correspondingly, after the target event counter is enabled, start counting the target event, and at the same time, the timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistics period, the step of writing the occurrence count into the result register is triggered, including:

[0019] After the target event counter is enabled, start counting the target event. The initial value of the target event counter is 0. When the target event occurs once, the target event counter performs an increment operation, and at the same time, the timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistics period, an indication signal is generated, and based on the indication signal, the step of writing the occurrence count into the result register is triggered.

[0020] Optionally, when the control register is configured in the active reporting mode, encapsulating the occurrence count into a data packet in a preset format and reporting the data packet to the host, including:

[0021] Determining whether it is the active reporting mode based on the corresponding bit position of the reporting mode in the configuration information of the control register. When the control register is configured in the active reporting mode, encapsulating the occurrence count and the event type of the target event into a data packet in a preset format and reporting the data packet to the host.

[0022] Optionally, the control register and the result register are registers determined by the register address in the configuration space of the device or by the address on the user side of the device.

[0023] Optionally, various events obtained based on device status classification include normal status events and error status events;

[0024] Among them, the normal status events include events corresponding to state machine changes, the amount of transmitted and received data, and the types of transmitted and received data packets; the error status events include events corresponding to physical layer errors, data link layer errors, and transport layer errors.

[0025] In a second aspect, the present invention discloses a device status detection apparatus, including:

[0026] An enabling module, configured to enable a target event counter corresponding to a target event based on configuration information of a control register, and determine an event statistical period corresponding to the target event counter, where the target event is an event selected from various events obtained based on device status classification;

[0027] A statistical module, configured to count the number of occurrences of the target event within the event statistical period based on the target event counter;

[0028] A writing module, configured to write the number of occurrences into a result register, so that a host can obtain the number of occurrences in the result register and compare the number of occurrences with an expected value corresponding to the target event to implement device status detection.

[0029] In a third aspect, the present invention discloses an electronic device, including:

[0030] A memory, configured to store a computer program;

[0031] A processor, configured to execute the computer program to implement the steps of the foregoing device status detection method.

[0032] In a fourth aspect, the present invention discloses a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the foregoing device status detection method are implemented.

[0033] In a fifth aspect, the present invention provides a computer program product, including computer programs / instructions, and when the computer programs / instructions are executed by a processor, the steps of the foregoing disclosed device status detection method are implemented.

[0034] As can be seen from the above solution, the present invention provides a method for detecting device status, including: enabling a target event counter corresponding to a target event based on configuration information of a control register, and determining an event statistical period corresponding to the target event counter, where the target event is an event selected from various events classified based on device status; counting the number of occurrences of the target event within the event statistical period based on the target event counter; writing the number of occurrences into a result register, so that a host can obtain the number of occurrences in the result register, and compare the number of occurrences with an expected value corresponding to the target event to implement device status detection.

[0035] It can be seen that the beneficial effects of the present invention are as follows: various events are obtained by classifying device status. By configuring the control register, enabling the target event counter corresponding to the target event and determining the event statistical period, counting the number of occurrences of the target event within the event statistical period based on the target event counter, and writing it into the result register, the host performs comparison and analysis based on the number of occurrences in the result register to implement device status detection. In this way, by configuring the control register, the event counter corresponding to the target event can be flexibly enabled, the number of occurrences of the target event within the configured event statistical period can be counted, and stored in the result register for the host to perform comparison and analysis, so that device status detection can be flexibly performed, and possible faults of the device can be discovered in advance to ensure timely problem discovery. Moreover, by enabling the target event counters corresponding to various events, comprehensive detection of device status can be achieved. Description of the Drawings

[0036] To more clearly illustrate the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0037] Figure 1 It is a flowchart of a method for detecting device status provided by an embodiment of the present invention;

[0038] Figure 2 It is a schematic diagram of PCIe device status detection provided by an embodiment of the present invention;

[0039] Figure 3 It is a schematic diagram of the implementation of PCIe device status detection provided by an embodiment of the present invention;

[0040] Figure 4 It is a flowchart of a method for detecting device status provided by an embodiment of the present invention;

[0041] Figure 5Schematic structural diagram of a device status detection device provided by an embodiment of the present invention;

[0042] Figure 6 Structural diagram of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0043] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.

[0044] The terms "including" and "having" in the specification of the present invention and any deformations related to "including" and "having" are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may include steps or units not listed.

[0045] To meet the data transmission and other requirements of the server, there are multiple devices mounted in the server. During the power-on stage, the server will initialize each device and establish a link connection. During the operation process, it is necessary to detect the device status to discover possible faults of the device. At present, how to flexibly perform device status detection and timely discover problems is an issue that those skilled in the art need to solve.

[0046] Among them, Peripheral Component Interconnect Express (PCIe) is a high-speed serial computer expansion bus standard that can connect devices to the motherboard. As an alternative to the previous PCI and AGP methods. PCIe provides higher bandwidth, faster data transmission rate and lower latency, and is widely used to connect additional cards such as graphics cards, network cards and solid state drives. It has become the most widely used high-speed data transmission interconnection technology in modern computers and servers. There are multiple PCIe devices in the server, which means there are multiple PCIe device hierarchies. During the power-on stage, the server will initialize each PCIe device and establish a link connection. During the operation process, it is necessary to monitor the status of the PCIe device or timely discover possible faults of the PCIe link.

[0047] For this reason, the present invention provides a device status detection solution, which can flexibly perform device status detection, discover possible faults of the device in advance, and ensure timely discovery of problems. Moreover, by enabling the target event counters corresponding to various events, comprehensive detection of the device status can be achieved.

[0048] First, the technical terms involved in the present invention are explained:

[0049] PCIE: Peripheral Component Interconnect Express, the Peripheral Component Interconnect bus;

[0050] EP: EndPoint, the PCIe endpoint device;

[0051] RC: Root Complex, the PCIe root complex / PCIe root device;

[0052] VDM: Vendor Defined Message, the user-defined message;

[0053] TLP: Transaction Layer Packet, the transmission layer data packet;

[0054] DLLP: Data Link Layer Packet, the data link layer data packet;

[0055] LCRC: Link CRC, the data link layer CRC;

[0056] ECRC: End-to-end CRC, the transmission layer CRC;

[0057] MWr TLP: Memory Write with Data Transaction Layer Packet, the memory write transaction layer packet with data;

[0058] CplD TLP: Completion with Data Transaction Layer Packet, the completion transaction layer packet with data;

[0059] msgD TLP: Message with Data Transaction Layer Packet, the message transaction layer packet with data.

[0060] Tx IO Write Request: Send an I / O write request, a request sent from a PCIe device to write data to the I / O space of another device.

[0061] Tx IO Read Request: Send an I / O read request, a request sent from a PCIe device to read data from the I / O space of another device.

[0062] Tx Memory Write Request: Send a memory write request, a request sent from a PCIe device to write data to a memory address.

[0063] Tx Memory Read Request: Sends a memory read request, a request sent from a PCIe device to read data from a memory address.

[0064] Tx Message / MessageD Request: Sends a message / message with data request, a request sent from a PCIe device to send a message or a message with data. These messages can be used for various control and management purposes, such as interrupt notification, error reporting, etc.

[0065] Tx MSI / INTx Request: Sends a Message Signaled Interrupt (MSI) / legacy interrupt (INTx) request, an interrupt request sent from a PCIe device. MSI is a modern interrupt mechanism that allows a device to send an interrupt signal over the PCIe bus, while INTx is the legacy PCI interrupt mechanism.

[0066] Rx Configuration Write Request: Receives a configuration write request, a request received by a PCIe device to modify the device's configuration space. The configuration space contains various configuration information and control registers of the device.

[0067] Rx Configuration Read Request: Receives a configuration read request, a request received by a PCIe device to read information from the device's configuration space.

[0068] Rx IO Write Request: Receives an I / O write request, a request received by a PCIe device to write data to the I / O space of another device.

[0069] Rx IO Read Request: Receives an I / O read request, a request received by a PCIe device to read data from the I / O space of another device.

[0070] Rx Memory Write Request: Receives a memory write request, and the data in the received request by the PCIe device is written to a memory address.

[0071] Rx Memory Read Request: Receives a memory read request to read data from a PCIe device's memory address.

[0072] Rx Message / MessageD Request: Receives a message / message with data request, a message or a message with data request received by a PCIe device. These messages can be used for various control and management purposes.

[0073] To enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0074] Next, a device status detection method provided by an embodiment of the present invention will be introduced in detail. Figure 1 As shown in the flowchart of a device status detection method provided by an embodiment of the present invention, the device status detection method includes:

[0075] Step S11: Enable a target event counter corresponding to a target event based on the configuration information of a control register, and determine an event statistical period corresponding to the target event counter, where the target event is an event selected from various events classified based on the device status.

[0076] In an embodiment of the present invention, the device for performing device status detection may be a device such as a PCIe device, a USB device, or a SATA device mounted on a host. The control register and the result register may be registers determined at the register address of the device configuration space or at the device user-side address.

[0077] Among them, the control register may include multiple bits, and the configuration information is the configuration values corresponding to the multiple bits. By configuring the corresponding bits to 1 or 0, the enabling configuration of the target event counter, the event statistical period, and the reporting mode can be realized. According to the detection requirements, the event counter corresponding to one event or the event counters corresponding to multiple events can be enabled. The multiple events may be all types of events or a part of all types of events.

[0078] In an alternative embodiment, the target event group may be determined based on the bits corresponding to the event group in the configuration information of the control register, and the target event in the target event group may be determined based on the bits corresponding to the event in the configuration information of the control register; when the enabling bit corresponding to the event counter in the configuration information of the control register is determined to enable the target event counter corresponding to the target event, the target event counter corresponding to the target event is enabled; the event statistical period is determined based on the bits corresponding to the event statistical period in the configuration information of the control register.

[0079] In the embodiments of the present invention, various events obtained based on device status classification include normal status events and error status events; among them, the normal status events include events corresponding to state machine changes, the amount of transmitted and received data, and the types of transmitted and received data packets; the error status events include events corresponding to physical layer errors, data link layer errors, and transport layer errors. And, it may include the following event groups: LTSSM state machine event group, which includes: L0 state, L1 state, L0s state, Tx L0s state, Rx L0s state, Configuration / Recovery state; the amount of transmitted and received data event group, which includes: the total amount of transmitted TLP data, the total data stream of received TLP, the total data stream of transmitted MWr TLP, the total amount of transmitted CplD TLP, the total amount of transmitted msgD TLP, the total amount of received MWr TLP, the total amount of received CplD TLP, the total amount of received msgD TLP; the types of transmitted and received data packet event group, which includes: Tx IO Write request, Tx IO Read request, Tx MemoryWrite request, Tx Memory Read request, Tx Message / MessageD request, Tx MSI / INTx request, RxConfiguration Write request, Rx Configuration Read request, Rx IO Write request, Rx IO Read request, Memory Write request, Rx Memory Read request, Rx Message / MessageD request; the physical layer error event group, which includes 8b / 10b or 128b / 130b decoding errors, Elastic Buffer (i.e., elastic buffer) overflow errors, Elastic Buffer underflow errors, polarity deviation errors; the data link layer error event group includes DLLP packet errors, TLP packet errors, LCRC errors, retransmission timeout errors, Tx Nak DLLP (i.e., the sender's negative acknowledgment data link layer data packet), Rx Nak DLLP (i.e., the receiver's negative acknowledgment data link layer data packet); the transport layer error event group includes ECRC errors, unsupported request errors, completion packet discard errors, completion packet timeout errors, Poisoned TLP (i.e., a transaction layer packet marked as an error or damaged). In this way, for various events obtained by classifying the device status, enabling the corresponding event counters, and counting the number of event occurrences within the statistical period through a timer for comparison and analysis can improve the comprehensiveness of device status detection.

[0080] Among them, the LTSSM (Link Training and Status State Machine) state machine is an important mechanism in PCIe devices for managing and describing physical layer link training and status. It includes the L0 state, L1 state, L0s state, Tx L0s state, Rx L0s state, and Configuration / Recovery state. The L0 state is the power state in which the PCIe link can operate normally. In this state, the PCIe device is in a full-power operation state and can transmit data normally. The L0 state is the target state after successful PCIe link training and is also the state when the device is working properly. The L1 state is a power state with lower power consumption than L0s. In the L1 state, the device still keeps receiving signals from the system but does not perform data transmission. The L0s state is a low-power active power management state. The transition from the L0s state to the L0 state only takes a short time because the LTSSM does not go through the Recovery state. In the L0s state, the device reduces power consumption but can still quickly resume to the L0 state within a short time in response to requests from the system. The Tx L0s state means that the transmitter (Tx) is in the L0s low-power state. In this state, the Tx sends an EIOS (Electrical Idle Ordered Set) signal and drives a stable DC common-mode voltage. When data transmission needs to be resumed, the Tx sends an FTS (Fast Training Sequence) signal to retrain the receiver (Rx) of the peer end. The Rx L0s state means that the receiver (Rx) is in the L0s low-power state. In this state, the Rx detects the EIOS signal and enters the electrical idle state. When the Rx detects an EIEOS (Electrical Idle Exit Ordered Set) signal, it prepares to re-perform Bit Lock and Symbol or Block Lock according to the FTS sent by the peer-end Tx to resume data transmission. The Configuration state is a key stage for PCIe link configuration. In this state, the Rx / Tx negotiates the link number and lane number. The Recovery state is an important link retraining state. When the PCIe link needs to be retrained (such as due to power state changes, link rate changes, or link signal errors, etc.), the device enters the Recovery state.

[0081] Step S12: Based on the target event counter, count the number of occurrences of the target event within the event statistical period.

[0082] In an embodiment of the present invention, after the target event counter is enabled, counting of the target event starts, and at the same time, the timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistics period, the step of writing the occurrence count into the result register is triggered.

[0083] In an alternative embodiment, after the target event counter is enabled, counting of the target event starts. The initial value of the target event counter is 0. When the target event occurs once, the target event counter performs an increment operation, and at the same time, the timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistics period, an indication signal is generated, and based on the indication signal, the step of writing the occurrence count into the result register is triggered.

[0084] In an alternative embodiment, all events can correspond to one timer, or each group of events corresponds to one timer, or one event corresponds to one timer.

[0085] Step S13: Write the occurrence count into the result register so that the host can obtain the occurrence count in the result register and implement device status detection based on comparison between the occurrence count and the expected value corresponding to the target event.

[0086] Among them, the expected value can be a numerical value or a numerical range. According to specific events, it can be set to be abnormal when greater than the expected value, or abnormal when less than the expected value, or abnormal when exceeding the data range, etc.

[0087] In an embodiment of the present invention, when the control register is configured in the active reporting mode, the occurrence count is encapsulated into a data packet in a preset format and the data packet is reported to the host. When the control register is not configured in the active reporting mode, the host reads the occurrence count from the result register.

[0088] In an alternative embodiment, it can be determined whether it is the active reporting mode based on the bit corresponding to the reporting mode in the configuration information of the control register. When the control register is configured in the active reporting mode, the occurrence count and the event type of the target event are encapsulated into a data packet in a preset format and the data packet is reported to the host.

[0089] That is, in an embodiment of the present invention, in addition to reporting the occurrence count, the event type is also reported, which is convenient for the host to determine the expected value based on the event type for comparison. The event type can also be stored in the result register.

[0090] Further, refer to Figure 2As shown in the figure, an embodiment of the present invention provides a schematic diagram for detecting the state of a PCIe device. The present invention classifies the PCIe link state, and periodically counts the events in each category according to the configuration for the host to query, or actively reports them to the host through user-defined messages. The host compares the obtained detailed state information with the expected value to determine whether the current state is normal. The host can also store this state information, and when a device failure occurs, it can read the historical statistical information to facilitate device debugging.

[0091] Figure 2 Among them, the event statistics control register (i.e., the control register) and the event statistics result register (i.e., the result register) are custom registers in the PCIe standard configuration space, or can be user-side custom registers that can be accessed by the PCIe root device. The event statistics control register is configured by the host processor through the PCIe root device to control the event counter enable switch, count clearing, statistical period setting, etc. When enabled, the event counter accumulates the number of event triggers. At the end of one cycle of the statistical period timer (i.e., the timer), the event counter can be cleared and start counting again, and at the same time, the statistical result of the previous cycle is updated into the event statistics result register. Multiple result registers can be set, each result register corresponding to an event counter, or one result register can be set. In the case of enabling multiple event counters, the event counters are polled and sequentially placed into the result register, and the event counter placed in the result register can be cleared.

[0092] Moreover, if the event statistics control register is configured to actively report the results (i.e., the active reporting mode), then at the end of one cycle of the statistical period timer, the user-defined message module will automatically pack and send the data and event type in the event statistics result register to the host PCIe root device in a certain format; if the event statistics control register is not configured to actively report the results, the event statistics result register is updated periodically for the host PCIe root device to read. After the host obtains the event status of the current statistical period, it can compare it with the expected value to determine whether the current link state is normal and then perform subsequent processing. For example, when the link state is normal, the current link throughput, power consumption status, etc. can be displayed in real time, and when the link error rate becomes high or the number of error packets increases, an alarm is generated, etc.; the statistical information can also be stored, and when a serious error occurs in the link, the historical data can be used to assist in analyzing the cause of the problem.

[0093] In addition, referring to Figure 3 as shown in Figure 3 is a schematic diagram of the implementation of detecting the state of a PCIe device provided by the present invention. Figure 3A implementation method is provided, including a control register (Control Reg), a result register (Result Reg), an event counter (Event Counter), a timer (Timer), and a user-defined message (VDM) module. The corresponding event counter can be enabled through a path selector. The controller register and the result register are accessed by the host through the PCIe root device. Two addresses can be selected from the PCIe device configuration space register addresses 0x40 to 0x100 for use, or two additional registers can be added on the user side of the PCIe device for the host to access. When selecting to use the PCIe device configuration space register address, the host sends Configuration Write / Configuration Read operations through the PCIe root device to access the control register and the result register; when selecting to use the PCIe device user side address, the host sends Memory Write / Memory Read or IO Write / IO Read operations through the PCIe root device to access the control register and the result register. Among them, the control register mainly completes configurations such as event selection, event counter enabling, event register clearing, event statistics period configuration, and active reporting of event results. The control register is defined as shown in Table 1 below:

[0094] Table 1

[0095]

[0096] The timer completes the timing of the statistical period according to the control register configuration, and generates an indication signal every time the corresponding statistical period duration is reached. The event counter mainly completes the periodic statistics of the corresponding event. When the control register enables the event counter or enables all event counters, the event counter starts to work. Whenever the corresponding event occurs, the event counter increments by 1. When the control register clears the event counter or clears all event counters and the timer generates an indication signal, the event counter can be reset to zero. When the timer generates an indication signal, the corresponding event counter is latched into the result register. If the control register indicates that the PCIe device needs to actively report the statistical results, the VDM module encapsulates the value of the result register in the PCIe custom message format and sends it to the PCIe root device. Figure 3 Taking a timer, a control register, and a result register as an example, in specific implementation, according to needs, it can be adjusted to multiple timers, multiple control registers, and multiple result registers.

[0097] In the embodiments of the present invention, for the convenience of management, events are grouped. One type is normal state events, such as LTSSM state machine changes, the amount of transmitted and received data, the types of transmitted and received data packets, etc.; the other type is error state events, such as physical layer errors, data link layer errors, transport layer errors, etc. The specific event definitions are shown in Tables 2 and 3 as follows:

[0098] Table 2

[0099]

[0100] Table 3

[0101]

[0102] See Figure 4 as shown Figure 4 which is a flowchart of device status detection provided by the embodiments of the present invention. Taking the host querying the physical layer 8b / 10b decoding error status as an example, the host expects that the PCIe device can actively report its physical layer 8b / 10b decoding error status within 1 second periodically to determine whether the underlying link signal quality is normal. The host queries the 8b / 10b decoding error event of the PCIe device within 1 second. The host configures the control register value to 0x1a1003, VDM_Sel = 1, Period_sel = a, , enables the 8b / 10b decoding error event counter to start working, and the 1024ms timer starts working. At the end of each 1024ms, the value of the 8b / 10b decoding error event counter is latched into the result register, and the data in the result register is encapsulated in the VDM format and sent to the host. The host checks the result to determine whether the status is normal and stores the result for subsequent assistance in positioning, and the query ends.

[0103] In this way, a PCIe device status detection scheme is provided, which can periodically count the types of transmitted and received data packets, the amount of data, link state switching, physical layer errors, link layer errors, and transport layer errors of the PCIe device within a time period, and can actively report the statistical results according to the configuration. Based on these rich status and error messages, the host can judge the current link condition, and when a problem occurs, it can assist in positioning according to the historical information. The technical solution of the present invention is not limited to the PCIe device, and the technical idea of the present invention can be extended to devices such as USB and SATA mounted on the host. The present invention describes a PCIe device status detection scheme, which mainly includes implementation structures such as event classification, event periodic statistics, and event active reporting. The above has described the present invention in detail through specific embodiments, but when implementing specifically, designers can make appropriate adjustments and changes under the principle of the present invention, such as adjusting the definition of the event control register, adjusting the event classification, adding events, etc. These adjustments should also be regarded as the protection scope of the present invention.

[0104] See Figure 5 As shown, an embodiment of the present invention provides a device status detection device, including:

[0105] An enabling module 51, configured to enable a target event counter corresponding to a target event based on configuration information of a control register, and determine an event statistical period corresponding to the target event counter, where the target event is an event selected from various events classified based on device status;

[0106] A statistical module 52, configured to count the number of occurrences of the target event within the event statistical period based on the target event counter;

[0107] A writing module 53, configured to write the number of occurrences into a result register, so that a host can obtain the number of occurrences in the result register, and compare the number of occurrences with an expected value corresponding to the target event to implement device status detection.

[0108] The device further includes a reporting module, configured to:

[0109] In the case where the control register is configured in an active reporting mode, encapsulate the number of occurrences into a data packet in a preset format, and report the data packet to the host.

[0110] Among them, the statistical module 52 can be configured to start counting the target event after the target event counter is enabled, and at the same time, a timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistical period, trigger the step of writing the number of occurrences into the result register.

[0111] Further, the enabling module 51 can be configured to determine a target event group based on a corresponding bit selected from an event group in the configuration information of the control register, and determine a target event in the target event group based on a corresponding bit selected from events in the configuration information of the control register; in the case of determining to enable the target event counter corresponding to the target event based on an enabling bit corresponding to an event counter in the configuration information of the control register, enable the target event counter corresponding to the target event; determine the event statistical period based on a bit corresponding to the event statistical period in the configuration information of the control register; correspondingly, the statistical module 52 is specifically configured to start counting the target event after the target event counter is enabled, the initial value of the target event counter is 0, when the target event occurs once, the target event counter performs an increment operation, and at the same time, a timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistical period, generate an indication signal, and based on the indication signal, trigger the step of writing the number of occurrences into the result register.

[0112] Further, the reporting module is specifically configured to: determine whether it is an active reporting mode based on the bit corresponding to the reporting mode in the configuration information of the control register, and in the case where the control register is configured as the active reporting mode, encapsulate the occurrence times and the event type of the target event into a data packet in a preset format, and report the data packet to the host.

[0113] Wherein, the control register and the result register are registers determined at the configuration space register address of the device or at the device user-side address.

[0114] In an alternative embodiment, various events obtained based on device status classification include normal status events and error status events; wherein, the normal status events include events corresponding to state machine changes, the amount of transmitted and received data, and the type of transmitted and received data packets; the error status events include events corresponding to physical layer errors, data link layer errors, and transport layer errors.

[0115] It can be seen that the embodiments of the present invention obtain various events based on device status classification, configure the control register, enable the target event counter corresponding to the target event, and determine the event statistical period. Based on the target event counter, the occurrence times of the target event within the event statistical period are counted and written into the result register. The host performs comparison and analysis based on the occurrence times in the result register to implement device status detection. In this way, by configuring the control register, the event counter corresponding to the target event can be flexibly selected to count the occurrence times of the target event within the configured event statistical period and store them in the result register for the host to perform comparison and analysis, enabling flexible device status detection, early discovery of possible faults in the device, and ensuring timely problem discovery. Moreover, by enabling the target event counters corresponding to various events, comprehensive detection of the device status can be achieved.

[0116] Figure 5 For the description of the features in the corresponding embodiments, reference can be made to Figure 1 the relevant descriptions of the corresponding embodiments, which will not be elaborated here one by one.

[0117] Figure 6 The following is a structural diagram of an electronic device provided by an embodiment of the present invention. As Figure 6 shown, the electronic device includes: a memory 60 for storing a computer program;

[0118] a processor 61 for implementing the steps of the device status detection method as described in the above embodiments when executing the computer program.

[0119] Among them, the processor 61 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 61 may be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), or programmable logic array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor is a processor used to process data in the wake state, also known as the central processing unit (CPU); the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 61 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 61 may further include an artificial intelligence (AI) processor, and the AI processor is used to process computational operations related to machine learning.

[0120] The memory 60 may include one or more computer-readable storage media, and the computer-readable storage media may be non-transitory. The memory 60 may further include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash storage devices. In this embodiment, the memory 60 is at least used to store the following computer program 601. After the computer program is loaded and executed by the processor 61, it can implement the relevant steps of the device state detection method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 60 may further include an operating system 602 and data 603, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 602 may include Windows, Unix, Linux, etc. The data 603 may include, but is not limited to, configuration data, etc.

[0121] In some embodiments, the electronic device may further include a display screen 62, an input / output interface 63, a communication interface 64, a power supply 65, and a communication bus 66.

[0122] Those skilled in the art can understand that Figure 6 the structure shown in

[0123] It can be understood that if the device state detection method in the above embodiments is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the current technology, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The aforementioned storage medium includes: USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, magnetic disks, or optical disks, etc., all of which can store program codes.

[0124] Based on this, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of the device state detection method as described above.

[0125] Next, a computer program product provided by an embodiment of the present invention will be introduced. The computer program product described below can be referred to each other with other embodiments described in this article.

[0126] A computer program product includes computer programs / instructions. When the computer programs / instructions are executed by a processor, they implement the steps of the device state detection method disclosed above.

[0127] The above has introduced in detail a device state detection method, device, equipment, and medium provided by an embodiment of the present invention. The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple. For the relevant parts, refer to the description of the method part.

[0128] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0129] The above has introduced in detail a device status detection method, device, equipment and medium provided by the present invention. Specific examples are used herein to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A device status detection method, characterized in that: include: Enable a target event counter corresponding to a target event based on configuration information of a control register, and determine an event statistical period corresponding to the target event counter, wherein the target event is an event selected from various types of events obtained based on device state classification; Counting the number of occurrences of the target event within the event statistics period based on the target event counter; The number of occurrences is written into a result register so that the host can obtain the number of occurrences in the result register, and implement device status detection based on the comparison between the number of occurrences and the expected value corresponding to the target event.

2. The device status detection method according to claim 1, characterized in that: Also includes: In the case where the control register is configured in an active reporting mode, the number of occurrences is encapsulated into a data packet in a preset format, and the data packet is reported to the host.

3. The device status detection method according to claim 2, characterized in that: Counting the number of occurrences of the target event within the event statistics period based on the target event counter includes: After the target event counter is enabled, the target event starts to be counted, and at the same time, the timer corresponding to the target event counter starts timing; When the timing time of the timer reaches the event statistical period, the step of writing the number of occurrences into a result register is triggered.

4. The device status detection method according to claim 3, characterized in that: Enabling a target event counter corresponding to a target event based on configuration information of a control register, and determining an event statistical period corresponding to the target event counter, including: Determine a target event group based on a bit corresponding to an event group selection in the configuration information of the control register, and determine a target event in the target event group based on a bit corresponding to an event selection in the configuration information of the control register; In a case where it is determined based on the enable bit corresponding to the event counter in the configuration information of the control register that the target event counter corresponding to the target event is enabled, enabling the target event counter corresponding to the target event; Determine the event statistics period based on the bit corresponding to the event statistics period in the configuration information of the control register; Correspondingly, after the target event counter is enabled, the target event starts to be counted, and at the same time, a timer corresponding to the target event counter starts timing; when the timing time of the timer reaches the event statistical period, the step of writing the number of occurrences into the result register is triggered, including: After the target event counter is enabled, the target event starts to be counted. The initial value of the target event counter is 0. When the target event occurs once, the target event counter performs an addition operation, and the timer corresponding to the target event counter starts timing. When the timing time of the timer reaches the event statistical period, an indication signal is generated. Based on the indication signal, the step of writing the number of occurrences into the result register is triggered.

5. The device status detection method according to claim 4, characterized in that: When the control register is configured in an active reporting mode, encapsulating the number of occurrences into a data packet in a preset format, and reporting the data packet to the host, including: Based on the bit corresponding to the reporting mode in the configuration information of the control register, determine whether it is an active reporting mode. When the control register is configured as an active reporting mode, encapsulate the number of occurrences and the event type of the target event into a data packet in a preset format, and report the data packet to the host.

6. The device status detection method according to claim 1, characterized in that: The control register and the result register are registers determined by register addresses in a configuration space of a device, or are registers determined by addresses on a user side of the device.

7. The device status detection method according to any one of claims 1 to 6, characterized in that: Various events obtained based on device status classification, including normal status events and error status events; Among them, the normal state events include events corresponding to state machine changes, data volume sent and received, and types of sent and received data packets; the error state events include events corresponding to physical layer errors, data link layer errors, and transport layer errors.

8. A device status detection device, characterized in that: include: An enabling module, used to enable a target event counter corresponding to a target event based on configuration information of a control register, and determine an event statistical period corresponding to the target event counter, wherein the target event is an event selected from various types of events obtained based on device state classification; A statistical module, used for counting the number of occurrences of the target event within the event statistical period based on the target event counter; The writing module is used to write the occurrence number into the result register so that the host can obtain the occurrence number in the result register and implement device status detection based on the comparison between the occurrence number and the expected value corresponding to the target event.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the device status detection method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the device status detection method according to any one of claims 1 to 7 are implemented.

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