Method for preparing transition region of thick film epitaxial gradient layer

Abstract

The invention relates to a preparation method of a transition region of a thick film epitaxial gradient layer. The preparation method comprises the following steps: S100, carrying out surface pretreatment on a heavily doped N-type silicon substrate to reduce interface defects; s200, the pretreated substrate is conveyed to an epitaxial cavity, and a stable lattice interface is formed through gradient temperature rise; s300, in the growth stage of the transition region, epitaxial gas and doping gas are introduced, the flow of the doping gas is dynamically adjusted, the resistivity is monitored in real time, and the resistivity of the transition region is made to be matched with the resistivity of the flat region; s400, switching to a flat region growth stage, keeping constant doping gas flow and adjusting epitaxial parameters until the total thickness reaches the standard; s500, gradient cooling and post-processing are carried out on the substrate after epitaxy is completed, the resistivity is monitored in real time by dynamically adjusting the doping gas flow and controlling the epitaxy time, resistivity matching between a transition region and a flat region is ensured, the overall quality of the epitaxial layer is improved, the transition region length and resistivity change are more stable through accurate control, and the yield of the epitaxial layer is improved. And the performance fluctuation caused by mismatching of the resistivity is reduced.

Description

Technical Field

[0001] The invention relates to semiconductor manufacturing technology, and in particular to a method for preparing a transition zone of a thick film epitaxial gradient layer. Background Art

[0002] In the field of semiconductor manufacturing, epitaxial growth technology is one of the key steps in preparing high-performance electronic devices. The thick film epitaxial growth method usually uses a single epitaxial parameter for the entire growth process. Although this method can achieve the growth of an epitaxial layer of a certain thickness, it has significant limitations in transition zone control and resistivity consistency.

[0003] It is difficult for traditional methods to accurately control the length and resistivity change of the transition zone, resulting in resistivity mismatch between the transition zone and the flat zone, affecting key electrical parameters such as the breakdown voltage (BV) of the final device. In addition, due to the lack of a dynamic adjustment mechanism, traditional methods cannot monitor and adjust the resistivity in real time, resulting in large fluctuations in the resistivity of different batches or on the same wafer, affecting the quality stability of the product. In order to achieve the required electrical parameters, traditional methods often require multiple experiments and complex process adjustments, increasing production costs and time. Although some improvement schemes such as multi-step epitaxy and fixed parameter methods attempt to solve these problems, they either increase process complexity and operational difficulty, or have poor flexibility and are difficult to cope with different customer needs and product specification changes. Summary of the invention

[0004] The present invention aims to solve the problems existing in the above-mentioned prior art and provides a method for preparing a transition zone of a thick film epitaxial gradient layer. By dynamically adjusting the doping gas flow rate and real-time monitoring the resistivity, the resistivity of the transition zone is matched with the flat zone, thereby improving the quality of the epitaxial wafer and the consistency of the electrical parameters.

[0005] The present invention solves the technical problem by adopting a technical solution: the method for preparing a transition zone of a thick film epitaxial gradient layer comprises: S100, performing surface pretreatment on the heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pre-treated substrate to an epitaxial cavity, and forming a stable lattice interface by gradient heating; S300, during the growth stage of the transition zone, introducing epitaxial gas and doping gas, dynamically adjusting the doping gas flow rate and monitoring the resistivity in real time, so that the resistivity of the transition zone matches that of the flat zone; S400, switching to the flat region growth stage, maintaining a constant doping gas flow rate and adjusting epitaxial parameters until the total thickness reaches the standard; S500, after the epitaxy is completed, the substrate is subjected to gradient cooling and post-processing.

[0006] Preferably, the surface pretreatment in step S100 includes the following steps: S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate; S102, high temperature annealing is performed in a hydrogen atmosphere, the annealing temperature is 1100-1150° C., the hydrogen purity is ≥99.9999%, and the annealing time is 30-60 min; S103. After annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

[0007] Preferably, the gradient heating in step 200 includes: S201, heating from 650°C to 1180°C at a rate of 10-15°C / s; S202, maintaining a constant temperature of 1180°C for 180 seconds, while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface; S203. During the constant temperature stage, the pressure in the chamber is maintained at 100-300 torr to suppress the diffusion of impurities.

[0008] Preferably, the method of dynamically adjusting the doping gas flow rate in step S300 is: S301, the initial flow rate is set to 290 sccm, and then decreases to a final flow rate of 33.3 sccm; S302, monitor the film thickness in real time through non-contact laser interferometer, and correct the flow curve in conjunction with resistivity data to ensure that the transition zone length deviation is ≤±5%; S303, the resistivity gradient of the transition zone ranges from 10﹣³Ω·cm to 10﹣¹Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

[0009] Preferably, the flat region growth stage in step S400 includes: S401, maintain the doping gas flow rate at 33.3 sccm and the TCS flow rate at 7-10 g / min; S402, real-time monitoring of resistivity by four-probe method, and adjustment of TCS flow rate to make the resistivity fluctuation in the flat area ≤±0.3%; S403, after each 5 μm epitaxial layer is grown, a high concentration phosphine pulse of 500-800 sccm is injected for 10-20 seconds to form a longitudinal gradient doping structure.

[0010] Preferably, the gradient cooling in step S500 includes: S501, cooling to room temperature at a rate of 5-8°C / min; S502, during the cooling process, argon gas with a purity of ≥99.999% is introduced to prevent oxidation of the epitaxial layer; S503. After cooling, verify the steepness of the transition zone by using the spread resistance profile (SRP) test.

[0011] Preferably, the heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation of <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

[0012] Preferably, the total thickness of the epitaxial layer is 50-100 μm, the transition zone length accounts for 5%-20%, the breakdown voltage (BV) is ≥2000 V, and a silicon nitride passivation film (thickness 50-100 nm) is deposited on the surface, and the surface state density after passivation is ≤1×10¹¹ surface states per square centimeter per electron volt.

[0013] Preferably, the preparation method is suitable for the preparation of epitaxial wafers of Si substrate FRD devices, and the steepness of the transition region and the breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

[0014] Preferably, the growth parameters of the transition zone and the flat zone are linked through a central control system to form a closed-loop feedback of the entire process, and the process data is stored in real time in a cloud database for yield analysis.

[0015] The beneficial effects of the present invention are: by dynamically adjusting the doping gas flow rate and controlling the epitaxial time, the resistivity is monitored in real time to ensure the resistivity matching between the transition zone and the flat zone, thereby improving the overall quality of the epitaxial layer, and precise control makes the transition zone length and resistivity changes more stable, reducing performance fluctuations caused by resistivity mismatch, and real-time monitoring and dynamic adjustment of the doping gas flow rate ensures the resistivity consistency of different batches or the same wafer, reduces resistivity fluctuations, and improves the stability of key electrical parameters such as the breakdown voltage (BV) of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a flow chart of the scheme from S100 to S130 in the present invention; Figure 2 It is a flow chart of the solution from S200 to S230 in the present invention; Figure 3 It is a flow chart of the solution from S300 to S330 in the present invention; Figure 4 It is a flow chart of the solution from S400 to S430 in the present invention; Figure 5 It is a flow chart of the solution from S500 to S530 in the present invention; Figure 6 It is a schematic diagram of the change of resistivity with the thickness of the epitaxial layer in the present invention. DETAILED DESCRIPTION

[0017] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the specific implementation mode, structure, characteristics and effects of the present invention are described in detail below in combination with the accompanying drawings and preferred embodiments.

[0018] like Figures 1 to 5 As shown, a method for preparing a transition zone of a thick film epitaxial gradient layer is characterized in that it includes: S100, surface pretreatment of a heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pretreated substrate to an epitaxial cavity, and forming a stable lattice interface by gradient heating; S300, in the transition zone growth stage, introducing epitaxial gas and doping gas, dynamically adjusting the doping gas flow rate and monitoring the resistivity in real time, so that the resistivity of the transition zone matches that of the flat zone; S400, switching to the flat zone growth stage, maintaining a constant doping gas flow rate and adjusting the epitaxial parameters until the total thickness meets the standard; S500, gradient cooling and post-treatment of the substrate after the epitaxy is completed.

[0019] In this embodiment, in step S100, the heavily doped N-type silicon liner substrate is surface pretreated, and hydrofluoric acid polishing and high-temperature annealing are used to remove the oxide layer and residual particles and reduce interface defects, thereby improving the surface quality of the substrate; in step S200, the pretreated substrate is transferred to the epitaxial chamber, and a stable lattice interface is formed by precisely controlling the gradient heating process (increasing from 650°C to 1180°C at a rate of 10-15°C / s and maintaining the temperature for 180 seconds), thereby laying a foundation for subsequent growth; in step S300, during the transition zone growth stage, epitaxial gas and doping gas are introduced. The doping gas flow is adjusted dynamically while the resistivity is monitored in real time, so that the resistivity of the transition zone matches that of the flat zone, ensuring the consistency and stability of the electrical parameters; then, in step S400, the flat zone growth stage is switched to maintain a constant doping gas flow and adjust the epitaxial parameters until the required total thickness is reached, further ensuring the quality of the epitaxial layer; finally, in step S500, the substrate after epitaxy is completed is subjected to a gradient cooling treatment to prevent oxidation of the epitaxial layer and reduce stress. The entire process optimizes the process flow and improves the yield and device performance by realizing closed-loop feedback of the entire process.

[0020] Specifically, the surface pretreatment in step S100 includes the following steps: S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate; S102, high-temperature annealing in a hydrogen atmosphere, the annealing temperature is 1100-1150°C, the hydrogen purity is ≥99.9999%, and the annealing time is 30-60min; S103, after annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

[0021] The surface pretreatment in step S100 is mainly to significantly improve the quality of the substrate surface, and specifically includes the following three key technical steps: in step S101, the oxide layer and residual particles on the surface of the substrate are removed by hydrofluoric acid polishing technology. This process can effectively remove surface impurities and ensure the purity of the subsequent growth environment; in step S102, the polished substrate is placed in a hydrogen atmosphere with a purity of ≥99.9999% for high-temperature annealing. The annealing temperature is controlled in the range of 1100-1150°C and the duration is 30-60 minutes. In this way, the substrate lattice structure can be repaired, interface defects can be reduced and the crystallization quality can be improved; in step S103, after the above treatment, the surface roughness of the substrate can be reduced to ≤0.2nm, and the lattice defect density can be reduced to ≤1×10³cm﹣², which not only greatly improves the smoothness and flatness of the substrate surface, but also significantly reduces potential lattice defects, laying a solid foundation for the subsequent high-quality growth of the epitaxial layer.

[0022] Specifically, the gradient heating in step S200 includes: S201, heating from 650°C to 1180°C at a rate of 10-15°C / s; S202, maintaining a constant temperature of 1180°C for 180 seconds, while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface; S203, maintaining the pressure in the chamber at 100-300 torr during the constant temperature stage to inhibit impurity diffusion.

[0023] The gradient heating process in step S200 ensures the formation of a high-quality stable lattice interface on the substrate surface by precisely controlling the temperature and environmental conditions. Specifically, it includes the following key technical steps: In step S201, the substrate is rapidly heated from 650°C to 1180°C at a rate of 10-15°C / s. This rapid and uniform heating rate helps to avoid deformation or cracks of the substrate caused by thermal stress, and provides ideal initial conditions for subsequent growth; in step S202, the substrate is kept at a constant temperature of 1180°C for 180 seconds, and hydrogen with a purity of ≥99.9999% is introduced during this process. This step is not only It helps to further repair the lattice defects on the substrate surface and can effectively reduce the introduction of impurities, thereby stabilizing the lattice interface. In step S203, the pressure in the chamber is maintained in the range of 100-300 torr during the constant temperature stage. By precisely controlling the pressure in the chamber, impurity diffusion can be suppressed and the gas flow state can be optimized to ensure the high purity and stability of the epitaxial layer growth environment. The entire gradient heating process is strictly controlled by process parameters to effectively improve and stabilize the substrate surface quality, lay the foundation for high-quality epitaxial growth in the subsequent transition zone and flat zone, and improve the electrical performance and reliability of the final product.

[0024] Specifically, Figure 6As shown, the method of dynamically adjusting the doping gas flow rate in step S300 is: S301, the initial flow rate is set to 290sccm, and then decreases to the final flow rate of 33.3sccm; S302, the film thickness is monitored in real time by a non-contact laser interferometer, and the flow curve is corrected in conjunction with the resistivity data to ensure that the transition zone length deviation is ≤±5%; S303, the resistivity gradient variation range of the transition zone is 10﹣³Ω·cm to 10﹣¹Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

[0025] The dynamic adjustment process of the doping gas flow rate in step S300 ensures the high-quality growth of the transition zone and the consistency of its electrical properties through fine control and real-time monitoring. In step S301, the initial doping gas flow rate is set to 290sccm and decreases exponentially to a terminal flow rate of 33.3sccm, wherein the exponential coefficient k has a value range of 0.02-0.05s-1. This dynamic adjustment method can accurately control the doping concentration distribution of the epitaxial layer, thereby achieving precise control of the resistivity of the transition zone. In step S302, a non-contact laser interferometer is used to monitor the film thickness in real time, and the data is linked to the resistivity to correct the flow curve, which not only avoids the pollution problem that may be caused by traditional contact measurement, but also can dynamically adjust the doping gas flow rate according to real-time feedback to ensure that the transition zone length deviation is controlled within ±5%. In step S303, the resistivity gradient variation range of the transition zone is set to 10-3Ω·cm to 10-1Ω·cm, and the deviation from the resistivity of the flat zone is controlled within 1%, ensuring a high degree of matching of electrical parameters between the transition zone and the flat zone.

[0026] In this embodiment, the resistivity is relatively stable in the range of 0 to 80 microns, and there are two ranges of value changes between 80 and 110 microns, among which the resistivity drops sharply from 110 to 120 microns, and after exceeding 120 microns, the resistivity is close to a lower stable value, which is only about 0.006.

[0027] Specifically, the flat area growth stage in step S400 includes: S401, maintaining the doping gas flow rate at 33.3sccm and the TCS flow rate at 7-10g / min; S402, real-time monitoring of resistivity by a four-probe method, and adjusting the TCS flow rate so that the flat area resistivity fluctuation is ≤±0.3%; S403, injecting a high-concentration phosphine pulse of 500-800sccm after each 5μm epitaxial layer is grown, and the duration is 10-20s to form a longitudinal gradient doping structure.

[0028] In the flat area growth stage in step S400, the high quality of the epitaxial layer and the consistency of the resistivity in the flat area are ensured by precisely controlling the doping gas flow rate and the TCS flow rate, and combining the real-time monitoring and adjustment technology. In this embodiment, step S401 maintains the doping gas flow rate at 33.3 sccm, and sets the TCS flow rate between 7-10 g / min. This constant flow setting helps to maintain a uniform doping concentration and film thickness growth rate; in step S402, as shown in Table 1 below, the resistivity is monitored in real time by the four-probe method, and the TCS flow rate is dynamically adjusted according to the measurement results, so that the resistivity fluctuation in the flat area is controlled within ±0.3%. , which can effectively compensate for the resistivity changes caused by process fluctuations and ensure the high consistency of electrical parameters; in step S403, a high-concentration phosphine pulse (500-800sccm, lasting 10-20 seconds) is injected after each 5μm epitaxial layer is grown to form a longitudinal gradient doping structure. This method not only optimizes the doping distribution, but also further improves the electrical properties and uniformity of the epitaxial layer. The entire flat area growth process is highly optimized for the epitaxial layer growth environment through strict process parameter control, real-time monitoring and feedback adjustment, which significantly improves the quality of the flat area and the consistency of electrical properties, ensuring the stability and reliability of the final product.

[0029] Table 1: Specifically, the gradient cooling in step S500 includes: S501, cooling to room temperature at a rate of 5-8°C / min; S502, introducing argon gas (purity ≥ 99.999%) during the cooling process to prevent oxidation of the epitaxial layer; S503, after cooling, verifying the steepness of the transition zone through a spread resistance profile (SRP) test.

[0030] The gradient cooling process in step S500 ensures the quality and electrical properties of the epitaxial layer by precisely controlling the cooling rate and ambient gas, and verifies its effect through rigorous testing. In step S501, the substrate is cooled to room temperature at a rate of 5-8°C / min. This slow and uniform cooling rate can effectively prevent thermal stress and cracks caused by rapid cooling and maintain the structural integrity of the epitaxial layer. In step S502, argon gas with a purity of ≥99.999% is introduced during the cooling process to prevent oxidation of the epitaxial layer. This measure not only protects the surface of the epitaxial layer from oxidation, but also maintains The high purity of the growth environment is maintained; in step S503, after cooling is completed, the steepness of the transition zone is verified by the extended resistance profile (SRP) test, requiring Δρ / ΔL≥15Ω•cm / μm and the interface lattice defect density ≤5×10²cm﹣². This step ensures that the electrical properties of the transition zone meet the design requirements and verifies the interface quality. The entire gradient cooling process achieves effective protection of the integrity and electrical properties of the epitaxial layer by finely controlling the cooling rate, using high-purity inert gas protection and strict testing and verification, ensuring the high quality and reliability of the final product.

[0031] Furthermore, the heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation of <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

[0032] The heavily doped N-type silicon substrate is an 8-inch wafer with a specific crystal orientation. <100> The off-angle is 2-4°. This crystal orientation and off-angle setting helps to optimize lattice matching and defect control during epitaxial growth. Its resistivity is ≤0.0008Ω•cm, indicating that the substrate has a high doping concentration and is suitable for applications that require low resistance characteristics. In addition, a superlattice buffer layer is provided on the back of the substrate. By introducing periodically arranged different material layers to reduce dislocation density, the crystal defects inside the substrate are effectively reduced, and the overall material quality is improved. The superlattice buffer layer not only enhances the mechanical stability of the substrate, but also significantly improves the interface quality between the epitaxial layer and the substrate, thereby improving the electrical performance and reliability of the final product.

[0033] Furthermore, the total thickness of the epitaxial layer is 50-100μm, the transition zone length accounts for 5%-20%, the breakdown voltage (BV) is ≥2000V, and the thickness of the silicon nitride passivation film deposited on the surface is 50-100nm, and the surface state density after passivation is ≤1×10¹¹ surface states per square centimeter per electron volt.

[0034] The total thickness of the epitaxial layer of the present invention is controlled between 50-100 μm, of which the transition zone length accounts for 5%-20%, ensuring the best balance between electrical performance and structural stability. In order to meet the needs of high-voltage applications, the breakdown voltage (BV) of the epitaxial layer reaches or exceeds 2000 V. This high breakdown voltage characteristic enables the device to operate stably under high-voltage environments. In addition, a silicon nitride passivation film with a thickness of 50-100 nm is deposited on the surface of the epitaxial layer. This passivation treatment not only effectively prevents oxidation and contamination of the epitaxial layer surface, but also significantly reduces the surface state density to ≤1×10¹¹cm﹣²•eV﹣¹, thereby reducing the negative impact of the interface state on the device performance. The silicon nitride passivation film is prepared by chemical vapor deposition (CVD) and other technologies, has excellent insulation and stability, can effectively protect the epitaxial layer surface and improve the long-term reliability of the device. The entire process achieves a high degree of optimization of the electrical properties and surface quality of the epitaxial layer by precisely controlling the thickness of the epitaxial layer, the ratio of the transition zone length, and the surface passivation treatment.

[0035] The preparation method is suitable for the preparation of epitaxial wafers of Si substrate FRD devices, and the steepness of the transition region and the breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

[0036] The epitaxial wafer preparation of Si substrate FRD devices ensures that the breakdown voltage (BV) satisfies the specific relationship by precisely controlling the steepness of the transition region and the change in resistivity: Breakdown voltage (BV) ≥ (1450 to 1550) × The steepness of the transition zone is finely controlled by dynamically adjusting the doping gas flow rate and combining it with real-time monitoring of film thickness and resistivity, so that the transition zone length accounts for 5%-20%, ensuring the consistency and stability of electrical parameters. This fine control not only optimizes the resistivity gradient change in the transition zone, but also significantly improves the breakdown voltage (BV) to reach or exceed 2000V, thereby meeting the needs of high-voltage applications. In addition, the surface of the epitaxial layer is further protected by depositing a silicon nitride passivation film, reducing the surface state density and improving the reliability of the overall device. The entire process is highly optimized for the epitaxial layer growth environment through strict process parameter control, real-time monitoring and feedback adjustment, ensuring the ideal relationship between the steepness of the transition zone and the breakdown voltage, and improving the electrical performance and long-term stability of the FRD device.

[0037] It is worth mentioning that the preparation method is also applicable to the preparation of epitaxial wafers of Si-based high-voltage IGBT devices. Based on the Si substrate FRD device, adaptive modifications are made according to the needs of the Si-based high-voltage IGBT device to obtain the Si-based high-voltage IGBT device.

[0038] Specifically, the growth parameters of the transition zone and the flat zone are linked through the central control system to form a closed-loop feedback for the entire process, and the process data is stored in real time in the cloud database for yield analysis.

[0039] The central control system realizes the linkage control of the growth parameters of the transition zone and the flat zone, forming a closed-loop feedback mechanism for the entire process, ensuring the high consistency and accuracy of the epitaxial wafer growth process. During the growth process, key parameters such as the doping gas flow rate, TCS flow rate and temperature are dynamically adjusted, and feedback adjustment is performed through real-time monitoring of data such as film thickness and resistivity, so that the electrical properties of the transition zone and the flat zone are optimally matched. The steepness and resistivity gradient changes in the transition zone are achieved by precisely controlling the doping gas flow rate, while the flat zone maintains resistivity consistency through constant doping gas flow rate and real-time adjustment of TCS flow rate. All data in the entire process are stored in real time in the cloud database for subsequent yield analysis and quality traceability. This full-process closed-loop feedback mechanism not only improves production efficiency, but also significantly improves product quality and consistency.

[0040] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technical personnel in this field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A method for preparing a transition zone of a thick film epitaxial gradient layer, characterized in that: include: S100, performing surface pretreatment on the heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pre-treated substrate to an epitaxial cavity, and forming a stable lattice interface by gradient heating; S300, during the growth stage of the transition zone, introducing epitaxial gas and doping gas, dynamically adjusting the doping gas flow rate and monitoring the resistivity in real time, so that the resistivity of the transition zone matches that of the flat zone; S400, switching to the flat region growth stage, maintaining a constant doping gas flow rate and adjusting epitaxial parameters until the total thickness reaches the standard; S500, after the epitaxy is completed, the substrate is subjected to gradient cooling and post-processing.

2. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The surface pretreatment in step S100 includes the following steps: S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate; S102, high temperature annealing is performed in a hydrogen atmosphere, the annealing temperature is 1100-1150° C., the hydrogen purity is ≥99.9999%, and the annealing time is 30-60 min; S103. After annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

3. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The gradient heating in step S200 includes: S201, heating from 650°C to 1180°C at a rate of 10-15°C / s; S202, maintaining a constant temperature of 1180°C for 180 seconds, while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface; S203. During the constant temperature stage, the pressure in the chamber is maintained at 100-300 torr to suppress the diffusion of impurities.

4. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The method of dynamically adjusting the doping gas flow rate in step S300 is: S301, the initial flow rate is set to 290 sccm, and then decreases to a final flow rate of 33.3 sccm; S302, monitor the film thickness in real time through non-contact laser interferometer, and correct the flow curve in conjunction with resistivity data to ensure that the transition zone length deviation is ≤±5%; S303, the resistivity gradient of the transition zone ranges from 10﹣³Ω·cm to 10﹣¹Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

5. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The flat region growth stage in step S400 includes: S401, maintain the doping gas flow rate at 33.3 sccm and the TCS flow rate at 7-10 g / min; S402, real-time monitoring of resistivity by four-probe method, and adjustment of TCS flow rate to make the resistivity fluctuation in the flat area ≤±0.3%; S403, after each 5 μm epitaxial layer is grown, a high concentration phosphine pulse of 500-800 sccm is injected for 10-20 seconds to form a longitudinal gradient doping structure.

6. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The gradient cooling in step S500 includes: S501, cooling to room temperature at a rate of 5-8°C / min; S502, during the cooling process, argon gas with a purity of ≥99.999% is introduced to prevent oxidation of the epitaxial layer; S503. After cooling, verify the steepness of the transition zone by using the spread resistance profile (SRP) test.

7. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

8. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The total thickness of the epitaxial layer is 50-100 μm, the transition zone length accounts for 5%-20%, the breakdown voltage (BV) is ≥2000 V, and the thickness of the silicon nitride passivation film deposited on the surface is 50-100 nm. After passivation, the surface state density is ≤1×10¹¹ surface states per square centimeter per electron volt.

9. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, characterized in that: The preparation method is suitable for preparing epitaxial wafers of Si substrate FRD devices, and the steepness of the transition region and the breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

10. A method for preparing a thick film epitaxial gradient layer transition zone according to claim 4 or 5, characterized in that: The growth parameters of the transition zone and the flat zone are linked through a central control system to form a closed-loop feedback of the entire process, and the process data is stored in real time in a cloud database for yield analysis.

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