High-precision chip packaging method and system

Through the chip packaging unit integrating ultrasonic cleaning, drying, image acquisition and local heating functions, the chip packaging process is automated, and through image acquisition and activity adjustment technology, the problems of low accuracy and efficiency of traditional chip packaging methods are solved, achieving high-precision and high-quality chip packaging.

CN120109027AActive Publication Date: 2025-06-06SHENZHEN JUNAN MICRO SEMICON CO LTD
View PDF 8 Cites 0 Cited by

Patent Information

Application Number
CN202510490863.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-18
Publication Date
2025-06-06
Estimated Expiration
2045-04-18

AI Technical Summary

Technical Problem

Traditional chip packaging methods rely on manual operations and are easily affected by human factors, resulting in reduced packaging accuracy and efficiency, and it is difficult to dynamically adjust the activity of the packaging substrate and chip surface, and cannot effectively deal with environmental changes and material differences, resulting in poor packaging bonding or uneven welding.

Method used

The chip packaging unit with integrated ultrasonic cleaning, device drying, image acquisition and local heating functions is adopted to automatically perform cleaning, drying, plasma processing and welding processes, and the alignment error is calculated through image acquisition to achieve dynamic adjustment and precise alignment of the chip surface activity.

Benefits of technology

It improves the accuracy and quality of chip packaging, reduces human error and pollution risks, enhances the reliability and flexibility of packaging, and can effectively deal with small environmental changes and material differences.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120109027A_ABST
    Figure CN120109027A_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of image processing, and discloses a high-precision chip packaging method and system, and the method comprises the steps: obtaining a packaging substrate and a high-precision chip, receiving a chip packaging instruction, starting a chip packaging unit, carrying out the cleaning, obtaining a cleaned substrate and a cleaned chip, carrying out the drying, obtaining a serviced substrate and a serviced chip, and carrying out the plasma processing, the method comprises the following steps: obtaining a processed substrate and a processed chip, calculating chip surface activity, calculating substrate surface activity, calculating ideal activity, adjusting, obtaining adjusted substrate activity, adjusting, obtaining adjusted chip activity, performing solution coating, obtaining a coated substrate, performing image acquisition, obtaining a chip image, calculating an alignment error, and adjusting a reorganized chip. And performing low-temperature welding to obtain a packaging workpiece, and completing high-precision chip packaging according to the packaging workpiece. According to the invention, the packaging quality of the high-precision chip can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and in particular to a high-precision chip packaging method and system. Background Art

[0002] With the rapid development of the electronics industry, high-precision chip packaging technology is becoming increasingly important in the fields of microelectronics, communications and computing. High-precision chip packaging not only requires efficient cleaning, drying and plasma treatment of the packaging substrate and high-precision chips, but also requires precise adjustment of the activity of the packaging substrate and the surface of the high-precision chip to ensure perfect alignment and reliable connection in the subsequent low-temperature welding process.

[0003] Traditional chip packaging methods rely on manual cleaning, drying and plasma treatment, which are easily affected by human factors during the operation process, which not only reduces the accuracy and efficiency of high-precision packaging, but also increases the risk of operational errors and contamination. In addition, traditional chip packaging methods use fixed parameters, which makes it difficult to dynamically adjust the surface activity of the packaging substrate and high-precision chips according to real-time detection data, resulting in the inability to effectively respond to minor environmental changes and material differences in actual production, which can easily cause poor packaging joints or uneven welding. Therefore, how to improve the quality of high-precision chip packaging is an important issue that needs to be solved urgently. Summary of the invention

[0004] The present invention provides a high-precision chip packaging method and system, the main purpose of which is to improve the quality of high-precision chip packaging.

[0005] To achieve the above object, the present invention provides a high-precision chip packaging method, comprising:

[0006] Acquire a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit;

[0007] Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip;

[0008] The device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip;

[0009] Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate;

[0010] Calculating an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image;

[0011] Calculate the alignment error according to the chip image, adjust the prepared chip according to the alignment error, and obtain the correction position;

[0012] Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

[0013] Optionally, the step of drying the cleaned substrate and the cleaned chip by using the device drying unit to obtain a prepared substrate and a prepared chip includes:

[0014] Fixing the cleaning substrate and the cleaning chip on a pre-built drying bracket, and preliminarily drying the cleaning substrate and the cleaning chip based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip;

[0015] Preheating the device drying unit to obtain a preheating temperature;

[0016] Compare the preheat temperature with the preset drying temperature;

[0017] When it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate;

[0018] The preliminary substrate and the preliminary chip are dried based on the device drying unit and the sample drying time to obtain a prepared substrate and a prepared chip.

[0019] Optionally, calculating the sample drying rate includes:

[0020] Acquiring a substrate surface area of ​​the cleaning substrate and a chip surface area of ​​the cleaning chip;

[0021] Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box, and calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box:

[0022]

[0023] Where q refers to the sample drying rate, S1 Refers to the chip surface area, φ 1 Refers to the preset chip diffusion coefficient, S 2 Refers to the substrate surface area, A 2 refers to the preset substrate diffusion coefficient, W 1 Refers to the chip boundary thickness, W 2 refers to the substrate boundary thickness, sin h refers to the hyperbolic sine function, V 2 Refers to the preset saturated vapor pressure, V 3 Refers to the actual vapor pressure, V 1 refers to the preset pressure constant, e refers to the natural constant, r 2 Refers to the wind speed inside the box, and r refers to the preset saturated wind speed.

[0024] Optionally, calculating the chip surface activity according to the processing chip includes:

[0025] Get the total plasma power and plasma action area, and calculate the plasma power density based on the total plasma power and plasma action area:

[0026]

[0027] Where E is the plasma power density, P 1 Refers to the total plasma power, S 3 Refers to the plasma action area;

[0028] The chip activation energy, gas constant and plasma time of the processing chip are obtained, and the chip surface activity is calculated according to the plasma power density, chip activation energy, gas constant and plasma time.

[0029] Optionally, the calculating the chip surface activity according to the plasma power density, chip activation energy, gas constant and plasma time includes:

[0030] Obtain the regional temperature, and calculate the chip surface activity based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters and regional temperature:

[0031]

[0032] Among them, G refers to the surface activity of the chip, γ 1 refers to plasma parameters, t refers to plasma time, and f 2 Refers to the preset time parameter, D 1 refers to the chip activation energy, δ refers to the gas constant, z refers to the area temperature, and c refers to the preset temperature constant.

[0033] Optionally, the calculating the ideal activity comprises:

[0034] The active concentration and the standard bonding strength are obtained, and the ideal activity of the chip is calculated based on the regional temperature, the preset ideal bonding strength, the active concentration, the preset reference standard temperature and the standard bonding strength, wherein the calculation formula of the ideal activity of the chip is as follows:

[0035]

[0036] Among them, G 3 refers to the ideal activity of the chip, τ 1 Refers to the standard bonding strength, τ 2 refers to the ideal bonding strength, α refers to the preset bonding parameter, tan h refers to the hyperbolic tangent function, z 2 refers to the reference standard temperature, ln refers to the natural logarithm, j refers to the activity concentration, α 2 Refers to the preset gas parameters;

[0037] Acquiring substrate temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters, and calculating substrate ideal activity according to the substrate temperature, ideal bonding strength, activity concentration, reference standard temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters;

[0038] The ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

[0039] Optionally, adjusting the surface activity of the substrate based on the ideal activity of the substrate to obtain the adjusted substrate activity includes:

[0040] Setting the activity difference threshold according to the ideal activity of the substrate;

[0041] Calculate the substrate activity difference based on the ideal activity of the substrate and the surface activity of the substrate;

[0042] comparing the substrate activity difference value with the activity difference threshold;

[0043] If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal activity of the substrate, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned to the above step according to the updated substrate activity difference until the substrate activity difference is no greater than the activity difference threshold;

[0044] If the substrate activity difference is not greater than the activity difference threshold, the substrate surface activity is confirmed as the adjusted substrate activity.

[0045] Optionally, before placing the prepared chip on the connection area on the coated substrate using the pre-built robotic arm and acquiring the image using the image acquisition unit to obtain the chip image, the method further includes:

[0046] Acquire a material template, segment the standard plate based on the preparation chip and the material template, identify the plate center according to the standard plate, and perform feature marking on the standard plate based on the plate center to obtain a marking template, wherein the plate center is the geometric center of the standard plate;

[0047] The marking template is fixed on the back of the prepared chip, and a marking coordinate system is constructed according to the marking template.

[0048] Optionally, calculating the alignment error according to the chip image includes:

[0049] Acquire the center coordinates based on the marker coordinate system, identify the region center of the connection region from the chip image, and identify the region coordinates from the marker coordinate system according to the region center, wherein the region center is the geometric center of the connection region, the center coordinates include: a central horizontal coordinate and a central vertical coordinate, and the region coordinates include: a regional horizontal coordinate and a regional vertical coordinate;

[0050] Calculate the alignment error based on the center coordinates and the area coordinates:

[0051]

[0052] Where H is the alignment error, ρ 1 refers to the central abscissa, ρ 2 refers to the horizontal coordinate of the region, θ 1 Refers to the central ordinate, θ 2 Refers to the vertical coordinate of the area.

[0053] To achieve the above object, the present invention further provides a high-precision chip packaging process system, comprising:

[0054] The equipment cleaning module is used to obtain the packaging substrate and the high-precision chip, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit and a local heating unit;

[0055] Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip;

[0056] An activity calculation module, used for drying the cleaned substrate and the cleaned chip by using the device drying unit to obtain a prepared substrate and a prepared chip;

[0057] Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate;

[0058] An image acquisition module is used to calculate an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image;

[0059] The low-dimensional welding module is used to calculate the alignment error based on the chip image, adjust the prepared chip according to the alignment error, and obtain the corrected position;

[0060] Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

[0061] In order to solve the above problem, the present invention further provides an electronic device, the electronic device comprising:

[0062] A memory storing at least one instruction;

[0063] The processor executes the instructions stored in the memory to implement the high-precision chip packaging method described above.

[0064] In order to solve the above problem, the present invention also provides a computer-readable storage medium, in which at least one instruction is stored. The at least one instruction is executed by a processor in an electronic device to implement the above-mentioned high-precision chip packaging method.

[0065] The present invention solves the problem described in the background technology. First, a chip packaging instruction is received, and a chip packaging unit is started according to the chip packaging instruction. The chip packaging process is driven by the chip packaging instruction, thereby ensuring the automation and standardization of the chip packaging process and reducing the errors that may be caused by human intervention. The chip packaging unit integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit and a local heating unit, thereby improving the consistency of packaging. Each functional unit integrated in the chip packaging unit can be optimized independently, thereby improving the flexibility of chip packaging and adapting to different packaging requirements. Afterwards, the packaging substrate and the high-precision chip are cleaned by the ultrasonic cleaning unit, and the contaminants on the surface of the packaging substrate and the high-precision chip are removed by ultrasonic high-frequency vibration, thereby improving the cleanliness of the connection area, avoiding packaging defects caused by contamination, and improving the quality of chip packaging. Then, the cleaning The substrate and the cleaned chip are dried, which effectively removes the residual moisture in the cleaning process and improves the reliability of packaging; further, the prepared substrate and the prepared chip are plasma treated, and the substrate surface activity of the prepared substrate and the chip surface activity of the prepared chip are calculated, and the substrate ideal activity of the prepared substrate and the chip ideal activity of the prepared chip are calculated, and the substrate surface activity and the chip surface activity are adjusted according to the substrate ideal activity and the chip ideal activity, respectively, by quantifying the substrate surface activity and the chip surface activity, the bonding ability of the prepared substrate and the prepared chip can be accurately evaluated, and the reliability of bonding can be improved. By adjusting the substrate surface activity and the chip surface activity, the quality of bonding can be ensured and the risk of peeling after packaging can be reduced; finally, the alignment error is calculated, and the prepared chip is adjusted according to the alignment error, which improves the accuracy of chip packaging and reduces the defects of chip packaging. Therefore, the present invention can improve the quality of high-precision chip packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 A schematic diagram of a process flow of a high-precision chip packaging method provided by an embodiment of the present invention;

[0067] Figure 2 A functional module diagram of a high-precision chip packaging process system provided by an embodiment of the present invention;

[0068] Figure 3 A schematic diagram of the structure of an electronic device for implementing the high-precision chip packaging method provided by an embodiment of the present invention.

[0069] Description of reference numerals:

[0070] 1. Electronic device; 10. Processor; 11. Memory; 12. Bus.

[0071] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0072] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0073] The embodiment of the present application provides a high-precision chip packaging method. The execution subject of the high-precision chip packaging method includes but is not limited to at least one of the electronic devices such as a server and a terminal that can be configured to execute the method provided by the embodiment of the present application. In other words, the high-precision chip packaging method can be executed by software or hardware installed in a terminal device or a server device, and the software can be a blockchain platform. The server includes but is not limited to: a single server, a server cluster, a cloud server or a cloud server cluster, etc.

[0074] Reference Figure 1 FIG. 1 is a flow chart of a high-precision chip packaging method according to an embodiment of the present invention. In this embodiment, the high-precision chip packaging method includes:

[0075] S1. Obtain a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit.

[0076] It can be explained that high-precision chips refer to chips that need to be packaged, and chip packaging instructions refer to instructions issued manually to start the chip packaging unit. For example, Xiao Zhang is a chip packaging worker. One day, Xiao Zhang needs to package a high-precision chip, so Xiao Zhang issued a chip packaging instruction and started the chip packaging unit according to the chip packaging instruction. The chip packaging unit refers to a unit that integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit, and is used to package high-precision chips.

[0077] S2. Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip.

[0078] It can be explained that the ultrasonic cleaning unit refers to a unit for ultrasonic cleaning of high-precision chips. Optionally, the ultrasonic cleaning unit is an ultrasonic cleaning machine. The cleaning substrate is obtained by ultrasonic cleaning the packaging substrate by the ultrasonic cleaning unit. The cleaning chip refers to the chip obtained after the high-precision chip is ultrasonically cleaned by the ultrasonic cleaning unit. The specific process of using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip is as follows: first, obtain ultrasonic cleaning liquid, heat the ultrasonic cleaning liquid to 35°C, place the high-precision chip and the packaging substrate on the sample bracket, and the high-precision chip and the packaging substrate do not contact each other on the sample bracket. After that, put the sample bracket, the high-precision chip and the packaging substrate into the cleaning tank of the ultrasonic cleaning unit to ensure that the ultrasonic cleaning liquid completely immerses the sample bracket, the high-precision chip and the packaging substrate. Finally, set the ultrasonic frequency, cleaning power and cleaning time, and ultrasonically clean the high-precision chip and the packaging substrate according to the ultrasonic frequency, cleaning power, cleaning time and ultrasonic cleaning unit to obtain a cleaning substrate and a cleaning chip, and during the ultrasonic cleaning process, monitor the temperature in the cleaning tank of the ultrasonic cleaning unit in real time to ensure that the temperature in the cleaning tank is maintained at 35°C. Ultrasonic cleaning liquid refers to the liquid placed in the ultrasonic cleaning unit for cleaning high-precision chips and packaging substrates. Optionally, the ultrasonic cleaning liquid is deionized water. Sample bracket refers to the bracket in the ultrasonic cleaning unit for placing high-precision chips and packaging substrates. Ultrasonic frequency refers to the energy transmitted by the ultrasonic cleaning unit to the ultrasonic cleaning liquid when working. Optionally, the ultrasonic frequency is 40kHz. Cleaning power refers to the rate at which the ultrasonic cleaning unit transmits energy to the ultrasonic cleaning liquid. Optionally, the cleaning power is 100W. Cleaning time refers to the time set manually for cleaning high-precision chips and packaging substrates. Optionally, the cleaning time is 8 minutes.

[0079] S3, using the device drying unit to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip.

[0080] It can be explained that the device drying unit refers to a unit for drying the cleaned substrate and the cleaned chip, and optionally, the device drying unit is a drying box. The prepared substrate refers to a substrate obtained after the cleaned substrate is dried by the device drying unit, and the prepared chip refers to a chip obtained after the cleaned chip is dried by the device drying unit.

[0081] In detail, the device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain the prepared substrate and the prepared chip, including:

[0082] Fixing the cleaning substrate and the cleaning chip on a pre-built drying bracket, and preliminarily drying the cleaning substrate and the cleaning chip based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip;

[0083] Preheating the device drying unit to obtain a preheating temperature;

[0084] Compare the preheat temperature with the preset drying temperature;

[0085] When it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate;

[0086] The preliminary substrate and the preliminary chip are dried based on the device drying unit and the sample drying time to obtain a prepared substrate and a prepared chip.

[0087] It can be explained that the drying bracket refers to a bracket for placing and fixing the cleaning substrate and the cleaning chip, the drying speed refers to the speed for preliminary drying of the cleaning substrate and the cleaning chip, and optionally, the drying speed is 40rpm. The drying time refers to the time for preliminary drying of the cleaning substrate and the cleaning chip, and optionally, the drying time is 2min. The preliminary substrate refers to the substrate obtained after preliminary drying of the cleaning substrate, the preliminary chip refers to the chip obtained after preliminary drying of the cleaning chip, the preheating temperature refers to the air temperature inside the device drying unit after the device drying unit is preheated, and the drying temperature refers to the temperature set manually for determining the preheating temperature, and optionally, the drying temperature is 40°C. And preliminary drying of the cleaning substrate and the cleaning chip based on the preset drying speed and drying time refers to starting the centrifugal device according to the drying speed and drying time, and using the centrifugal device to centrifugally dry the cleaning substrate and the cleaning chip, and optionally, the centrifugal device is a centrifugal dryer.

[0088] In detail, the calculation of the sample drying rate includes:

[0089] Acquiring a substrate surface area of ​​the cleaning substrate and a chip surface area of ​​the cleaning chip;

[0090] Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box, and calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box:

[0091]

[0092] Where q refers to the sample drying rate, S 1 Refers to the chip surface area, A 1 Refers to the preset chip diffusion coefficient, S 2 Refers to the substrate surface area, A 2 refers to the preset substrate diffusion coefficient, W 1 Refers to the chip boundary thickness, W 2 refers to the substrate boundary thickness, sin h refers to the hyperbolic sine function, V 2Refers to the preset saturated vapor pressure, V 3 Refers to the actual vapor pressure, V 1 refers to the preset pressure constant, e refers to the natural constant, r 2 Refers to the wind speed inside the box, and r refers to the preset saturated wind speed.

[0093] It can be explained that the substrate surface area refers to the effective surface area of ​​the preliminary substrate, the effective surface area refers to the surface area exposed to the air, the chip surface area refers to the effective surface area of ​​the preliminary chip, the substrate boundary thickness refers to the boundary layer thickness of the preliminary substrate, the chip boundary thickness refers to the boundary layer thickness of the preliminary chip, the actual vapor pressure refers to the pressure of water vapor in the device drying unit, and the actual vapor pressure determines the difficulty of water vapor diffusing from the surface of the preliminary chip and the preliminary substrate into the air. The greater the actual vapor pressure, the less likely the water vapor is to evaporate, and the more difficult it is to dry the preliminary chip and the preliminary substrate. The wind speed in the box refers to the flow speed of the air in the device drying unit. The greater the wind speed in the box, the greater the drying rate of the preliminary chip and the preliminary substrate. The drying rate refers to the drying rate of the preliminary chip and the preliminary substrate. However, the closer the wind speed in the box is to the saturated wind speed, the smaller the effect of increasing the wind speed in the box on the drying rate. For example, the saturated wind speed is 3m / s, and the closer the wind speed in the box is to 3m / s, the smaller the effect of increasing the wind speed in the box on the drying rate. Saturated wind speed refers to the artificially set wind speed used to adjust the wind speed in the box. The saturated wind speed provides a limit value for the wind speed in the box. When the wind speed in the box reaches the saturated wind speed, the effect of increasing the wind speed in the box on the drying rate becomes limited. The chip diffusion coefficient refers to the parameter reflecting the chip diffusion capacity of the preliminary chip. The chip diffusion capacity refers to the ability of water to diffuse from the preliminary chip. The substrate diffusion coefficient refers to the parameter reflecting the substrate diffusion capacity of the preliminary substrate. The substrate diffusion capacity refers to the ability of water to diffuse from the preliminary substrate. The chip diffusion coefficient and the substrate diffusion coefficient are affected by the material. The preliminary chips and preliminary substrates of different materials have different chip diffusion coefficients and substrate diffusion coefficients. Saturated vapor pressure refers to the saturated vapor pressure of water in the device drying unit. The pressure constant refers to the artificially set pressure constant used to normalize V 2 -V 3 Constant, optional, the pressure constant is 101325Pa.

[0094] S4. Perform plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculate the chip surface activity based on the processed chip, and calculate the substrate surface activity based on the processed substrate.

[0095] It can be explained that plasma treatment of the prepared substrate and the prepared chip refers to plasma treatment of the cleaned substrate and the cleaned chip. Plasma treatment is a prior art and will not be described in detail here. The treated substrate refers to the substrate obtained after the prepared substrate is treated with plasma. The treated chip refers to the chip obtained after the prepared chip is treated with plasma. The chip surface activity refers to the prepared chip's ability to adsorb, wet, expand and react to the coating solvent. The chip surface activity directly affects the effect of welding with the prepared substrate. The greater the chip surface activity, the better the effect of welding the prepared chip with the prepared substrate. The coating solvent refers to the solvent coated on the connection area of ​​the prepared substrate. The connection area of ​​the prepared substrate refers to the area used for welding with the prepared chip. The substrate surface activity refers to the prepared substrate's ability to adsorb, wet, expand and react to the coating solvent. The substrate surface activity directly affects the effect of welding with the prepared chip. The greater the substrate surface activity, the better the effect of welding the prepared chip with the prepared substrate.

[0096] In detail, the step of calculating the chip surface activity based on the processing chip includes:

[0097] Get the total plasma power and plasma action area, and calculate the plasma power density based on the total plasma power and plasma action area:

[0098]

[0099] Where E is the plasma power density, P 1 Refers to the total plasma power, S 3 Refers to the plasma action area;

[0100] The chip activation energy, gas constant and plasma time of the processing chip are obtained, and the chip surface activity is calculated according to the plasma power density, chip activation energy, gas constant and plasma time.

[0101] It can be explained that the total plasma power refers to the sum of the plasma powers during the entire process of plasma treatment of the prepared chip, the plasma action area refers to the area of ​​the prepared chip treated with plasma, the plasma power density refers to the power of the plasma applied per unit area of ​​the prepared chip when the prepared chip is subjected to plasma treatment, the chip activation energy refers to the minimum energy required to break the surface molecular bonds of the prepared chip, the chip activation energy is related to the material of the prepared chip, the gas constant is 8.314 J / mol·K, and the plasma time refers to the time for which the prepared chip is subjected to plasma treatment. For example, if the prepared chip is subjected to plasma treatment from 10:00 am to 10:01 am, the plasma time is 1 min.

[0102] In detail, the calculating the chip surface activity according to the plasma power density, chip activation energy, gas constant and plasma time includes:

[0103] Obtain the regional temperature, and calculate the chip surface activity based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters and regional temperature:

[0104]

[0105] Among them, G refers to the surface activity of the chip, γ 1 refers to plasma parameters, t refers to plasma time, and f 2 Refers to the preset time parameter, D 1 refers to the chip activation energy, δ refers to the gas constant, z refers to the area temperature, and c refers to the preset temperature constant.

[0106] It can be explained that the regional temperature refers to the temperature of the surface of the prepared chip after the prepared chip is plasma treated. The unit of regional temperature is ℃. Plasma parameters refer to artificial settings used to control The parameters that affect the activity of the chip surface. The larger the plasma parameters, The greater the influence on the chip surface activity, the time parameter refers to the parameter used to control the influence of plasma time on the chip surface activity. The greater the time parameter, the greater the influence of plasma time on the chip surface activity. The temperature constant is 273.15°C. The method for calculating the substrate surface activity is the same as the method for calculating the chip surface activity mentioned above. The specific formula for calculating the substrate surface activity is as follows:

[0107]

[0108] Among them, G 2 Refers to the surface activity of the substrate, D 2 refers to the substrate activation energy, and b refers to the substrate temperature.

[0109] It can be understood that substrate activation energy refers to the minimum energy required to break the surface molecular bonds of the prepared substrate, and the substrate activation energy is related to the material of the prepared substrate. The substrate temperature refers to the temperature of the surface of the prepared substrate after the prepared substrate is subjected to plasma treatment, and the unit of the substrate temperature is ℃.

[0110] S5. Calculate the ideal activity, wherein the ideal activity includes: the ideal activity of the substrate and the ideal activity of the chip; adjust the surface activity of the substrate based on the ideal activity of the substrate to obtain the adjusted substrate activity; adjust the surface activity of the chip according to the ideal activity of the chip to obtain the adjusted chip activity; and perform solution coating on the prepared substrate according to the adjusted substrate activity, the adjusted chip activity and the preset connection area to obtain the coated substrate; place the prepared chip on the connection area on the coated substrate using a pre-built robotic arm; and perform image acquisition using the image acquisition unit to obtain a chip image.

[0111] It can be explained that the ideal activity includes the ideal activity of the substrate and the ideal activity of the chip. The ideal activity of the substrate refers to the expected level of surface activity of the prepared substrate. The ideal activity of the chip refers to the expected level of surface activity of the prepared chip. When the surface activity of the substrate reaches the ideal activity of the substrate and the surface activity of the chip reaches the ideal activity of the chip, the quality of high-precision chip welding can be ensured. Adjusting the activity of the substrate refers to the ability of the prepared substrate to adsorb, wet, expand and react to the coating solvent after adjusting the surface activity of the substrate according to the ideal activity of the substrate. Adjusting the activity of the chip refers to the ability of the prepared chip to adsorb, wet, expand and react to the coating solvent after adjusting the surface activity of the chip according to the ideal activity of the chip. Coated substrate refers to the prepared substrate obtained after solution coating the connection area of ​​the prepared substrate. Optionally, the solution used for solution coating the connection area of ​​the prepared substrate is modified acrylate glue. The robot arm refers to a device used to move the prepared chip, the chip image refers to the image obtained after the prepared chip is placed in the connection area on the coated substrate and the connection area between the prepared chip and the coated substrate is captured by an image acquisition unit, and the image acquisition unit refers to a unit that captures the image of the connection area between the prepared chip and the coated substrate.

[0112] In detail, the calculation of the ideal activity includes:

[0113] The active concentration and the standard bonding strength are obtained, and the ideal activity of the chip is calculated based on the regional temperature, the preset ideal bonding strength, the active concentration, the preset reference standard temperature and the standard bonding strength, wherein the calculation formula of the ideal activity of the chip is as follows:

[0114]

[0115] Among them, G 3 refers to the ideal activity of the chip, τ 1 Refers to the standard bonding strength, τ 2 refers to the ideal bonding strength, α refers to the preset bonding parameter, tan h refers to the hyperbolic tangent function, z 2 refers to the reference standard temperature, ln refers to the natural logarithm, j refers to the activity concentration, α 2 Refers to the preset gas parameters;

[0116] Acquiring substrate temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters, and calculating substrate ideal activity according to the substrate temperature, ideal bonding strength, activity concentration, reference standard temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters;

[0117] The ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

[0118] It can be explained that the active concentration refers to the concentration of oxygen in the plasma when the prepared substrate and the prepared chip are subjected to plasma treatment. The range of the active concentration is between 0 and 1. The standard bonding strength refers to the bonding strength of the prepared chip. The ideal bonding strength refers to the artificially set bonding strength that the prepared chip needs to achieve. The unit of the ideal bonding strength is N / cm 2 The reference standard temperature refers to the temperature set manually. The optional reference standard temperature is set to 25°C. The bonding parameters refer to the temperature used to control The parameter that affects the ideal activity of the chip. The larger the bonding parameter, The smaller the impact on the ideal activity of the chip, the smaller the gas parameter is. The gas parameter refers to the parameter used to control the impact of the active concentration on the ideal activity of the chip. The larger the gas parameter, the smaller the impact of the active concentration on the ideal activity of the chip. The calculation method of the ideal activity of the substrate is as follows:

[0119]

[0120] Among them, G 4 refers to the ideal activity of the substrate, τ 3 refers to the substrate bonding strength, l refers to the substrate bonding parameter, α 3 Refers to substrate gas parameters.

[0121] It can be explained that the substrate bonding strength refers to the bonding strength of the prepared substrate, and the substrate gas parameter refers to the parameter used to control the influence of the active concentration on the ideal activity of the substrate. The larger the substrate gas parameter, the smaller the influence of the active concentration on the ideal activity of the substrate. The substrate bonding parameter refers to the parameter used to control The parameter that affects the ideal activity of the substrate. The larger the substrate bonding parameter, The smaller the influence on the ideal activity of the substrate, the substrate gas parameter refers to the parameter used to control the influence of the active concentration on the ideal activity of the substrate. The larger the substrate gas parameter, the smaller the influence of the active concentration on the ideal activity of the substrate.

[0122] In detail, the adjusting the surface activity of the substrate based on the ideal activity of the substrate to obtain the adjusted substrate activity includes:

[0123] Setting the activity difference threshold according to the ideal activity of the substrate;

[0124] Calculate the substrate activity difference based on the ideal activity of the substrate and the surface activity of the substrate;

[0125] comparing the substrate activity difference value with the activity difference threshold;

[0126] If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal activity of the substrate, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned to the above step according to the updated substrate activity difference until the substrate activity difference is no greater than the activity difference threshold;

[0127] If the substrate activity difference is not greater than the activity difference threshold, the substrate surface activity is confirmed as the adjusted substrate activity.

[0128] It can be explained that the activity difference threshold refers to a numerical value set artificially for judging the activity difference of the substrate. When the substrate activity difference is less than or equal to the activity difference threshold, the surface activity of the substrate is considered to be equal to the ideal activity of the substrate. The substrate activity difference refers to the absolute value of the difference between the surface activity of the substrate and the ideal activity of the substrate. The first adjustment power refers to the power obtained after adjusting the total plasma power. Optionally, the first adjustment power is obtained after the total plasma power is increased by 10%. The first adjustment time refers to the time obtained after adjusting the plasma time. Optionally, the first adjustment time is obtained after the plasma time is increased by 15%. The first adjusted activity refers to the surface activity of the substrate obtained after the prepared substrate is plasma treated using the first adjustment power and the first adjustment time. The first activity difference refers to the absolute value of the difference between the first adjustment activity and the ideal activity of the substrate.

[0129] In detail, the method of placing the prepared chip on the connection area on the coated substrate by using the pre-built robotic arm and acquiring the image by using the image acquisition unit to obtain the chip image also includes:

[0130] Acquire a material template, segment the standard plate based on the preparation chip and the material template, identify the plate center according to the standard plate, and perform feature marking on the standard plate based on the plate center to obtain a marking template, wherein the plate center is the geometric center of the standard plate;

[0131] The marking template is fixed on the back of the prepared chip, and a marking coordinate system is constructed according to the marking template.

[0132] It can be explained that the material template refers to a flat rectangular template, and optionally, the material template is a rectangular piece of white paper. Dividing the standard plate based on the preparation chip refers to using the preparation chip to divide a part in the material template that is the same shape and size as the preparation chip, and this part is the standard plate. For example, the preparation chip is 3 cm long and 2 cm wide, then according to the size of the preparation chip, a part with a length of 3 cm and a width of 2 cm that is the same as the preparation chip is divided in the material template, and this part is the standard plate. Feature marking of the standard plate based on the center of the plate refers to marking the standard plate in a cross shape with the center of the plate as the center point. The marking template refers to the template obtained after the standard plate is cross-marked, and constructing the marking coordinate system according to the marking template refers to constructing the coordinate system with the center point in the marking template as the origin and the cross-shaped mark as the coordinate axis to obtain the marking coordinate system.

[0133] S6. Calculate the alignment error according to the chip image, and adjust the prepared chip according to the alignment error to obtain a correction position.

[0134] In detail, the calculating the alignment error according to the chip image includes:

[0135] Acquire the center coordinates based on the marker coordinate system, identify the region center of the connection region from the chip image, and identify the region coordinates from the marker coordinate system according to the region center, wherein the region center is the geometric center of the connection region, the center coordinates include: a central horizontal coordinate and a central vertical coordinate, and the region coordinates include: a regional horizontal coordinate and a regional vertical coordinate;

[0136] Calculate the alignment error based on the center coordinates and the area coordinates:

[0137]

[0138] Where H is the alignment error, ρ 1 refers to the central abscissa, ρ 2 refers to the horizontal coordinate of the region, θ 1 Refers to the central ordinate, θ 2 Refers to the vertical coordinate of the area.

[0139] It can be explained that the center coordinate refers to the coordinate of the origin of the marking coordinate system, the regional coordinate refers to the coordinate of the regional center of the connecting region in the marking coordinate system, the central horizontal coordinate refers to the horizontal coordinate of the central coordinate, the central vertical coordinate refers to the vertical coordinate of the central coordinate, the regional horizontal coordinate refers to the horizontal coordinate of the regional coordinate, the regional vertical coordinate refers to the vertical coordinate of the regional coordinate, and the alignment error refers to the error between the center coordinate and the regional coordinate. The correction position refers to the position of the prepared chip obtained after the center coordinate is corrected to coincide with the regional coordinate.

[0140] S7. Perform low-temperature welding on the prepared chip based on the local heating unit and the correction position to obtain a packaged workpiece, and complete high-precision chip packaging based on the packaged workpiece.

[0141] It can be explained that the local heating unit refers to a unit used for low temperature welding of the prepared chip, and optionally, the local heating unit is a micro heating plate. The packaged workpiece refers to the workpiece obtained after the prepared chip is welded.

[0142] The present invention solves the problem described in the background technology. First, a chip packaging instruction is received, and a chip packaging unit is started according to the chip packaging instruction. The chip packaging process is driven by the chip packaging instruction, thereby ensuring the automation and standardization of the chip packaging process and reducing the errors that may be caused by human intervention. The chip packaging unit integrates an ultrasonic cleaning unit, a device drying unit, an image acquisition unit and a local heating unit, thereby improving the consistency of packaging. Each functional unit integrated in the chip packaging unit can be optimized independently, thereby improving the flexibility of chip packaging and adapting to different packaging requirements. Afterwards, the packaging substrate and the high-precision chip are cleaned by the ultrasonic cleaning unit, and the contaminants on the surface of the packaging substrate and the high-precision chip are removed by ultrasonic high-frequency vibration, thereby improving the cleanliness of the connection area, avoiding packaging defects caused by contamination, and improving the quality of chip packaging. Then, the cleaning The substrate and the cleaned chip are dried, which effectively removes the residual moisture in the cleaning process and improves the reliability of packaging; further, the prepared substrate and the prepared chip are plasma treated, and the substrate surface activity of the prepared substrate and the chip surface activity of the prepared chip are calculated, and the substrate ideal activity of the prepared substrate and the chip ideal activity of the prepared chip are calculated, and the substrate surface activity and the chip surface activity are adjusted according to the substrate ideal activity and the chip ideal activity, respectively, by quantifying the substrate surface activity and the chip surface activity, the bonding ability of the prepared substrate and the prepared chip can be accurately evaluated, and the reliability of bonding can be improved. By adjusting the substrate surface activity and the chip surface activity, the quality of bonding can be ensured and the risk of peeling after packaging can be reduced; finally, the alignment error is calculated, and the prepared chip is adjusted according to the alignment error, which improves the accuracy of chip packaging and reduces the defects of chip packaging. Therefore, the present invention can improve the quality of high-precision chip packaging.

[0143] like Figure 2 , which is a functional module diagram of a high-precision chip packaging process system provided by an embodiment of the present invention.

[0144] The high-precision chip packaging process system 100 of the present invention can be installed in an electronic device. According to the functions to be implemented, the high-precision chip packaging process system 100 can include an equipment cleaning module 101, an activity calculation module 102, an image acquisition module 103 and a low-dimensional welding module 104. The module of the present invention can also be called a unit, which refers to a series of computer program segments that can be executed by an electronic device processor and can complete fixed functions, which are stored in the memory of the electronic device.

[0145] The equipment cleaning module 101 is used to obtain a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit;

[0146] Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip;

[0147] The activity calculation module 102 is used to use the device drying unit to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip;

[0148] Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate;

[0149] The image acquisition module 103 is used to calculate the ideal activity, wherein the ideal activity includes: the ideal activity of the substrate and the ideal activity of the chip, adjusting the surface activity of the substrate based on the ideal activity of the substrate to obtain the adjusted substrate activity, adjusting the surface activity of the chip according to the ideal activity of the chip to obtain the adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and the preset connection area to obtain the coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image;

[0150] The low-dimensional welding module 104 is used to calculate the alignment error according to the chip image, and adjust the prepared chip according to the alignment error to obtain the correction position;

[0151] Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

[0152] In detail, each module in the high-precision chip packaging process system 100 in the embodiment of the present invention is used in the same manner as described above. Figure 1The high-precision chip packaging method described in the invention has the same technical means and can produce the same technical effects, so it will not be repeated here.

[0153] like Figure 3 FIG. 1 is a schematic diagram of the structure of an electronic device for implementing a high-precision chip packaging method provided by an embodiment of the present invention.

[0154] The electronic device 1 may include a processor 10, a memory 11 and a bus 12, and may also include a computer program stored in the memory 11 and executable on the processor 10, such as a high-precision chip packaging method program.

[0155] The memory 11 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, mobile hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), magnetic memory, disk, optical disk, etc. The memory 11 may be an internal storage unit of the electronic device 1 in some embodiments, such as a mobile hard disk of the electronic device 1. The memory 11 may also be an external storage device of the electronic device 1 in other embodiments, such as a plug-in mobile hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (SecureDigital, SD) card, a flash card (Flash Card), etc. equipped on the electronic device 1. Further, the memory 11 also includes an internal storage unit of the electronic device 1 and an external storage device. The memory 11 can not only be used to store application software and various types of data installed in the electronic device 1, such as the code of the high-precision chip packaging method program, etc., but also be used to temporarily store data that has been output or is to be output.

[0156] The processor 10 may be composed of an integrated circuit in some embodiments, for example, a single packaged integrated circuit, or a plurality of packaged integrated circuits with the same or different functions, including one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and combinations of various control chips, etc. The processor 10 is the control core (Control Unit) of the electronic device, and uses various interfaces and lines to connect various components of the entire electronic device, and executes or executes programs or modules (such as high-precision chip packaging method programs, etc.) stored in the memory 11, and calls data stored in the memory 11 to execute various functions of the electronic device 1 and process data.

[0157] The bus 12 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus 12 may be divided into an address bus, a data bus, a control bus, etc. The bus 12 is configured to realize connection and communication between the memory 11 and at least one processor 10, etc.

[0158] Figure 3 Only an electronic device with components is shown, and those skilled in the art will understand that Figure 3 The structure shown does not constitute a limitation on the electronic device 1, and may include fewer or more components than shown in the figure, or combine certain components, or arrange the components differently.

[0159] For example, although not shown, the electronic device 1 may also include a power source (such as a battery) for supplying power to each component. Preferably, the power source may be logically connected to the at least one processor 10 through a power management device, so that the power management device can realize functions such as charging management, discharging management, and power consumption management. The power source may also include any components such as one or more DC or AC power sources, recharging devices, power failure detection circuits, power converters or inverters, power status indicators, etc. The electronic device 1 may also include a variety of sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be repeated here.

[0160] Furthermore, the electronic device 1 may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), which is generally used to establish a communication connection between the electronic device 1 and other electronic devices.

[0161] Optionally, the electronic device 1 may further include a user interface, which may be a display, an input unit (such as a keyboard), or a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode) touch device. The display may also be appropriately referred to as a display screen or a display unit, which is used to display information processed in the electronic device 1 and to display a visual user interface.

[0162] The high-precision chip packaging method program stored in the memory 11 in the electronic device 1 is a combination of multiple instructions. When running in the processor 10, it can achieve:

[0163] Acquire a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit;

[0164] Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip;

[0165] The device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip;

[0166] Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate;

[0167] Calculating an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image;

[0168] Calculate the alignment error according to the chip image, adjust the prepared chip according to the alignment error, and obtain the correction position;

[0169] Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

[0170] Specifically, the specific implementation method of the processor 10 for the above instructions can refer to Figures 1 to 3 The description of the relevant steps in the corresponding embodiments will not be repeated here.

[0171] Furthermore, if the module / unit integrated in the electronic device 1 is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, and a read-only memory (ROM).

[0172] The present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor of an electronic device, the computer program can implement:

[0173] Acquire a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit;

[0174] Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip;

[0175] The device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip;

[0176] Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate;

[0177] Calculating an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image;

[0178] Calculate the alignment error according to the chip image, adjust the prepared chip according to the alignment error, and obtain the correction position;

[0179] Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

[0180] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, systems and methods can be implemented in other ways. For example, the system embodiments described above are only illustrative, and actual implementation may have other division methods.

[0181] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0182] In addition, each functional module in each embodiment of the present invention may be integrated into one processing unit, each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional modules.

[0183] It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0184] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention.

Claims

1. A high-precision chip packaging method, characterized in that: The method comprises: Acquire a packaging substrate and a high-precision chip, receive a chip packaging instruction, and start a chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit, and a local heating unit; Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip; The device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain a prepared substrate and a prepared chip; Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate; Calculating an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image; Calculate the alignment error according to the chip image, adjust the prepared chip according to the alignment error, and obtain the correction position; Based on the local heating unit and the correction position, low-temperature welding is performed on the prepared chip to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

2. The high-precision chip packaging method according to claim 1, characterized in that: The device drying unit is used to dry the cleaned substrate and the cleaned chip to obtain the prepared substrate and the prepared chip, including: Fixing the cleaning substrate and the cleaning chip on a pre-built drying bracket, and preliminarily drying the cleaning substrate and the cleaning chip based on a preset drying speed and drying time to obtain a preliminary substrate and a preliminary chip; Preheating the device drying unit to obtain a preheating temperature; Compare the preheat temperature with the preset drying temperature; When it is confirmed that the preheating temperature is equal to the drying temperature, the sample drying rate is calculated, and the sample drying time is set according to the sample drying rate; The preliminary substrate and the preliminary chip are dried based on the device drying unit and the sample drying time to obtain a prepared substrate and a prepared chip.

3. The high-precision chip packaging method according to claim 2, characterized in that: The calculating of the sample drying rate comprises: Acquiring a substrate surface area of ​​the cleaning substrate and a chip surface area of ​​the cleaning chip; Obtain the substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box, and calculate the sample drying rate based on the substrate surface area, chip surface area, substrate boundary thickness, chip boundary thickness, actual vapor pressure and wind speed in the box: Among them, q refers to the sample drying rate, S1 refers to the chip surface area, A1 refers to the preset chip diffusion coefficient, S2 refers to the substrate surface area, A2 refers to the preset substrate diffusion coefficient, W1 refers to the chip boundary thickness, W2 refers to the substrate boundary thickness, sinh refers to the hyperbolic sine function, V2 refers to the preset saturated vapor pressure, V3 refers to the actual vapor pressure, V1 refers to the preset pressure constant, e refers to the natural constant, r2 refers to the wind speed in the box, and r refers to the preset saturated wind speed.

4. The high-precision chip packaging method according to claim 3, characterized in that: The step of calculating the chip surface activity according to the processing chip comprises: Get the total plasma power and plasma action area, and calculate the plasma power density based on the total plasma power and plasma action area: Among them, E refers to the plasma power density, P1 refers to the total plasma power, and S3 refers to the plasma action area; The chip activation energy, gas constant and plasma time of the processing chip are obtained, and the chip surface activity is calculated according to the plasma power density, chip activation energy, gas constant and plasma time.

5. The high-precision chip packaging method according to claim 4, characterized in that: The calculating the chip surface activity according to the plasma power density, chip activation energy, gas constant and plasma time comprises: Obtain the regional temperature, and calculate the chip surface activity based on the plasma power density, chip activation energy, gas constant, plasma time, preset gas constant, preset plasma parameters and regional temperature: Among them, G refers to the chip surface activity, γ1 refers to the plasma parameter, t refers to the plasma time, f2 refers to the preset time parameter, D1 refers to the chip activation energy, δ refers to the gas constant, z refers to the regional temperature, and c refers to the preset temperature constant.

6. The high-precision chip packaging method according to claim 5, characterized in that: The calculation of the ideal activity comprises: The active concentration and the standard bonding strength are obtained, and the ideal activity of the chip is calculated based on the regional temperature, the preset ideal bonding strength, the active concentration, the preset reference standard temperature and the standard bonding strength, wherein the calculation formula of the ideal activity of the chip is as follows: Among them, G3 refers to the ideal activity of the chip, τ1 refers to the standard bonding strength, τ2 refers to the ideal bonding strength, α refers to the preset bonding parameter, tanh refers to the hyperbolic tangent function, z2 refers to the reference standard temperature, ln refers to the natural logarithm, j refers to the active concentration, and α2 refers to the preset gas parameter; Acquiring substrate temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters, and calculating substrate ideal activity according to the substrate temperature, ideal bonding strength, activity concentration, reference standard temperature, substrate bonding strength, substrate gas parameters and substrate bonding parameters; The ideal activity is obtained based on the ideal activity of the chip and the ideal activity of the substrate.

7. The high-precision chip packaging method according to claim 6, characterized in that: The step of adjusting the surface activity of the substrate based on the ideal activity of the substrate to obtain the adjusted substrate activity includes: Setting the activity difference threshold according to the ideal activity of the substrate; Calculate the substrate activity difference based on the ideal activity of the substrate and the surface activity of the substrate; comparing the substrate activity difference value with the activity difference threshold; If the substrate activity difference is greater than the activity difference threshold, the total plasma power is adjusted to obtain a first adjusted power, the plasma time is adjusted to obtain a first adjusted time, the substrate surface activity is adjusted according to the first adjusted power and the first adjusted time to obtain a first adjusted activity, the first activity difference is calculated according to the first adjusted activity and the ideal activity of the substrate, the substrate activity difference is updated using the first activity difference, and the step of comparing the substrate activity difference with the activity difference threshold is returned to the above step according to the updated substrate activity difference until the substrate activity difference is no greater than the activity difference threshold; If the substrate activity difference is not greater than the activity difference threshold, the substrate surface activity is confirmed as the adjusted substrate activity.

8. The high-precision chip packaging method according to claim 7, characterized in that: The method further includes placing the prepared chip on the connection area on the coated substrate by using the pre-built mechanical arm and acquiring the image by using the image acquisition unit to obtain the chip image: Acquire a material template, segment the standard plate based on the preparation chip and the material template, identify the plate center according to the standard plate, and perform feature marking on the standard plate based on the plate center to obtain a marking template, wherein the plate center is the geometric center of the standard plate; The marking template is fixed on the back of the prepared chip, and a marking coordinate system is constructed according to the marking template.

9. The high-precision chip packaging method according to claim 8, characterized in that: The calculating the alignment error according to the chip image includes: Acquire the center coordinates based on the marker coordinate system, identify the region center of the connection region from the chip image, and identify the region coordinates from the marker coordinate system according to the region center, wherein the region center is the geometric center of the connection region, the center coordinates include: a central horizontal coordinate and a central vertical coordinate, and the region coordinates include: a regional horizontal coordinate and a regional vertical coordinate; Calculate the alignment error based on the center coordinates and the area coordinates: Among them, H refers to the alignment error, ρ1 refers to the central horizontal coordinate, ρ2 refers to the regional horizontal coordinate, θ1 refers to the central vertical coordinate, and θ2 refers to the regional vertical coordinate.

10. A high-precision chip packaging process system, characterized in that: The system comprises: The equipment cleaning module is used to obtain the packaging substrate and the high-precision chip, receive the chip packaging instruction, and start the chip packaging unit based on the chip packaging instruction, wherein the chip packaging unit includes: an ultrasonic cleaning unit, a device drying unit, an image acquisition unit and a local heating unit; Using the ultrasonic cleaning unit to clean the packaging substrate and the high-precision chip to obtain a cleaned substrate and a cleaned chip; An activity calculation module, used for drying the cleaned substrate and the cleaned chip by using the device drying unit to obtain a prepared substrate and a prepared chip; Performing plasma treatment on the prepared substrate and the prepared chip to obtain a processed substrate and a processed chip, calculating the chip surface activity according to the processed chip, and calculating the substrate surface activity according to the processed substrate; An image acquisition module is used to calculate an ideal activity, wherein the ideal activity includes: an ideal activity of a substrate and an ideal activity of a chip, adjusting the surface activity of a substrate based on the ideal activity of the substrate to obtain an adjusted substrate activity, adjusting the surface activity of a chip according to the ideal activity of the chip to obtain an adjusted chip activity, and coating the prepared substrate with a solution according to the adjusted substrate activity, the adjusted chip activity and a preset connection area to obtain a coated substrate, placing the prepared chip on the connection area on the coated substrate using a pre-built robotic arm, and performing image acquisition using the image acquisition unit to obtain a chip image; The low-dimensional welding module is used to calculate the alignment error based on the chip image, adjust the prepared chip according to the alignment error, and obtain the corrected position; Based on the local heating unit and the correction position, the prepared chip is low-temperature welded to obtain a packaged workpiece, and high-precision chip packaging is completed based on the packaged workpiece.

Citation Information

Patent Citations

  • Method for realizing packaging of radio frequency bare chip of microwave hybrid integrated circuit

    CN108807198A

  • Method, device and equipment for detecting integrity of liquid film on surface of substrate and storage medium

    CN118348025A

  • Pin lossless welding device for chip processing and welding method of pin lossless welding device

    CN119794487A

  • Automatic packaging test method and system for micro-fluidic chip

    CN119803301A

  • Apparatus for bonding semiconductor chips

    US20160079199A1