Coding method, decoding method and device
By adopting longer code lengths and applicable check matrix in LDPC codes, the problem of insufficient LDPC code decoding performance in the prior art is solved, and higher transmission reliability and decoding performance are achieved, while reducing the implementation complexity.
Patent Information
- Application Number
- CN202311652604.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-04
- Publication Date
- 2025-06-06
AI Technical Summary
In the prior art, the decoding performance of low-density parity check (LDPC) code has not yet been optimized, especially in the scenario of large bandwidth wireless local area network (WLAN), how to further improve the decoding performance of LDPC code is an urgent problem.
By adopting longer code lengths, such as multiples of 1944, combined with the applicable check matrix, the transmission reliability and decoding performance of the system are improved. The specific method includes obtaining an information bit sequence, LDPC encoding and decoding based on the check matrix, ensuring that the encoded sequence length is a multiple of 1944, and thus improving the decoding performance.
By supporting longer code lengths, the decoding performance of LDPC codes is improved, the transmission reliability of the system is enhanced, and the complexity of the compilation and decoding implementation is reduced.
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Figure CN120110592A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technology, and in particular to an encoding method, a decoding method and a device. Background Art
[0002] The Institute of Electrical and Electronics Engineers (IEEE) 802.11n / ac / ax / be and other wireless local area network (WLAN) transmission standards mainly focus on improving user experience in large bandwidth (such as 60 GHz) scenarios, including improving average user throughput and energy efficiency of battery-powered devices. Large bandwidth scenarios need to support high-speed and reliable transmission of data, video and other services on limited frequency and power resources, so highly reliable and efficient channel coding solutions are required.
[0003] In the field of channel coding, concatenated codes (such as Turbo codes) and low-density parity-check (LDPC) codes are the two most mature and widely used channel coding methods, both of which have performance close to the Shannon limit. Compared with concatenated codes, LDPC codes have the following advantages: good bit error performance can be obtained without deep interleaving; better frame error rate performance; greatly reduced error floor; decoding is not based on grids; supports parallel decoding, and has a small decoding delay. Therefore, LDPC codes have become the standard channel coding scheme for low-frequency short-range WLAN communication systems such as IEEE802.11n / ac / ax.
[0004] How to further improve the decoding performance of LDPC codes needs to be solved urgently. Summary of the invention
[0005] The embodiments of the present application provide an encoding method, a decoding method and a device, which can support LDPC codes with longer code lengths and improve decoding performance.
[0006] In a first aspect, an embodiment of the present application provides an encoding method, which is applied to a first communication device, wherein the first communication device includes a Wi-Fi device, or a chip or a functional module placed in the Wi-Fi device, and the method includes:
[0007] Obtain an information bit sequence; perform low-density parity check (LDPC) encoding on the information bit sequence based on a check matrix to obtain an encoded sequence, wherein the length of the encoded sequence is N 1 , the N 1is n times of 1944, where n is an integer greater than or equal to 2; and outputs the encoded sequence.
[0008] In the embodiment of the present application, the check matrix can be applied to an information bit sequence whose code length is n times of 1944, where n is an integer greater than or equal to 2, thereby improving the transmission reliability of the system and improving the decoding performance. Generally speaking, the longer the applicable code length, the better the reliability of the check matrix and the better the decoding performance.
[0009] In a second aspect, an embodiment of the present application provides a decoding method, which is applied to a second communication device, where the second communication device includes a Wi-Fi device, or a chip or a functional module placed in the Wi-Fi device, and the method includes:
[0010] Get the information to be decoded, the length of which is N 1 , the N 1 is n times of 1944, where n is an integer greater than or equal to 2; performing low-density parity check (LDPC) decoding on the information to be decoded based on the check matrix to obtain an information bit sequence.
[0011] In combination with the first aspect or the second aspect, in a possible implementation manner, the check matrix is determined based on a reference check matrix, and the code length N corresponding to the reference check matrix is 0 is less than or equal to 1944, and the code rate corresponding to the reference check matrix is the same as the code rate corresponding to the check matrix.
[0012] In combination with the first aspect or the second aspect, in a possible implementation manner, it is characterized in that Z 1 (i, j) and Z 0 (i, j) satisfies the modular operation relationship; where Z 1 (i, j) represents the element in the i-th row and j-th column of the matrix prototype of the check matrix corresponding to the information bit, Z 0 (i, j) represents the element in the i-th row and j-th column in the matrix prototype of the reference check matrix corresponding to the information bit.
[0013] In combination with the first aspect or the second aspect, in a possible implementation manner, Z 1 (i, j) = Z 0 (i, j) or Z 1 (i, j) = Z 0 (i, j)+Z 0 , the Z 0 represents the expansion factor of the reference check matrix, Z 0 =M 0 / twenty four.
[0014] In combination with the first aspect or the second aspect, in a possible implementation manner, a matrix corresponding to the check bits in the matrix prototype of the check matrix is the same as a matrix corresponding to the check bits in the matrix prototype of the reference check matrix.
[0015] In combination with the first aspect or the second aspect, in a possible implementation manner, N 1 =3888.
[0016] In combination with the first aspect or the second aspect, in a possible implementation manner, a code rate corresponding to the check matrix includes any one of the following: 1 / 2, 2 / 3, 3 / 4 or 5 / 6.
[0017] In a third aspect, an embodiment of the present application provides a first communication device, configured to execute the method in the first aspect or any possible implementation. The first communication device includes a module for executing the method in the first aspect or any possible implementation.
[0018] In a fourth aspect, an embodiment of the present application provides a second communication device, configured to execute the method in the second aspect or any possible implementation. The second communication device includes a module for executing the method in the second aspect or any possible implementation.
[0019] In a fifth aspect, an embodiment of the present application provides a first communication device, the first communication device comprising a processor, configured to execute the method described in the first aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the first aspect or any possible implementation is executed.
[0020] In a possible implementation manner, the memory is located outside the first communication device.
[0021] In a possible implementation manner, the memory is located in the first communication device.
[0022] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the first communication device may be a chip.
[0023] In a possible implementation manner, the first communication device further includes a transceiver, where the transceiver is used to receive information or send information.
[0024] In a sixth aspect, an embodiment of the present application provides a second communication device, the second communication device comprising a processor, configured to execute the method described in the second aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the second aspect or any possible implementation is executed.
[0025] In a possible implementation manner, the memory is located outside the second communication device.
[0026] In a possible implementation manner, the memory is located in the second communication device.
[0027] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the second communication device may be a chip.
[0028] In a possible implementation manner, the second communication device further includes a transceiver, and the transceiver is used to receive information or send information.
[0029] In the seventh aspect, an embodiment of the present application provides a first communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the first aspect or any possible implementation method.
[0030] In an eighth aspect, an embodiment of the present application provides a second communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the second aspect or any possible implementation method.
[0031] In a ninth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used to store a computer program. When the computer-readable storage medium is run on a computer, the method shown in any one of the first to second aspects or any possible implementation method is executed.
[0032] In a tenth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer, enables the method shown in any one of the first to second aspects or any possible implementation method to be executed.
[0033] In an eleventh aspect, an embodiment of the present application provides a computer program. When the computer program is run on a computer, the method shown in any one of the first to second aspects or any possible implementation is executed.
[0034] In the twelfth aspect, an embodiment of the present application provides a communication system, which includes a first communication device and / or a second communication device, the first communication device is used to execute the method shown in the above-mentioned first aspect or any possible implementation of the first aspect, and the second communication device is used to execute the method shown in the above-mentioned second aspect or any possible implementation of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Figure 1a is a schematic diagram of a matrix prototype of a reference check matrix provided in an embodiment of the present application;
[0036] Figure 1b is a schematic diagram of a CPM provided in an embodiment of the present application;
[0037] Figure 2a It is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0038] Figure 2b It is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0039] Figure 2c It is a schematic diagram of the architecture of a communication system provided by an embodiment of the present application;
[0040] Figure 3 It is a flowchart of an encoding method and a decoding method provided in an embodiment of the present application;
[0041] Figure 4 It is a partial schematic diagram of a shortening operation in an LDPC encoding provided in an embodiment of the present application;
[0042] Figure 5a This is a schematic diagram of two options provided by an embodiment of the present application when a modular operation relationship is satisfied;
[0043] Figure 5b It is a tree expansion schematic diagram provided in an embodiment of the present application;
[0044] Figure 6a is a schematic diagram of a check matrix provided in an embodiment of the present application;
[0045] Figure 6b is a schematic diagram of a factor graph provided in an embodiment of the present application;
[0046] Figure 7a It is a schematic diagram of a simulation result provided in an embodiment of the present application;
[0047] Figure 7b It is a schematic diagram of a simulation result provided in an embodiment of the present application;
[0048] Figure 7c It is a schematic diagram of a simulation result provided in an embodiment of the present application;
[0049] Figure 7d It is a schematic diagram of a simulation result provided in an embodiment of the present application;
[0050] Figure 8 is a structural diagram of a communication device provided in an embodiment of the present application;
[0051] Fig. 9 is a structural diagram of a communication device provided in an embodiment of the present application;
[0052] Fig.10 It is a structural diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0053] To facilitate understanding of the technical solution of the present application, the present application will be further described below in conjunction with the accompanying drawings.
[0054] The terms "first" and "second" in the specification, claims and drawings of this application are only used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.
[0055] The "embodiment" mentioned in this article means that the specific features, structures or characteristics described in conjunction with the embodiment can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It can be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0056] In the present application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three and more than three, and "and / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. "Or" means that two relationships may exist, such as only A exists, only B exists; when A and B are not mutually exclusive, it can also mean that there are three relationships, such as only A exists, only B exists, and A and B exist at the same time. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c".
[0057] The LDPC code used in the IEEE802.11ac / ax standard is a quasi-cyclic (QC) LDPC (QC-LDPC) code. QC-LDPC code is a widely used structured LDPC code. Due to the unique structure of its check matrix, it can be encoded using a simple feedback shift register, which can better solve the coding complexity problem of LDPC codes.
[0058] At present, the standard adopts 12 LDPC code check matrices, of which there are three code lengths N: N=648, or N=1296, or N=1944, and each code length can support 4 different coding rates: 1 / 2, 2 / 3, 3 / 4, and 5 / 6. The matrix prototype of the check matrix for each code length and code rate is different, and the check bit part (the matrix corresponding to the check bit shown below, or the check matrix) in the matrix prototypes of the 12 check matrices with different code lengths and code rates has the same structure. Exemplarily, the choice of code rate can be determined by the modulation and coding scheme (MCS) selected by the transmission system according to link adaptation. Therefore, the communication device in the traditional WLAN can select a check matrix from the 12 check matrices according to the given code length and code rate. The above having the same structure can be understood as Figure 1a The elements of the first row and first column of the check bit part in the matrix prototypes of different check matrices are all 1, and the elements of the first column of the last row are all 1.
[0059] Figure 1a Shown are matrix prototypes of LDPC code check matrices with code length N=1944 and different code rates. Figure 1a The “-” in represents the all-zero matrix of Z*Z. Figure 1a The "0" in represents the unit matrix of Z*Z. Figure 1a The non-zero elements in represent the circulant permutation matrix (CPM) of the Z*Z unit matrix. iIndicates that i represents the cyclic shift value or the number of bits of the unit matrix cyclically shifted to the right or the CPM coefficient or the element greater than or equal to 0 in the matrix prototype of the check matrix, etc. The specific name of i is not limited in the embodiments of the present application. i is a non-negative integer, such as 0≤i≤Z-1. When i=0, CPM can be understood as a unit matrix of Z*Z, or a CPM with a cyclic shift value of 0. Exemplarily, Z=N / 24. The aforementioned "24" may be the same as the number of columns of the matrix prototype of the check matrix in the IEEE802.11ac / ax standard. For IEEE 801.11ac / ax, regardless of the code length N=648, N=1296, or N=1944, the number of columns of the matrix prototype of the check matrix is 24 columns.
[0060] For example, Figure 1a Taking the element "1" (i.e., i=1) in as an example, the element 1 can be expanded to a CPM of 81*81 (1944 / 24=81). The CPM can be expanded by cyclically shifting the unit matrix right by 1 bit, as shown below:
[0061]
[0062] For example, take 4*4 CPM as an example. Figure 1b The CPM when i=0, the CPM when i=1, the CPM when i=2, and the CPM when i=3 are respectively shown. Figure 1b The CPM shown is only an example. The CPM of other Z*Z unit matrices in the embodiments of the present application can refer to the following. Figure 1a or Figure 1b The principle shown in the figure gives the final P i , I will not go into details here.
[0063] Since LDPC codes can improve the transmission reliability of wireless transmission systems, they have been widely used in WLAN standards. In order to further improve the data transmission reliability of Wi-Fi systems, current standards or next-generation standards may consider LDPC codes with longer code lengths, so that the encoding module can obtain stronger error control performance and improve the decoding performance of the decoding module.
[0064] In view of this, the embodiments of the present application provide a coding method, a decoding method and a device, which involves a new LDPC code, which can support a longer code length. The check matrix provided in the embodiments of the present application can be applicable to a longer code length, such as the check matrix can be applicable to a code length of n times 1944, where n is an integer greater than or equal to 2, and the check matrix can also improve the decoding performance. Exemplarily, considering the implementation complexity of the new Wi-Fi system, the new LDPC long code provided in the embodiments of the present application has little modification to the LDPC encoding module and LDPC decoding module in the existing Wi-Fi, and can reduce the implementation complexity of the LDPC encoding and decoding.
[0065] In the embodiments of the present application, the various matrices shown below can be called prototypes of check matrices, or matrix prototypes of check matrices (matrix prototypes of parity-matrices), or matrix prototypes for codeword block length N (matrix prototypes for codeword block length N) or mother matrices, etc. The specific names of the matrices involved in the embodiments of the present application are not limited in the embodiments of the present application. Generally speaking, a matrix including elements 0 and 1 after expansion based on Z and cyclic shift value i is called a check matrix, so the various matrices shown below can also be called matrices before CPM expansion, etc. The various matrices shown in Examples 1 to 12 below can be called matrix prototypes of check matrices, and the matrices after expansion based on the elements in the various matrices shown in Examples 1 to 12 can be called check matrices. For the specific method of expansion, please refer to the above-mentioned about Figure 1a For the related description of the expanded check matrix, the embodiments of the present application will not list the specific contents of the expanded check matrix one by one.
[0066] The code length in the embodiment of the present application may also be referred to as a codeword block length (acodewordblocklength), etc., and the specific name of the code length is not limited in the embodiment of the present application. Z in the embodiment of the present application may be referred to as a subblock size (subblocksize) or an expansion factor or a lift factor, etc., and the specific name of Z is not limited in the embodiment of the present application. For ease of description, the following description is made by taking Z as an expansion factor as an example.
[0067] Generally speaking, Z=N / 24. However, as the standard progresses, the subsequent method of calculating Z may also change, and the embodiments of the present application do not limit this. For ease of understanding, different letter parameters are used in the embodiments of the present application to represent different meanings, such as N represents the code length, Z represents the expansion factor, R represents the code rate, K represents the number of information bits, and E represents the number of check bits. However, the various letter parameters shown in the embodiments of the present application are only examples and should not be understood as limitations on the embodiments of the present application.
[0068] The following introduces the communication system involved in the embodiments of the present application.
[0069] The technical solution provided in the embodiment of the present application can be applied to wireless local area network (WLAN) systems, such as Wi-Fi, etc. The method provided in the embodiment of the present application can be applied to the IEEE 802.11 series of protocols of the Institute of Electrical and Electronics Engineers, such as the 802.11be protocol, the 802.11bn protocol or the next generation of the 802.11bn protocol, etc., which are not listed one by one. The technical solution provided in the embodiment of the present application can also be applied to wireless personal area networks (WPAN) based on millimeter wave (MMW) and ultra wideband (UWB) technology, etc. The method provided in the embodiment of the present application can be applied to the IEEE 802.15 series of protocols, such as the 802.15.4a protocol, the 802.15.4z protocol or the 802.15.4ab protocol, or a future generation of UWB WPAN protocols, etc., which are not listed one by one. The technical solution provided in the embodiment of the present application can also be applied to the following communication systems, for example, it can be an Internet of Things (IoT) system, a vehicle-to-everything (V2X, X can represent anything), a device-to-device (D2D), a narrowband Internet of Things (NB-IoT) system, a long term evolution (LTE) system, a fifth generation (5G) communication system, and new communication systems that will emerge in the future development of communication. For example, the V2X may include: vehicle to vehicle (V2V), vehicle to infrastructure (V2I), vehicle to pedestrian (V2P) or vehicle to network (V2N) communication, etc.
[0070] WLAN systems can provide high-speed and low-latency transmission. With the continuous evolution of WLAN application scenarios, WLAN systems will be applied to more scenarios or industries, such as the Internet of Things industry, the Internet of Vehicles industry or the banking industry, corporate offices, sports stadiums and exhibition halls, concert halls, hotel rooms, dormitories, wards, classrooms, supermarkets, squares, streets, production workshops and warehouses, etc. Of course, devices that support WLAN communication or perception (such as access points or sites) can be sensor nodes in smart cities (such as smart water meters, smart electricity meters, smart air detection nodes), smart devices in smart homes (such as smart cameras, projectors, display screens, televisions, speakers, refrigerators, washing machines, etc.), nodes in the Internet of Things, entertainment terminals (such as wearable devices such as augmented reality (AR) and virtual reality (VR)), smart devices in smart offices (such as printers, projectors, loudspeakers, speakers, etc.), Internet of Vehicles devices in the Internet of Vehicles, infrastructure in daily life scenarios (such as vending machines, self-service navigation desks in supermarkets, self-service cash registers, self-service ordering machines, etc.), and equipment in large sports and music venues.
[0071] Although the embodiments of the present application mainly take WLAN as an example, especially the network applied to the IEEE 802.11 series of standards. The embodiments of the present application can also support Wi-Fi 8, which can also be called ultra-high reliability (UHR) or ultra-high reliability and throughput (UHRT), etc., which are not listed here one by one. The various aspects involved in the embodiments of the present application can be extended to other networks that adopt various standards or protocols. For example, Bluetooth, high performance radio LAN (HIPERLAN) (a wireless standard similar to the IEEE802.11 standard) and wide area network (WAN) or other networks now known or developed later.
[0072] In a possible implementation, the method provided in the embodiment of the present application may be implemented by a communication device in a communication system. For example, the communication device may be an access point (AP) or a station (STA).
[0073] AP is a device with wireless communication function, supports communication or perception using WLAN protocol, has the function of communicating or perceiving with other devices in WLAN network (such as non-access point station (non-AP STA) or other access points), and of course, can also have the function of communicating or perceiving with other devices. Alternatively, the access point is equivalent to a bridge connecting the wired network and the wireless network, and its main function is to connect various wireless network clients together, and then connect the wireless network to the Ethernet. In the WLAN system, the access point can be called an access point station (AP STA). The device with wireless communication function can be a complete device, or it can be a chip, processing system or functional module installed in the complete device. The device installed with these chips or processing systems or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip or processing system or functional module. The AP in the embodiments of the present application is a device that provides services for non-AP STA, and can support 802.11 series protocols or subsequent protocols. For example, an access point can be an access point for a terminal (such as a mobile phone) to enter a wired (or wireless) network. It is mainly deployed in homes, buildings, and parks, with a typical coverage radius of tens to hundreds of meters. Of course, it can also be deployed outdoors. For another example, an AP can be a communication server, router, switch, bridge, or other communication entity; an AP can include various forms of macro base stations, micro base stations, relay stations, etc. Of course, an AP can also be a chip or processing system or module in the above-mentioned various forms of equipment, so as to realize the methods and functions of the embodiments of the present application.
[0074] STA is a device with wireless communication function, supports communication or perception using WLAN protocol, and has the ability to communicate or perceive with other non-AP STA or access points in the WLAN network. In the WLAN system, the station can be called a non-access point station (non-AP STA). For example, STA is any user communication device that allows the user to communicate or perceive with the AP and then communicate with the WLAN. The device with wireless communication function can be a complete device, or a chip or processing system or functional module installed in the complete device. The device installed with these chips or processing systems or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip or processing system or functional module. For example, STA can be a wireless communication chip, a wireless sensor or a wireless communication terminal, etc., and can also be called a user. For another example, STA can be a mobile phone supporting Wi-Fi communication function, a tablet supporting Wi-Fi communication function, a set-top box supporting Wi-Fi communication function, a smart TV supporting Wi-Fi communication function, a smart wearable device supporting Wi-Fi communication function, a vehicle-mounted communication device supporting Wi-Fi communication function, and a computer supporting Wi-Fi communication function. Of course, STA can also be a chip or processing system or module in the above-mentioned various forms of devices, so as to implement the methods and functions of the embodiments of the present application.
[0075] Exemplarily, the communication system to which the method provided in the embodiment of the present application can be applied may include access points and stations. For example, the embodiment of the present application may be applicable to the scenario of communication or perception between AP and STA, between AP and AP, or between STA and STA in WLAN, and the embodiment of the present application is not limited to this. Optionally, the AP may communicate or perceive with a single STA, or the AP may communicate or perceive with multiple STAs at the same time. Specifically, the communication or perception between the AP and multiple STAs can be divided into downlink transmission in which the AP sends signals to multiple STAs at the same time, and uplink transmission in which multiple STAs send signals to the AP. Among them, the WLAN communication protocol can be supported between the AP and the STA, between the AP and the AP, and between the STA and the STA. The communication protocol may include the IEEE802.11 series of protocols, such as the 802.11bn protocol, and of course, it is also applicable to protocols after 802.11bn.
[0076] Figure 2a 1 is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application. The communication system may include one or more APs and one or more STAs. Figure 2aTwo access points such as AP1 and AP2 and three stations such as STA1, STA2 and STA3 are shown in FIG. As an example, the method provided in the embodiment of the present application can be applied to data communication or perception between an AP and one or more STAs, such as Figure 2a The communication between AP1 and STA1 shown in FIG. Figure 2b The communication between AP and STA shown in Figure 2a The communication between AP1 and STA1 and STA2 is shown in FIG. Figure 2c As another example, the method provided in the embodiment of the present application can be applied to communication between APs, such as Figure 2a As another example, the method provided in the embodiment of the present application can be applied to communication between STAs, such as Figure 2a The communication between STA2 and STA3 is shown.
[0077] Figure 2a to Figure 2c The STA is a mobile phone and the AP is a router as an example, which does not limit the types of AP and STA in the embodiments of the present application. Figure 2a to Figure 2c The number of APs and STAs shown are only examples. In a specific implementation, the number of APs or STAs may be more or less, and the embodiments of the present application are not limited to this.
[0078] From the perspective of sending signals and receiving signals, the first communication device shown below can be understood as a communication device that sends signals, and the second communication device can be understood as a communication device that receives signals. Alternatively, the first communication device can also be referred to as a transmitting end, and the second communication device can also be referred to as a receiving end. In the embodiment of the present application, the signal can be a signal obtained after processing the encoded sequence. From the perspective of different devices, as an example, the first communication device and the second communication device can be Wi-Fi chips or functional modules or processing systems provided in different Wi-Fi devices. As another example, the first communication device can be an AP, and the second communication device can be a non-AP STA. As another example, the first communication device and the second communication device can both be non-AP STAs or both APs. As another example, the first communication device can be a non-AP STA, and the second communication device can be an AP. As another example, at least one of the first communication device and the second communication device can be a multi-link device (MLD), etc., and the embodiments of the present application will not be listed one by one. Exemplarily, a multi-link device (MLD) means that the device has multiple sites (such as AP or non-AP STA) at the same time, which work on different frequency bands or channels respectively. The multi-link device includes multiple subordinate sites, which can be physical sites or logical sites, and each site can work on a link or a frequency band or a channel, etc. The above-mentioned subordinate sites can be AP or non-AP STA. A multi-link device (such as non-AP MLD or AP MLD) can be a communication device with wireless communication function. The communication device can be a complete device, or a chip or processing system or module installed in the complete device, etc. The devices installed with these chips or processing systems or modules can implement the methods and functions of the embodiments of the present application under the control of these chips or processing systems or modules. The multi-link device can implement wireless communication in accordance with the 802.11 series of protocols, thereby realizing communication with other devices. The other devices shown here may be multi-link devices or may not be multi-link devices. The frequency bands in which the multi-link device operates may include but are not limited to: sub 1GHz, 2.4GHz, 5GHz, 6GHz, etc., which are not listed here one by one.
[0079] The embodiment of the present application describes the method provided by the embodiment of the present application based on the first communication device and the second communication device. However, during the process of transmitting signals, the first communication device and the second communication device can also forward the signal through other devices, such as forwarding the signal between the first communication device and the second communication device through a forwarding device. The embodiment of the present application does not limit other devices other than the first communication device and the second communication device.
[0080] The following describes the method involved in the embodiments of the present application.
[0081] Figure 3 1 is a flow chart of an encoding method and a decoding method provided in an embodiment of the present application. The description of the first communication device and the second communication device etc. can be referred to above and will not be described in detail here. Figure 3 As shown, the method includes:
[0082] 301. A first communication device obtains an information bit sequence.
[0083] The information bit sequence may be a bit sequence containing information. For example, the length of the information bit sequence is N 2 , or the number of bits in the information bit sequence is N 2 . N 2 is a positive integer. 2 The bits may include K information bits or K data bits or K payload bits. K is a positive integer. 2 can be an integer greater than or equal to K. For example, when N 2 When it is greater than K, the information bit sequence may also include (N 2 -K) 0, for the relevant description of the "0" shown here, please refer to the following Figure 4 The description of the shortening operation is not described in detail here.
[0084] The aforementioned N 2 The value of may be related to the code length and the code rate. For example, in step 302 below, the length of the encoded sequence is N 1 , then N 2 =N 1 *R, R is the coding rate of the information bit sequence. 1 It can also be called the code length corresponding to the check matrix.
[0085] In one possible implementation, Figure 3 The method shown may also include:
[0086] The first communication device obtains the code length N 1 .
[0087] As an example, N 1 It can be m times of 1296, where m is an integer greater than or equal to 2. 1 =1296*2=2592. 1 =1296*3=3888, etc., which will not be listed here one by one.
[0088] As another example, N 1It can be n times of 1944, where n is an integer greater than or equal to 2. 1 =1944*2=3888, or, N 1 =1944*3=5832, etc., which will not be listed here one by one.
[0089] In one possible implementation, Figure 3 The method shown may also include:
[0090] The first communication device obtains a code rate R.
[0091] In the WLAN system, different code lengths and code rates may correspond to different check matrices. Therefore, before the first communication device performs LDPC coding, the code rate R may be obtained. After obtaining the code rate R, the first communication device may calculate the code rate R based on the code rate R and the code length N. 1 Select a check matrix. The code rate R can be determined based on the MCS selected by link adaptiveness. For example, the code rate R can be determined based on current channel information. The specific method for determining the code rate R is not limited in the embodiments of the present application. As an example, the MCS can be issued by an AP. As another example, the MCS can be determined by a first communication device, etc. For example, the first communication device sends an MCS to a second communication device, and the second communication device receives the MCS and obtains the code rate R based on the MCS. For another example, the second communication device sends an MCS to the first communication device, and the first communication device receives the MCS and obtains the code rate R based on the MCS. The specific interaction process of the MCS is not limited in the embodiments of the present application.
[0092] Exemplarily, R can be any of the following: 1 / 2, 2 / 3, 3 / 4, 5 / 6. Of course, with the development of standards, the value of R can also have other values, which is not limited in the embodiments of the present application.
[0093] The above-mentioned coded sequence may include K information bits and E check bits. Alternatively, the coded sequence may be composed of an information bit sequence and a check bit sequence, and the length of the information bit sequence may be N. 2 , the length of the check bit sequence can be E. N 1 =N 2 +E. The value of E is related to N 1 Related to R. For example, N 1 =3888, R = 1 / 2, then E = 1944. 1 =3888, R = 2 / 3, then E = 3888*1 / 3 = 1296. 1 =3888, R = 3 / 4, then E = 3888*1 / 4 = 972. 1 =3888, R=5 / 6, then E=3888*1 / 6=648.
[0094] 302. The first communication device performs LDPC encoding on the information bit sequence based on the check matrix to obtain an encoded sequence. The length of the encoded sequence is N 1 , such as N 1 It is n times 1944, where n is an integer greater than or equal to 2.
[0095] The following introduces the matrix prototype of the check matrix involved in the embodiment of the present application.
[0096] The "-1" in the matrix prototype of the check matrix shown below represents Z 1 *Z 1 A full zero matrix, “0” represents Z 1 *Z 1 The unit matrix of 1 *Z 1 The CPM of the unit matrix. The "-1" in the check matrix shown below can also be replaced by "-". For the description of each parameter and the description of CPM, please refer to the above text and will not be described in detail here. The "1" in Example 1, the "2" in Example 2, or the "3" in Example 3 below is to distinguish different examples and facilitate subsequent references.
[0097] As an example 1, the matrix prototype of the check matrix may be the following matrix:
[0098]
[0099] As another example 2, the matrix prototype of the check matrix may be the following matrix:
[0100]
[0101] As yet another example 3, the matrix prototype of the check matrix may be the following matrix:
[0102]
[0103] The matrix prototype of the check matrix shown in Examples 1 to 3 above corresponds to R equal to 1 / 2. At the same time, the R corresponding to the check matrix is also equal to 1 / 2. For example, the matrix prototype of the check matrix shown in Examples 1 to 3 above corresponds to N 1 can be equal to 3888. At the same time, the N corresponding to the check matrix 1 It also equals 3888.
[0104] For example, the expansion factor Z 1 =N 1 / 24=3888 / 24=162. The element i in Examples 1 to 3 can be expanded to a CPM, which is obtained by cyclically shifting the unit matrix to the right by i positions. For example, the element 0 in Examples 1 to 3 can be expanded to a 162*162 unit matrix, and the element i greater than 0 (such as i greater than 0) can be based on the unit matrix cyclically shifted to the right by i positions to obtain a 162*162 CPM. The matrix prototypes shown in Examples 1 to 3 include 12 rows and 24 columns, so based on the expansion factor Z 1 The expanded check matrix may include 12*162 rows and 24*162 columns. 1 The relevant descriptions also apply to Examples 4 to 12 below and will not be repeated below.
[0105] For ease of description, the first X columns in the matrix prototype of the check matrix are referred to as the square matrix corresponding to the information bit, or the information square matrix, or the information bit part of the LDPC codeword, etc., and the last Y columns in the matrix prototype of the check matrix are referred to as the matrix corresponding to the check bit, or the check square matrix, or the check bit part of the LDPC codeword, etc. X and Y are both positive integers. Exemplarily, X = 24*R. Y = 24*(1-R). For the matrix prototypes shown in Examples 1 to 3, X = 12, Y = 12.
[0106] As an example, K=3888*1 / 2=1944, that is, when the information bit sequence includes 1944 information bits, the encoded sequence may include 1944 information bits and 1944 check bits.
[0107] As another example, when K is less than 1944, that is, the number of information bits included in the information bit sequence is less than 1944, the encoded sequence may include K information bits and 1944 check bits. Although the encoded sequence includes K information bits and 1944 check bits, the length of the encoded sequence is N. 1 As mentioned above Figure 4 As shown, since the number of information bits is less than 1944, the first communication device can obtain the information bit sequence by filling a certain number of 0s before performing LDPC encoding, and then delete these 0s after completing LDPC encoding. Exemplarily, the number of 0s can be equal to 1944-K. For the relevant description of the shortening operation, please refer to the above Figure 4 , which will not be described in detail here.
[0108] As another example, when the number of information bits to be sent obtained before the first communication device obtains the information bit sequence is greater than 1944, the first communication device may perform codeword processing on the information bits before performing LDPC encoding, such as obtaining multiple codewords (or blocks or segments, etc.) after codeword processing, and the number of information bits carried by each codeword may be less than or equal to 1944. For the specific description of codeword processing, reference may be made to relevant standards or protocols, etc., and the embodiments of the present application are not limited thereto. Of course, after the first communication device performs codeword processing, it may also be combined with a shortening operation, etc., and the combination of the shortening operation and the codeword operation will not be described in detail here.
[0109] The relevant descriptions about different values of K here are also applicable to Examples 4 to 12 below, and will not be repeated below.
[0110] As an example 4, the matrix prototype of the check matrix may be the following matrix:
[0111]
[0112] As an example 5, the matrix prototype of the check matrix may be the following matrix:
[0113]
[0114] As an example 6, the matrix prototype of the check matrix may be the following matrix:
[0115]
[0116] The matrix prototype of the check matrix shown in Examples 4 to 6 above corresponds to R equal to 2 / 3. At the same time, the R corresponding to the check matrix is also equal to 2 / 3. Exemplarily, the matrix prototype of the check matrix shown in Examples 4 to 6 above corresponds to N 1 can be equal to 3888. At the same time, the N corresponding to the check matrix 1 It also equals 3888.
[0117] About the expansion factor Z 1 For related instructions, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.
[0118] For Examples 4 to 6, X=24*2 / 3=16, and Y=24*1 / 3=8. For the relevant description of X and Y, please refer to Examples 1 to 3 above, which will not be described in detail here.
[0119] For the relevant description of the relationship between different values of K and 2592 (3888*2 / 3=2592), please refer to the above Examples 1 to 3, which will not be described in detail here.
[0120] As an example 7, the matrix prototype of the check matrix may be the following matrix:
[0121]
[0122] As an example 8, the matrix prototype of the check matrix may be the following matrix:
[0123]
[0124] As an example 9, the matrix prototype of the check matrix may be the following matrix:
[0125]
[0126] The matrix prototype of the check matrix shown in Examples 7 to 9 above corresponds to R equal to 3 / 4. At the same time, the R corresponding to the check matrix is also equal to 3 / 4. Exemplarily, the matrix prototype of the check matrix shown in Examples 7 to 9 above corresponds to N 1 can be equal to 3888. At the same time, the N corresponding to the check matrix 1 It also equals 3888.
[0127] About the expansion factor Z 1 For related instructions, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.
[0128] For Examples 7 to 9, X = 24*3 / 4 = 18, and Y = 24*1 / 4 = 6. For the relevant description of X and Y, reference may be made to Examples 1 to 3 above, which will not be described in detail here.
[0129] For the relevant description on the relationship between different values of K and 2916 (3888*3 / 4=2916), please refer to the above Examples 1 to 3, which will not be described in detail here.
[0130] As an example 10, the matrix prototype of the check matrix may be the following matrix:
[0131]
[0132] As an example 11, the matrix prototype of the check matrix may be the following matrix:
[0133]
[0134] As an example 12, the matrix prototype of the check matrix may be the following matrix:
[0135]
[0136] The matrix prototype of the check matrix shown in Examples 10 to 12 above corresponds to R equal to 5 / 6. At the same time, the R corresponding to the check matrix is also equal to 5 / 6. Exemplarily, the matrix prototype of the check matrix shown in Examples 10 to 12 above corresponds to N 1 can be equal to 3888. At the same time, the N corresponding to the check matrix 1 It also equals 3888.
[0137] About the expansion factor Z 1 For related instructions, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.
[0138] For example 10 to example 12, X = 24*5 / 6 = 20, Y = 24*1 / 6 = 4. For the relevant description of X and Y, please refer to the above example 1 to example 3, which will not be described in detail here.
[0139] For the relevant description of the relationship between different values of K and 3240 (3888*5 / 6=3240), please refer to the above examples 1 to 3, which will not be described in detail here.
[0140] The matrix prototypes of the check matrices shown in Examples 1 to 12 above are merely examples. The matrix prototypes of the check matrices shown in the embodiments of the present application can also be obtained by other matrix prototypes through the determination method shown below, which are not listed one by one here.
[0141] 303. The first communication device outputs the encoded sequence.
[0142] Exemplarily, the first communication device may perform LDPC encoding through a coding module (such as an LDPC coding module) to obtain a coded sequence, and output the coded sequence from the coding module. For the description of the length of the coded sequence, reference may be made to step 301 or step 302 above, which will not be described in detail here.
[0143] In a possible implementation, after outputting the encoded sequence, the first communication device may further perform a shortening operation, as described below with an example.
[0144] Generally speaking, the information bit sequence needs to be placed into an integer number of orthogonal frequency division multiplexing (OFDM) symbols after encoding, and the encoded sequence also needs to be placed into an integer number of LDPC codewords. Therefore, before the first communication device performs LDPC encoding, the first communication device also needs to determine the minimum number of OFDM symbols N required for this transmission. SYM , then based on N SYMand the current coding modulation scheme (such as the modulation order indicated by the MCS, etc.) to calculate the total number of coded bits N that can be stored in all OFDM symbols TCB =N CBPS *N SYM , where N CBPS The number of encoded bits that can be stored in each OFDM symbol. Then, the first communication device can calculate the LDPC code length (i.e., the code length shown in the embodiment of the present application) and the required number of codewords N used in the current transmission based on the above results. CW . Exemplarily, when there are not enough information bits (such as the case where K is less than 1944 as shown in Examples 1 to 3 below) to fill the information bit part in the LDPC codeword, the first communication device can perform a shortening operation before performing LDPC encoding (also referred to as generating check bits). The shortening operation refers to filling a certain number of zeros in the information bit part before generating check bits through LDPC encoding, and then deleting these zeros after encoding to generate check bits. Figure 4 FIG. 1 is a partial schematic diagram of a shortening operation in an LDPC coding provided in an embodiment of the present application. Figure 4 As shown, step 401 indicates that the first communication device can obtain the payload bits to be encoded (such as the K information bits shown in the embodiment of the present application). Step 402 indicates that the first communication device can calculate the LDPC code length and the number of codewords. Figure 4 Three LDPC code words are shown as an example. The length (ie, code length) of each LDPC code word may be equal to the code length. Step 403 indicates that the first communication device may perform a shortening operation on the information bits. Figure 4 The codeword including the payload bits and shortening zero bits is shown. Step 404 indicates that the first communication device can generate parity bits using the payload bits and shortening bits. Figure 4 The codeword including the payload bit, the shortened 0 bit and the check bit is shown. Step 405 indicates that the first communication device discards the shortened 0 bits. Figure 4 The codeword including data bits and check bits is shown. The above descriptions on the shortening operation and the like are only examples, and the descriptions on the shortening operation and the like can also refer to relevant standards or protocols, and the embodiments of the present application do not limit this.
[0145] 304. The first communication device sends a signal corresponding to the encoded sequence, and the second communication device receives the signal.
[0146] The above-mentioned signal corresponding to the encoded sequence refers to the encoded sequence output from the encoding module, and the encoded sequence can also undergo other processing, so that the first communication device transmits the processed signal through the channel. Exemplarily, the first communication device can also perform at least one of the following processing on the encoded sequence: stream parsing, constellation mapping, LDPC subcarrier mapping, stream cyclic shift, space and frequency mapping, inverse discrete Fourier transform (inverse discretefourier transform, IDFT), insert cyclic prefix and window (insertGI andwindow). Exemplarily, after receiving the signal transmitted through the channel, the second communication device can perform corresponding processing on the signal. For example, before the second communication device obtains the information to be decoded, it can perform at least one of the following processing: remove cyclic prefix, discrete Fourier transform (discrete fourier transform, DFT), space and frequency demapping, deinterleaving, and deconstellation.
[0147] Exemplarily, the first communication device may also perform rate matching on the encoded sequence, and the rate matching method includes puncturing, repetition, and shortening. For example, the first communication device may also puncture the check bits in the encoded sequence to obtain a higher code rate or a shorter code length. For other processing of the encoded sequence by the first communication device and the corresponding processing before the second communication device obtains the information to be decoded, reference may also be made to relevant standards or protocols, etc., which are not limited in the embodiments of the present application. The length of the information to be decoded may be N 1 . If the information to be decoded may include bits or real numbers, etc., the embodiments of the present application do not limit the specific content of the information to be decoded. Exemplarily, before obtaining the information to be decoded, the second communication device may also supplement shortening bits, such as supplementing shortening bits in combination with the code length and K, or may also supplement puncturing bits, etc., which are not limited in the embodiments of the present application.
[0148] 305. The second communication device performs LDPC decoding on the information to be decoded based on the check matrix to obtain an information bit sequence.
[0149] Exemplarily, the decoding method that can be used by the second communication device includes but is not limited to a hard decision decoding method, a soft decision decoding method or a hybrid decoding method. The specific decoding process is not described in detail in the embodiment of the present application.
[0150] Exemplarily, the second communication device may also adopt a similar Figure 4 The code length N is determined by 1 How does the second communication device learn the code length N? 1 For the relevant description of the code rate R, please refer to the above description of the first communication device, which will not be described in detail here.
[0151] The first communication device learns N 1 and R method, and the second communication device learns N 1 The method of and R can refer to relevant standards or protocols, etc., and the embodiments of the present application are not limited to this.
[0152] In the embodiment of the present application, the above steps 301 to 303 can be implemented by an encoding module, and the above step 305 can be implemented by a decoding module. In a specific implementation, Figure 3 The method shown can also be divided into an encoding method or a decoding method. If the encoding method can include steps 301 to 303, the first communication device can include an encoding module. If the decoding method can include step 305, the second communication device can include a decoding module. Optionally, in addition to the above-mentioned encoding module, the first communication device can also include an acquisition module, which can be used to obtain code length and code rate, etc. Optionally, the first communication device can also include a shortening module or a blocking module, etc. Optionally, in addition to the decoding module, the second communication device can also include an acquisition module, which can be used to obtain information to be decoded.
[0153] In an embodiment of the present application, the check matrix can be applied to an information bit sequence whose code length is n times of 1944, where n is an integer greater than or equal to 2, thereby improving the transmission reliability of the system and improving the decoding performance.
[0154] The following describes a method for determining a check matrix according to an embodiment of the present application.
[0155] The method for determining the check matrix shown in the embodiment of the present application is only an example. In a specific implementation, the determination method shown below can be defined by a standard. Alternatively, in a specific implementation, the communicating parties may not perform the determination method shown below, such as the communicating parties may save the matrix prototype of the check matrix, or save the cyclic shift value, or save the indication information, etc. Although the matrix prototypes of 12 check matrices are shown above by way of example, the matrix prototypes of other check matrices determined according to the determination method shown in the embodiment of the present application also belong to the protection scope of the embodiment of the present application.
[0156] The determination method shown below is based on the reference check matrix as the code length N 0 =1944 is shown as an example. As shown in step 301 above, N 1 It may also be m times of 1296, that is, according to the determination method shown below, the check matrix with a code length greater than 1944 may also be determined based on the check matrix corresponding to the code length of 1296. According to the determination method shown below, the check matrix with a code length greater than 1944 determined by using the check matrix corresponding to the code length of 1296 as the reference check matrix also belongs to the protection scope of the embodiments of the present application.
[0157] The following matrix prototype is based on the reference check matrix: Figure 1a The matrix shown is used as an example to illustrate the method for determining the matrix prototype of the check matrix shown in the embodiment of the present application. Of course, the name of the reference check matrix shown in the embodiment of the present application is only an example, such as the reference check matrix can also be called a reference check matrix or an original check matrix.
[0158] Notes on the reference check matrix:
[0159] The code length N corresponding to the reference check matrix 0 =1944, code rates include: 1 / 2, 2 / 3, 3 / 4, 5 / 6. Reference check matrix expansion factor Z 0 =1944 / 24=81.
[0160] When R=1 / 2, the matrix prototype of the reference check matrix is a matrix of size 12*24, that is, the matrix prototype of the reference check matrix includes 12 rows and 24 columns. The reference check matrix expanded based on the matrix prototype may include 972 rows and 1944 columns. X=12, Y=12.
[0161] When R=2 / 3, the matrix prototype of the reference check matrix is a matrix of size 8*24, that is, the matrix prototype of the reference check matrix includes 8 rows and 24 columns. The reference check matrix expanded based on the matrix prototype may include 648 rows and 1944 columns. X=16, Y=8.
[0162] When R=3 / 4, the matrix prototype of the reference check matrix is a matrix of size 6*24, that is, the matrix prototype of the reference check matrix includes 6 rows and 24 columns. The reference check matrix expanded based on the matrix prototype may include 648 rows and 1944 columns. X=18, Y=6.
[0163] When R=5 / 6, the matrix prototype of the reference check matrix is a matrix of size 4*24, that is, the matrix prototype of the reference check matrix includes 4 rows and 24 columns. The reference check matrix expanded based on the matrix prototype may include 324 rows and 1944 columns. X=20, Y=4.
[0164] Explanation of the check matrix:
[0165] The code length N corresponding to the check matrix 1 =3888, code rates include: 1 / 2, 2 / 3, 3 / 4, 5 / 6. The expansion factor Z of the check matrix 1 =3888 / 24=162.
[0166] When R=1 / 2, the matrix prototype of the check matrix is a matrix of size 12*24, that is, the matrix prototype of the check matrix includes 12 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 1944 rows and 3888 columns. X=12, Y=12.
[0167] When R=2 / 3, the matrix prototype of the check matrix is a matrix of size 8*24, that is, the matrix prototype of the check matrix includes 8 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 1296 rows and 3888 columns. X=16, Y=8.
[0168] When R=3 / 4, the matrix prototype of the check matrix is a matrix of size 6*24, that is, the matrix prototype of the check matrix includes 6 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 972 rows and 3888 columns. X=18, Y=6.
[0169] When R=5 / 6, the matrix prototype of the check matrix is a matrix of size 4*24, that is, the matrix prototype of the check matrix includes 4 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 648 rows and 3888 columns. X=20, Y=4.
[0170] In the embodiment of the present application, for the same bit rate, the element Z in the information matrix of the matrix prototype of the check matrix is 1 (i, j) and the element Z in the information matrix of the matrix prototype of the reference check matrix 0 (i, j) satisfies the modular operation relationship. For example, Z 0 (i, j) and Z 1 The following relationship can be satisfied between (i, j): 0 (i, j) = Z 1 (i, j) % Z 0 , or, Z 0 (i, j) = Z 1 (i, j) % (Z 1 / 2). As described above with respect to X and Y, the Z shown here 1 (i, j) refers to the elements in the matrix corresponding to the first X columns in the matrix prototype of the check matrix, Z 0 (i, j) refers to the elements in the matrix corresponding to the first X columns in the matrix prototype of the reference check matrix.
[0171] Exemplarily, the above-mentioned modular operation relationship includes: Z 1 (i, j) = Z 0 (i, j), or, Z 1 (i, j) = Z 0 (i, j)+Z 0 .
[0172] For example, N 0 =1944, the matrix prototype of the reference check matrix when R = 1 / 2 (such as Figure 1a The first matrix shown) in Z 0 (i, j) and N 1 =3888, the matrix prototype of the check matrix when R = 1 / 2 (such as Z in Examples 1 to 3 above) 1 (i, j) satisfies the modular operation relationship. Taking i=1, j=1 as an example, Z 0 (1, 1) = 57. For the above example 1, Z 1 (1, 1) = 57, that is, Z 1 (1, 1) = Z 0 (1, 1) satisfies the modular operation relationship. Taking i=2, j=1 as an example, Z 0 (2, 1) = 3. For the above example 1, Z 1 (2, 1) = 84, that is, Z 1 (2, 1) = Z 0 (2, 1) + 81 satisfies the modular operation relationship. For the above example 2, Z 1 (2, 1) = 3, Z 1 (2, 1) = Z 0 (2, 1) satisfies the modular operation relationship. Specific examples that satisfy the modular operation relationship are not listed here one by one.
[0173] For example, N 0 =1944, the matrix prototype of the reference check matrix when R = 2 / 3 (such as Figure 1a The second matrix shown in 0 (i, j) and N 1 =3888, the matrix prototype of the check matrix when R=2 / 3 (such as Z in Examples 4 to 6 above) 1 (i, j) satisfies the modular operation relationship.
[0174] For example, N 0 =1944, the matrix prototype of the reference check matrix when R = 3 / 4 (such as Figure 1a The third matrix shown in 0 (i, j) and N 1 =3888, the matrix prototype of the check matrix when R=3 / 4 (such as Z in Examples 7 to 9 above) 1 (i, j) satisfies the modular operation relationship.
[0175] For example, N 0 =1944, R = 5 / 6 when the reference check matrix prototype (such as Figure 1a The fourth matrix shown in 0(i, j) and N 1 =3888, the matrix prototype of the check matrix when R = 5 / 6 (such as Z in Examples 10 to 12 above) 1 (i, j) satisfies the modular operation relationship.
[0176] In the embodiment of the present application, for the same bit rate, the element Y in the check matrix in the matrix prototype of the check matrix is 1 (i, j) and the element Y in the check matrix in the matrix prototype of the reference check matrix 0 (i, j) are the same. Y shown here 1 (i, j) refers to the elements in the matrix corresponding to the last Y columns in the matrix prototype of the check matrix, Y 0 (i, j) refers to the elements in the matrix corresponding to the last Y columns in the matrix prototype of the reference check matrix.
[0177] For example, N 0 =3888, the matrix corresponding to the last Y columns in the matrix prototype of the check matrix when R = 1 / 2 is the same as N 0 =1944, R=1 / 2, the matrices corresponding to the last Y columns in the matrix prototype of the reference check matrix are the same. That is, the values of each element in the check matrix in the matrix prototype of the check matrix (or each CPM coefficient) are the same as the values of the elements in the corresponding positions in the check matrix in the matrix prototype of the reference check matrix.
[0178] For example, N 0 =3888, the matrix corresponding to the last Y columns in the matrix prototype of the check matrix when R = 2 / 3 is the same as N 0 =1944, and the matrices corresponding to the last Y columns in the matrix prototype of the reference check matrix when R=2 / 3 are the same.
[0179] For example, N 0 =3888, the matrix corresponding to the last Y columns in the matrix prototype of the check matrix when R = 3 / 4 is the same as N 0 =1944, and the matrices corresponding to the last Y columns in the matrix prototype of the reference check matrix when R=3 / 4 are the same.
[0180] For example, N 0 =3888, the matrix corresponding to the last Y columns in the matrix prototype of the check matrix when R = 5 / 6 is the same as N 0 =1944, and the matrices corresponding to the last Y columns in the matrix prototype of the reference check matrix when R=5 / 6 are the same.
[0181] In the present application embodiment, Z 0 (i, j) and Z 1 (i, j) satisfies the nested relationship, namely Z 0 (i, j) and Z1 (i, j) satisfies the modular operation relationship, and the check matrix of the matrix prototype of the check matrix is the same as the check matrix of the matrix prototype of the reference check matrix. At the same time, the size of the matrix prototype of the check matrix is the same as the size of the matrix prototype of the reference check matrix, so that the check matrix with a code length greater than 1944 proposed in the embodiment of the present application can minimize the changes to the existing LDPC encoding module and LDPC decoding module in the Wi-Fi system, and reduce the complexity of the encoding and decoding implementation. Exemplarily, although the code length of the check matrix provided in the embodiment of the present application is n times of 1944 (that is, the code length of the check matrix shown in the embodiment of the present application is greater than the longest code length in the current Wi-Fi system), the check matrix is determined based on the reference check matrix with a code length of 1944. Therefore, when the first communication device performs LDPC encoding, it can still reuse the existing LDPC encoding module, and when the second communication device performs LDPC decoding, it can still reuse the existing LDPC decoding module. The embodiment of the present application reduces the changes to the LDPC encoding module and the LDPC decoding module, and also ensures the decoding performance.
[0182] In the present application embodiment, due to Z 0 (i, j) and Z 1 (i, j) satisfies the modular operation relationship. As an example, the communicating parties (such as the first communication device and the second communication device) store the elements in the matrix prototype of the check matrix. For example, by storing the elements in the matrix prototype of the check matrix, when the code length is 3888, the communicating parties can directly obtain the check matrix based on the elements stored respectively. For another example, by storing the elements in the matrix prototype of the check matrix, when the code length is 1944, the communicating parties can obtain the reference check matrix based on the above modular operation relationship. That is to say, by storing the elements in the matrix prototype of the check matrix (or called the CPM coefficients or cyclic shift values, etc.), the communicating parties can obtain LDPC codes of two code lengths, saving storage space. As another example, the communicating parties can also store the reference check matrix and indication information, which is used to indicate whether each element in the information matrix in the matrix prototype of the check matrix satisfies Z 1 (i, j) = Z 0 (i, j) or Z 1 (i, j) = Z 0 (i, j)+Z 0 . Exemplarily, the indication information may be a bitmap, and each bit in the bitmap may be used to indicate that a certain element in the information matrix is Z 1 (i, j) = Z 0 (i, j) or Z 1 (i, j) = Z 0 (i, j)+Z 0For example, if the value of a bit is 0, then the element corresponding to the bit satisfies Z 1 (i, j) = Z 0 (i, j). For another example, if the value of a bit is 1, it means that the element corresponding to the bit satisfies Z 1 (i, j) = Z 0 (i, j)+Z 0 . Exemplarily, the indication information may also be in the form of a binary matrix, such as the size of the binary matrix may be the same as the size of the matrix corresponding to the first X columns. If the binary matrix may include element 0 and element 1, element 0 may indicate that the element in the check matrix corresponding to the position of element 0 satisfies Z 1 (i, j) = Z 0 (i, j), the element 1 can be represented by the element in the check matrix corresponding to the position of the element 1 that satisfies Z 1 (i, j) = Z 0 (i, j)+Z 0 .
[0183] Furthermore, in Z 0 (i, j) and Z 1 On the basis that (i, j) satisfies the modular operation relationship and the check matrix in the matrix prototype of the check matrix is the same as the check matrix in the matrix prototype of the reference check matrix, an embodiment of the present application also provides a determination method. Based on the determination method shown below, the check matrix with better decoding performance can be effectively screened out to ensure the decoding performance of the check matrix.
[0184] Exemplarily, the matrix prototype of the check matrix can also be determined based on the tree structure. In order to ensure the above modular operation relationship, each non-negative 1 Z 0 (i, j) has two options, if Z 0 (i, j) = s, then Z 1 (i, j) = s (remains unchanged) or Z 1 (i, j) = s + Z 0 . Figure 5a The small square in the figure represents Z. 0 The value of (i, j), Option A (Opt A) can represent Z 1 (i, j) = s (remain unchanged), Option B (Opt B) means Z 1 (i, j) = s + Z 0 .
[0185] Z 1 (i, j) Specifically selecting OptA or OptB can increase Z 1 (i, j) is expanded according to the number, and the deeper option is selected. The specific tree expansion diagram is as follows Figure 5bThe circles shown represent variable nodes, and the squares represent check nodes. The deeper the depth of the expanded tree, the fewer short rings the corresponding matrix contains, and short rings will have a negative impact on the decoding performance. For each variable node, if the tree is expanded, the corresponding depth of each Opt A or Opt B in the corresponding matrix may be different, and the ring structure caused by the factor graph (tanner graph) corresponding to the overall check matrix will also be different. Therefore, the embodiment of the present application comprehensively considers the local and overall ring structure of the matrix, and designs all non-zero elements according to the tree expansion, so as to ensure that the factor graph corresponding to the check matrix has a good ring structure. Through the above method, it can be effectively guaranteed that the check matrix provided in the embodiment of the present application can maintain the fast and efficient encoding method of the original WLAN LDPC code.
[0186] There is a one-to-one correspondence between the factor graph and the check matrix. The factor graph consists of two types of nodes. The first type of node is the variable node, which represents the information bit, and the second type of node is the check node, which represents the check constraint relationship. Each check node represents a check constraint relationship. Figure 6a is the check matrix H of the LDPC code. Figure 6a In the equation, {Vi} represents a variable node set, and {Cj} represents a check node set. i = 1, 2, ..., 8. j = 1, 2, 3, 4. Each row of the check matrix H corresponds to a check equation, and each column corresponds to an information bit. Figure 6a In the equation, there are 8 variable nodes and 4 check nodes. If an information bit is included in the corresponding check equation, a line is used to connect the variable node and the check node involved to obtain a factor graph. Figure 6b is a factor graph of the LDPC code check matrix H. For other descriptions of the factor graph, reference may be made to relevant standards or protocols, etc., and the present application embodiment does not limit this.
[0187] The following introduces the simulation results of the check matrix provided in the embodiments of the present application.
[0188] The performance comparison between the above check matrix and the reference check matrix is given below. Figure 7a to Figure 7d In the figure, the horizontal axis represents the signal-to-noise ratio (SNR), in dB, and the vertical axis represents the block error rate (BLER). The decoding method used is a soft decision decoding method, such as a brief propagation (BP) algorithm, and the number of decoding iterations is 8. Figure 7a to Figure 7d The serial numbers 1 to 4 are provided for the convenience of distinguishing different curves and should not be understood as limitations on the embodiments of the present application.
[0189] Figure 7aThe figure shows the performance comparison between the parity check matrix of code length 3888 and the reference parity check matrix of code length 1944. R=1 / 2.
[0190] Figure 7b The figure shows the performance comparison between the parity check matrix of code length 3888 and the reference parity check matrix of code length 1944. R=2 / 3.
[0191] Figure 7c The performance comparison of the parity check matrix with a code length of 3888 and the reference parity check matrix with a code length of 1944 is shown. R = 3 / 4
[0192] Figure 7d The figure shows the performance comparison between the parity check matrix of code length 3888 and the reference parity check matrix of code length 1944. R=5 / 6.
[0193] From the above, it can be seen that under the same SNR, the BLER corresponding to the check matrix is lower, so the decoding performance of the check matrix is better. Therefore, each check matrix provided in the embodiment of the present application can obtain significant decoding performance improvement, and at the same time, a good compromise can be achieved between decoding performance and complexity.
[0194] The following is an introduction to the communication device provided in the embodiments of the present application.
[0195] The present application divides the functional modules of the communication device according to the above method embodiment. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or software functional modules. It should be noted that the division of modules in the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. Figures 8 to 10 The communication device according to the embodiment of the present application is described in detail.
[0196] Figure 8 is a schematic diagram of the structure of a communication device provided in an embodiment of the present application, such as Figure 8 As shown, the communication device includes a processing module 801 and a transceiver module 802. The transceiver module 802 can implement corresponding communication functions, and the processing module 801 is used to implement corresponding processing functions. For example, the transceiver module 802 can also be called an interface, a communication interface or a communication module.
[0197] In some embodiments of the present application, the communication device may be used to execute the action executed by the first communication device in the above method embodiment. In this case, the first communication device may be a Wi-Fi device itself or a chip or functional module that can be configured in the device, etc. The transceiver module 802 is used to execute the transceiver-related operations of the first communication device in the above method embodiment, and the processing module 801 is used to execute the processing-related operations of the first communication device in the above method embodiment.
[0198] Exemplarily, the processing module 801 can be used to obtain an information bit sequence, and perform LDPC encoding on the information bit sequence based on a check matrix to obtain an encoded sequence; the transceiver module 802 can be used to output the encoded sequence.
[0199] Exemplarily, the processing module 801 may also be used to perform other processing on the encoded sequence; the transceiver module 802 may also be used to send or output the signal after other processing.
[0200] Exemplarily, the processing module 801 may include a coding module. For example, the processing module 801 may also include an acquisition module, a shortening module or a blocking module, etc. Exemplarily, the processing module 801 may also include at least one of the following modules: a constellation mapping module, a stream cyclic shift module, a space and frequency mapping module, an IDFT module, an insertion cyclic prefix and a windowing module. Exemplarily, the transceiver module 802 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 802 may include a pin module, etc.
[0201] Reuse Figure 8 In some other embodiments of the present application, the communication device can be used to perform the actions performed by the second communication device in the above method embodiment. In this case, the communication device can be the Wi-Fi device itself or a chip or functional module that can be configured in the device. The transceiver module 802 is used to perform the transceiver-related operations of the second communication device in the above method embodiment, and the processing module 801 is used to perform the processing-related operations of the second communication device in the above method embodiment.
[0202] Exemplarily, the transceiver module 802 may be used to receive or input a signal transmitted through a channel; the processing module 801 may be used to process the signal to obtain information to be decoded.
[0203] Exemplarily, the transceiver module 802 may be used to input information to be decoded; the processing module 801 may perform LDPC decoding on the information to be decoded based on a check matrix to obtain an information bit sequence.
[0204] Exemplarily, the processing module 801 may include a decoding module. For example, the processing module 801 may also include an acquisition module, etc. Exemplarily, the processing module 801 may also include at least one of the following components: a cyclic prefix removal module, a DFT module, a deinterleaving module, a constellation deconstruction module, and a descrambling module. Exemplarily, the transceiver module 802 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 802 may include a pin module, etc.
[0205] Optionally, in each of the above embodiments, the communication device may further include a storage module, which may be used to store instructions and / or data, and the processing unit 801 may read the instructions and / or data in the storage module so that the communication device implements the above method embodiment. Exemplarily, the storage module may also store CPM coefficients or indication information in the matrix prototype of the check matrix shown above.
[0206] In the above-mentioned embodiments, the specific descriptions of terms or steps such as reference check matrix, check matrix, prototype of check matrix, prototype of reference check matrix, CPM, number of cyclic shift bits, expansion factor, code length, code rate, etc. can be referred to the introduction in the above method embodiments, and will not be described in detail here.
[0207] The specific descriptions of the transceiver module and the processing module shown in the above embodiments are only examples. For the specific functions or execution steps of the transceiver module and the processing module, reference may be made to the above method embodiments and will not be described in detail here.
[0208] The above describes the communication device of the embodiment of the present application, and the following describes possible product forms of the communication device. Figure 8 Any form of product with the functions of the communication device described above falls within the protection scope of the embodiments of the present application. The following description is only for example and does not limit the product form of the communication device of the embodiments of the present application to this.
[0209] In one possible implementation, Figure 8In the communication device shown, the processing module 801 may be one or more processors, the transceiver module 802 may be a transceiver, or the transceiver module 802 may also be a sending module and a receiving module, the sending module may be a transmitter, the receiving module may be a receiver, and the sending module and the receiving module are integrated into one device, such as a transceiver. In the embodiment of the present application, the processor and the transceiver may be coupled, etc., and the embodiment of the present application does not limit the connection mode of the processor and the transceiver. In the process of executing the above method, the process of sending information in the above method may be a process in which the processor outputs the above information. When outputting the above information, the processor outputs the above information to the transceiver so that it is transmitted by the transceiver. After the above information is output by the processor, it may also need to be processed in other ways before it reaches the transceiver. Similarly, the process of receiving information in the above method may be a process in which the processor receives the input information. When the processor receives the input information, the transceiver receives the above information and inputs it into the processor. Furthermore, after the transceiver receives the above information, the above information may need to be processed in other ways before it is input into the processor.
[0210] like Fig. 9 As shown, the communication device 90 includes one or more processors 920 and a transceiver 910 .
[0211] In some embodiments of the present application, the communication device may be used to execute the steps, methods or functions executed by the first communication device or the network management server, such as the processor 920 may be used to execute the following steps: Figure 8 The functions or steps implemented by the processing module 801 shown in FIG. 8 may be performed by the transceiver 910. Figure 8 The functions or steps implemented by the transceiver module 802 are shown in FIG. Figure 8 Or the method embodiments shown above will not be described in detail here.
[0212] In some other embodiments of the present application, the communication device is used to execute the steps, methods or functions executed by the second communication device or terminal device, such as the processor 920 can be used to execute the following steps: Figure 8 The functions or steps implemented by the processing module 801 shown in FIG. 8 may be performed by the transceiver 910. Figure 8 The functions or steps implemented by the transceiver module 802 are shown in FIG. Figure 8 Or the method embodiments shown above will not be described in detail here.
[0213] exist Fig. 9In various implementations of the communication device shown, the transceiver may include a receiver and a transmitter, wherein the receiver is used to perform a receiving function (or operation) and the transmitter is used to perform a transmitting function (or operation). The transceiver is used to communicate with other devices / devices through a transmission medium.
[0214] Optionally, the communication device 90 may also include one or more memories 930 for storing program instructions and / or data. The memory 930 is coupled to the processor 920. The coupling in the embodiment of the present application is an indirect coupling or communication connection between the communication device, unit or module, which may be electrical, mechanical or other forms, and is used for information exchange between the communication device, unit or module. The processor 920 may operate in conjunction with the memory 930. The processor 920 may execute program instructions stored in the memory 930. Optionally, at least one of the one or more memories may be included in the processor.
[0215] The specific connection medium between the transceiver 910, the processor 920 and the memory 930 is not limited in the embodiment of the present application. Fig. 9 The memory 930, the processor 920 and the transceiver 910 are connected via a bus 940. Fig. 9 The connections between the other components are shown in bold lines, which are only for illustration and are not intended to be limiting. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig. 9 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.
[0216] In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc., and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor, etc.
[0217] In the embodiment of the present application, the memory may include, but is not limited to, non-volatile memory such as a hard disk drive (HDD) or a solid-state drive (SSD), a random access memory (RAM), an erasable programmable read-only memory (EPROM), a read-only memory (ROM) or a portable read-only memory (CD-ROM), etc. The memory is any storage medium that can be used to carry or store program codes in the form of instructions or data structures and can be read and / or written by a computer (such as a communication device shown in the present application), but is not limited thereto. The memory in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.
[0218] The processor 920 is mainly used to process the communication protocol and communication data, and to control the entire communication device, execute the software program, and process the data of the software program. The memory 930 is mainly used to store the software program and data. The transceiver 910 may include a control circuit and an antenna. The control circuit is mainly used to convert the baseband signal and the radio frequency signal and to process the radio frequency signal. The antenna is mainly used to send and receive radio frequency signals in the form of electromagnetic waves. The input and output devices, such as a touch screen, a display screen, a keyboard, etc., are mainly used to receive data input by the user and output data to the user.
[0219] When the communication device is turned on, the processor 920 can read the software program in the memory 930, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be sent wirelessly, the processor 920 performs baseband processing on the data to be sent, and outputs the baseband signal to the RF circuit. The RF circuit performs RF processing on the baseband signal and then sends the RF signal outward in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processor 920. The processor 920 converts the baseband signal into data and processes the data.
[0220] In another implementation, the RF circuit and antenna may be arranged independently of the processor performing baseband processing. For example, in a distributed scenario, the RF circuit and antenna may be arranged independently of the communication device in a remote manner.
[0221] The communication device shown in the embodiment of the present application may also have Fig. 9The embodiments of the present application do not limit the number of components and the like. The methods executed by the processor and the transceiver shown above are only examples, and the specific steps executed by the processor and the transceiver can refer to the methods described above.
[0222] In another possible implementation, Figure 8 In the communication device shown, the processing module 801 may be one or more logic circuits, and the transceiver module 802 may be an input / output interface, or a communication interface, or an interface circuit, or an interface, etc. Alternatively, the transceiver module 802 may be a sending module and a receiving module, the sending module may be an output interface, and the receiving module may be an input interface, and the sending module and the receiving module may be integrated into one module, such as an input / output interface. Fig.10 As shown, Fig.10 The communication device shown includes a logic circuit 1001 and an interface 1002. That is, the processing module 801 can be implemented by the logic circuit 1001, and the transceiver module 802 can be implemented by the interface 1002. The logic circuit 1001 can be a chip, a processing circuit, an integrated circuit or a system on chip (SoC) chip, etc., and the interface 1002 can be a communication interface, an input / output interface, a pin, etc. For example, Fig.10 The above communication device is taken as an example as a chip, and the chip includes a logic circuit 1001 and an interface 1002 .
[0223] In the embodiment of the present application, the logic circuit and the interface may also be coupled to each other. The embodiment of the present application does not limit the specific connection method between the logic circuit and the interface. For example, the logic circuit 1001 may be used to perform the following Figure 8 The functions or steps implemented by the processing module 801 shown in FIG. 1002 can be used to perform the following steps: Figure 8 The functions or steps implemented by the transceiver module 802 are shown in FIG. 1 . For a detailed description of the logic circuit 1001 and the interface 1002, please refer to FIG. Figure 8 Or the method embodiments shown above will not be described in detail here.
[0224] The communication device shown in the embodiment of the present application can implement the method provided in the embodiment of the present application in the form of hardware, or can implement the method provided in the embodiment of the present application in the form of software, etc., and the embodiment of the present application is not limited to this.
[0225] An embodiment of the present application further provides a communication system, which includes a first communication device and a second communication device. The first communication device and the second communication device can be used to execute the method in any of the aforementioned embodiments.
[0226] In addition, the present application also provides a computer program, which is used to implement the operations and / or processing performed by each communication device in the method provided by the present application.
[0227] The present application also provides a computer-readable storage medium, in which computer codes are stored. When the computer codes are executed on a computer, the computer executes the operations and / or processes performed by each communication device in the method provided by the present application.
[0228] The present application also provides a computer program product, which includes a computer code or a computer program. When the computer code or the computer program runs on a computer, the operations and / or processes performed by each method provided by the present application are executed.
[0229] In the several embodiments provided in the present application, it should be understood that the disclosed systems, communication devices and methods can be implemented in other ways. For example, the communication device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, communication devices or modules, or it can be an electrical, mechanical or other form of connection.
[0230] The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the technical effects of the solutions provided in the embodiments of the present application.
[0231] In addition, each functional module in each embodiment of the present application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The above integrated modules can be implemented in the form of hardware or software functional modules.
[0232] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or partly contributed to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a readable storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned readable storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.
[0233] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A coding method, It is characterized in that The method comprises: Obtaining an information bit sequence; The information bit sequence is coded by low-density parity check (LDPC) based on the check matrix to obtain a coded sequence, wherein the length of the coded sequence is N. 1 , the N 1 is n times 1944, where n is an integer greater than or equal to 2; The encoded sequence is output.
2. A decoding method, It is characterized in that The method comprises: Obtain the information to be decoded, the length of the information to be decoded is N 1 , the N 1 is n times 1944, where n is an integer greater than or equal to 2; Based on the check matrix, low-density parity check (LDPC) decoding is performed on the information to be decoded to obtain an information bit sequence.
3. The method according to claim 1 or 2, It is characterized in that When the code rate of the information bit sequence is R=1 / 2, the matrix prototype of the check matrix includes any one of the following matrices: 57-1-1-1 50-1 11-1 50-1 79-1 1 0-1-1-1-1-1-1-1-1-1-1 84-1 28-1 0-1-1-1 55 7-1-1-1 0 0-1-1-1-1-1-1-1-1-1 111-1-1-1 24 37-1-1 137 14-1-1-1-1 0 0-1-1-1-1-1-1-1-1 62 53-1-1 134-1-1 84 35-1-1-1-1-1-1 0 0-1-1-1-1-1-1-1 40-1-1 20 66-1-1 103 28-1-1-1-1-1-1-1 0 0-1-1-1-1-1-1 0-1-1-1 8-1 42-1 50-1-1 8-1-1-1-1-1 0 0-1-1-1-1-1 69 79 79-1-1-1 56-1 133-1-1-1 0-1-1-1-1-1 0 0-1-1-1-1 146-1-1-1 38 138-1-1 153-1 108-1-1-1-1-1-1-1-1 0 0-1-1-1 145-1-1-1 95 133-1-1 111-1-1 113-1-1-1-1-1-1-1-1 0 0-1-1 -1 45-1 151 0-1-1-1 77 90-1-1-1-1-1-1-1-1-1-1-1 0 0-1 83 137-1 57 35-1-1-1-1-1 93-1-1-1-1-1-1-1-1-1-1-1 0 0 105-1 61-1 141-1-1 108 132-1-1 16 1-1-1-1-1-1-1-1-1-1-1 0 or, 57-1-1-1 50-1 11-1 50-1 79-1 1 0-1-1-1-1-1-1-1-1-1-1 3-1 28-1 0-1-1-1 55 7-1-1-1 0 0-1-1-1-1-1-1-1-1-1 30-1-1-1 24 37-1-1 137 14-1-1-1-1 0 0-1-1-1-1-1-1-1-1 62 53-1-1 134-1-1 84 35-1-1-1-1-1-1 0 0-1-1-1-1-1-1-1 121-1-1 20 66-1-1 103 28-1-1-1-1-1-1-1 0 0-1-1-1-1-1-1 0-1-1-1 8-1 42-1 50-1-1 8-1-1-1-1-1 0 0-1-1-1-1-1 69 160 79-1-1-1 56-1 133-1-1-1 0-1-1-1-1-1 0 0-1-1-1-1 146-1-1-1 38 138-1-1 153-1 108-1-1-1-1-1-1-1-1 0 0-1-1-1 145-1-1-1 95 133-1-1 111-1-1 113-1-1-1-1-1-1-1-1 0 0-1-1 -1 45-1 151 0-1-1-1 77 90-1-1-1-1-1-1-1-1-1-1-1 0 0-1 2 56-1 57 35-1-1-1-1-1 93-1-1-1-1-1-1-1-1-1-1-1 0 0 105-1 61-1 141-1-1 108 132-1-1 16 1-1-1-1-1-1-1-1-1-1-1 0 or, 57-1-1-1 50-1 11-1 131-1 79-1 1 0-1-1-1-1-1-1-1-1-1-1 84-1 28-1 0-1-1-1 55 88-1-1-1 0 0-1-1-1-1-1-1-1-1-1 111-1-1-1 105 37-1-1 137 95-1-1-1-1 0 0-1-1-1-1-1-1-1-1 62 53-1-1 134-1-1 84 116-1-1-1-1-1-1 0 0-1-1-1-1-1-1-1 121-1-1 101 147-1-1 103 28-1-1-1-1-1-1-1 0 0-1-1-1-1-1-1 0-1-1-1 8-1 123-1 131-1-1 8-1-1-1-1-1 0 0-1-1-1-1-1 150 79 160-1-1-1 137-1 52-1-1-1 0-1-1-1-1-1 0 0-1-1-1-1 146-1-1-1 38 138-1-1 72-1 108-1-1-1-1-1-1-1-1 0 0-1-1-1 64-1-1-1 14 133-1-1 30-1-1 32-1-1-1-1-1-1-1-1 0 0-1-1 -1 45-1 151 0-1-1-1 77 9-1-1-1-1-1-1-1-1-1-1-1 0 0-1 83 137-1 57 116-1-1-1-1-1 12-1-1-1-1-1-1-1-1-1-1-1 0 0 105-1 142-1 141-1-1 27 51-1-1 97 1-1-1-1-1-1-1-1-1-1-1 0 Among them, -1 means Z 1 *Z 1 An all-zero matrix, 0 represents Z 1 *Z 1 The unit matrix, elements greater than 0 represent Z 1 *Z 1 The cyclic shift matrix CPM of the identity matrix, Z 1 is based on the N 1 A certain positive integer.
4. The method according to claim 1 or 2, characterized in that when the code rate of the information bit sequence is R=2 / 3, the matrix prototype of the check matrix includes any one of the following matrices: 61 75 4 63 137-1-1-1-1-1-1 89-1 2 17 25 1 0-1-1-1-1-1-1 56 74 77 20-1-1-1 64 105 4 67-1 88-1-1-1-1 0 0-1-1-1-1-1 109 21 149 91 88 95 146-1-1-1 104-1-1-1 75-1-1-1 0 0-1-1-1-1 129 119 43 78 157-1-1-1-1 5 117-1 15 153-1-1-1-1-1 0 0-1-1-1 121 83 134 106-1 133 62-1 101-1-1 44-1-1-1-1 0-1-1-1 0 0-1-1 150 23 145 10 22-1 102-1-1-1-1-1 68 104 29-1-1-1-1-1-1 0 0-1 93 0 149 101 55 142-1 121-1-1-1 52-1-1-1 44-1-1-1-1-1-1 0 0 58 89 115 64 78-1-1 92 78 105-1-1-1-1-1 139 1-1-1-1-1-1-1 0 or, 142 75 4 144 137-1-1-1-1-1-1 8-1 83 98 106 1 0-1-1-1-1-1-1 56 74 77 101-1-1-1 145 105 4 148-1 88-1-1-1-1 0 0-1-1-1-1-1 109 21 149 10 7 95 146-1-1-1 23-1-1-1 75-1-1-1 0 0-1-1-1-1 48 119 124 159 157-1-1-1-1 86 36-1 15 72-1-1-1-1-1 0 0-1-1-1 121 83 53 106-1 133 143-1 20-1-1 44-1-1-1-1 0-1-1-1 0 0-1-1 69 23 64 10 103-1 21-1-1-1-1-1 68 104 29-1-1-1-1-1-1 0 0-1 93 0 68 101 55 61-1 121-1-1-1 52-1-1-1 125-1-1-1-1-1-1 0 0 139 8 34 64 78-1-1 11 78 24-1-1-1-1-1 58 1-1-1-1-1-1-1 0 or, 142 156 4 63 137-1-1-1-1-1-1 8-1 2 98 25 1 0-1-1-1-1-1-1 56 155 77 101-1-1-1 64 24 85 148-1 7-1-1-1-1 0 0-1-1-1-1-1 109 102 68 91 7 14 65-1-1-1 23-1-1-1 156-1-1-1 0 0-1-1-1-1 129 119 43 159 157-1-1-1-1 5 117-1 96 72-1-1-1-1-1 0 0-1-1-1 121 2 53 106-1 133 62-1 20-1-1 44-1-1-1-1 0-1-1-1 0 0-1-1 69 23 64 91 103-1 21-1-1-1-1-1 149 104 29-1-1-1-1-1-1 0 0-1 12 0 149 20 136 61-1 121-1-1-1 52-1-1-1 125-1-1-1-1-1-1 0 0 58 89 34 64 159-1-1 11 78 24-1-1-1-1-1 139 1-1-1-1-1-1-1 0 Among them, -1 means Z 1 *Z 1 An all-zero matrix, 0 represents Z 1 *Z 1 The unit matrix, elements greater than 0 represent Z 1 *Z 1 The cyclic shift matrix CPM of the identity matrix, Z 1 is based on the N 1 A certain positive integer.
5. The method according to claim 1 or 2, characterized in that when the code rate of the information bit sequence is R=3 / 4, the matrix prototype of the check matrix includes any one of the following matrices: 129 110 28 39 9 142-1-1-1 144 126 161-1-1-1 118 32 22 1 0-1-1-1-1 4 49 42 48 92 30-1-1-1 130 17 41 37 96-1 135-1-1-1 0 0-1-1-1 35 157 159 132 37 116 21-1 17 64-1-1-1 59 7-1-1 113-1-1 0 0-1-1 9 146 125 9 54 56 73 115 42-1-1-1 116-1-1-1 127 120 0-1-1 0 0-1 84 62 88 80 149 26-1 161 55-1 36-1 107-1 9-1 72-1-1-1-1-1 0 0 26 156 114 102 69 59 84 119-1-1-1 116-1 143 117 107-1-1 1-1-1-1-1 0 or, 129 110 109 39 9 61-1-1-1 63 126 80-1-1-1 118 113 103 1 0-1-1-1-1 4 49 123 129 11 30-1-1-1 130 17 122 37 15-1 54-1-1-1 0 0-1-1-1 35 157 159 51 37 116 21-1 98 64-1-1-1 59 7-1-1 32-1-1 0 0-1-1 9 65 44 90 135 137 154 115 42-1-1-1 35-1-1-1 46 39 0-1-1 0 0-1 84 143 88 161 149 107-1 80 55-1 117-1 107-1 9-1 153-1-1-1-1-1 0 0 107 75 114 102 150 140 3 119-1-1-1 35-1 143 36 107-1-1 1-1-1-1-1 0 or, 129 29 109 39 9 142-1-1-1 63 126 80-1-1-1 37 32 103 1 0-1-1-1-1 85 49 123 48 11 30-1-1-1 130 17 122 37 96-1 54-1-1-1 0 0-1-1-1 35 157 78 132 118 35 102-1 98 64-1-1-1 140 7-1-1 113-1-1 0 0-1-1 9 146 44 90 54 56 73 34 42-1-1-1 35-1-1-1 46 120 0-1-1 0 0-1 3 143 88 80 68 107-1 80 136-1 36-1 26-1 9-1 153-1-1-1-1-1 0 0 107 75 114 102 150 140 84 38-1-1-1 35-1 143 36 107-1-1 1-1-1-1-1 0 Among them, -1 means Z 1 *Z 1 An all-zero matrix, 0 represents Z 1 *Z 1 The unit matrix, elements greater than 0 represent Z 1 *Z 1 The cyclic shift matrix CPM of the identity matrix, Z 1 is based on the N 1 A certain positive integer.
6. The method according to claim 1 or 2, characterized in that when the code rate of the information bit sequence is R=5 / 6, the matrix prototype of the check matrix includes any one of the following matrices: 13 48 80 147 4 155 88 30 157 133 37 141-1 130 73 31 155 154 23-1 1 0-1-1 150 63 155 137 145 77 57 65 87 16 51-1 64-1 68 90 129 62 135 108-1 0 0-1 51 15 0 80 105 106 42 54 125 152 152 90 148 116-1 139-1 110-1 53 0-1 0 0 97 29 117 41 44 137 140 118 50 24-1 146 85 65 52-1 4-1 154 52 1-1-1 0 or, 13 129 80 147 85 74 88 111 157 52 37 141-1 130 73 112 74 154 104-1 1 0-1-1 150 144 155 137 145 158 57 65 6 16 132-1 145-1 149 9 129 143 54 108-1 00-1 51 96 0 80 105 25 42 135 125 152 71 9 148 116-1 58-1 29-1 134 0-1 0 0 97 29 36 41 125 56 140 37 131 105-1 146 4 146 52-1 4-1 154 52 1-1-1 0 or, 94 48 80 66 4 155 88 30 157 52 37 60-1 49 73 112 155 73 23-1 1 0-1-1 150 63 155 137 64 158 138 65 6 16 51-1 145-1 68 90 48 143 135 108-1 0 0-1 132 15 0 161 24 106 42 54 44 152 152 9 67 35-1 58-1 29-1 134 0-1 0 0 16 29 117 122 44 56 59 37 50 105-1 65 4 146 52-1 4-1 154 133 1-1-1 0 Among them, -1 means Z 1 *Z 1 An all-zero matrix, 0 represents Z 1 *Z 1 The unit matrix, elements greater than 0 represent Z 1 *Z 1 The cyclic shift matrix CPM of the identity matrix, Z 1 is based on the N 1 A certain positive integer.
7. The method according to any one of claims 1 to 6, It is characterized in that The check matrix is determined based on a reference check matrix, and the code length N corresponding to the reference check matrix is 0 is less than or equal to 1944, and the code rate corresponding to the reference check matrix is the same as the code rate corresponding to the check matrix.
8. The method according to any one of claims 1 to 7, It is characterized in that The check matrix is determined based on the reference check matrix and includes: Z 1 (i, j) and Z 0 (i, j) satisfies the modular operation relationship; Among them, Z 1 (i, j) represents the element in the i-th row and j-th column of the matrix prototype of the check matrix corresponding to the information bit, Z 0 (i, j) represents the element in the i-th row and j-th column in the matrix prototype of the reference check matrix corresponding to the information bit.
9. The method according to any one of claims 1 to 8, It is characterized in that The matrix corresponding to the check bits in the matrix prototype of the check matrix is the same as the matrix corresponding to the check bits in the matrix prototype of the reference check matrix.
10. A communication device, It is characterized in that The method comprises a module for executing the method according to any one of claims 1 to 9.
11. A communication device, It is characterized in that The method comprises a processor configured to execute the method according to any one of claims 1 to 9.
12. A communication device, It is characterized in that comprising a logic circuit and an interface, wherein the logic circuit and the interface are coupled; The interface is used to input and / or output information, and the logic circuit is used to execute the method according to any one of claims 1-9.
13. A computer-readable storage medium, It is characterized in that The computer-readable storage medium is used to store a computer program. When the computer program is executed, the method according to any one of claims 1 to 9 is executed.
14. A computer program product, It is characterized in that When the computer program product is executed, the method according to any one of claims 1 to 9 is performed.
15. A communication system, It is characterized in that The communication system comprises a first communication device and a second communication device, wherein the first communication device is used to execute the method according to any one of claims 1 and 3-9, and the second communication device is used to execute the method according to any one of claims 2-9.
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