Overlay error compensation method, device, equipment and medium

Abstract

The invention provides an overlay error compensation method and device, equipment and a medium, and the method comprises the steps: obtaining historical overlay error distribution between a first film layer and a second film layer corresponding to a target mask, and the historical overlay error distribution comprises historical overlay error values corresponding to a plurality of sub-mask regions included by the target mask; according to the historical overlay error distribution, target overlay compensation value distribution is obtained through an overlay error compensation model, and the target overlay compensation value distribution comprises mask deformation values of a plurality of sub-mask areas; and performing thermal regulation and control on each of the plurality of sub-mask areas according to the mask deformation values of the plurality of sub-mask areas to obtain a deformed target mask, and forming a first film layer on the second film layer by using the deformed target mask, the target mask is subjected to thermal regulation and control processing by using the target overlay compensation value distribution obtained based on the historical overlay error distribution, so that the deformed target mask can perform overlay compensation on the historical overlay error distribution, and the overlay error can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and particularly to a method, device, equipment and medium for overlay error compensation. Background Art

[0002] With the development of semiconductor-related technologies, semiconductor chip manufacturing is moving towards ultra-small size nodes of nanometer or even sub-nanometer levels. The number of transistors on semiconductor chips is increasing exponentially, and the integration level is continuously rising, posing unprecedentedly stringent requirements on the size accuracy and overlay accuracy in the lithography process.

[0003] In the semiconductor chip manufacturing process, the precise alignment between circuit patterns of each layer is crucial. However, there will inevitably be overlay errors between circuit patterns of each layer currently. Overlay error refers to the relative displacement deviation of the to-be-processed pattern and the already-processed reference pattern in the X direction and the Y direction. According to the planning of the International Technology Roadmap for Semiconductor (ITRS), for the critical layers of the 28nm and 14nm process nodes, the allowable values of overlay error are strictly limited within 9nm and 6.4nm respectively, which undoubtedly poses a severe test to the overlay error compensation performance of lithography equipment.

[0004] Therefore, how to reduce overlay error and improve the overlay error compensation performance is an urgent problem to be solved. Summary of the Invention

[0005] In view of this, the purpose of this application is to provide a method, device, equipment and medium for overlay error compensation, which can reduce overlay error, improve the overlay error compensation performance, and improve the lithography accuracy.

[0006] To achieve the above purpose, this application has the following technical solutions:

[0007] This application provides a method for overlay error compensation, including:

[0008] Obtain the historical overlay error distribution between a first film layer and a second film layer corresponding to a target mask, where the historical overlay error distribution includes historical overlay error values corresponding to multiple sub-mask regions included in the target mask;

[0009] According to the historical overlay error distribution, through an overlay error compensation model, obtain a target overlay compensation value distribution, where the target overlay compensation value distribution includes mask deformation values of the multiple sub-mask regions;

[0010] Perform thermal regulation on each sub-mask region in the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions to obtain a deformed target mask;

[0011] Manufacture and form the first film layer on the second film layer by using the deformed target mask.

[0012] Optionally, according to the historical overlay error distribution, through an overlay error compensation model, obtain a target overlay compensation value distribution, where the target overlay compensation value distribution including the mask deformation values of the multiple sub-mask regions includes:

[0013] According to the historical overlay error distribution, through the functional relationship between the historical overlay error distribution and the target compensation parameter distribution in the overlay error compensation model, and the functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution in the overlay error compensation model, obtain a target overlay compensation value distribution, where the target overlay compensation value distribution includes the mask deformation values of the multiple sub-mask regions, and the target compensation parameter distribution includes multiple target compensation parameters.

[0014] Optionally, the method further includes:

[0015] Construct multiple functional relationships between the historical overlay error distribution and multiple compensation parameter distributions, and multiple functional relationships between multiple overlay compensation value distributions and the multiple compensation parameter distributions, where the multiple compensation parameter distributions include multiple compensation parameters;

[0016] Optimize the functional relationship between the multiple overlay compensation value distributions and the multiple compensation parameter distributions to obtain the functional relationship between the target overlay compensation value distribution in the multiple overlay compensation value distributions and the target compensation parameter distribution in the multiple compensation parameter distributions, and the functional relationship between the historical overlay error distribution and the target compensation parameter distribution.

[0017] Optionally, the method further includes:

[0018] After manufacturing and forming the first film layer on the second film layer by using the deformed target mask, obtain the target overlay error distribution between the first film layer and the second film layer, where the target overlay error distribution includes the target overlay error values corresponding to the multiple sub-mask regions included in the target mask.

[0019] Optionally, the method further includes:

[0020] Determine the target overlay error distribution as the historical overlay error distribution when manufacturing and forming the first film layer on the second film layer by using the target mask in the next batch.

[0021] Optionally, the method further includes:

[0022] Confirm whether the target overlay error distribution is less than or equal to an error threshold. If it is less than or equal to, confirm that the overlay error compensation is qualified.

[0023] Optionally, performing thermal regulation on each of the plurality of sub-mask regions according to the mask deformation values of the plurality of sub-mask regions to obtain a deformed target mask includes:

[0024] Determining a thermal regulation dose for each of the plurality of sub-mask regions according to the mask deformation values of the plurality of sub-mask regions;

[0025] Performing thermal regulation on each of the sub-mask regions according to the thermal regulation dose of each sub-mask region to obtain a deformed target mask.

[0026] The present application provides a registration error compensation device, including:

[0027] An acquisition unit, configured to acquire a historical registration error distribution between a first film layer and a second film layer corresponding to a target mask, where the historical registration error distribution includes historical registration error values corresponding to a plurality of sub-mask regions included in the target mask;

[0028] An obtaining unit, configured to obtain a target registration compensation value distribution according to the historical registration error distribution through a registration error compensation model, where the target registration compensation value distribution includes mask deformation values of the plurality of sub-mask regions;

[0029] A regulation unit, configured to perform thermal regulation on each of the plurality of sub-mask regions according to the mask deformation values of the plurality of sub-mask regions to obtain a deformed target mask;

[0030] A manufacturing unit, configured to manufacture and form the first film layer on the second film layer by using the deformed target mask.

[0031] The present application provides a registration error compensation device, where the device includes: a processor and a memory;

[0032] The memory is configured to store instructions;

[0033] The processor is configured to execute the instructions in the memory and execute the method according to any one of the above.

[0034] The present application provides a computer-readable medium, including instructions, which when running on a computer, cause the computer to execute the method according to the above.

[0035] The present application provides a method for compensating overlay error, including: obtaining the historical overlay error distribution between a first film layer and a second film layer corresponding to a target mask, where the historical overlay error distribution includes historical overlay error values corresponding to multiple sub-mask regions included in the target mask, that is, by obtaining the historical overlay error values between the first film layer and the second film layer corresponding to each sub-mask region among the multiple sub-mask regions included in the target mask, so as to obtain the historical overlay error distribution corresponding to the target mask, and constructing the association relationship between the historical overlay error distribution and each sub-mask region in the target mask; according to the historical overlay error distribution, through an overlay error compensation model, obtaining a target overlay compensation value distribution, where the target overlay compensation value distribution includes mask deformation values of multiple sub-mask regions, that is, inputting the historical overlay error distribution into the overlay error compensation model to obtain a target overlay error distribution composed of mask deformation values of multiple sub-mask regions, that is to say, through the overlay error compensation model, combining the constructed association relationship between the historical overlay error distribution and each sub-mask region in the target mask, and obtaining the mask deformation value corresponding to each sub-mask region according to the historical overlay error distribution; performing thermal regulation on each sub-mask region among the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions to obtain a deformed target mask, and using the deformed target mask to fabricate the first film layer on the second film layer, that is, using the mask deformation value corresponding to each sub-mask region to perform thermal regulation on each sub-mask region, so as to realize the deformation of the sub-mask region and obtain the deformed target mask, and then using the deformed target mask to fabricate the first film layer on the second film layer. Since the target mask is subjected to thermal regulation processing based on the target overlay compensation value distribution obtained from the historical overlay error distribution, the deformed target mask can perform overlay compensation on the historical overlay error distribution, can reduce the overlay error, improve the overlay error compensation performance, and improve the lithography accuracy. Brief Description of the Drawings

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0037] Figure 1 The flowchart showing a method for compensating overlay error provided by an embodiment of the present application is shown;

[0038] Figure 2 The schematic diagram showing a target mask provided by an embodiment of the present application is shown;

[0039] Figure 3 The schematic diagram showing a historical overlay error distribution provided by an embodiment of the present application is shown;

[0040] Figure 4 Shows a schematic diagram of another historical overlay error distribution provided by an embodiment of the present application;

[0041] Figure 5 Shows a schematic diagram of yet another historical overlay error distribution provided by an embodiment of the present application;

[0042] Figure 6 Shows a schematic diagram of a target overlay compensation value distribution provided by an embodiment of the present application;

[0043] Figure 7 Shows a schematic diagram of another target overlay compensation value distribution provided by an embodiment of the present application;

[0044] Figure 8 Shows a schematic diagram of yet another target overlay compensation value distribution provided by an embodiment of the present application;

[0045] Figure 9 Shows a schematic diagram of a first overlay error distribution provided by an embodiment of the present application;

[0046] Figure 10 Shows a schematic diagram of another first overlay error distribution provided by an embodiment of the present application;

[0047] Figure 11 Shows a schematic diagram of yet another first overlay error distribution provided by an embodiment of the present application;

[0048] Figure 12 Shows a schematic diagram of a target overlay error distribution provided by an embodiment of the present application;

[0049] Figure 13 Shows a schematic diagram of another target overlay error distribution provided by an embodiment of the present application;

[0050] Figure 14 Shows a schematic diagram of yet another target overlay error distribution provided by an embodiment of the present application;

[0051] Figure 15 Shows a schematic diagram of the structure of an overlay error compensation device provided by an embodiment of the present application. Detailed implementation manners

[0052] To make the above objects, features, and advantages of the present application more obvious and understandable, the following provides a detailed description of the specific implementation manners of the present application in conjunction with the accompanying drawings.

[0053] In the following description, numerous specific details are set forth to provide a thorough understanding of the present application. However, the present application may be implemented in other ways different from those described herein. Persons skilled in the art can make similar generalizations without departing from the spirit of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0054] The present application is described in detail with reference to schematic diagrams. When describing the embodiments of the present application, for the sake of clarity, the cross-sectional views showing the device structure are enlarged locally out of proportion. Moreover, the schematic diagrams are merely examples and should not limit the scope of protection of the present application. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.

[0055] With the rapid development of microelectronics technology, semiconductor chip manufacturing is moving towards ultra-small size nodes at the nanometer and even sub-nanometer levels. The number of transistors on a chip is increasing exponentially, and the integration level is constantly rising, posing unprecedentedly stringent requirements on the dimensional accuracy and overlay accuracy in the lithography process. In the traditional lithography system, the overlay error is mainly corrected by means of a precision optical system. However, when the process node approaches the physical limit, the effectiveness of optical compensation means is greatly reduced, making it difficult to meet the increasingly refined manufacturing standards.

[0056] In the semiconductor chip manufacturing process, the precise alignment between the circuit patterns of each layer is crucial. However, currently, overlay errors are inevitable between the circuit patterns of each layer. The overlay error refers to the relative displacement deviation of the pattern to be processed and the processed reference pattern in the X direction and the Y direction. According to the International Technology Roadmap for Semiconductor (ITRS) plan, for the critical layers of the 28nm and 14nm process nodes, the allowable values of the overlay error are strictly limited within 9nm and 6.4nm respectively. This undoubtedly poses a severe test to the overlay error compensation performance of lithography equipment. The precise overlay error compensation ability has become one of the key indicators for measuring the performance of modern lithography machines, which is directly related to the pattern quality of the lithography product, the electrical performance of the device, and the overall production yield.

[0057] Based on this, the present application provides a method for compensating overlay error, including: obtaining the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask, where the historical overlay error distribution includes the historical overlay error values corresponding to multiple sub-mask regions included in the target mask, that is, by obtaining the historical overlay error values between the first film layer and the second film layer corresponding to each sub-mask region among the multiple sub-mask regions included in the target mask, so as to obtain the historical overlay error distribution corresponding to the target mask, and constructing the association relationship between the historical overlay error distribution and each sub-mask region in the target mask; according to the historical overlay error distribution, through the overlay error compensation model, obtaining the target overlay compensation value distribution, where the target overlay compensation value distribution includes the mask deformation values of multiple sub-mask regions, that is, inputting the historical overlay error distribution into the overlay error compensation model to obtain the target overlay error distribution composed of the mask deformation values of multiple sub-mask regions, that is to say, through the overlay error compensation model, combining the constructed association relationship between the historical overlay error distribution and each sub-mask region in the target mask, and obtaining the mask deformation value corresponding to each sub-mask region according to the historical overlay error distribution; performing thermal regulation on each sub-mask region among the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions to obtain the deformed target mask, and using the deformed target mask to fabricate the first film layer on the second film layer, that is, using the mask deformation value corresponding to each sub-mask region to perform thermal regulation on each sub-mask region, so as to realize the deformation of the sub-mask region and obtain the deformed target mask, and then using the deformed target mask to fabricate the first film layer on the second film layer. Since the target mask is thermally regulated based on the target overlay compensation value distribution obtained from the historical overlay error distribution, the deformed target mask can perform overlay compensation on the historical overlay error distribution, reduce the overlay error, improve the overlay error compensation performance, and improve the lithography accuracy.

[0058] To better understand the technical solution and technical effect of the present application, the following will describe specific embodiments in detail with reference to the accompanying drawings.

[0059] Refer to Figure 1 As shown, it is a schematic flowchart of a method for compensating overlay error provided by an embodiment of the present application. The method for compensating overlay error provided by the embodiment of the present application includes the following steps:

[0060] S101, obtaining the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask, where the historical overlay error distribution is the historical overlay error values corresponding to multiple sub-mask regions included in the target mask.

[0061] In an embodiment of the present application, when using a lithography device to fabricate a patterned first film layer on a second film layer, it is necessary to strictly align a target mask with the area to be lithographed on the first film layer to reduce the overlay error. Herein, the first film layer is the film layer to be fabricated currently, and the second film layer is the previously fabricated layer. That is, the first film layer needs to fabricate a pattern to be processed, and the second film layer has a processed reference pattern. To reduce the overlay error between the pattern to be processed and the processed reference pattern, it is necessary to strictly align the target mask with the area to be lithographed where the pattern to be processed is located on the first film layer. The target mask is the mask used when fabricating the patterned first film layer on the second film layer. To further reduce the overlay error and perform overlay error compensation, the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask can be obtained. The historical overlay error distribution includes the historical overlay error values corresponding to multiple sub-mask regions included in the target mask. That is to say, the target mask includes multiple sub-mask regions, and there is a historical overlay error value between the first film layer and the second film layer corresponding to each sub-mask region. The historical overlay error values of the multiple sub-mask regions constitute the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask. That is, by obtaining the historical overlay error values between the first film layer and the second film layer corresponding to each sub-mask region among the multiple sub-mask regions included in the target mask, the historical overlay error distribution corresponding to the target mask is obtained, and the association relationship between the historical overlay error distribution and each sub-mask region in the target mask is constructed.

[0062] Specifically, the size or number of the sub-mask regions included in the target mask can be determined according to the parameters of the thermal regulation device and the historical overlay error distribution. For example, if the parameters of the thermal regulation device can achieve a more detailed deformation of the target mask, the size of the sub-mask regions can be smaller and the number can be larger.

[0063] As an example, referring to Figure 2 As shown, within the exposure area, the size of the target mask is 26 mm × 33 mm. The target mask can be divided into multiple sub-mask regions of the same size, and the size of each sub-mask region is 2 mm × 3 mm. Each sub-mask region corresponds to the historical overlay error between the first film layer and the second film layer.

[0064] Optionally, the maximum size of the target mask can be 104 mm × 132 mm, and the size of the sub-mask regions can be flexibly constrained according to the thermal regulation device.

[0065] The historical overlay error distribution can be the overlay error distribution formed during the first process when manufacturing the patterned first film layer of the current batch using the target mask. For example, when manufacturing the patterned first film layer in different regions of the same batch of wafers using the target mask, the historical overlay error distribution can be the overlay error distribution of the first region of the wafer. The historical overlay error distribution can also be the overlay error distribution formed when manufacturing the patterned first film layer of the previous batch using the target mask.

[0066] In practical applications, when aligning the area to be lithographed on the first film layer, alignment marks can be formed on the second film layer first. The alignment marks are important marks for calibrating the positional relationship between the lithography pattern and the base layer. Their design requirements include high contrast, clear boundaries, and stable shapes to ensure that they can be quickly and accurately identified during the lithography alignment process. The alignment marks are usually located in the scribe lines near the middle of each exposure area. The manufacturing process includes mask design, lithography alignment, pattern transfer, and development operations. The size and spacing of the alignment marks need to be optimized according to the resolution of the lithography machine and the accuracy requirements of the alignment system. Then, various lithography operations such as alignment leveling and alignment calculation are carried out. Alignment leveling is a key step in the lithography process to ensure the precise matching of the mask pattern and the area to be lithographed. The alignment leveling operation mainly includes a focus adjustment and a tilt compensation link; first, through the automatic focusing system of the lithography machine, the distance between the mask and the first film layer is adjusted in real time to ensure that the exposure area is always in the focal plane of the lithography machine, thereby ensuring the resolution and accuracy of pattern transfer; second, an optical sensor is used to measure the tilt angle of the surface of the first film layer. If there is unevenness or tilt, the lithography machine will perform angle compensation on the first film layer through the multi-axis adjustment system of the platform to make it parallel to the mask. Alignment calculation is to complete the precise matching of the mask pattern and the area to be lithographed through the alignment system of the lithography machine. It is necessary to perform alignment point recognition that uses the optical system to scan the alignment marks on the second film layer and identify their position and feature information (such as shape, size); compare the position of the alignment marks with the corresponding points in the mask to calculate the position deviation in the horizontal (X-axis), vertical (Y-axis), and rotation angle, which is the deviation calculation; based on the deviation data, solve and adjust the parameters of the relative position between the mask and the area to be lithographed through an optimization algorithm to generate alignment instructions for driving the adjustment mechanism, which is the alignment parameter calculation. After completing alignment leveling and alignment calculation, the lithography machine enters key steps such as exposure and development to ensure that the mask pattern can be accurately transferred to the area to be lithographed on the first film layer.

[0067] As an example, since the correlation relationship between each sub-mask region in the target mask and the historical overlay error distribution is constructed, the historical overlay error distribution can reflect the spatial variation characteristics of the overlay error. Refer to Figures 3 - 5 As shown, there are 3 different historical overlay error distributions, and the overlay errors of multiple sub-mask regions The distribution is shown in the form of a vector diagram, and the average value of the overlay error in the X direction and the Y direction plus 3σ is also given in the diagram.

[0068] S102. According to the historical overlay error distribution, through the overlay error compensation model, obtain the target overlay compensation value distribution, where the target overlay compensation value distribution includes the mask deformation values of multiple sub-mask regions.

[0069] In an embodiment of the present application, after obtaining the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask, the historical overlay error distribution can be input into the overlay error compensation model. Since there is an association relationship between the historical overlay error distribution and each sub-mask region in the target mask, the output of the overlay error compensation model is the target overlay compensation value distribution composed of the mask deformation values of multiple sub-mask regions. That is to say, through the overlay error compensation model, combining the constructed historical overlay error distribution and the association relationship of each sub-mask region in the target mask, the mask deformation value corresponding to each sub-mask region can be obtained according to the historical overlay error distribution. Among them, the target overlay compensation value distribution includes the mask deformation values of each sub-mask region in multiple sub-mask regions.

[0070] As a possible implementation, the overlay error compensation model may include the functional relationship between the historical overlay error distribution and the target compensation parameter distribution, and the functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution, so as to realize that after inputting the historical overlay error distribution into the overlay error compensation model, the target overlay compensation value distribution is output. Among them, the target compensation parameter distribution includes multiple target compensation parameters. Therefore, after inputting the historical overlay error distribution into the overlay error compensation model, the target overlay compensation value distribution can be obtained through the functional relationship between the historical overlay error distribution and the target compensation parameter distribution in the overlay error compensation model, and the functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution in the overlay error compensation model. That is to say, by introducing the target compensation parameter into the overlay error compensation model, the target overlay compensation value distribution can be quickly and accurately output by using the target compensation parameter.

[0071] As an example, the functional relationship between the historical overlay error distribution and the target compensation parameter distribution is illustrated by the following formula.

[0072] T x (x, y) = k 1 +k 3 x + k 5 y + k 7 x 2 +k 9 xy + k 11 y 2 +k 13 x 3 +k15 x 2 y + k 17 xy 2 + k 19 y 3

[0073] T y (x, y) = k 2 + k 4 y + k 6 x + k 8 y 2 + k 10 xy + k 12 x 2 + k 14 y 3 + k 16 y 2 x + k 18 yx 2 + k 20 x 3

[0074] Among them, k 1 、k 2 , …, k 20 are the target compensation parameters for the overlay error of the lithography machine; (x, y) are the in-field coordinates in the mask area; T x (x, y) and T y (x, y) are the historical overlay errors in the X and Y directions. Figure 5 shows the historical overlay error distribution with only high-order terms.

[0075] It can be seen that the overlay error compensation model provided by this application can compensate at least 20 compensation parameters, especially can compensate for local overlay deformation in the millimeter-size range generated during mask manufacturing; and combines real-time overlay error measurement with dynamic compensation algorithms, enabling each batch of lithography operations to better adapt to error changes, and continuously optimizing the lithography accuracy through a feedback mechanism to reduce error accumulation.

[0076] The functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution is shown by the following formula.

[0077]

[0078] Among them, H 1 、H 2 、…、H 143 are the target overlay compensation value distributions of 143 sub-mask areas included in the target template.

[0079] In an embodiment of the present application, a target compensation parameter distribution is introduced into the overlay error compensation model, and a target overlay compensation value distribution is obtained based on the target compensation parameter distribution. The target compensation parameter distribution is a compensation parameter distribution obtained by optimizing multiple compensation parameter distributions using an optimization algorithm. Therefore, the target overlay compensation value distribution obtained using the target compensation parameter distribution is also an overlay compensation value distribution obtained by optimizing multiple overlay compensation value distributions using an optimization algorithm.

[0080] Specifically, after inputting the overlay compensation value distribution into the overlay error compensation model, multiple functional relationships between the historical overlay error distribution and multiple compensation parameter distributions, as well as multiple functional relationships between multiple overlay compensation value distributions and multiple compensation parameter distributions can be constructed. The multiple compensation parameter distributions include multiple compensation parameters. Optimize the functional relationships between the multiple overlay compensation value distributions and the multiple compensation parameter distributions to obtain the functional relationship between the target overlay compensation value distribution in the multiple overlay compensation value distributions and the target compensation parameter distribution in the multiple compensation parameter distributions, as well as the functional relationship between the historical overlay error distribution and the target compensation parameter distribution. That is to say, the target overlay compensation value distribution is based on an optimization algorithm, such as the least squares method, genetic algorithm, or particle swarm optimization algorithm, etc., to dynamically process the input historical overlay error distribution to generate the optimal target compensation parameter. This process effectively avoids falling into a local optimal solution through global search and multi-dimensional parameter optimization, thereby ensuring that the overlay error accuracy after compensation reaches the nanometer level.

[0081] S103, perform thermal regulation on each of the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions to obtain a deformed target mask.

[0082] In an embodiment of the present application, after obtaining the mask deformation values of the multiple sub-mask regions through the overlay error compensation model, thermal regulation can be performed on each of the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions, that is, perform deformation adjustment of thermal regulation on each sub-mask region using the mask deformation value of each sub-mask region to obtain a deformed target mask.

[0083] Specifically, the thermal regulation dose of each sub-mask region can be determined according to the mask deformation values of the multiple sub-mask regions; perform thermal regulation on each sub-mask region according to the thermal regulation dose of each sub-mask region to obtain a deformed target mask.

[0084] As a possible implementation, the mask deformation value of each sub-mask region is the thermal regulation dose of each sub-mask region, that is, the two are equal, so that the output of the overlay error compensation model is directly the thermal regulation dose, that is, directly output the command parameters for thermal regulation of the target mask, which can be directly used to guide the real-time regulation operation of the lithography machine, greatly improving the accuracy and stability of the lithography process.

[0085] As an example, refer to Figures 6 - 8 shown, which are respectively Figures 3 - 5 schematic diagrams of the target overlay compensation value distributions corresponding to three different historical overlay error distributions shown. Since the mask deformation value of each sub-mask region is the thermal regulation dose of each sub-mask region, Figures 3 - 5 input the three different historical overlay error distributions shown into the overlay error compensation model, and the obtained target overlay compensation value distribution is the thermal regulation dose distribution of the target mask. Using Figures 6 - 8 to directly display the thermal regulation doses of each sub-mask region can intuitively reflect the positional influence of overlay error compensation on different sub-mask regions.

[0086] In the embodiments of the present application, after obtaining the target overlay compensation value distribution or the thermal regulation dose distribution, based on the function relationship between the target overlay compensation value distribution or the thermal regulation dose distribution, the target overlay compensation value distribution and the target compensation parameter distribution, and the function relationship between the historical overlay error distribution and the target compensation parameter distribution, a first overlay error distribution based on the target overlay compensation value distribution can be re-obtained. Since the target overlay compensation value distribution is optimized from the function relationship between multiple overlay compensation value distributions and multiple compensation parameter distributions, the target overlay compensation value distribution is the current optimal result of overlay error compensation, and the effect of overlay error compensation for this current optimal result can be determined. Therefore, the target overlay compensation value distribution can be re-introduced into the function relationship between the target overlay compensation value distribution and the target compensation parameter distribution, and the function relationship between the historical overlay error distribution and the target compensation parameter distribution, so as to obtain the first overlay error distribution under the current optimal result. If the first overlay error distribution is greater than the error threshold, the accuracy requirement of the overlay error cannot be met. At this time, the target overlay compensation value distribution under the historical overlay error distribution can be recalculated through the overlay error compensation model.

[0087] As an example, refer to Figures 9 - 11 shown, which are respectively Figures 6 - 8 schematic diagrams of the first overlay error distribution calculated from the target overlay compensation value distribution shown. According to Figures 6 - 8 the function relationship between the target overlay compensation value distribution shown, the target overlay compensation value distribution and the target compensation parameter distribution, and the function relationship between the historical overlay error distribution and the target compensation parameter distribution, the Figures 9 - 11 first overlay error distribution shown is calculated respectively.

[0088] S104, use the deformed target mask to fabricate and form the first film layer on the second film layer.

[0089] In an embodiment of the present application, after performing deformation processing on the target mask through thermal regulation, the deformed target mask is obtained. The first film layer is fabricated on the second film layer by using the deformed target mask. Since the target mask is thermally regulated based on the target overlay compensation value distribution obtained from the historical overlay error distribution, by performing fine deformation adjustment on the target mask, the deformed target mask can perform overlay compensation on the historical overlay error distribution, reduce the overlay error, improve the overlay error compensation performance, and improve the lithography accuracy.

[0090] In an embodiment of the present application, after fabricating the first film layer on the second film layer by using the deformed target mask, the target overlay error distribution between the first film layer and the second film layer can be obtained. The target overlay error distribution includes the target overlay error values corresponding to multiple sub-mask regions included in the target mask. That is to say, the target overlay error distribution between the first film layer and the second film layer can be measured to obtain the target overlay error values between the first film layer and the second film layer corresponding to multiple sub-mask regions included in the target mask. The target overlay error distribution is the spatial distribution of the overlay error between the first film layer and the second film layer obtained after performing overlay error compensation on the historical overlay error distribution by using the target overlay compensation value distribution.

[0091] Specifically, a high-precision measurement device, such as a scanning electron microscope (SEM), an optical microscope, or a laser scanning system, can be used to measure the overlay accuracy between the first film layer and the second film layer in detail. The measurement content includes the lateral alignment error, the longitudinal alignment error, the rotation error, and the possible deformation error to ensure the precise alignment of the patterns between the first film layer and the second film layer. The overlay accuracy of the key structures and circuit regions can be focused on to verify the actual effect of performing overlay error compensation on the historical overlay error distribution by using the target overlay compensation value distribution.

[0092] As an example, refer to Figures 12 - 14 shown, which are schematic diagrams of the target overlay error distribution obtained by performing lithography by using the deformed target mask after performing thermal regulation on the target mask by using 3 different target overlay compensation value distributions shown in Figures 6 - 8 respectively. Refer to Figure 12 , which is the remaining target overlay error distribution after performing overlay error compensation by using the target overlay error distribution once. It is found that 90.11% and 95.01% of the overlay errors are compensated in the X direction and the Y direction respectively. Refer to Figure 13, which is the remaining target overlay error distribution after compensating the overlay error using the first target overlay error distribution. It is found that 84.54% and 87.46% of the overlay errors in the X and Y directions are compensated respectively. Thus, it can be seen that the overlay error compensation solution provided by this application through the overlay error compensation model can compensate up to 80% or more of the low-order overlay errors in the X and Y directions, and finally reduce the sum of the average value of the overlay error plus 3σ to below 6nm. This improvement helps to ensure the accurate implementation of circuit design and meet the technical requirements of advanced nodes of 28nm and below. Reference Figure 14 , which is the remaining target overlay error distribution after compensating the high-order overlay error using the first target overlay error distribution. It is found that 77.33% and 72.49% of the overlay errors in the X and Y directions are compensated respectively. Thus, it can be seen that the overlay error compensation solution provided by this application through the overlay error compensation model can compensate about 70% or more of the high-order overlay errors. By effectively compensating the high-order overlay errors, the lithography accuracy can be significantly improved.

[0093] In the embodiment of this application, after obtaining the target overlay error distribution, it is confirmed whether the target overlay error distribution is less than or equal to the error threshold. If the target overlay error distribution is less than or equal to the error threshold, it is confirmed that the overlay error compensation is qualified; if the target overlay error distribution is greater than the error threshold, it is confirmed that the overlay error compensation is unqualified, and the new target overlay compensation value distribution can be calculated continuously using the historical overlay error distribution and the overlay error compensation model, and the new target overlay compensation value distribution can be used to continue the overlay error compensation in order to maximize the overlay error compensation effect.

[0094] In the embodiment of this application, after manufacturing the first film layer on the second film layer using the deformed target mask in the current batch and obtaining the new target overlay error distribution, the target overlay error distribution can be confirmed as the historical overlay error distribution when using the target mask to manufacture the first film layer on the second film layer in the next batch, so as to provide an accurate overlay error compensation solution for the next batch of lithography, ensure that each lithography operation can better adapt to the change of overlay error, and improve the pattern alignment accuracy and stability in the whole production process.

[0095] In practical applications, the overlay error compensation solution provided by this application through the overlay error compensation model is applicable to various lithography equipment and different types of lithography processes, including extreme ultraviolet lithography (EUVL), deep ultraviolet lithography (DUVL), nanoimprint lithography (NIL), surface plasmon lithography (SPL), etc., and has wide applicability. Whether in semiconductor manufacturing with high-precision requirements or in the field of micro-nano structure processing, it can provide an effective mask-based compensation solution.

[0096] It can be seen that the method for compensating overlay error through the overlay error compensation model in this application can automatically calculate and adjust the target overlay error distribution, reduce human intervention and operation errors, reduce the time for repeated adjustment and process verification, and significantly improve production efficiency and product yield. Through dynamic compensation and precise adjustment, the overlay error in each batch of production can be maintained within the set error threshold, thereby reducing the scrap rate and rework rate. By adopting thermal regulation compensation based on the target mask, this application can effectively cope with various complex error sources in the lithography process. The compensation scheme is dynamically adjusted according to the actual historical overlay error, so that even under extreme process conditions, high stability and high reliability of the lithography process can still be maintained. By precisely regulating the thermal regulation dose of each sub-mask region in the target mask, this application optimizes the thermal regulation compensation scheme and effectively reduces the overlay error caused by thermal effects in the lithography process.

[0097] Based on the overlay error compensation method provided in the above embodiments, the embodiments of this application also provide an overlay error compensation device. Refer to Figure 15 As shown in the figure, it is a schematic structural diagram of an overlay error compensation device provided by the embodiments of this application. The overlay error compensation device 200 includes:

[0098] An acquisition unit 210, configured to acquire the historical overlay error distribution between the first film layer and the second film layer corresponding to the target mask, where the historical overlay error distribution is the historical overlay error values corresponding to multiple sub-mask regions included in the target mask;

[0099] An obtaining unit 220, configured to obtain a target overlay compensation value distribution through an overlay error compensation model according to the historical overlay error distribution, where the target overlay compensation value distribution is the mask deformation values of the multiple sub-mask regions;

[0100] A regulation unit 230, configured to perform thermal regulation on each sub-mask region in the multiple sub-mask regions according to the mask deformation values of the multiple sub-mask regions to obtain a deformed target mask;

[0101] A manufacturing unit 240, configured to manufacture and form the first film layer on the second film layer by using the deformed target mask.

[0102] As a possible implementation manner, the obtaining unit 220 is configured to:

[0103] According to the historical overlay error distribution, through the functional relationship between the historical overlay error distribution and the target compensation parameter distribution in the overlay error compensation model, and the functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution in the overlay error compensation model, obtain the target overlay compensation value distribution, where the target overlay compensation value distribution is the mask deformation values of the multiple sub-mask regions, and the target compensation parameter distribution includes multiple target compensation parameters.

[0104] As a possible implementation, the device further includes: a construction unit;

[0105] The construction unit is configured to:

[0106] Construct a plurality of functional relationships between the historical overlay error distribution and the plurality of compensation parameter distributions, and a plurality of functional relationships between the plurality of overlay compensation value distributions and the plurality of compensation parameter distributions, where the plurality of compensation parameter distributions include a plurality of compensation parameters;

[0107] Optimize the functional relationships between the plurality of overlay compensation value distributions and the plurality of compensation parameter distributions to obtain the functional relationship between the target overlay compensation value distribution among the plurality of overlay compensation value distributions and the target compensation parameter distribution among the plurality of compensation parameter distributions, and the functional relationship between the historical overlay error distribution and the target compensation parameter distribution.

[0108] As a possible implementation, the device further includes: a target overlay error distribution acquisition unit;

[0109] The target overlay error distribution acquisition unit is configured to:

[0110] After manufacturing and forming the first film layer on the second film layer by using the deformed target mask, acquire the target overlay error distribution between the first film layer and the second film layer, where the target overlay error distribution is the target overlay error values corresponding to a plurality of sub-mask regions included in the target mask.

[0111] As a possible implementation, the device further includes: a determination unit;

[0112] The determination unit is configured to:

[0113] Determine the target overlay error distribution as the historical overlay error distribution when manufacturing and forming the first film layer on the second film layer by using the target mask in the next batch.

[0114] As a possible implementation, the device further includes: a confirmation unit;

[0115] The confirmation unit is configured to:

[0116] Confirm whether the target overlay error distribution is less than or equal to an error threshold. If it is less than or equal to, confirm that the overlay error compensation is qualified.

[0117] As a possible implementation, the regulation unit 230 is configured to:

[0118] Determine the thermal regulation dose for each sub-mask region among the plurality of sub-mask regions according to the mask deformation values of the plurality of sub-mask regions;

[0119] Thermally regulate each sub-mask region according to the thermal regulation dose of each sub-mask region to obtain a deformed target mask.

[0120] Based on the overlay error compensation method provided in the above embodiments, the embodiments of the present application also provide an overlay error compensation device, and the overlay error compensation device includes:

[0121] A processor and a memory, and the number of processors can be one or more. In some embodiments of the present application, the processor and the memory can be connected through a bus or other means.

[0122] The memory may include a read-only memory and a random access memory, and provide instructions and data to the processor. A part of the memory may also include NVRAM. The memory stores an operating system and operation instructions, executable modules or data structures, or subsets thereof, or extended sets thereof, where the operation instructions may include various operation instructions for implementing various operations. The operating system may include various system programs for implementing various basic services and processing hardware-based tasks.

[0123] The processor controls the operation of the terminal device, and the processor may also be referred to as a CPU.

[0124] The method disclosed in the embodiments of the present application above can be applied to a processor or implemented by a processor. The processor can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor or by instructions in software form. The above processor can be a general-purpose processor, DSP, ASIC, FPGA or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a mature storage medium in the art such as a random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register, etc. This storage medium is located in the memory, and the processor reads the information in the memory and combines its hardware to complete the steps of the above method.

[0125] The embodiments of the present application also provide a computer-readable medium for storing program code, and the program code is used to execute any one of the methods in the foregoing various embodiments.

[0126] In the context of the present application, a computer-readable medium may be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a computer-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0127] It should be noted that the computer-readable medium in the present application may be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. A computer-readable storage medium may, for example, be—but is not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus, or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which computer-readable program code is carried. Such a propagated data signal may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on a computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.

[0128] The above computer-readable medium may be included in the above electronic device; or may exist separately without being assembled into the electronic device.

[0129] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the apparatus embodiments, since they are basically similar to the method embodiments, they are described relatively simply, and for the relevant parts, reference can be made to the description in the method embodiments.

[0130] The above are only the preferred embodiments of the present application. Although the present application has been disclosed above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make many possible changes and modifications to the technical solution of the present application, or modify it into equivalent embodiments with equivalent changes, without departing from the scope of the technical solution of the present application. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of the protection of the technical solution of the present application.

Claims

1. A method for compensating overlay error, characterized in that: include: Acquire a historical overlay error distribution between a first film layer and a second film layer corresponding to a target mask, wherein the historical overlay error distribution includes historical overlay error values ​​corresponding to a plurality of sub-mask regions included in the target mask; According to the historical overlay error distribution, a target overlay compensation value distribution is obtained through an overlay error compensation model, wherein the target overlay compensation value distribution includes mask deformation values ​​of the plurality of sub-mask regions; performing thermal control on each of the plurality of sub-mask regions according to the mask deformation values ​​of the plurality of sub-mask regions to obtain a deformed target mask; The first film layer is formed on the second film layer by using the deformed target mask.

2. The method according to claim 1, characterized in that The target overlay compensation value distribution is obtained according to the historical overlay error distribution through an overlay error compensation model, wherein the target overlay compensation value distribution includes the mask deformation values ​​of the plurality of sub-mask regions, including: According to the historical overlay error distribution, a target overlay compensation value distribution is obtained through the functional relationship between the historical overlay error distribution and the target compensation parameter distribution in the overlay error compensation model, and the functional relationship between the target overlay compensation value distribution and the target compensation parameter distribution in the overlay error compensation model, the target overlay compensation value distribution includes the mask deformation values ​​of the multiple sub-mask areas, and the target compensation parameter distribution includes multiple target compensation parameters.

3. The method according to claim 2, characterized in that The method further comprises: Constructing multiple functional relationships between the historical overlay error distribution and multiple compensation parameter distributions, and multiple functional relationships between multiple overlay compensation value distributions and the multiple compensation parameter distributions, wherein the multiple compensation parameter distributions include multiple compensation parameters; The functional relationship between the multiple overlay compensation value distributions and the multiple compensation parameter distributions is optimized to obtain the functional relationship between the target overlay compensation value distribution in the multiple overlay compensation value distributions and the target compensation parameter distribution in the multiple compensation parameter distributions, as well as the functional relationship between the historical overlay error distribution and the target compensation parameter distribution.

4. The method according to claim 2, characterized in that: The method further comprises: After the first film layer is manufactured on the second film layer using the deformed target mask, a target overlay error distribution between the first film layer and the second film layer is obtained, wherein the target overlay error distribution includes target overlay error values ​​corresponding to multiple sub-mask regions included in the target mask.

5. The method according to claim 4, characterized in that The method further comprises: The target overlay error distribution is determined as a historical overlay error distribution when the first film layer is formed on the second film layer by using the target mask in a next batch.

6. The method according to claim 4, characterized in that The method further comprises: It is confirmed whether the target overlay error distribution is less than or equal to the error threshold. If so, it is confirmed that the overlay error compensation is qualified.

7. The method according to any one of claims 1 to 6, characterized in that: The step of performing thermal control on each of the plurality of sub-mask regions according to the mask deformation values ​​of the plurality of sub-mask regions to obtain a deformed target mask comprises: determining a thermal control dose of each of the plurality of sub-mask areas according to the mask deformation values ​​of the plurality of sub-mask areas; Thermal control is performed on each sub-mask region according to the thermal control dose of each sub-mask region to obtain a deformed target mask.

8. An overlay error compensation device, characterized in that: include: An acquisition unit, configured to acquire a historical overlay error distribution between a first film layer and a second film layer corresponding to a target mask, wherein the historical overlay error distribution includes historical overlay error values ​​corresponding to a plurality of sub-mask regions included in the target mask; An obtaining unit, configured to obtain a target overlay compensation value distribution according to the historical overlay error distribution and through an overlay error compensation model, wherein the target overlay compensation value distribution includes mask deformation values ​​of the plurality of sub-mask regions; a control unit, configured to perform thermal control on each of the plurality of sub-mask regions according to the mask deformation values ​​of the plurality of sub-mask regions to obtain a deformed target mask; A manufacturing unit is used to form the first film layer on the second film layer by using the deformed target mask.

9. An overlay error compensation device, characterized in that: The device comprises: a processor and a memory; The memory is used to store instructions; The processor is used to execute the instructions in the memory to perform the method according to any one of claims 1 to 7.

10. A computer-readable medium, characterized in that The method comprises instructions which, when executed on a computer, cause the computer to execute the method according to any one of claims 1 to 7.

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