Memory access monitoring method, electronic equipment and storage medium

By replacing the hot spot memory access instruction as a preset transfer instruction and running the monitoring code block to calculate the memory access address, the applicability problem of relying on SPE technology in the existing technology is solved, and efficient memory access monitoring of equipment that does not support SPE technology is achieved.

CN120123175APending Publication Date: 2025-06-10PHYTIUM TECH CO LTD
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Patent Information

Application Number
CN202510186311.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-19
Publication Date
2025-06-10

AI Technical Summary

Technical Problem

In the prior art, application monitoring based on ARM architecture relies on statistical analysis extension (SPE) technology, resulting in poor applicability, especially in the inability to achieve effective memory access monitoring on target devices that do not support SPE technology.

Method used

By generating preset replacement code blocks, the hot spot memory access instruction is replaced with preset transfer instructions, and the preset transfer instruction is used to jump to the preset replacement code block, the monitoring code block is run to calculate the memory access address, and the monitoring information is recorded to realize the memory access monitoring of dynamic instrumentation.

Benefits of technology

This method can be applied to target devices that do not support SPE technology, realizes the simplicity and high applicability of memory access monitoring, and avoids the problems of insufficient space of the original binary code and instruction modification.

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Abstract

The invention provides a memory access monitoring method, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the following steps: generating a preset replacement code block according to a hotspot memory access instruction, and replacing the hotspot memory access instruction with a preset transfer instruction so as to skip to the preset replacement code block through the preset transfer instruction; running the monitoring code block, and calculating a memory access address of the hotspot memory access instruction; the monitoring information is acquired according to the memory access address, and the monitoring information is recorded, so that the memory access address of the hotspot memory access instruction can be acquired through the monitoring code block corresponding to the hotspot memory access instruction, and further monitoring information is acquired based on the memory access address. Memory access monitoring can be carried out on the target application in a dynamic instrumentation mode, the method can be suitable for target equipment which does not support the SPE technology, and the method has the advantages of being simple in monitoring and high in applicability.
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Description

Technical Field

[0001] This application relates to the field of computer technology, and particularly to a memory access monitoring method, an electronic device, and a storage medium. Background Art

[0002] A memory access instruction, also known as a memory access command, is an instruction used in computer programming to read data from memory (load instruction) or write data to memory (store instruction). By monitoring memory access instructions during the design process, effective memory management can be achieved.

[0003] In the prior art, when monitoring an application based on the ARM architecture, the Statistical Profiling Extension (SPE) technology is mainly used for monitoring to obtain the memory access situation of memory access instructions.

[0004] It can be seen that the existing memory access monitoring method depends on the SPE technology, and thus has poor applicability. Summary of the Invention

[0005] The purpose of this application is to provide a memory access monitoring method, an electronic device, and a storage medium, which can improve applicability, aiming at the deficiencies in the above-mentioned prior art.

[0006] To achieve the above purpose, the technical solutions adopted in the embodiments of this application are as follows:

[0007] In a first aspect, the present invention provides a memory access monitoring method, and the method includes:

[0008] Generating a preset replacement code block according to a hot memory access instruction, and replacing the hot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block; wherein, the preset transfer instruction is used to indicate the starting address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction;

[0009] Running the monitoring code block to calculate the memory access address of the hot memory access instruction;

[0010] Obtaining monitoring information according to the memory access address, and recording the monitoring information.

[0011] In an optional implementation manner, the obtaining monitoring information according to the memory access address and recording the monitoring information includes:

[0012] Recording a first time and a second time before and after the hot memory access instruction runs;

[0013] Calculate the time difference between the second time and the first time to obtain the access latency of the hot memory access instruction.

[0014] In an alternative embodiment, before running the monitoring code block and calculating the memory access address of the hot memory access instruction, it includes:

[0015] Save the register context to the target stack;

[0016] After running the monitoring code block and calculating the memory access address of the hot memory access instruction, it includes: Restore the register context according to the target stack.

[0017] In an alternative embodiment, recording the first time and the second time before and after the hot memory access instruction runs includes:

[0018] Record the first time and run the hot memory access instruction;

[0019] Update the target stack according to the execution result of the hot memory access instruction;

[0020] Restore the register context according to the target stack.

[0021] In an alternative embodiment, running the monitoring code block and calculating the memory access address of the hot memory access instruction includes:

[0022] Run the monitoring code block, disassemble and parse the hot memory access instruction to obtain the memory access code description data structure corresponding to the hot memory access instruction;

[0023] Determine the memory access address of the hot memory access instruction according to the memory access code description data structure.

[0024] In an alternative embodiment, after restoring the register context according to the target stack, it further includes:

[0025] Return to the next instruction of the hot memory access instruction.

[0026] In an alternative embodiment, before generating the preset replacement code according to the hot memory access instruction, it further includes:

[0027] Sample and obtain the initial hot instruction during the running of the target application;

[0028] If it is determined that the initial hot instruction is not a hot memory access instruction, search for the hot memory access instruction according to the preset rules.

[0029] In an alternative embodiment, if it is determined that the initial hot instruction is not a hot memory access instruction, searching for the hot memory access instruction according to the preset rules includes:

[0030] If it is determined that the initial hot-spot instruction is not a hot-spot memory access instruction, then check whether there is a hot-spot memory access instruction among the first N instructions before the initial hot-spot instruction. If there is, use the first hot-spot memory access instruction closest to the initial hot-spot instruction as the hot-spot memory access instruction.

[0031] If there is no hot-spot memory access instruction among the first N instructions before the initial hot-spot instruction, then check whether there is a hot-spot memory access instruction among the next M instructions after the initial hot-spot instruction. If there is, use the second hot-spot memory access instruction closest to the initial hot-spot instruction as the hot-spot memory access instruction, where N and M are integers greater than 1.

[0032] In an optional implementation, after obtaining the monitoring information according to the memory access address and recording the monitoring information, it further includes:

[0033] Restore the preset transfer instruction to the hot-spot memory access instruction and unload the preset replacement code.

[0034] In an optional implementation, the monitoring information includes: the memory access address of the hot-spot memory access instruction and / or the access latency size.

[0035] In a second aspect, the present invention provides a memory access monitoring device, including:

[0036] A generation module, configured to generate a preset replacement code block according to a hot-spot memory access instruction, and replace the hot-spot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block; wherein, the preset transfer instruction is used to indicate the start address of the preset replacement code block corresponding to the hot-spot memory access instruction, and the preset replacement code block includes the hot-spot memory access instruction and a monitoring code block for monitoring the hot-spot memory access instruction;

[0037] An operation module, configured to run the monitoring code block and calculate the memory access address of the hot-spot memory access instruction;

[0038] An acquisition module, configured to obtain monitoring information according to the memory access address and record the monitoring information.

[0039] In an optional implementation, the acquisition module is specifically configured to record a first time and a second time before and after the hot-spot memory access instruction runs;

[0040] Calculate the time difference between the second time and the first time to obtain the access latency of the hot-spot memory access instruction.

[0041] In an optional implementation, the operation module is specifically configured to save the register context to the target stack;

[0042] After running the monitoring code block and calculating the memory access address of the hot memory access instruction, the following steps are included:

[0043] Restore the register context according to the target stack.

[0044] In an alternative embodiment, the acquisition module is specifically configured to record the first time and run the hot memory access instruction;

[0045] Update the target stack according to the execution result of the hot memory access instruction;

[0046] Restore the register context according to the target stack.

[0047] In an alternative embodiment, the running module is specifically configured to run the monitoring code block, disassemble and parse the hot memory access instruction, and obtain the memory access code description data structure corresponding to the hot memory access instruction;

[0048] Determine the memory access address of the hot memory access instruction according to the memory access code description data structure.

[0049] In an alternative embodiment, the acquisition module is further configured to return the next instruction of the hot memory access instruction.

[0050] In an alternative embodiment, the generation module is further configured to sample and obtain the initial hot instruction during the running of the target application;

[0051] If it is determined that the initial hot instruction is not a hot memory access instruction, search for the hot memory access instruction according to a preset rule.

[0052] In an alternative embodiment, the generation module is specifically configured to, if it is determined that the initial hot instruction is not a hot memory access instruction, search whether there is a hot memory access instruction among the first N instructions of the initial hot instruction. If there is, use the first hot memory access instruction closest to the initial hot instruction as the hot memory access instruction;

[0053] If there is no hot memory access instruction among the first N instructions of the initial hot instruction, search whether there is a hot memory access instruction among the next M instructions of the initial hot instruction. If there is, use the second hot memory access instruction closest to the initial hot instruction as the hot memory access instruction, where N and M are integers greater than 1.

[0054] In an alternative embodiment, the acquisition module is further configured to restore the preset transfer instruction to the hot memory access instruction and uninstall the preset replacement code.

[0055] In an alternative embodiment, the monitoring information includes: the memory access address and / or the access latency size of the hot memory access instruction.

[0056] In a third aspect, the present invention provides an electronic device, including: a processor, a storage medium, and a bus. The storage medium stores machine-readable instructions executable by the processor. When the electronic device runs, the processor communicates with the storage medium through the bus. The processor executes the machine-readable instructions to perform the steps of the memory access monitoring method according to any one of the foregoing embodiments.

[0057] In a fourth aspect, the present invention provides a computer-readable storage medium. A computer program is stored on the computer-readable storage medium. When the computer program is run by a processor, it performs the steps of the memory access monitoring method according to any one of the foregoing embodiments.

[0058] The beneficial effects of this application are as follows:

[0059] A memory access monitoring method, an electronic device, and a storage medium provided by an embodiment of this application. The method includes: generating a preset replacement code block according to a hot memory access instruction, and replacing the hot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block; wherein, the preset transfer instruction is used to indicate the starting address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction; running the monitoring code block to calculate the memory access address of the hot memory access instruction; obtaining monitoring information according to the memory access address and recording the monitoring information, which realizes that the memory access address of the hot memory access instruction can be obtained through the monitoring code block corresponding to the hot memory access instruction, and further monitoring information can be obtained based on the memory access address. Compared with the prior art, it realizes that the target application can be monitored for memory access by means of dynamic instrumentation, and can be applied to target devices that do not support the SPE technology, and has the characteristics of simple monitoring and strong applicability. Description of the Drawings

[0060] In order to more clearly illustrate the technical solutions of the embodiments of this application, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of this application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0061] Figure 1 It is a flowchart of a memory access monitoring method provided by an embodiment of this application;

[0062] Figure 2 It is a memory access monitoring diagram provided by an embodiment of this application;

[0063] Figure 3 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0064] Figure 4 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0065] Figure 5 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0066] Figure 6 It is a monitoring schematic diagram of a monitoring code block provided by an embodiment of the present application;

[0067] Figure 7 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0068] Figure 8 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0069] Figure 9 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application;

[0070] Figure 10 It is a schematic diagram of functional modules of a memory access monitoring device provided by an embodiment of the present application;

[0071] Figure 11 It is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0072] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0073] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application that is claimed, but merely represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the scope of protection of the present application.

[0074] It should be noted that: like reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0075] In the prior art, when monitoring an application based on the ARM architecture, the Statistical Profiling Extension (SPE) technology is mainly used for monitoring to obtain the memory access situation of memory access instructions. Among them, SPE supports accurately obtaining the instruction being executed when an event is triggered, and debuggers can thereby understand the memory access situation of the instruction.

[0076] Therefore, the existing memory access monitoring method depends on the SPE technology. Then, for a processor that does not support the SPE technology, the memory access monitoring function cannot be implemented.

[0077] In view of this, the present application provides a memory access monitoring method, which can be applicable to a target device that does not support the SPE technology and has the characteristic of strong applicability.

[0078] Figure 1 It is a flowchart of a memory access monitoring method provided by an embodiment of the present application. Figure 2 It is a memory access monitoring schematic diagram provided by an embodiment of the present application. Optionally, the execution subject of this memory access monitoring method can be a target device such as a computer, a server, a processor, etc. Optionally, this memory access monitoring method can be applied to monitor the memory access of software or applications in any scenario (such as a shopping scenario, a chat scenario), as Figure 1 shown, this method may include:

[0079] Step 101, generate a preset replacement code block according to the hot memory access instruction, and replace the hot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block.

[0080] Among them, the preset transfer instruction is used to indicate the starting address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction.

[0081] Among them, the hot memory access instruction, that is, the memory access instruction that is frequently called during the code running process, and the memory access instruction, that is, the instruction used to interact with the main memory (RAM), such as Load (load) instruction, Store (store) instruction, etc., which are not limited herein.

[0082] Optionally, when specifically monitoring, the present application performs monitoring based on the dynamic instrumentation method, as Figure 2As shown, for example, the original binary code corresponding to the target application includes: three hot memory access instructions a, b, and c. Each hot memory access instruction can correspond to a preset transfer instruction and a preset replacement code block. Taking the hot memory access instruction a as an example, the hot memory access instruction a corresponds to the transfer instruction a, and through this transfer instruction a, it is possible to jump to the replacement code block a. Specifically, when performing the jump, it is possible to jump to the starting address of the preset replacement code block through the preset transfer instruction, realizing the dynamic link between the original binary code and the preset replacement code block.

[0083] It can be understood that after replacing the hot memory access instruction with the preset transfer instruction, when running to the position where the hot memory access instruction is located, it will jump to the preset replacement code for execution through the starting address indicated by the preset transfer instruction, making the preset replacement code effective. The preset replacement code block includes a monitoring code block for monitoring the hot memory access instruction, that is, the monitoring of the hot memory access instruction will be realized while running the hot memory access instruction. It can be seen that the monitoring method provided in the present application has the characteristic of simple setting, so it can be applied to target devices that do not support the SPE technology, and has strong applicability.

[0084] In addition, by applying the embodiments of the present application, compared with the method of dynamically translating the original binary code corresponding to the hot memory access instruction into a binary code including a monitoring function, it is possible to avoid the problems of insufficient original binary code space and modification of the original binary instruction, and it is possible to realize batch monitoring of multiple hot memory access instructions, with the characteristics of simple monitoring and strong applicability.

[0085] Step 102: Run the monitoring code block to calculate the memory access address of the hot memory access instruction.

[0086] The memory access address of the hot memory access instruction can indicate the address of the memory location accessed when executing the hot memory access instruction.

[0087] In some embodiments, the monitoring code block may include calculation code for the memory access address of the hot memory access instruction. When running the monitoring code block of the preset replacement code block, the memory access address of the hot memory access instruction can be obtained by running this calculation code.

[0088] Step 103: Obtain the monitoring information according to the memory access address and record the monitoring information.

[0089] In some embodiments, the monitoring information may include: the memory access address of the hot memory access instruction, the access latency of the hot memory access instruction, the usage frequency of the hot memory access instruction, etc., which are not limited herein, and the type of monitoring information can be flexibly configured according to the actual application scenario.

[0090] Of course, in some embodiments, after obtaining the memory access address of the hot memory access instruction, other types of monitoring information can be further obtained and recorded. For example, based on the memory access addresses of the hot memory access instructions in an application, the distribution of the memory access addresses of the application can be determined. Of course, the specific monitoring information is not limited thereto and can be flexibly set according to the actual application scenario.

[0091] Optionally, the hot memory access instruction is recorded as an instruction during the operation of the target application. It can be understood that if statistical analysis is performed on each hot memory access instruction during the operation of the target application, then through this monitoring information, it can be further characterized: the memory access density of the target application, the throughput capacity of the memory system in the target device where the target application is deployed, the impact of memory access on the performance of the target application, the memory access time of the target application, etc., which are not limited herein. Among them, it can be understood that according to the actual monitoring purpose, a monitoring code block with one or more functions can be set.

[0092] Viewed in combination with the target application to which the hot memory access instruction belongs, after obtaining the monitoring information of the hot memory access instruction, the memory of the target device where the target application is deployed can be managed based on this, or alternatively, the memory access code logic of the target application can be optimized to improve the running performance of the target application.

[0093] Optionally, the ways to manage the memory of the target device where the target application is deployed can include but are not limited to the following: For example, if most of the memory accessed by a hot memory access instruction is cache miss, then it can be considered to set the memory page it accesses as non-cacheable to avoid contaminating the cache with their access; or, if it is expected that the access of a hot memory access instruction will not affect the hardware data prefetch function, an instruction to intervene in the hardware prefetch can be inserted here; or, based on the hot memory access instruction, the relationship between the thread to which it belongs and the accessed memory address can be discovered, so as to better determine the node binding strategy that should be adopted for the corresponding memory area. For example, if this always accesses the memory allocated through a certain context and this memory is always accessed by certain threads, then a label can be established for the allocation of such memory to make them allocate adjacent memory areas, so that these memories can be set to be bound to a certain node or interleaved among certain nodes while interfering with other memory allocations.

[0094] Of course, it should be noted that the management of the memory based on the monitoring information of the hot memory access instruction is not limited to the above examples, and the management method can be flexibly set according to the actual application scenario.

[0095] In summary, the embodiment of the present application provides a memory access monitoring method, which includes: generating a preset replacement code block according to a hot memory access instruction, and replacing the hot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block; wherein, the preset transfer instruction is used to indicate the starting address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction; running the monitoring code block, calculating the memory access address of the hot memory access instruction; obtaining monitoring information according to the memory access address, and recording the monitoring information, which realizes that the memory access address of the hot memory access instruction can be obtained through the monitoring code block corresponding to the hot memory access instruction, and further monitoring information can be obtained based on the memory access address. Compared with the prior art, it realizes that the memory access of the target application can be monitored by means of dynamic instrumentation, and can be applied to target devices that do not support the SPE technology, and has the characteristics of simple monitoring and strong applicability.

[0096] Figure 3 FIG. is a schematic flow chart of another memory access monitoring method provided by the embodiment of the present application. In an alternative embodiment, as Figure 3 shown, the above-mentioned obtaining monitoring information according to the memory access address and recording the monitoring information includes:

[0097] Step 201, record the first time and the second time before and after the hot memory access instruction runs.

[0098] Step 202, calculate the time difference between the second time and the first time to obtain the access latency of the hot memory access instruction.

[0099] Optionally, the monitoring information may include: the access latency of the hot memory access instruction, which may indicate the time required from the start of execution of the hot memory access instruction to obtaining the memory data.

[0100] In some embodiments, the first time and the second time may be recorded before and after the hot memory access instruction runs respectively, and the access latency of the hot memory access instruction may be obtained by calculating the time difference between the second time and the first time.

[0101] Figure 4 FIG. is a schematic flow chart of another memory access monitoring method provided by the embodiment of the present application. In an alternative embodiment, as Figure 4 shown, before the above-mentioned running the monitoring code block and calculating the memory access address of the hot memory access instruction, it includes:

[0102] Step 301, save the register context to the target stack.

[0103] Among them, since the value of the register will change when the running monitoring code block is executed, it is necessary to save the register context to the target stack when the running monitoring code block is executed, so that the relevant restoration of the register can be performed through the target stack after the running monitoring code block, to ensure the normal execution of subsequent hot memory access instructions.

[0104] Correspondingly, after calculating the memory access address of the hot memory access instruction, the above-mentioned running monitoring code block includes:

[0105] Step 302, restore the register context according to the target stack.

[0106] Among them, considering that the value of the register will be modified when calculating the memory access address of the hot memory access instruction, and this modification will cause the hot memory access instruction to be unable to execute correctly. Therefore, after calculating the memory access address of the hot memory access instruction, the register context can be restored according to the content held in the target stack, so that the state of the register is exactly the same before and after the step of "running the monitoring code block and calculating the memory access address of the hot memory access instruction".

[0107] It should be noted that in some embodiments, considering that after subsequent steps such as obtaining and recording monitoring information, the register context also needs to be restored again. Optionally, when executing step 302, the top state of the target stack can be not adjusted. That is, when restoring the register context in step 302, the top state of the target stack is not adjusted, and after executing the next instruction to return to the hot memory access instruction, the top state of the target stack is adjusted, so as to avoid multiple adjustments of the top state of the target stack and improve the execution efficiency of the memory access monitoring method. Specifically, since the monitoring information has not been output at this time, if the method of adjusting the stack top is used to restore the context, it will cause all the data to be pushed onto the stack again later, resulting in unnecessary overhead.

[0108] Figure 5 As shown in the flowchart of another memory access monitoring method provided by the embodiments of the present application. In an alternative embodiment, Figure 5 as shown, the above-mentioned recording of the first time and the second time before and after the execution of the hot memory access instruction includes:

[0109] Step 401, record the first time and execute the hot memory access instruction.

[0110] Among them, before executing the hot memory access instruction, the first time can be recorded; based on the recorded first time, the hot memory access instruction can be executed.

[0111] It can be understood that in different application scenarios, the hot memory access instruction can correspond to different memory access purposes. For example, in a certain scenario, the hot memory access instruction can include an ldr memory access instruction for loading data from memory into a register.

[0112] Step 402: Update the target stack according to the execution result of the hot memory access instruction.

[0113] Optionally, the execution of the hot memory access instruction modifies the values of some registers. At this time, the values of the registers saved in the target stack can be updated according to the modified register values to achieve synchronous update of the target stack.

[0114] Step 403: Restore the register context according to the target stack.

[0115] In some embodiments, after executing step 402, if it is still necessary to further detect the hot memory access instruction using the execution result of the hot memory access instruction, optionally, a specific monitoring function can be run after executing step 402 to implement the specific detection function.

[0116] Of course, the execution timing of the monitoring function is not limited to this and can be flexibly set according to the actual application scenario.

[0117] Optionally, after completing all monitoring purposes, at this time, the register context can be restored according to the values of the registers saved on the target stack, so that the execution of the monitoring code block does not affect the execution of subsequent other instructions, improving the applicability of the method of this application.

[0118] In an alternative embodiment, after restoring the register context according to the target stack as described above, it further includes: returning to the next instruction of the hot memory access instruction.

[0119] Optionally, the next instruction of the current hot memory access instruction can be: a new hot memory access instruction, or other non-hot memory access instructions, which are not limited herein and can vary according to different application scenarios.

[0120] Applying the embodiments of this application realizes that after completing the monitoring of the hot memory access instruction, it can accurately jump to the next instruction of the hot memory access instruction, so that the next instruction can run normally, ensuring that the introduction of the monitoring function does not affect the normal operation of other instructions.

[0121] Figure 6 It is a monitoring schematic diagram of a monitoring code block provided by an embodiment of this application. Optionally, the monitoring logic of the monitoring code block can refer to the following steps, as Figure 6 shown, including:

[0122] Step 411: Save the register context to the target stack.

[0123] Step 412: Calculate and record the memory access address of the hot memory access instruction.

[0124] Optionally, the memory access address of the calculated hot access instruction can be specifically recorded in the shared memory. Of course, the specific recording location is not limited to this.

[0125] Step 413: Restore the register context according to the target stack, but do not adjust the stack top state of the target stack.

[0126] Step 414: Record the first time before the hot access instruction runs.

[0127] Step 415: Run the hot access instruction and update the target stack according to the execution result of the hot access instruction.

[0128] Step 416: Record the second time after the hot access instruction runs, calculate the time difference between the second time and the first time, and obtain the access latency of the hot access instruction.

[0129] Step 417: Restore the register context according to the target stack and adjust the stack top state of the target stack.

[0130] Step 418: Run the specified jump instruction to jump to the next instruction of the hot access instruction.

[0131] For example, as shown in Figure 5 a certain hot access instruction is ldr x4, [x10], #16. Among them, the execution of the hot access instruction ldr x4, [x10], #16 will modify the values of the x4 and x10 registers. Therefore, the register context can be saved to the target stack in step 411. Optionally, the register context can include the values of all registers. For example, the values of 31 registers from x0 to x30 can be included.

[0132] Furthermore, considering that step 412 may modify the values of some registers, resulting in the incorrect execution of the hot access instruction ldr x4, [x10], #16, that is, step 415 cannot run normally. Therefore, the register context can be restored according to the content held in the target stack in step 413, so that the register state when executing step 415 is exactly the same as the register state when executing step 411.

[0133] Optionally, if the access latency of the hot access instruction needs to be monitored during the monitoring process, then the first time before the hot access instruction runs can be recorded in step 414. After the recording is completed, step 415 can be executed, that is, run the hot access instruction ldr x4, [x10], #16.

[0134] It can be understood that the execution of the hot memory access instruction ldr x4, [x10], #16 will modify the values of the x4 and x10 registers. Therefore, after the execution of the hot memory access instruction ldr x4, [x10], #16, the values of x4 and x10 saved on the target stack can be modified according to the values of the x4 and x10 registers, so that the values of the registers maintained on the target stack are synchronously updated.

[0135] Among them, after the update of the target stack is implemented, step 416 can be executed, that is, record the second time after the hot memory access instruction runs, and calculate the time difference between the two according to the second time and the previously recorded first time, so as to obtain the access latency of the hot memory access instruction ldr x4, [x10], #16.

[0136] After the calculation of the access latency is completed, further, execute step 417 to restore the register context according to the values of the registers saved on the target stack. At this time, it will be found that compared with the values of each register in step 411, only the values of the x4 and x10 registers have changed, and the values of the remaining registers are the same as those in the execution of step 411.

[0137] Applying the present application realizes memory access monitoring for hot memory access instructions, which will neither affect the normal operation of the hot memory access instructions nor can it achieve the purpose of memory access monitoring, and further can synchronously implement the monitoring function during the operation process.

[0138] Figure 7 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application. In an alternative embodiment, as Figure 7 shown, the above-mentioned running monitoring code block calculates the memory access address of the hot memory access instruction, including:

[0139] Step 501, run the monitoring code block to disassemble and parse the hot memory access instruction to obtain the memory access code description data structure corresponding to the hot memory access instruction.

[0140] Step 502, determine the memory access address of the hot memory access instruction according to the memory access code description data structure.

[0141] Optionally, the hot memory access instruction can be binary code. The monitoring code block can include a disassembly function module. When monitoring it, the hot memory access instruction can be disassembled and parsed to generate a corresponding memory access code description data structure. In some embodiments, the disassembly function module can be set according to the preset assembly logic corresponding to the target device.

[0142] In some embodiments, the memory access code description data structure may include: change parameters of general-purpose registers, and characterize the relationship between the memory access address of a hot memory access instruction and the saved register context, that is, how to calculate the accessed memory cell address based on the saved register context.

[0143] Based on the above description, while executing a hot memory access instruction, the memory access address of the hot memory access instruction can be used as a call parameter of the memory access monitoring function, and a user-defined memory access monitoring function can be called to access the memory cell indicated by the memory access address of the hot memory access instruction, and the access time can be timed to obtain the access latency, so as to output the monitoring information for the hot memory access instruction. It should be noted that if the hot memory access instruction is a read operation instruction, the accessed value will also be obtained, and the specific content of the monitoring information is not limited herein.

[0144] It should be noted that in some embodiments, the above memory access code description data structure can also characterize the relationship between the access mode of the hot memory access instruction (such as atomic access mode) and the saved register context, that is, how to calculate the access mode of the accessed memory cell based on the saved register context. Correspondingly, the access mode can also be used as a call parameter of the memory access monitoring function in the monitoring code block, and by calling the memory access monitoring function, the monitoring information for the hot memory access instruction can be output.

[0145] Combined with the above Figure 6 As shown, that is, the disassembly function module in the monitoring code block can be called in step 412 to obtain the memory access address of the hot memory access instruction.

[0146] Figure 8 It is a schematic flowchart of another memory access monitoring method provided by an embodiment of the present application. In an alternative embodiment, as Figure 8 shown, the above sampling to obtain hot memory access instructions during the running of the target application includes:

[0147] Step 601, sampling to obtain the initial hot instruction during the running of the target application.

[0148] Step 602, if it is determined that the initial hot instruction is not a hot memory access instruction, search for hot memory access instructions according to a preset rule.

[0149] Among them, the initial hot instruction can be the first hot instruction during the running of the target application, or any hot instruction, which is not limited herein. It can be flexibly set according to the actual application scenario.

[0150] Optionally, during the sampling process, based on the binary code corresponding to the target application, the initial hot instructions during the operation of the target application can be sampled, and then based on a preset rule, the initial hot instructions are screened to find the hot memory access instructions. Optionally, the preset rule can indicate the search direction of the hot memory access instructions relative to the initial hot instructions.

[0151] In some embodiments, the sampling and positioning of the initial hot instructions can be implemented by a preset performance analysis tool. For example, tools such as Perf, VTune, and gprof can be borrowed for implementation, which is not limited herein.

[0152] Figure 9 The flowchart of another memory access monitoring method provided by the embodiments of this application. In an alternative implementation, as Figure 9 shown, if it is determined that the initial hot instruction is not a hot memory access instruction, then according to the preset rule, finding the hot memory access instruction includes:

[0153] Step 701: If it is determined that the initial hot instruction is not a hot memory access instruction, then check whether there is a hot memory access instruction among the first N instructions of the initial hot instruction. If there is, then take the first hot memory access instruction closest to the initial hot instruction as the hot memory access instruction.

[0154] Step 702: If there is no hot memory access instruction among the first N instructions of the initial hot instruction, then check whether there is a hot memory access instruction among the next M instructions of the initial hot instruction. If there is, then take the second hot memory access instruction closest to the initial hot instruction as the hot memory access instruction.

[0155] Wherein, N and M are integers greater than 1. Optionally, the values of N and M can be the same or different. For example, the value of N can be 10 and the value of M can be 20; or, the values of both N and M are 30, which is not limited herein.

[0156] In some embodiments, when the initial hot instruction is not a hot memory access instruction, based on the position of the initial hot instruction, check whether there is a hot memory access instruction among its first N instructions. If there is, optionally, according to the principle of proximity, take the first hot memory access instruction closest to the initial hot instruction as the hot memory access instruction; if not, continue to check whether there is a hot memory access instruction among the next M instructions. If there is, optionally, according to the principle of proximity, take the second hot memory access instruction closest to the initial hot instruction as the hot memory access instruction.

[0157] It should be noted that if there are still no hot memory access instructions among the last M instructions of the initial hot spot instruction, optionally, the values of N and / or M can be adjusted at this time to expand the search range. For example, the values of N and M can be increased to 50 and continue to search until a hot memory access instruction is found. Of course, the present application does not limit the adjustment method of N and M here.

[0158] Illustrated by way of example, taking the adjustment of N as an example, for instance, a fixed value (such as 10, 20, etc.) can be added each time, or alternatively, N can be adjusted to S×N each time, where S is an integer greater than 1.

[0159] In addition, it should be noted that the specific search method is not limited thereto. For example, it is also possible to first search the last M instructions, and then search the first N instructions, which can be flexibly set according to the actual application scenario.

[0160] In an alternative embodiment, after obtaining the monitoring information according to the memory access address and recording the monitoring information, the following is further included:

[0161] Restore the preset transfer instruction to a hot memory access instruction and unload the preset replacement code.

[0162] Based on the foregoing description, for each hot memory access instruction, after outputting the monitoring information for the hot memory access instruction, the preset transfer instruction can be restored to the hot memory access instruction, and the hot memory access instruction loaded into the virtual address space of the target application can be removed, so as to avoid affecting the running performance of the target application due to the introduction of the monitoring function.

[0163] Applying the embodiments of the present application realizes that after the monitoring function is completed, the original instructions can be restored in a timely manner, avoiding the introduction of the monitoring function from affecting the running performance of the target application.

[0164] In an alternative embodiment, the monitoring information of the hot memory access instruction includes: the memory access address and / or access latency of the hot memory access instruction.

[0165] Among them, the memory access address of the hot memory access instruction can indicate the address of the memory location accessed when the hot memory access instruction is executed; the access latency of the hot memory access instruction can indicate the time required from the start of execution of the hot memory access instruction to obtaining the memory data.

[0166] Optionally, the type of monitoring information can be flexibly selected according to the actual application scenario.

[0167] In addition, it should be noted that in addition to the above two types of monitoring information, other types of information can also be included, such as cache hit rate, memory access pattern, memory access bandwidth, etc., which are not limited herein. Among them, the cache hit rate can indicate the proportion of request data found in the cache; the memory access pattern can include two modes: sequential access and random access; the memory access bandwidth can indicate the amount of data that can be transmitted per unit time.

[0168] Figure 10 FIG. is a schematic diagram of functional modules of a memory access monitoring device provided by an embodiment of the present application. The basic principle and technical effects generated by this device are the same as those of the corresponding method embodiment described above. For a brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding content in the method embodiment. As Figure 10 shown, the memory access monitoring device 100 includes:

[0169] A generation module 110, configured to generate a preset replacement code block according to a hot memory access instruction, and replace the hot memory access instruction with a preset transfer instruction, so that the preset transfer instruction can jump to the preset replacement code block; wherein, the preset transfer instruction is used to indicate the start address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction;

[0170] An operation module 120, configured to run the monitoring code block and calculate the memory access address of the hot memory access instruction;

[0171] An acquisition module 130, configured to acquire monitoring information according to the memory access address and record the monitoring information.

[0172] In an alternative embodiment, the acquisition module 130 is specifically configured to record a first time and a second time before and after the hot memory access instruction runs;

[0173] Calculate the time difference between the second time and the first time to obtain the access latency of the hot memory access instruction.

[0174] In an alternative embodiment, the operation module 120 is specifically configured to save the register context to the target stack;

[0175] After running the monitoring code block and calculating the memory access address of the hot memory access instruction, it includes:

[0176] Restore the register context according to the target stack.

[0177] In an alternative embodiment, the acquisition module 130 is specifically configured to record a first time and run the hot memory access instruction;

[0178] Update the target stack according to the execution result of the hot memory access instruction;

[0179] Restore the register context according to the target stack.

[0180] In an optional implementation manner, the running module 120 is specifically configured to run the monitoring code block, disassemble and parse the hot memory access instruction, and obtain the memory access code description data structure corresponding to the hot memory access instruction;

[0181] Determine the memory access address of the hot memory access instruction according to the memory access code description data structure.

[0182] In an optional implementation manner, the obtaining module 130 is further configured to return the next instruction of the hot memory access instruction.

[0183] In an optional implementation manner, the generating module 110 is further configured to sample and obtain the initial hot instruction during the running of the target application;

[0184] If it is determined that the initial hot instruction is not a hot memory access instruction, search for the hot memory access instruction according to a preset rule.

[0185] In an optional implementation manner, the generating module 110 is specifically configured to, if it is determined that the initial hot instruction is not a hot memory access instruction, search whether there is a hot memory access instruction among the first N instructions of the initial hot instruction. If so, use the first hot memory access instruction closest to the initial hot instruction as the hot memory access instruction;

[0186] If there is no hot memory access instruction among the first N instructions of the initial hot instruction, search whether there is a hot memory access instruction among the next M instructions of the initial hot instruction. If so, use the second hot memory access instruction closest to the initial hot instruction as the hot memory access instruction, where N and M are integers greater than 1.

[0187] In an optional implementation manner, the obtaining module 130 is further configured to restore the preset transfer instruction to the hot memory access instruction and uninstall the preset replacement code.

[0188] In an optional implementation manner, the monitoring information includes: the memory access address and / or the access latency size of the hot memory access instruction.

[0189] The above device is used to execute the method provided in the foregoing embodiment, and its implementation principle and technical effects are similar, which will not be elaborated here.

[0190] The above-mentioned modules may be one or more integrated circuits configured to implement the above methods. For example: one or more Application Specific Integrated Circuits (ASICs), or, one or more microprocessors, or, one or more Field Programmable Gate Arrays (FPGAs), etc. Again, when a certain module above is implemented in the form of a processing element scheduling program code, the processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processors that can call program code. Again, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0191] Figure 11 FIG. is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device may be integrated into the above-mentioned memory access monitoring device. As Figure 11 shown, the electronic device may include: a processor 210, a storage medium 220, and a bus 230. The storage medium 220 stores machine-readable instructions executable by the processor 210. When the electronic device runs, the processor 210 communicates with the storage medium 220 through the bus 230, and the processor 210 executes the machine-readable instructions to execute the steps of the above method embodiment. The specific implementation manners and technical effects are similar and will not be elaborated here.

[0192] Optionally, the present application further provides a storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the steps of the above method embodiment. The specific implementation manners and technical effects are similar and will not be elaborated here.

[0193] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other may be through some interfaces. The indirect coupling or communication connection of devices or units may be in an electrical, mechanical or other form.

[0194] The unit described as a separation component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or distributed across multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0195] In addition, the functional units in various embodiments of the present application may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of hardware plus software functional units.

[0196] The above integrated units implemented in the form of software functional units can be stored in a computer-readable storage medium. The above software functional units stored in a storage medium include several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute some steps of the methods in various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (English: Read-Only Memory, abbreviated as: ROM), random access memories (English: Random Access Memory, abbreviated as: RAM), magnetic disks, or optical discs that can store program codes.

[0197] It should be noted that in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the existence of additional identical elements in the process, method, article or device comprising the element.

[0198] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application. It should be noted that similar reference numerals and letters indicate similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A memory access monitoring method, characterized in that: The method comprises: Generate a preset replacement code block according to a hot memory access instruction, and replace the hot memory access instruction with a preset transfer instruction so that the preset transfer instruction can jump to the preset replacement code block; wherein the preset transfer instruction is used to indicate the starting address of the preset replacement code block corresponding to the hot memory access instruction, and the preset replacement code block includes the hot memory access instruction and a monitoring code block for monitoring the hot memory access instruction; Run the monitoring code block to calculate the memory access address of the hotspot memory access instruction; Acquire monitoring information according to the memory access address, and record the monitoring information.

2. The method according to claim 1, characterized in that The acquiring monitoring information according to the memory access address and recording the monitoring information includes: Recording a first time and a second time before and after the hotspot memory access instruction is executed; The time difference between the second time and the first time is calculated to obtain the access delay of the hotspot memory access instruction.

3. The method according to claim 1, characterized in that: The step of running the monitoring code block and calculating the memory access address of the hotspot memory access instruction includes: Save the register scene to the target stack; After running the monitoring code block and calculating the memory access address of the hotspot memory access instruction, the method includes: According to the target stack, the register context is restored.

4. The method according to claim 3, characterized in that The recording of the first time and the second time before and after the hotspot memory access instruction is executed includes: Recording the first time, and executing the hotspot memory access instruction; According to the execution result of the hotspot memory access instruction, the target stack is updated; According to the target stack, the register context is restored.

5. The method according to claim 1, characterized in that The running of the monitoring code block to calculate the memory access address of the hotspot memory access instruction includes: Run the monitoring code block, disassemble and parse the hotspot memory access instruction, and obtain a memory access code description data structure corresponding to the hotspot memory access instruction; Determine the memory access address of the hotspot memory access instruction according to the memory access code description data structure.

6. The method according to claim 4, characterized in that After restoring the register scene according to the target stack, the method further comprises: Returns the next instruction of the hotspot memory access instruction.

7. The method according to claim 1, characterized in that Before generating the preset replacement code according to the hotspot memory access instruction, the method further includes: Sampling and obtaining the initial hot spot instructions during the operation of the target application; If it is determined that the initial hot spot instruction is not a hot spot memory access instruction, the hot spot memory access instruction is searched according to a preset rule.

8. The method according to claim 7, characterized in that If it is determined that the initial hot spot instruction is not a hot spot memory access instruction, searching for the hot spot memory access instruction according to a preset rule includes: If it is determined that the initial hot spot instruction is not a hot spot memory access instruction, then find out whether there is a hot spot memory access instruction among the first N instructions of the initial hot spot instruction, and if there is, take the first hot spot memory access instruction closest to the initial hot spot instruction as the hot spot memory access instruction; If there is no hot memory access instruction among the first N instructions of the initial hot memory instruction, then check whether there is a hot memory access instruction among the last M instructions of the initial hot memory instruction. If so, the second hot memory access instruction closest to the initial hot memory instruction is used as the hot memory access instruction, wherein N and M are integers greater than 1.

9. The method according to claim 1, characterized in that: After acquiring monitoring information according to the memory access address and recording the monitoring information, the method further includes: The preset transfer instruction is restored to the hotspot memory access instruction, and the preset replacement code is unloaded.

10. The method according to any one of claims 1 to 9, characterized in that: The monitoring information includes: the memory access address and / or access delay size of the hot memory access instruction.

11. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the storage medium communicate via the bus, and the processor executes the machine-readable instructions to perform the steps of the memory access monitoring method as described in any one of claims 1-10.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the memory access monitoring method according to any one of claims 1 to 10 are executed.