Charge coupling type single-pixel detector spectrum chip and driving method thereof

Abstract

The invention discloses a charge coupling type single-pixel detector spectrum chip and a driving method thereof. The spectrum chip sequentially comprises a substrate, a buffer layer, an absorption layer, a cap layer, an insulating layer and a metal electrode from bottom to top, the substrate is a semi-insulating substrate; the buffer layer is heavily doped, is in lattice matching with the substrate and is used as a common electrode of the chip; the absorption layer is a gradually-changed band gap absorption layer with a weak doping material and has the same conductive type as the buffer layer; the cap layer is in lattice matching with the absorption layer, is weakly doped and has the same conduction type as the buffer layer; the insulating layer is a dielectric film prepared by a chemical vapor deposition method or an atomic layer deposition method; the metal electrode comprises an n electrode and a p electrode and is prepared by a sputtering method or a CVD (Chemical Vapor Deposition) method; the metal electrode, the cap layer, the absorption layer and the buffer layer form an MIS structure and form a grid electrode and a PN junction. The device can work without a light splitting element and a light path, can achieve the extremely small size, and meets the application scenes under different requirements.

Description

Technical Field

[0001] The present invention relates to a detector spectral chip and a driving method thereof, and particularly to a charge-coupled single-pixel detector spectral chip and a driving method thereof. Background Art

[0002] Wavelength-selective detection has broad applications in fields such as image recognition, component analysis, and environmental monitoring. With the development of artificial intelligence-related technologies such as autonomous driving and machine vision, applications such as spectral analysis and hyperspectral imaging have put forward new requirements for the miniaturization of spectrometers. In the existing technical scenarios, micro spectrometers usually need to use complex optical devices or optical paths, such as gratings, narrowband filters, and Fourier transforms, to achieve wavelength extraction, which inevitably brings problems of complex structure and low integration. The method of computational reconstruction can enable the micro spectrometer system to get rid of the limitations of spectral splitting elements and optical paths to a certain extent, and is currently considered the most potential and valuable implementation idea for micro spectrometers.

[0003] However, the current spectral chip solutions for these computationally reconstructed ultra-compact spectrometers still have problems such as insufficiently small size, complex material growth processes, difficulty in repetition, and difficulty in large-scale production and application. In order to realize a micro spectral chip with a small size, a simple process, low cost, and mass production, it is necessary to achieve the wavelength extraction function at the device level.

[0004] Chinese Patent Document CN116207119A discloses a single-pixel detector micro spectrometer chip with a graded bandgap absorption layer structure, but the chip requires the entire absorption layer to work in the reverse bias state. For narrow-bandgap semiconductors, a large tunneling dark current accompanies the reverse bias voltage, and the performance will be affected to a certain extent. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a charge-coupled single-pixel detector spectral chip and a driving method thereof, which can work without spectral splitting elements and optical paths, can achieve an extremely small size, and can meet the application scenarios under different requirements.

[0006] The technical solution adopted by the present invention to solve the above technical problems is to provide a charge-coupled single-pixel detector spectral chip, which sequentially includes a substrate, a buffer layer, an absorption layer, a cap layer, a dielectric insulating layer, and a metal electrode from bottom to top; the substrate is a semi-insulating substrate; the buffer layer is heavily doped and lattice-matched with the substrate, serving as a common electrode of the chip; the absorption layer is a graded bandgap absorption layer with a weakly doped material, having the same conductivity type as the buffer layer; the cap layer is lattice-matched with the absorption layer, weakly doped and having the same conductivity type as the buffer layer; the insulating layer is a dielectric film prepared by chemical vapor deposition or atomic layer deposition; the metal electrode includes an n-pole and a p-pole, prepared by sputtering or CVD; the metal electrode, the cap layer, the absorption layer, and the buffer layer form an MIS structure and form a gate and a PN junction, and the gate is used as a signal gate or an output gate.

[0007] Further, the metal electrode, the cap layer, the absorption layer, and the buffer layer form at least two MIS structures, one of which is used as a detector unit and forms a signal gate, and the other is used to transfer the charge packets obtained in the detector and forms an output gate; the gate pitch of the two MIS structures is 0.1 - 0.25 um, so that the depletion layers and charge potential wells in adjacent PN junctions overlap, enabling coupling and charge transfer.

[0008] Further, a microlens or an antireflection film that is beneficial to light absorption is prepared at the corresponding position on the back of the substrate of the photodetector.

[0009] Further, a heavily doped region is formed between the cap layer, the absorption layer, and the buffer layer through impurity diffusion or ion implantation to obtain a diode for reading out charge packets; the distance between the heavily doped edge of the cap layer of the diode and the output gate is less than 0.5 um, so that the depletion layers and charge potential wells in adjacent PN junctions overlap, enabling coupling and charge transfer.

[0010] Further, the substrate is an InP semi-insulating substrate; the buffer layer is n + InP, with a thickness of 0.02 um - 0.5 um and a doping concentration greater than 2×10 18 cm -2 ; the absorption layer is an n - -type material with a doping concentration of 10 14 -10 16 cm -2 ; the cap layer is n - InP, with a thickness of 0.5 - 1 um; the insulating layer is a SiN x 、Al 2 O 3 、SiO 2 、ZnS dielectric film, with a thickness of 100 - 200 nm.

[0011] Furthermore, the absorption layer has a gradually decreasing bandgap along the incident direction of light. For ultraviolet and visible light, a front-illumination structure is adopted, and the energy band gradually increases during the epitaxial process; for infrared light, a back-illumination structure is adopted, and the energy band gradually decreases during the epitaxial process.

[0012] Furthermore, the absorption layer is made of In 0.53 Ga 0.47 As / GaAs 0.5 Sb 0.5 type-II superlattice material, which is deliberately doped to be n - type. During epitaxy, the thicknesses of In 0.53 Ga 0.47 As and GaAs 0.5 Sb 0.5 both gradually increase to 5 nm / 5 nm, and the total thickness is 2 - 2.5 μm, with a corresponding response cut-off wavelength of 2.5 μm.

[0013] Furthermore, the metal electrode is Cr or Au, and the metals for the gate also include ITO, FTO, or BZO.

[0014] The present invention also provides a driving method for the above-mentioned charge-coupled single-pixel detector spectral chip to solve the above technical problems. Among them, the n-pole of the spectral chip is connected to the reference voltage, and the voltages applied to the signal gate and the output gate are both less than the reference voltage to obtain a P-channel with a relatively negative gate voltage; the voltage applied to the signal gate or the output gate is a pulsed step voltage or a high-frequency sine wave voltage, and the period of the gate clock pulse is 1 ms to 100 ms to obtain a deep depletion state in which the MIS structure operates in a non-equilibrium mode.

[0015] Furthermore, the amplitude of the voltage applied to the signal gate or the output gate relative to the reference voltage increases with the clock period, and the width of the deep depletion layer gradually increases in the direction of the larger bandgap of the absorption layer. The output gate is used to transfer the charge packet in the deep depletion layer of the detector to the output diode, and then the charge is read out by the output diode in the reverse-biased state.

[0016] The present invention has the following beneficial effects compared with the prior art: The charge-coupled single-pixel detector spectral chip and its driving method provided by the present invention adopt a back-illumination method, and sequentially include a substrate layer, a buffer layer, an absorption layer, a cap layer, an insulating layer, and a metal electrode from bottom to top. A pulsed step negative gate voltage with an increasing amplitude in clock cycles is used to gradually increase the width of the deep depletion layer in the direction of the substrate; a semiconductor material with a gradually decreasing bandgap along the incident direction of light is used as the absorption layer, which can broaden the spectral absorption range as the width of the deep depletion layer increases, thereby specifically encoding the incident spectral information, and cooperating with the reconstruction algorithm to efficiently and quickly reconstruct the incident spectrum; its physical part only has a single-pixel photodetector, an output control electrode, and an output diode; it can work without a spectral splitting element and an optical path, can achieve a very small size, and meet the application scenarios under different requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 FIG. is a schematic structural diagram of the charge-coupled single-pixel detector spectral chip of the present invention; Figure 2 FIG. is a schematic diagram of the charge transfer driving clock waveform of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] The present invention will be further described below in conjunction with the drawings and embodiments.

[0019] The charge-coupled single-pixel detector spectral chip provided by the present invention sequentially includes a substrate layer, a buffer layer, an absorption layer, a cap layer, an insulating layer, and a metal electrode from bottom to top; The substrate is a semi-insulating substrate; it can be an InP semi-insulating substrate, and a microlens or an antireflection film beneficial to light absorption can be prepared on the back of the substrate at the corresponding position of the photodetector; The buffer layer is lattice-matched with the substrate and is heavily doped to serve as a common electrode of the chip; it can be n + InP, with a thickness ranging from 0.02 μm to 0.5 μm and a doping concentration greater than 2×10 18 cm -2 ; The absorption layer is a graded bandgap absorption layer containing a weakly doped material and has the same conductivity type as the buffer layer; it can be an n - -type material with a doping concentration ranging from 10 14 to 10 16 cm -2 ; Preferably, In 0.53 Ga 0.47 As / GaAs 0.5 Sb 0.5 type II superlattice material, doped in an intentional n - -type, and during epitaxy, In 0.53 Ga 0.47As and GaAs 0.5 Sb 0.5 The thicknesses of both increase gradually to 5 nm / 5 nm, the total thickness is 2 - 2.5 μm, and the corresponding response cut-off wavelength is 2.5 μm; The capping layer is a material with a relatively wide bandgap and uniform composition, lattice-matched with the absorption layer, weakly doped and having the same conductivity type as the buffer layer, and is used to improve the surface properties of the material; it is n - InP, with a thickness of 0.5 - 1 μm; The insulating layer is SiN x Al 2 O 3 SiO 2 ZnS and other dielectric films, prepared by methods such as chemical vapor deposition or atomic layer deposition, and having a relatively high dielectric constant; preferably SiN x dielectric film, with a thickness of 100 - 200 nm; The metal electrodes are electrodes such as Cr and Au with stable performance and easy to process. Among them, the metal for the gate also includes transparent conductive metals such as ITO, FTO, BZO or polysilicon, and is used for the front-illumination structure, and is obtained by sputtering or CVD methods; the metal electrodes, capping layer, absorption layer, and buffer layer form a MIS structure (metal-insulator-semiconductor structure) and form a gate and a PN junction, and the gate is used as a signal gate or an output gate.

[0020] The charge-coupled single-pixel detector spectral chip provided by the present invention includes at least two MIS structures, one of which is used as a detector unit and forms a signal gate, and the other is used to transfer the charge packets obtained in the detector and forms an output gate; the gate pitch of the two MIS structures is 0.1 - 0.25 μm, so that the depletion layers and charge potential wells in adjacent PN junctions overlap, enabling coupling and charge transfer.

[0021] The charge-coupled single-pixel detector spectral chip provided by the present invention forms a diode between the capping layer, absorption layer and buffer layer by means of impurity diffusion or ion implantation to form a heavily doped region, which is used to read out the charge packets; the distance between the heavily doped edge of the capping layer of the diode and the output gate is less than 0.5 μm, so that the adjacent depletion layers and charge potential wells overlap, enabling coupling and charge transfer.

[0022] The charge-coupled single-pixel detector spectral chip provided by the present invention uses a compound semiconductor material with a gradually decreasing bandgap along the incident direction of light while maintaining lattice matching with the substrate for the graded bandgap absorption layer; further, for ultraviolet and visible light, a front-illumination structure is adopted, and the energy band gradually increases during the epitaxial growth of the absorption layer; if it is infrared, a back-illumination structure is adopted, and the energy band gradually decreases during the epitaxial growth of the absorption layer.

[0023] For the graded bandgap absorption layer of the present invention, on a gemstone wafer, SiC or Si substrate, a ternary compound material Al x Ga 1-x N is used, and during the epitaxial process, the value of x gradually increases to obtain an absorption layer with a gradually increasing bandgap; or on a GaAs substrate, a ternary compound material Al x Ga 1-x As is used, and during the epitaxial process, the value of x gradually increases to obtain an absorption layer with a gradually increasing bandgap; or on a CdZnTe or Si substrate, a ternary compound material Hg x Cd 1-x Te is used, and during the epitaxial process, the value of x gradually decreases to obtain an absorption layer with a gradually increasing bandgap; or on an InP or Si substrate, In x Ga (1-x) As y P (1-y) is gradually changed to In 0.53 Ga 0.47 As material, y increases from small to large, and x is changed accordingly to maintain lattice matching with the InP substrate; or In x Al y Ga (1-x-y) As is gradually changed to In 0.53 Ga 0.47 As material, y decreases from large to small, the maximum value of y is 0.52, and x is changed accordingly to maintain lattice matching with the InP substrate; or on the above various substrates, corresponding two-dimensional materials are used, and during the epitaxial process, the thicknesses of the two alternately grown materials gradually change to obtain a graded bandgap absorption layer; or on a transparent conductive oxide film, a perovskite material AB(Cl x Br y I 1-x-y ) 3 is used, where A is a cation and B is generally a divalent metal cation. During the evaporation process, by adjusting the relative contents of the halogen anions Cl - , bromide ion Br - , iodide ion I - , a graded bandgap absorption layer is obtained.

[0024] Example 1 The InGaAs / GaAsSb type-II superlattice lattice-matched to the InP substrate is a novel short-wave infrared material. By adjusting the energy band structure of the materials in this system, a wavelength coverage exceeding 2 μm can be achieved, and it is currently widely used in detectors. Different from InGaAs materials with a high In composition, the lattice constants of the materials in this system can be perfectly matched to the InP substrate, thus effectively reducing the growth difficulty and defect density of the materials and growing high-quality epitaxial layer materials, providing a new option for short-wave infrared detection. The superlattice mainly adjusts the response wavelength by changing the periodic thickness of the materials. With molecular beam epitaxy technology, different response wavelength superlattice materials can be obtained as long as the growth time (changing the layer thickness) of the InGaAs and GaAsSb monolayers is changed. Therefore, it is very easy to integrate detector material structures with different response wavelengths in a single epitaxial growth process.

[0025] Figure 1 The schematic diagram of the spectral chip structure of the charge-coupled single-pixel detector of the present invention is shown. S10 is an InP semi-insulating substrate; S11 is an n + InP buffer layer with a thickness of 0.04 μm and a doping concentration of (1 - 2) × 10 18 cm -2 ; S12 is a graded bandgap absorption layer. By controlling the In 0.53 Ga 0.47 As / GaAs 0.51 Sb 0.49 periodic thickness of the superlattice material, its bandgap gradually changes from 1.12 eV to 0.52 eV (5 nm / 5 nm), corresponding to a light absorption band of 0.9 - 2.4 μm, being an unintentionally doped n - -type material with a doping concentration of 5 × 10 15 cm -2 , and a thickness of 3 μm; S13 is a cap layer made of In 0.53 Ga 0.47 As, being an unintentionally doped n - -type with a thickness of 0.5 μm; S14 is a Si 3 N 4 thin film deposited by inductively coupled plasma CVD with a thickness of 150 nm; S15 is a p + In 0.53 Ga 0.47 As region formed by Zn diffusion, which forms an output diode with the absorption layer; S16 is a p + In 0.53 Ga 0.47 As and Au alloying region for ohmic contact; S17, S18, S129, and S20 are all Cr / Au electrodes deposited by sputtering with a thickness of 50 / 150 nm; The manufacturing process of the device is as follows: For the first photolithography, the area of the groove is lithographed, and Ar is used + Etching is carried out until near the buffer layer, and then the mesa is obtained by using the method of citric acid corrosion. Then, SiN x thin film of 150 nm is deposited over the entire area by inductively coupled plasma CVD method; for the second photolithography, the diffusion region S15 is lithographed, and the SiN x thin film in this area is etched away with buffered HF acid, and Zn diffusion is carried out by MOCVD method to obtain the p + In 0.53 Ga 0.47 As region; for the third photolithography, the alloy region S16 is lithographed, and 50 nm of Au is deposited, and alloying is obtained by high-temperature annealing; for the fourth photolithography, the electrode holes at the positions of S17 and S18 are lithographed, and similarly, the SiN x thin film in this area is etched away with buffered HF acid to obtain the contact holes where S17 and S18 are in contact with the semiconductor; for the fifth photolithography, the electrode regions S17, S18, S19, and S20 are lithographed, and 50 / 150 nm of Cr / Au is deposited by ion beam sputtering method; thus, a complete device is obtained.

[0026] Example 2 For this chip, both the absorption layer and the surface layer are n - -type materials. Therefore, the minority carriers are holes, and its working mode should be that the gate voltage is negative, which is achieved by applying a relatively high potential V ref to the semiconductor, and relatively low potentials V th and V b are applied to both the gate and the readout diode. Figure 2 The charge transfer driving clock waveform is as VG shown. φ OG represents the signal gate phase, φ OD represents the output gate phase, φ ref represents the readout diode phase, V th represents the reference potential of the semiconductor, V b represents the threshold potential when the strong reflection layer is established in the MIS structure, and V is the reverse bias potential of the readout diode, and 1 is the variable potential value. A step pulse level V th, the generation rate of minority carriers near the semiconductor surface under the corresponding gate electrode cannot catch up with the change in voltage, and the inversion layer cannot be established in time. Only by extending the depletion layer deep into the semiconductor can a large number of donor positive charges be generated to satisfy the electro-neutrality condition. This non-equilibrium state is the deep depletion state. For this state, the width of the depletion layer is very large, much larger than the maximum depletion layer width at strong inversion, and its width increases with the increase in the voltage amplitude and with depth. This depletion region is a potential well that can store holes. At this time, when light irradiates the absorption layer, holes, as the minority carrier signal charges, are input into the potential well, forming a "hole packet". After the "hole packet" is collected under the signal gate VG, a step pulse level V is applied to the output gate OG. th , at this time, both VG and OG are at a low level, corresponding to t 2 moment, two potential wells with the same depth and coupled to each other will divide the "hole packet" equally. When the VG level returns to V ref during the process of t 3 moment, the potential well under the signal gate VG becomes shallower, and all the signal charge holes transfer to the potential well under OG. When the level on OG returns to V ref , corresponding to t 4 moment, at this time, the entire "hole packet" has been transferred to the potential well under OG, completing the generation and transfer of signal charges in one cycle.

[0027] When reading the signal, the principle is similar to signal transfer. At t 6 moment, as the potential well under OG rises, the "hole packet" continuously flows to the potential well under OD. At t 7 moment, the entire "hole packet" is transferred to the potential well under OD, and the further reading method is controlled by the peripheral circuit to read the diode.

[0028] The above describes the generation, transfer, and reading processes of the minority carrier charge "hole packet" under the first step pulse in the clock pulse. The potential of the second step pulse of the signal gate and the output gate is V th - , which makes the width of the depletion layer increase deeper into the semiconductor compared to the potential of the first step pulse. By designing the thickness of the capping layer, the present invention can make the width increment of the depletion layer occur in the graded bandgap absorption layer at this time. Since this increment occurs in the absorption region with a wider bandgap, the spectral response curve is extended towards the short-wave direction. must be of appropriate size. Too large will result in too low spectral resolution, and too small will result in no obvious change in the spectral response curve. By sequentially reducing the potentials on the signal gate and the output gate according to the period of the clock pulse, spectral responses with different shapes are obtained. By specifically encoding the incident spectral information and cooperating with the reconstruction algorithm, the incident spectrum can be efficiently and quickly reconstructed.

[0029] Although the present invention has been disclosed above in preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to that defined by the claims.

Claims

1. A charge-coupled single-pixel detector spectral chip, characterized in that: From bottom to top, it includes a substrate, a buffer layer, an absorption layer, a cap layer, an insulating layer and a metal electrode; The substrate is a semi-insulating substrate; The buffer layer is heavily doped and lattice-matched with the substrate, and serves as a common electrode of the chip; The absorption layer is a gradient bandgap absorption layer having a weakly doped material and has the same conductivity type as the buffer layer; The cap layer is lattice matched with the absorption layer, is weakly doped and has the same conductivity type as the buffer layer; The insulating layer is a dielectric film prepared by chemical vapor deposition or atomic layer deposition; The metal electrode comprises an n-pole and a p-pole, and is made by sputtering or CVD; The metal electrode, cap layer, absorption layer and buffer layer constitute a MIS structure and form a gate and a PN junction. The gate is used as a signal gate or an output gate.

2. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: The metal electrode, cap layer, absorption layer and buffer layer constitute at least two MIS structures, one of which is used as a detector unit and forms a signal gate, and the other is used to transfer the charge packets obtained in the detector and forms an output gate; the gate spacing of the two MIS structures is 0.1 to 0.25um, so that the depletion layer and the charge potential well in the adjacent PN junction overlap, enabling coupling and charge transfer.

3. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: A microlens or an anti-reflection film which is beneficial to light absorption is prepared at a corresponding position of the light detector on the back side of the substrate.

4. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: A heavily doped region is formed between the cap layer, the absorption layer and the buffer layer by impurity diffusion or ion implantation to obtain a diode for reading out the charge packet; the distance between the heavily doped edge of the cap layer of the diode and the output gate is less than 0.5um, so that the depletion layer and the charge potential well in the adjacent PN junction overlap, enabling coupling and charge transfer.

5. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: The substrate is an InP semi-insulating substrate; the buffer layer is an n + InP, thickness is 0.02um~0.5um, doping concentration is greater than 2×10 18 cm -2 The absorption layer is n - Type material, doping concentration is 10 14 ~10 16 cm -2 ; The cap layer is n - InP, thickness is 0.5-1um; the insulating layer is SiN x , Al2O3, SiO2, ZnS dielectric films with a thickness of 100 to 200 nm.

6. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: The band gap of the absorption layer gradually decreases along the incident direction of light. For ultraviolet light and visible light, a front irradiation structure is adopted, and the energy band gradually increases during the epitaxial process; for infrared light, a back irradiation structure is adopted, and the energy band gradually decreases during the epitaxial process.

7. The charge-coupled single-pixel detector spectral chip according to claim 6, characterized in that: The absorption layer uses In 0.53 Ga 0.47 As / GaAs 0.5 Sb 0.5 The second type of superlattice material is intentionally doped with n - Type, external delay time In 0.53 Ga 0.47 As and GaAs 0.5 Sb 0.5 The thickness is gradually increased to 5nm / 5nm, the total thickness is 2-2.5um, and the corresponding response cutoff wavelength is 2.5um.

8. The charge-coupled single-pixel detector spectral chip according to claim 1, characterized in that: The metal electrode is Cr or Au, and the metal used for the gate also includes ITO, FTO or BZO.

9. A driving method for a charge-coupled single-pixel detector spectral chip as claimed in claim 1, characterized in that: Connect the n-pole of the spectral chip to the reference voltage, and the voltages applied to the signal gate and the output gate are both lower than the reference voltage to achieve a relatively negative gate voltage to obtain a P channel; The voltage applied to the signal gate or the output gate is a pulse step voltage or a high-frequency sine wave voltage, and the period of the gate clock pulse is 1ms to 100ms, so as to obtain a deep depletion state of the MIS structure working in an unbalanced mode.

10. The driving method of the charge coupled type single pixel detector spectral chip according to claim 9, characterized in that: The amplitude of the voltage applied to the signal gate or the output gate relative to the reference voltage increases with the clock cycle, and the width of the deep depletion layer gradually increases in the direction of the larger band gap of the absorption layer. The output gate is used to transfer the charge packets in the deep depletion layer of the detector to the output diode, and then the charge is read out by the output diode in the reverse bias state.

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