Avalanche detector and preparation method thereof
By forming shallow trench isolation and doping protection rings in the epitaxial layer of the avalanche detector, the problem of difficulty in preparing small-sized pixels in the prior art is solved, and an avalanche detector with high voltage withstand voltage and high time resolution capabilities is achieved.
Patent Information
- Application Number
- CN202510334904.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-20
- Publication Date
- 2025-06-10
AI Technical Summary
The preparation process of existing avalanche detectors is difficult to obtain small-sized pixels, which limits the development of avalanche detector technology.
A shallow trench isolation process is used to form trenches in the epitaxial layer, the side of the epitaxial layer away from the substrate is isolated into an island arranged in an array, and doped at the bottom and side walls of the trench to form a protective ring, forming a gain layer and a contact layer in the island.
An avalanche detector with a small size and large array pixels is realized, and a breakdown voltage is increased by increasing the depth of the protection ring, and a high voltage withstand voltage avalanche detector is obtained.
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Figure CN120129337A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of avalanche detectors, and specifically provides an avalanche detector and a preparation method therefor. Background Art
[0002] An avalanche detector, also known as an avalanche photodiode, has a reverse bias voltage applied to the PN junction of a photodiode made of silicon or germanium as a substrate. When light incident on the avalanche detector is absorbed by the PN junction, carriers are generated. Under the action of the reverse bias voltage, the carriers undergo an "avalanche" phenomenon and multiply, thereby amplifying the generated current. Among them, a silicon-based avalanche detector is a type of avalanche photodiode. Based on the principle of carrier avalanche multiplication, it has a high avalanche amplification factor and high detection sensitivity, and has wide applications in the fields of photoelectric detection and high-energy ion detection.
[0003] In the field of rapid particle detection, it is required that the avalanche detector has a high operating voltage to increase the migration rate of carriers, achieve rapid response and high time resolution. The avalanche detector includes pixels arranged in an array, and each pixel includes a gain layer. A high operating voltage easily causes breakdown of the edge junction of the gain layer. Therefore, how to increase the breakdown voltage of the avalanche detector has become an important research topic for ultrafast avalanche detectors.
[0004] In order to obtain a high breakdown voltage, currently, the method of ion implantation followed by high-temperature annealing is used to form a high-voltage junction region (i.e., a guard ring) at the edge of the gain layer. The guard ring surrounds the gain layer to reduce the edge electric field and obtain a high breakdown voltage. The guard ring is also used to isolate adjacent pixels. However, the lateral diffusion of the doped ions in the formed guard ring is relatively serious, making it difficult to fabricate an avalanche detector with small-size large-array pixels, which limits the development of avalanche detector technology.
[0005] Therefore, there is an urgent need for an avalanche detector and a preparation method therefor to solve the problem that it is difficult to obtain small-size pixels in the preparation process of existing avalanche detectors. Summary of the Invention
[0006] The present invention aims to solve the above technical problems, that is, to solve the problem that it is difficult to obtain small-size pixels in the preparation process of existing avalanche detectors.
[0007] In a first aspect, the present invention provides a preparation method for an avalanche detector, including: providing a substrate, the substrate including a substrate and an epitaxial layer located on one side of the substrate; forming trenches in the epitaxial layer, the trenches isolating the side of the epitaxial layer away from the substrate into islands arranged in an array; doping the side walls and the bottom of the trenches to form a guard ring, the guard ring surrounding the islands; filling an insulating layer in the trenches; forming a gain layer and a contact layer in the islands, the contact layer being located on the side of the gain layer away from the substrate, the doping types of the gain layer and the contact layer being opposite, and the doping type of the contact layer being the same as that of the guard ring.
[0008] In some embodiments, the step of forming a protection ring includes: forming a mask on a side of the epitaxial layer away from the substrate, the mask covering the isolated island and exposing the trench; injecting an ion beam at an angle coinciding with the normal of the bottom of the trench to dope the bottom of the trench, and injecting an ion beam at an angle intersecting the normal of the bottom of the trench to dope the sidewall of the trench; removing the mask.
[0009] In some embodiments, filling the trench with an insulating layer includes: forming an insulating material layer on a side of the epitaxial layer away from the substrate, the insulating material layer covering the isolated island and filling the trench; performing a planarization process on the insulating material layer with the surface of the isolated island as a stop layer.
[0010] In some embodiments, the depth of the protection layer is greater than the depth of the gain layer.
[0011] In some embodiments, the manufacturing method further includes steps of separately forming a front electrode and a back electrode: wherein, the front electrode includes an insulating layer electrode and a contact layer electrode, one end of the insulating layer electrode extends into the insulating layer, and the contact layer electrode covers the contact layer and is electrically connected to the contact layer; the back electrode is located on a side of the substrate away from the epitaxial layer.
[0012] In some embodiments, the step of forming the front electrode includes: forming a groove in the insulating layer, the depth of the groove being less than the thickness of the insulating layer; depositing a metal material layer on a side of the epitaxial layer away from the substrate; patterning the metal material layer to form the front electrode.
[0013] In a second aspect, the present invention provides an avalanche detector, including: a substrate, with an epitaxial layer provided on one side of the substrate; trenches are provided in the epitaxial layer to isolate a side of the epitaxial layer away from the substrate into pixels arranged in an array, the pixels including a contact layer and a gain layer, the contact layer being located on a side of the gain layer away from the substrate; the trench is filled with an insulating layer, and a protection ring is provided on the bottom and sidewall of the trench, the protection ring surrounding the contact layer and the gain layer; the doping types of the contact layer and the gain layer are opposite, and the doping type of the contact layer is the same as that of the protection ring.
[0014] In some embodiments, the depth of the protection ring is greater than the depth of the gain layer.
[0015] In some embodiments, an insulating layer electrode with an end extending into the insulating layer is provided in the insulating layer; the contact layer is connected with a contact layer electrode; a back electrode is provided on a side of the substrate away from the epitaxial layer.
[0016] In some embodiments, the substrate is a doped silicon substrate, and the resistivity of the substrate is less than 0.1 Ω·cm.
[0017] In some embodiments, the resistivity of the epitaxial layer is greater than 500 Ω·cm; and / or, the thickness of the epitaxial layer is between 10 μm and 100 μm.
[0018] Compared with the prior art, the present invention has at least the following advantages:
[0019] The method for manufacturing an avalanche detector provided by the present invention uses a shallow trench isolation process to form trenches in the epitaxial layer, isolating one side of the epitaxial layer away from the substrate into islands arranged in an array. Then, the bottom and sidewalls of the trenches are doped to form a protection ring surrounding the islands. Finally, a gain layer and a contact layer are formed in the islands to form pixels. Among them, the use of the shallow trench isolation technology can obtain good isolation between pixels, thereby obtaining an avalanche detector with small-sized large-array pixels.
[0020] Furthermore, by combining high-energy ion implantation and variable-angle ion implantation technologies, doping is performed on the bottom and sidewalls of the trenches to form a protection ring, which can effectively increase the depth of the protection ring located in the epitaxial layer, thereby increasing the breakdown voltage and obtaining an avalanche detector with high breakdown voltage. In particular, forming a doped region on the side of the insulating layer can reduce the edge electric field and increase the breakdown voltage of the device.
[0021] Furthermore, after forming the protection ring on the bottom and sidewalls of the trenches, an insulating layer is filled in the trenches, and then an insulating layer electrode with an end extending into the insulating layer is formed; by applying a voltage to the insulating layer electrode, on the one hand, it can control the deep junction region in the protection ring to achieve better isolation, and on the other hand, it can control the electric field between the doped region in the protection ring and the gain layer, enhancing the avalanche multiplication effect of the gain layer.
[0022] The avalanche detector provided by the present invention is provided with trenches in the epitaxial layer to isolate one side of the epitaxial layer away from the substrate into pixels arranged in an array. The pixels include a contact layer and a gain layer; the trenches are filled with an insulating layer, and the bottom and sidewalls of the trenches are provided with a protection ring surrounding the contact layer and the gain layer, which can effectively increase the depth of the protection ring located in the epitaxial layer, thereby increasing the breakdown voltage and obtaining an avalanche detector with high breakdown voltage. By forming a doped region on the side of the insulating layer, the edge electric field can be reduced and the breakdown voltage of the device can be increased; by providing an insulating layer electrode with an end extending into the insulating layer in the insulating layer, by applying a voltage to the insulating layer electrode, on the one hand, it can control the electrons in the deep junction region to gather under the insulating layer, thereby achieving a better isolation effect between adjacent pixels; on the other hand, it can increase the electric field between the doped region and the gain layer, enhancing the avalanche multiplication effect of the gain layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The following describes the preferred embodiments of the present invention with reference to the drawings, in which:
[0024] Figures 1 to 10It is a cross-sectional view of the avalanche detector provided by the present invention during the manufacturing process;
[0025] Figure 11 It is a cross-sectional view of the avalanche detector provided by the present invention.
[0026] Explanation of reference numerals:
[0027] 1. Substrate; 2. Epitaxial layer; 21. Groove; 22. Isolated island; 3. Gain layer; 4. Contact layer; 200. First mask; 5. Protection ring; 51. Deep junction region; 52. Doped region; 6. Insulating layer; 60. Insulating material layer; 61. Groove; 300. Second mask; 7. Insulating layer electrode; 70. Metal material layer; 8. Contact layer electrode; 9. Back electrode. Detailed implementation manners
[0028] The following describes the preferred implementation manners of the present disclosure with reference to the accompanying drawings. Those skilled in the art should understand that these implementation manners are only used to explain the technical principles of the present disclosure and are not intended to limit the protection scope of the present disclosure. The following describes the preferred implementation manners of the present disclosure with reference to the accompanying drawings. Those skilled in the art should understand that these implementation manners are only used to explain the technical principles of the present disclosure and are not intended to limit the protection scope of the present disclosure. Additionally, it should be noted that in the description of the present disclosure, similar expressions such as "first" and "second" are only used for distinction and do not represent priority or quantity.
[0029] The embodiments of the present disclosure provide a method for manufacturing an avalanche detector, including the following steps:
[0030] S100. Provide a substrate. As Figure 1 shown, the substrate includes a substrate 1 and an epitaxial layer 2 located on one side of the substrate 1. The material of the substrate 1 can be highly doped silicon so that the substrate 1 has a relatively low resistivity. The material of the epitaxial layer 2 can be intrinsic silicon or low-doped silicon to ensure that the epitaxial layer 2 has a high resistivity. In the example of the present invention, the resistivity of the substrate 1 is less than 0.1 Ω·cm; the epitaxial layer 2 is a P-type low-doped or intrinsic layer, the resistivity of the epitaxial layer 2 can be greater than 500 Ω·cm, and the thickness of the epitaxial layer 2 can be between 10 μm and 100 μm.
[0031] S200. Etch grooves 21 on the substrate, and the grooves 21 isolate the side of the epitaxial layer 2 away from the substrate 1 into isolated islands 22 arranged in an array, forming a structure as Figure 2 shown. The specific steps include the following:
[0032] S201. Form a first mask 200 on the surface of the epitaxial layer 2. Among them, the first mask 200 can be a photoresist layer, and this mask can be formed by coating photoresist, exposure, and development.
[0033] S202. Etch the epitaxial layer 2 to form a trench 21 in the area not covered by the first mask 200. The depth of the trench 21 is less than the thickness of the epitaxial layer 2, and then remove the first mask 200.
[0034] S300. Dope the sidewalls and bottom of the trench 21 to form a guard ring 5, and the guard ring 5 surrounds the islet 22. It specifically includes the following steps:
[0035] S301. Form a second mask 300 on the side of the epitaxial layer 2 away from the substrate 1 to form a structure as shown in Figure 3 . The second mask 300 covers the top surface of the islet 22 and exposes the trench 21. Among them, if the first mask 200 formed in step S201 is not removed, the first mask 200 formed in step S201 can also be directly used as the second mask 300 to omit step S301 to simplify the process.
[0036] S302. Use an ion implantation process to dope the bottom and sidewalls of the trench 21 to form a guard ring 5. Among them, the guard ring 5 includes a deep junction region 51 at the bottom of the trench 21 and a doped region 52 on the sidewalls of the trench 21. The doped region 52 can reduce the edge electric field and improve the breakdown voltage of the device. For example, the doping types of the deep junction region 51 and the doped region 52 are N-type doping.
[0037] The process of forming the guard ring 5 includes the steps of forming the deep junction region 51 and the step of forming the doped region 52. The present disclosure does not particularly limit the order of forming the deep junction region 51 and the doped region 52. In this embodiment, step S302 specifically includes: as shown in Figure 3 . First, inject an ion beam at an angle coinciding with the normal of the bottom of the trench 21, that is, the direction of the ion beam is parallel to the thickness direction of the substrate 1, mainly doping the bottom of the trench 21 to form the deep junction region 51; as shown in Figure 4 . Then, inject the ion beam at an angle intersecting the normal of the bottom of the trench 21 and using a multi-directional injection, mainly doping the sidewalls of the trench 21 to form the doped region 52. Of course, in other embodiments, the doped region 52 can also be formed first, and then the deep junction region 51 can be formed.
[0038] S303. Remove the second mask 300 to form a structure as shown in Figure 5 .
[0039] S400. Fill the trench 21 with an insulating layer 6. In the example of the present invention, it specifically includes:
[0040] S401. Form an insulating material layer 60 on the side of the epitaxial layer 2 away from the substrate 1. The insulating material layer 60 covers the surface of the islet 22 and fills the trench 21 to form a structure as shown in Figure 6The structure shown; of course, according to the current deposition process, the insulating material layer 60 should have an uneven surface. The material of the insulating material layer 60 can be an insulating material such as silicon oxide.
[0041] S402. Use a chemical mechanical polishing (CMP) process or other process to planarize the insulating material layer 60, and use the top surface of the islet 22 as the stop layer, thereby forming the insulating layer 6 that fills the trench 21, forming as Figure 7 the structure shown.
[0042] The above steps S200 to S400 can be adjusted based on the traditional shallow trench isolation (STI) process. Specifically, steps of forming the deep junction region 51 and the doped region 52 are added to the shallow trench isolation technology.
[0043] S500. Form the gain layer 3 and the contact layer 4 in the islet 22 respectively, forming as Figure 8 the structure shown. Each gain layer 3 and contact layer 4 in the islet 22 form a pixel. Among them, the contact layer 4 is located on the side of the gain layer 3 away from the substrate 1, that is, the gain layer 3 is located between the substrate 1 and the contact layer 4; the doping types of the gain layer 3 and the contact layer 4 are opposite, and the doping type of the contact layer 4 is the same as that of the guard ring 5. For example, the doping type of the gain layer 3 is P-type doping, and the doping type of the contact layer 4 is N-type doping.
[0044] Both the gain layer 3 and the contact layer 4 can be formed by ion implantation. Ion implantation is performed from the side of the epitaxial layer 2 away from the substrate 1 to dope the islet 22, and the ion implantation depth is controlled by controlling the implantation energy. Among them, the gain layer 3 can be formed in the islet 22 by high-energy ion implantation. Obviously, the gain layer 3 "floats" in the islet 22, that is, the distance between the gain layer 3 and the surface of the islet 22 near the surface of the islet 22 has a certain distance; then, ion implantation is performed again from the side of the epitaxial layer 2 away from the substrate 1 to dope the vicinity of the surface of the islet 22 to form the contact layer 4. After ion implantation, annealing is performed. Among them, the depth of the gain layer 3 does not exceed the depth of the guard ring 5.
[0045] S600. Form the insulating layer electrode 7 and the contact layer electrode 8 on the side of the epitaxial layer 2 away from the substrate 1, and one end of the insulating layer electrode 7 extends into the insulating layer 6. Specifically, it includes:
[0046] S601. Use a patterning process to form a groove 61 in the insulating layer 6, forming as Figure 9 the structure shown. Among them, the patterning process includes, but is not limited to, steps such as coating photoresist, exposure, development, and etching.
[0047] S602. Deposit a metal material layer 70 on the epitaxial layer 2 to form a structure as shown in Figure 10 . Of course, in addition to the top surface of the island 22 being covered with the metal material layer 70, the groove 61 is also filled with the metal material layer 70.
[0048] S603. Pattern the metal material layer 70 to form an insulating layer electrode 7 and a contact layer electrode 8, as shown in Figure 11 . A part of the insulating layer electrode 7 is located in the groove 61, and the other part protrudes above the top surface of the insulating layer 6; the contact layer electrode 8 covers the top surface of the contact layer 4 and is electrically connected to the contact layer 4. The contact layer electrode 8 can extend to cover the surface of the doped region 52 in addition to covering at least a part of the surface of the contact layer 4.
[0049] Applying a positive voltage to the insulating layer electrode 7 can control the electrons in the deep junction region 51 to accumulate under the insulating layer 6, thereby achieving a better isolation effect between adjacent pixels. In addition, applying a positive voltage to the insulating layer electrode 7 can also increase the electric field between the doped region 52 and the gain layer 3, thereby enhancing the avalanche multiplication effect of the gain layer 3.
[0050] S700. On the side of the substrate 1 away from the epitaxial layer 2, that is, on the back surface of the substrate 1, form a back electrode 9 (as shown in Figure 11 ). Specifically, a common back metallization process can be used to form the back electrode. Of course, before the back metallization, it also includes the step of thinning the back surface of the substrate 1. Among them, the material of the back electrode 9 is a single-layer metal or a stack of multiple-layer metals. For example, the single-layer metal is aluminum, copper, gold, etc.
[0051] The preparation method of the above avalanche detector has at least the following advantages:
[0052] (1) Use the shallow trench isolation process to form trenches 21 in the epitaxial layer 2, isolate the side of the epitaxial layer 2 away from the substrate into islands 22 arranged in an array, form a gain layer 3 and a contact layer 4 in the islands 22 to form pixels, and fill the trenches 21 with an insulating layer 6. Among them, using the shallow trench isolation process to isolate pixels and filling the trenches 21 with the insulating layer 6 for insulation can obtain good isolation between pixels, thereby obtaining an avalanche detector with small-size large-array pixels;
[0053] (2) By combining the high-energy ion implantation and variable-angle ion implantation techniques, doping is performed on the bottom and side walls of the trench 21 to form a guard ring 5, which can effectively increase the depth of the guard ring 5 in the epitaxial layer 2, thereby increasing the breakdown voltage and obtaining an avalanche detector with high breakdown voltage; moreover, the guard ring 5 is equivalent to a high-voltage junction region formed under the shallow trench isolation region, which can avoid edge breakdown and increase the breakdown voltage;
[0054] (3) By forming an insulating layer electrode 7 whose end extends into the insulating layer 6, when a voltage is applied to the insulating layer electrode 7, on the one hand, it can control the deep junction region 51 in the protection ring 5 to achieve better isolation, and on the other hand, it can control the electric field between the doped region 52 in the protection ring 5 and the gain layer 3, improving the avalanche multiplication effect of the gain layer 3.
[0055] As Figure 11 shown, the present invention also provides an avalanche detector, including a substrate 1, an epitaxial layer 2 is provided on one side of the substrate 1, and a back electrode 9 is provided on the side of the substrate 1 away from the epitaxial layer 2. For example, the thickness of the epitaxial layer 2 is between 10 μm and 100 μm. The epitaxial layer 2 can be a lightly doped or intrinsic layer to increase the resistivity of the epitaxial layer 2.
[0056] A trench 21 is provided in the epitaxial layer 2, specifically on the surface of the epitaxial layer 2 away from the substrate 1. The trench 21 isolates the side of the epitaxial layer 2 away from the substrate 1 into pixels arranged in an array. The pixel includes a contact layer 4 and a gain layer 3. The contact layer 4 is located on the side of the gain layer 3 away from the substrate 1, that is, the gain layer 3 is located between the substrate 1 and the contact layer 4. The trench 21 is filled with an insulating layer 6 to isolate adjacent pixels. The bottom and side walls of the trench 21 are provided with a protection ring 5. The protection ring 5 surrounds the contact layer 4 and the gain layer 3, thereby reducing the edge electric field of the gain layer 3 to obtain a higher breakdown voltage.
[0057] Among them, the doping type of the contact layer 4 is the same as that of the protection ring 5, the doping type of the contact layer 4 is opposite to that of the gain layer 3, and the doping types of the gain layer 3, the epitaxial layer 2 and the substrate 1 are the same (excluding the case where the epitaxial layer 1 is an intrinsic layer). In the example of the present invention, the doping types of the contact layer 4 and the protection ring 5 are N-type doping, and the doping types of the gain layer 3 and the epitaxial layer 2 are P-type doping. Among them, the substrate 1 is heavily doped to reduce the resistivity of the substrate 1; the epitaxial layer 2 is lightly doped to increase the resistivity of the epitaxial layer 2, which can reduce the noise introduced by doping ions and improve the detection sensitivity. For example, the resistivity of the substrate 1 can be less than 0.1 Ω·cm, and the resistivity of the epitaxial layer 2 can be greater than 500 Ω·cm.
[0058] In the example of the present invention, the depth of the protection ring 5 is greater than the depth of the gain layer 3 to further reduce the edge electric field of the gain layer 3 to obtain a higher breakdown voltage. The protection ring 5 includes a deep junction region 51 at the bottom of the trench 21 and a doped region 52 on the side wall of the trench 21, and the deep junction region 51 and the doped region 52 are connected as a whole.
[0059] The contact layer 4 is connected to a contact layer electrode 8. A reverse bias voltage is applied between the contact layer electrode 8 and the back electrode 9. When the light incident on the contact layer 4 is absorbed, carriers are generated. Under the action of the reverse bias voltage, an "avalanche" phenomenon occurs in the gain layer 3, causing the carriers to multiply, thereby amplifying the generated current. The amplified current is absorbed after passing through the epitaxial layer 2, preventing the current from being too large and damaging the avalanche detector.
[0060] The insulating layer 6 is connected to an insulating layer electrode 7 whose end extends into the insulating layer 6. By applying a voltage to the insulating layer electrode 7, on the one hand, it can control the electrons in the deep junction region 51 to accumulate under the insulating layer 6, thereby achieving a better isolation effect between adjacent pixels; on the other hand, it can increase the electric field between the doped region 52 and the gain layer 3, enhancing the avalanche multiplication effect of the gain layer 3.
[0061] As described above, it is only the specific implementation manner of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present disclosure should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.
Claims
1. A method for preparing an avalanche detector, characterized in that: include: Providing a substrate, the substrate comprising a substrate and an epitaxial layer located on one side of the substrate; forming a groove in the epitaxial layer, wherein the groove isolates a side of the epitaxial layer away from the substrate into islands arranged in an array; Doping the sidewall and the bottom of the trench to form a guard ring, wherein the guard ring surrounds the island; filling an insulating layer in the groove; A gain layer and a contact layer are formed in the isolated island. The contact layer is located on a side of the gain layer away from the substrate. The gain layer and the contact layer have opposite doping types, and the contact layer and the guard ring have the same doping type.
2. The method for preparing an avalanche detector according to claim 1, characterized in that: The step of forming the protection ring comprises: forming a mask on a side of the epitaxial layer away from the substrate, wherein the mask covers the island and exposes the trench; Implanting an ion beam at an angle coincident with a normal line of the bottom of the trench to dope the bottom of the trench, and implanting an ion beam at an angle intersecting the normal line of the bottom of the trench to dope the sidewall of the trench; The mask is removed.
3. The method for preparing an avalanche detector according to claim 1, characterized in that: The depth of the guard ring is greater than the depth of the gain layer.
4. The method for preparing an avalanche detector according to claim 1, characterized in that: The preparation method further comprises the steps of forming a front electrode and a back electrode respectively: Wherein, the front electrode comprises an insulating layer electrode and a contact layer electrode, one end of the insulating layer electrode extends into the insulating layer, and the contact layer electrode covers the contact layer and is electrically connected to the contact layer; The back electrode is located at a side of the substrate away from the epitaxial layer.
5. The method for preparing an avalanche detector according to claim 4, characterized in that: The step of forming the front electrode comprises: forming a groove in the insulating layer, wherein the depth of the groove is less than the thickness of the insulating layer; Depositing a metal material layer on a side of the epitaxial layer away from the substrate; The metal material layer is patterned to form the front electrode.
6. An avalanche detector, characterized in that: include: A substrate, wherein an epitaxial layer is disposed on one side of the substrate; A groove is provided in the epitaxial layer to isolate the side of the epitaxial layer away from the substrate into pixels arranged in an array, wherein the pixel comprises a contact layer and a gain layer, wherein the contact layer is located on the side of the gain layer away from the substrate; an insulating layer is filled in the groove, and a guard ring is provided at the bottom and sidewall of the groove, wherein the guard ring surrounds the contact layer and the gain layer; The contact layer and the gain layer have opposite doping types, and the contact layer and the guard ring have the same doping type.
7. The avalanche detector according to claim 6, characterized in that: The depth of the guard ring is greater than the depth of the gain layer.
8. The avalanche detector according to claim 6, characterized in that: The insulating layer is provided with an insulating layer electrode with an end portion extending into the insulating layer; The contact layer is connected to a contact layer electrode; A back electrode is disposed on a side of the substrate away from the epitaxial layer.
9. The avalanche detector according to claim 6, characterized in that: The substrate is a silicon substrate, and the resistivity of the substrate is less than 0.1Ω·cm.
10. The avalanche detector according to claim 6, characterized in that: The resistivity of the epitaxial layer is greater than 500Ω·cm; and / or, The thickness of the epitaxial layer is between 10 μm and 100 μm.