Electronic equipment heat dissipation design method based on reliable junction temperature margin

Abstract

The invention relates to an electronic equipment heat dissipation design method based on a reliable junction temperature margin. The electronic equipment heat dissipation design method comprises the following steps: step 1, carrying out self power consumption calculation on all integrated circuit chips and power semiconductor devices on each PCBA (Printed Circuit Board Assembly) of electronic equipment; step 2, calculating internal junction temperature rise generated by the chip due to self power consumption; 3, performing thermal simulation according to the total power consumption of each PCBA and the power consumption of each electronic component on the board, and performing heat dissipation design of a shell structure and an internal cooling fin; 4, performing PCB layout heat dissipation design on each PCB of the electronic equipment; 5, verifying the set reliable junction temperature margin, and if the verification result meets the requirement, completing the heat dissipation design of the electronic equipment; if the verification result does not meet the requirement and the electronic component does not need to be replaced, the heat dissipation design in the third step and / or the fourth step is carried out again; and if the verification result does not meet the requirement and the electronic component needs to be replaced, the heat dissipation design from the first step to the fourth step needs to be carried out again. According to the heat dissipation design method, the equipment at least has a specified junction temperature margin and can work reliably.

Description

Technical Field

[0001] The present invention relates to the technical field of reliable heat dissipation for electronic products, and particularly to a heat dissipation design method for electronic devices based on the reliability junction temperature margin. Background Art

[0002] In reliability engineering, the temperature factor in the failure of electronic devices accounts for 41% of the total failure factors. Therefore, the reliability design of electronic devices needs to ensure that each electronic component in the electronic device has a specified reliability junction temperature margin. Integrated circuit chips or power electronic components all have a maximum junction temperature index that depends on the material. Usually, integrated circuit chips have a maximum junction temperature of 150 °C, but the maximum junction temperature of FPGAs is usually only 100 °C or 105 °C. Once the internal junction temperature of an electronic component exceeds its maximum junction temperature, the electronic component has a very high damage rate. If an electronic device operates at the specified maximum ambient temperature and each internal electronic component can ensure a specified reliability junction temperature margin to its maximum junction temperature, the electronic device can operate reliably and stably. Currently, electronic devices in the industrial environment are developing towards miniaturization, and the external dimensions are basically determined by the width of the wiring terminals, and the space limitation also increases the difficulty of heat dissipation design.

[0003] Patent CN110662397B discloses a heat dissipation design method and a heat dissipation structure for an electronic device. It obtains a thermal distribution map of the PCB working state through thermal simulation; obtains heat source points according to the thermal distribution map, lays heat dissipation copper foils around the heat source points on the PCB, and opens heat dissipation vias on the PCB at the bottom of the heat source points; sets a plurality of metal protrusions on the metal casing, a part of the protrusions is used to fix the PCB and makes the heat source points close to the protrusions, and another part of the protrusions is used to contact the heat source points. This invention uses the heat dissipated from the heat source points to be conducted to the casing and then dissipated through the casing. It only discusses the heat dissipation design of conduction and radiation and cannot ensure that the internal electronic components can work reliably by themselves. And the design is applicable to die casting design and is not suitable for the sheet metal structure casing. The design is suitable for single PCBA board design and is not suitable for the design of multi-PCBA assembly inside an electronic device.

[0004] CN101221588B discloses a heat dissipation design method in PCB design, including: Step 1, analyze and determine the components that will generate a large amount of heat loss in the PCB to be designed and their package types; determine the difference between the normal operating temperature and the maximum limit temperature of the chips on the PCB, and the power consumption of the heat loss required by the chips on the PCB; Step 2, analyze the welding contact method between the components and the PCB, the stack structure and manufacturing materials of the PCB, and the corresponding various heat dissipation methods; Step 3, establish a model to simulate the heat dissipation condition of the PCB and analyze various heat dissipation methods; Step 4, design the copper foil laying, process requirements, and stack structure of the PCB according to the model calculation results, so that the chips can maintain the normal operating temperature when working on the PCB. The inventive method improves the design of the PCB by establishing a simple model, enabling the heat dissipated by the components to reach the PCB surface as evenly and quickly as possible, enabling the PCB to dissipate heat well without relying on external heat sinks and maintaining stable operation. However, this method does not consider the increase in the internal air temperature caused by the inability to timely discharge the heat dissipated by all the electronic components inside the module when one or more PCBAs are installed in a limited space, nor does it consider allowing the electronic components to operate with a specified reliability junction temperature margin. Summary of the Invention

[0005] The object of the present invention is to provide a heat dissipation design method for electronic devices based on the reliability junction temperature margin.

[0006] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0007] A heat dissipation design method for electronic devices based on the reliability junction temperature margin includes the following steps:

[0008] The first step is to calculate the self-power consumption of all integrated circuit chips and power semiconductor devices on each PCBA of the electronic device;

[0009] The second step is to calculate the internal junction temperature rise of the chips due to their self-power consumption;

[0010] The third step is to perform thermal simulation based on the total power consumption of each PCBA and the self-power consumption of each electronic component on the board, and design the heat dissipation of the housing structure and internal heat sinks;

[0011] The fourth step is to perform PCB layout heat dissipation design for each PCB board of the electronic device;

[0012] Step 5: Verify the reliability junction temperature margin. If the verification result meets the requirements, the heat dissipation design of the electronic device is completed; if the verification result does not meet the requirements and no electronic components need to be replaced, re-perform the heat dissipation design in Step 3 and / or Step 4; if the verification result does not meet the requirements and electronic components need to be replaced, re-perform the heat dissipation design from Step 1 to Step 4.

[0013] In one embodiment, in Step 1, based on the circuit schematic of the PCBA, calculate the self-power consumption P of each integrated circuit chip and power semiconductor electronic component during normal operation self .

[0014] In one embodiment, in Step 2, the internal junction temperature rise ΔT of the chip due to its own power consumption j is calculated by the following formula:

[0015] ΔT j = P self × R θjc , or

[0016] ΔT j = P self × R θjB , or

[0017] ΔT j = P self × R θja ;

[0018] where R θjc is the thermal resistance coefficient of the internal junction temperature to the outer surface of the package, R θjB is the thermal resistance coefficient of the internal junction temperature to the PCB surface, R θja is the thermal resistance coefficient of the internal junction temperature to the air environment, and P self is the self-power consumption of the corresponding chip.

[0019] In one embodiment, the internal junction temperature T of each chip when the electronic device operates at the highest ambient temperature T max is T j = ΔT j + ΔT env + T max ;

[0020] where ΔT env represents the change in the internal environment temperature due to heat generation from its own power consumption inside the electronic device;

[0021] Calculate the junction temperature margin T of each chip jmargin

[0022] T jmargin = T jmax－ T j

[0023] Junction temperature margin T jmargin needs to be greater than or equal to the set reliability junction temperature margin. If it is less than the set reliability junction temperature margin, then it is necessary to replace the electronic components or optimize the circuit design. Here, T jmax represents the maximum junction temperature of each electronic component itself.

[0024] In one embodiment, in the third step, the volume power density and surface heat flux density of the heat sink are estimated by combining the total power consumption of each PCBA in the electronic device, the self-power consumption of each electronic component on the PCBA, the temperature rise, the housing size, and the usage environment; and the simulation size of the heat sink is obtained according to the volume power density, surface heat flux density, temperature rise requirement, ambient temperature, the junction temperature of the most important device, and the chassis size, as well as the corresponding heat dissipation method.

[0025] In one embodiment, the Flotherm software is used to establish a system model, the boundary conditions are set according to the software modeling rules, and the corresponding simulation attribute parameters are assigned to the components; by specifying the solution domain, dividing the grid, performing a preliminary solution, adjusting the model and the grid until the solution converges;

[0026] Then, according to the preliminary solution results, the thickness of the radiator substrate, the thickness of the fins, the height of the fins, the length of the fins, and the fin pitch are optimized and calculated. According to the optimization comparison, space size, and structural strength, the model and the grid are further adjusted and solved, and the simulation junction temperature of the corresponding device is calculated through the temperature monitoring table of the solution results.

[0027] In one embodiment, if the junction temperature of the corresponding device does not meet the junction temperature margin, then the thermal resistance of the corresponding device transferring heat to the housing and to the external environment is reduced.

[0028] In one embodiment, the thermal resistance of the corresponding device transferring heat to the housing and to the external environment is reduced by the following methods:

[0029] Increase the heat conduction mechanism from the top or bottom plate of the heat-generating device to the housing;

[0030] and / or increase the copper cladding at the bottom of the device;

[0031] and / or increase the thermal vias at the bottom of the device.

[0032] In one embodiment, in the fourth step, the heat generation is reduced by thickening the traces and increasing the copper cladding, while increasing the heat dissipation area.

[0033] In one embodiment, in the fourth step, the power supply chip is arranged at the physical middle position of each load.

[0034] In one embodiment, in the fourth step, when establishing the chip package, a reserved heat dissipation copper foil is added at the bottom of the chip. During PCB layout, the heat dissipation copper foil is fused and connected to the large copper foils around it. At the same time, vias are drilled through the heat dissipation copper foil at the bottom of the chip and the large copper foils adjacent to it to the inner layer and the bottom layer.

[0035] The heat dissipation design method for the electronic device provided by the present invention is designed based on the reliability junction temperature margin, and it has the following advantages:

[0036] 1. The heat dissipation design method of the present invention is based on the heat dissipation design system of the electronic device with the reliability junction temperature margin, including the quantitatively specified junction temperature margin design target, structural design, PCB design, and high-temperature verification design target. Within the operating temperature index range of the electronic device, the device can operate reliably with at least the specified junction temperature margin.

[0037] 2. A heat sink connected to the sheet metal housing is arranged inside the sheet metal housing structure to transfer the heat of the heat source on the PCBA, which can save the mold opening cost of using die casting design for the housing.

[0038] 3. When multiple PCBAs are assembled in a space with limited size, it can ensure that each electronic component operates with the specified junction temperature margin, which is suitable for the industrial design trend of miniaturization of electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a reference diagram for empirical selection of the cooling method of the electronic device.

[0040] Figure 2 It is an empirical diagram of the cooling method of the electronic device.

[0041] Figure 3 It is a reference diagram for calculating the simulation size of the heat sink of the electronic device.

[0042] Figure 4 It is a schematic diagram of the system model established by Flotherm software.

[0043] Figure 5 It is a reference diagram for the boundary conditions in the modeling and the simulation attribute parameters of the components in Flotherm software.

[0044] Figure 6 It is a reference diagram for the variable iteration residual curve of the system model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings to more clearly understand the purpose, features, and advantages of the present invention. It should be understood that the embodiments shown in the drawings are not a limitation on the scope of the present invention, but only to illustrate the essential spirit of the technical solution of the present invention.

[0046] In the following description, certain specific details are set forth in order to provide a thorough understanding of the various disclosed embodiments. However, those skilled in the relevant art will recognize that the embodiments may be practiced without one or more of these specific details. In other instances, well-known devices, structures, and techniques associated with the present application may not be shown or described in detail so as not to unnecessarily obscure the description of the embodiments.

[0047] Unless the context requires otherwise, throughout the specification and claims, the words "comprising" and its variations such as "comprises" and "having" shall be understood in an open, inclusive sense, i.e., to be interpreted as "including, but not limited to".

[0048] References to "one embodiment" or "an embodiment" throughout the specification mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of "in one embodiment" or "in an embodiment" in various places throughout the specification are not necessarily all referring to the same embodiment. Additionally, the particular features, structures, or characteristics may be combined in any manner in one or more embodiments.

[0049] As used in this specification and the appended claims, the singular forms "a" and "the" include plural referents unless the context clearly dictates otherwise. It should be noted that the term "or" is generally used in its inclusive sense of "and / or" unless the context clearly dictates otherwise.

[0050] The present invention provides a heat dissipation design method for an electronic device based on the reliability junction temperature margin, including the following processes.

[0051] First step, calculate the self-power consumption of all integrated circuit chips and power semiconductor devices on each PCBA of the electronic device.

[0052] Based on the circuit schematic diagram of the PCBA, calculate the self-power consumption P of each integrated circuit chip including FPGA and power semiconductor components during normal operation self .

[0053] Second step, calculate the internal junction temperature rise of the chip due to its own power consumption.

[0054] The data sheet of each type of chip generally gives the thermal resistance parameter. Some are the thermal resistance coefficient R of the internal junction temperature to the outer surface of the package θjc (sometimes two coefficients are given: the thermal resistance coefficient to the upper surface of the package and the thermal resistance coefficient to the lower surface of the package), some are the thermal resistance coefficient R of the internal junction temperature to the PCB surface θjB , and some are the thermal resistance coefficient R of the internal junction temperature to the air environment θjaSelect the corresponding thermal resistance coefficient according to where the thermocouple is pasted during the subsequent verification steps.

[0055] Calculate the internal junction temperature rise ΔT of the chip due to its own power consumption j , where

[0056] ΔT j = P self × R θjc , or

[0057] ΔT j = P self × R θjB , or

[0058] ΔT j = P self × R θja .

[0059] Therefore, the internal junction temperature T of each chip when the electronic device is operating at the highest ambient temperature T max is j T j

[0060] = ΔT j + ΔT env + T max

[0061] where, ΔT env represents the change in the internal ambient temperature due to the heat generated by the power consumption of the electronic device itself.

[0062] Calculate the junction temperature margin T jmargin

[0063] T jmargin = T jmax－ T j

[0064] The junction temperature margin T jmargin needs to be greater than or equal to the set reliability junction temperature margin. If it is less than the set reliability junction temperature margin, then it is necessary to replace the electronic components or optimize the circuit design. Here, T jmax represents the highest junction temperature of each electronic component itself.

[0065] Thirdly, perform thermal simulation based on the total power consumption of each PCBA and the power consumption of each electronic component on the board, and conduct heat dissipation design for the enclosure structure and internal heat sinks.

[0066] In this embodiment, an example is given where the electronic device is a vibration monitor with 24 vibration acquisition channels / 4 rotational speed acquisition channels. This electronic device has 24 vibration acquisition channels, 4 key phase / rotational speed acquisition channels, 6 digital input acquisition channels, and 2 relay output control channels. This product can be widely used in various industrial environments, such as vibration monitoring of main pump units in the water conservancy industry, vibration monitoring of wind turbine generators, vibration monitoring of auxiliary equipment in power plants, vibration monitoring of small and medium-sized centrifugal / reciprocating compressors in the petrochemical industry, and the iron and steel / mining machinery industry. The highest working environmental temperature is 65°C. The specified reliability junction temperature margin for the integrated circuit chip is 40°C. The FPGA is a special case, and the reliability junction temperature margin is 15°C. The reliability junction temperature margin for power semiconductor electronic components is 25°C.

[0067] Combined with the total power consumption of each PCBA in the device, the self-power consumption of each electronic component on the PCBA, the temperature rise, the approximate size of the enclosure, and the use environment (general altitude, indoor without solar radiation, -30°C to 65°C), estimate the volume power density and the surface heat flux density.

[0068] Among them, the volume power density = P / V = 0.0067 W / cm 3 ,

[0069] The surface heat flux density = P / S = 0.012 W / cm 2 .

[0070] Referring to the experience selection of the cooling method for electronic devices with a set temperature rise of 40K, according to Figure 1 the curve values, it can be seen that the maximum heat flux density achieved by natural convection cooling can reach 0.08 W / cm 2 , and the maximum volume power density can reach 0.009 W / cm 3 .

[0071] Again, according to the experience diagram of the cooling method for electronic devices, as Figure 2 shown, for a temperature rise of 20°C and a heat flux density between 0.01 and 0.03 W / cm 2 , natural cooling and heat dissipation can be selected. Further determine that the heat dissipation of the above-mentioned electronic device can adopt radiation and natural convection cooling methods.

[0072] According to the volume power density, the surface heat flux density, the temperature rise requirement, the ambient temperature, the junction temperature of the most important device, and the chassis size, an estimation tool can be used to roughly estimate a suitable heat sink simulation size according to natural convection and radiation cooling at room temperature. For example, by using the Figure 3 estimation tool shown on the left, the heat sink simulation size on the Figure 3 right can be calculated.

[0073] Based on the above cooling methods and preliminary structure (outer shell, PCB, approximate layout of heat-generating components on the PCB, thermal pads, heat sinks, etc.), considering both heat dissipation and electromagnetic compatibility, the largest air volume ventilation holes are opened on the upper and lower sides of the chassis. The ventilation rate and the shielding effectiveness of the ventilation holes are estimated using the following formulas respectively. The upper and lower side ventilation holes are staggered to avoid air flow short-circuit and increase the aesthetic appearance. In this embodiment, the ventilation holes are circular holes, and the center connection lines of three adjacent ventilation holes form an equilateral triangle as an example.

[0074] Ventilation rate (%) = 90.66×D 2 / P 2

[0075] where D is the diameter of the ventilation hole, and P is the center distance between adjacent ventilation holes.

[0076] Shielding effectiveness of ventilation hole SE = 20log(15×10 9 / f·W)+27.3×L / W, where f is the radiation frequency to be controlled.

[0077] In this embodiment, the aperture of the ventilation hole W = 2mm, and the wall thickness of the outer shell L = 2mm.

[0078] At 200MHz, SE single = 20log(15×10 9 / 2×10 8 ×0.002)+27.3×2 / 2 = 118.8dB.

[0079] At 1.5GHz, SE single = 20log(15×10 9 / 1.5×10 9 ×0.002)+27.3×2 / 20 = 101.3dB.

[0080] Use Flotherm software to establish a model for the system, as Figure 4 shown.

[0081] Set the boundary conditions according to the software modeling rules (such as 1atm, 65°C ambient temperature, the chassis as a cold plate three-dimensional mode and turn on thermal radiation, the device is suspended in the direction of gravitational acceleration) and assign the corresponding simulation attribute parameters to the components (such as heat dissipation, material and surface treatment, thermal conductivity / thermal resistance, double thermal resistance model, thermal model provided by the manufacturer), as Figure 5 shown. The substrate and fins of the heat sink (the fins are in the direction of gravitational acceleration) are set with empirical dimensions.

[0082] Specify the solution domain, divide the grid, perform a preliminary solution, and adjust the model and grid until the solution converges (the variable iteration residual curve bottoms out, and the monitoring point curve levels off, as Figure 6 shown).

[0083] According to the preliminary solution results, software is used to perform simple optimization calculations on the thickness of the radiator substrate, the thickness of the fins, the height of the fins, the length of the fins, and the fin pitch. Based on the optimization comparison, spatial dimensions, and structural strength, and considering the actual cost, etc., the final shape of the radiator is determined through trade-offs, and the model and mesh are further adjusted and solved according to this setting.

[0084] Organize the temperature monitoring table of the solution results, and calculate the simulated junction temperature of the corresponding device according to the junction temperature calculation formula given above. If the junction temperature of the device cannot guarantee the junction temperature margin, it is necessary to reduce the thermal resistance of the heat transfer of the device to the housing and to the external environment.

[0085] For example, adopt a heat conduction mechanism from the top or bottom plate of the heat-generating device to the housing (such as the radiator boss and the thermal pad transfer heat away from the device, or place a thermal pad between the heat-generating device and the housing when the distance between them is relatively close to transfer the heat to the housing and dissipate it to the outside). And / or increase the copper cladding at the bottom of the device (see the fourth step). And / or increase the thermal vias at the bottom of the device (see the fourth step), and adjust the model and mesh again to solve for the results.

[0086] The housing can also use a high-thermal-conductivity aluminum alloy material to reduce the thermal resistance of the internal heat-generating body dissipating heat to the surrounding environment through the housing; and / or the housing is treated with environmentally friendly conductive oxidation and metal-colored sand grain spraying on the surface. The conductive oxidation ensures the electrical performance requirements of the inner surface of the electronic equipment housing, and at the same time improves the adhesion of the spraying on the outer surface material. The thermal radiation coefficient of the outer surface spraying treatment can be increased from 0.1 of the aluminum plate smooth surface to 0.8 - 0.9. The simulation calculation shows that the shell temperature of the main heat-generating device is reduced by 4 - 5 °C;

[0087] It can also be considered to install the equipment base plane with a metal flat plate, and the installation surface of the housing base is not sprayed, so that a small part of the heat can be transferred out through the installation surface of the housing base, and at the same time, good grounding of the equipment is ensured.

[0088] In this embodiment, taking one of the finally optimized examples: increasing the thermal pad for the heat generation of individual devices can ensure the junction temperature margin of the junction temperature.

[0089] In addition, in the structural design, a TIG argon arc welding bracket structure is adopted on the upper cover of the housing, and both the housing base and the housing upper cover are tightly locked with the heat sink, increasing the thermal contact area, reducing the contact thermal resistance between the heat sink and the housing, and at the same time ensuring the effective pressure of the substrate on the heat sink on the thermal pad, reducing the thermal resistance of the heat transfer from the heat-generating device to the outside.

[0090] Step 4: Heat dissipation design of PCB layout

[0091] There are two design directions for the heat dissipation design of PCB layout: reducing heat generation and promptly dissipating the generated heat. These two points complement each other. For some current-carrying circuits, mainly by thickening the traces and increasing the copper pouring, the line impedance can be reduced, heat generation can be decreased, and at the same time, due to the increased heat dissipation area, the natural heat dissipation will be faster without forced air cooling. In this embodiment, the following examples are used for illustration.

[0092] 1) Relay traces

[0093] The PCB design at the relay should meet the constraint conditions of reinforced insulation in IEC61010-1. For example, the distance between the primary side and the secondary side is greater than 5 mm, and the distance between any primary side traces is greater than 3 mm, etc. Coupled with a large number of product channels, the overall component density of the PCB is high, and the available space for the trace plane at the relay is small. In general related designs, the surface trace method is adopted. When the current is not large, the heat dissipation pressure is not great, but when a large current flows through the relay, it will cause potential safety hazards in the PCB heat dissipation at the relay.

[0094] In this design, the surface layer uses a 2-mm PCB line width, and at the same time, 2-mm-wide traces are used in the inner layer to enhance heat dissipation. According to the actual trace situation, the traces of each circuit network are routed on 2 to 5 layers of the PCB simultaneously, thus achieving the purpose of lower impedance and faster heat dissipation.

[0095] 2) For the power supply that is mainly used and has a large load

[0096] a) During layout, try to arrange the power supply chip at the physical middle position of each load so that each load is not far from the power supply chip, which can ensure that the overall heat of the power supply network is relatively low; in conventional designs, the power supply chip is placed near the input voltage, but in a multi-board interconnected structure, there will be problems such as high line impedance, large voltage drop, and high heat due to the main load of the power supply chip being on another board and being powered through long-distance traces via board-to-board connectors.

[0097] b) Regarding its own power consumption, when establishing the chip package, add a reserved heat dissipation copper foil at the bottom of the chip. During PCB layout, fully integrate and connect this heat dissipation copper foil with the large copper foils around it. At the same time, drill through holes in the heat dissipation copper foil at the bottom of the chip and the large copper foils adjacent to it to the inner layer and the bottom layer to form a three-dimensional multi-layer heat dissipation effect.

[0098] In the design example, the +5V power supply is the most used and has the widest trace range. This design moves the +5V to a position near the middle of the CPU board, which makes the distance between the +5V power supply chip and each load not very far, thus ensuring that the overall heat on the +5V power supply network is relatively low.

[0099] In this embodiment, the PCB design at the +5V power supply of the electronic device applies Design B. Since the chip needs to output a maximum current of 3.5A in the circuit, through calculation, the maximum power consumption on the chip will be 1.3W, which will bring relatively large heat dissipation pressure and have an adverse impact on the reliability of the chip. Therefore, in order to enhance heat dissipation here, a reserved heat dissipation copper foil is added at the bottom of the chip when establishing the chip package. During PCB layout, the heat dissipation copper foil is completely fused and connected to the large copper foils around it. At the same time, vias are drilled through the heat dissipation copper foil at the bottom of the chip and the large copper foils adjacent to it to the inner layer and the bottom layer, thus forming a three-dimensional multi-layer heat dissipation effect, which is very helpful for the heat dissipation of the chip.

[0100] The PCB design of the +24V power supply circuit of the electronic device also applies Design B. +24V is the first-stage power supply in this design example, and all subsequent power supplies are generated by this power supply. Therefore, there are many challenges in the design of this power supply, and one of them is heat dissipation. A reserved heat dissipation copper foil is added at the bottom of the chip when establishing the chip package. During PCB layout, due to the large number of pins of this chip and considerations of small signal quality and EMC, only a relatively small copper foil can be extended on the top layer. For the consideration of enhancing heat dissipation, seven large copper foils are mapped and marked on the inner layer and the bottom layer of the chip and the peripheral circuit, and enhanced heat dissipation is achieved through connection by multiple vias.

[0101] The PCB design of the -24V power supply circuit of the electronic device also applies Design B. -24V is also the main power supply of this product, supplying power to each external sensor and also to the analog front-end of all channels. A reserved heat dissipation copper foil is added at the bottom of the chip when establishing the chip package. During PCB layout, the heat dissipation copper foil is completely fused and connected to the large copper foils around it. At the same time, vias are drilled through the heat dissipation copper foil at the bottom of the chip and the large copper foils adjacent to it to the inner layer and the bottom layer, forming a three-dimensional multi-layer heat dissipation effect.

[0102] Step 5: Verify the set reliability junction temperature margin

[0103] Build a verification system according to the following steps:

[0104] 1) Paste thermocouples on the electronic components of concern and connect them to a multi-channel thermocouple data collector for data monitoring and storage during the experiment.

[0105] 2) Install the thermocouples to measure the air temperature values 1 cm inside the air outlet hole and 1 cm inside the air inlet hole of the electronic device. Place the fully assembled electronic device normally in a temperature control box; wire each input channel to input normal sensor signals and each output channel to drive the corresponding load to make the electronic device work at full load.

[0106] 3) Set the temperature of the temperature control box to the maximum ambient operating temperature of the electronic device, which is 65°C in this example;

[0107] 4) After turning on the temperature control box and allowing the temperature inside the box to reach the set temperature and stabilize for 2 hours, take the average of the two air temperature values at 1 cm inside the air outlet and 1 cm inside the air inlet of the electronic device as the internal ambient air temperature T env (for electronic components R with only a thermal resistance coefficient θja );

[0108] 5) After turning on the temperature control box and allowing the temperature inside the box to reach the set temperature and stabilize for 2 hours, start recording the data T of each thermocouple measurement point casing (for electronic components with a thermal resistance coefficient R θjc ) or T board (for electronic components with a thermal resistance coefficient R θjB ), and save it on the multi-channel thermocouple data collector.

[0109] For the electronic components of interest, calculate the internal junction temperature T max when operating at the maximum ambient temperature T j as

[0110] T j = ΔT j + T casing , or

[0111] T j = ΔT j + T board , or

[0112] T j = ΔT j + T env .

[0113] Calculate the junction temperature margin T jmargin

[0114] T jmargin = T jmax－ T j .

[0115] Verify whether the junction temperature margin T jmargin of the electronic components of interest meets the reliability junction temperature margin requirements.

[0116] The experimental results are as follows:

[0117] Set the operating temperature of the temperature chamber to 65°C.

[0118] Channel 6: The measured temperature of the housing of the 1-A-6A electronic device is 67.8°C.

[0119] Channel 3: The measured temperature on the outer surface of the 1-A-3A FPGA chip is 85.9 °C, T j = ΔT j + T casing = 90.22 °C, T jmargin = T jmax－ T j = 105 - 90.22 = 14.78 °C, meeting the reliability margin requirement of 15 °C.

[0120] Channel 5: The measured temperature on the outer surface of the 1-A-5A 5V power supply chip is 80.2 °C, T j = ΔT j + T casing = 109.14 °C, T jmargin = T jmax－ T j = 150 - 109.14 = 40.85 °C, meeting the reliability margin requirement of 40 °C.

[0121] The preferred embodiments of the present invention have been described in detail above. However, it should be understood that after reading the above teachings of the present invention, those skilled in the art can make various changes or modifications to the present invention. These equivalent forms also fall within the scope defined by the appended claims of this application.

Claims

1. A heat dissipation design method for electronic equipment based on reliability junction temperature margin, characterized in that: The following steps are involved: The first step is to calculate the power consumption of all integrated circuit chips and power semiconductor devices on each PCBA of the electronic equipment; The second step is to calculate the internal junction temperature rise of the chip due to its own power consumption; The third step is to conduct thermal simulation based on the total power consumption of each PCBA and the power consumption of each electronic component on the board, and to design the shell structure and internal heat sink heat dissipation; Step 4: Design the heat dissipation of each PCB board of the electronic equipment; Step 5: Verify the set reliability junction temperature margin. If the verification result meets the requirements, the heat dissipation design of the electronic equipment is completed. If the verification result does not meet the requirements and the electronic components do not need to be replaced, redo the heat dissipation design of the third and / or fourth steps. If the verification result does not meet the requirements and the electronic components need to be replaced, redo the heat dissipation design of steps 1 to 4.

2. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the first step, the power consumption P of each integrated circuit chip and power semiconductor electronic component during normal operation is calculated based on the circuit schematic diagram of the PCBA. self .

3. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the second step, the internal junction temperature rise ΔT caused by the chip's own power consumption j It is calculated by the following formula: ΔT j =P self ×R θjc ,or ΔT j =P self ×R θjB ,or ΔT j =P self ×R θja ; Among them, R θjc is the thermal resistance coefficient of the internal junction temperature to the outer surface of the package, R θjB is the thermal resistance coefficient of the internal junction temperature to the PCB surface, R θja is the thermal resistance coefficient of the internal junction temperature to the air environment, P self is the power consumption of the corresponding chip.

4. The electronic equipment heat dissipation design method according to claim 3, characterized in that: Each chip in the electronic equipment operates at the highest ambient temperature T max The internal junction temperature T j =ΔT j +ΔT env +T max ; Where, ΔT env It indicates the change of internal ambient temperature caused by the heat generated by the electronic equipment due to its own power consumption; Calculate the junction temperature margin T of each chip jmargin T jmargin =T jmax－ T j Junction temperature margin T jmargin It needs to be greater than or equal to the set reliability junction temperature margin. If it is less than the set reliability junction temperature margin, it is necessary to replace electronic components or optimize the circuit design. Here, T jmax It indicates the maximum junction temperature of each electronic component.

5. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the third step, the volume power density and surface heat flux density of the heat sink are estimated by combining the total power consumption of each PCBA in the electronic device, the power consumption of each electronic component on the PCBA, the temperature rise, the shell size and the use environment; and the simulated size of the heat sink is obtained based on the volume power density and surface heat flux density, temperature rise requirements, ambient temperature and the junction temperature of the most important components and the chassis size, as well as the corresponding heat dissipation method.

6. The electronic equipment heat dissipation design method according to claim 5, characterized in that: Use Flotherm software to build a system model, set boundary conditions according to the software modeling rules, and assign corresponding simulation attribute parameters to the components; specify the solution domain, divide the grid, perform preliminary solution, and adjust the model and grid until the solution converges; Based on the preliminary solution results, the heat sink substrate thickness, fin thickness, fin height, fin length, and fin spacing are optimized and calculated. According to the optimization comparison, spatial size, and structural strength, the model and grid are further adjusted and solved. The simulated junction temperature of the corresponding device is calculated through the temperature monitoring table of the solution results.

7. The electronic equipment heat dissipation design method according to claim 6, characterized in that: If the junction temperature of the corresponding device does not meet the junction temperature margin, the thermal resistance of the corresponding device from heat transfer to the housing and to the external environment is reduced.

8. The electronic equipment heat dissipation design method according to claim 7, characterized in that: The thermal resistance of the corresponding device to the housing and the external environment can be reduced by the following methods: Add a heat conduction mechanism from the top or bottom plate of the heating device to the outer shell; And / or increase the copper coverage at the bottom of the device; And / or add thermal vias on the bottom of the device.

9. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the fourth step, the heat generation is reduced and the heat dissipation area is increased by thickening the routing and increasing the copper plating.

10. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the fourth step, the power chip is placed at the physical middle position of each load.

11. The electronic equipment heat dissipation design method according to claim 1, characterized in that: In the fourth step, a reserved heat dissipation copper foil is added to the bottom of the chip when the chip package is established. During the PCB layout, the heat dissipation copper foil is fused and connected with the surrounding large copper foils. At the same time, holes are drilled through the heat dissipation copper foil at the bottom of the chip and the surrounding large copper foils to the inner layer and the bottom layer.

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