Interconnection method for isolated electrodes

Abstract

The application discloses an interconnection method of isolated electrodes, comprising the following steps: using benzocyclobutene resin to preliminarily fill an isolated groove of a chip with an electric isolation structure; performing first coating of metal stripping glue and photoresist on the wafer surface of the chip and the preliminarily filled isolated groove; opening the electrode window to be thickened on the chip surface, covering the first metal layer on the surface of the whole wafer by first thin gold sputtering; performing second coating of the metal stripping glue and the photoresist; opening the electrode window to be thickened on the chip surface by photoetching technology, covering the second metal layer on the wafer surface by second thin gold sputtering; electroplating the wafer covered with the second metal layer; and placing the electroplated chip in an organic solvent to strip the gold layer, and removing the metal layer formed after sputtering and electroplating in other functional areas. The application solves the technical problem that the electroplating process cannot cross the electric isolation structure, and can effectively guarantee the reliability and conductivity of the electrode connection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a method for interconnecting isolated electrodes. BACKGROUND

[0002] With the development of integrated semiconductor industry, high-integration semiconductor lasers (such as EML, TEML, ITLA, etc.) have been widely applied, and the requirements for chip performance are becoming higher and higher. Among them, the thickening of the P-face electrode is one of the important means to improve the photoelectric performance. However, with the increase of the integration of functional areas, the electrical isolation structure inside the chip becomes an unavoidable design requirement. Although the electrical isolation structure can effectively separate different functional areas, it also causes the interruption of the current path, making the traditional electroplating process unable to meet the requirements, which seriously restricts the production efficiency and yield of the chip.

[0003] The current mainstream solutions mainly include thickening the electrode through multiple electrode evaporation, sputtering and other methods, or sacrificing the yield to ensure the electrode connection. However, these methods have obvious shortcomings. Although evaporation or sputtering technology can form electrodes in different areas, it cannot effectively solve the problem of current interruption caused by the isolation structure, and in some cases it may cause the chip yield to decrease. In addition, the method of sacrificing the chip yield will directly increase the production cost. It can be seen that the existing process cannot balance the thickening of the electrode, the yield and the cost control.

[0004] Therefore, the present application provides a method for interconnecting isolated electrodes to solve the technical problem that the electroplating process cannot cross the electrical isolation structure. By using twice thin gold sputtering and electroplating to thicken the electrode area, and cooperating with the LOR glue coating technology, the reliability and conductivity of the electrode connection are effectively improved, and the yield reduction caused by the complication of the electroplating process is avoided. Through this innovative method, the performance of the chip is improved, the manufacturing cost is reduced, and the application of high-integration semiconductor lasers in a wider field is promoted. SUMMARY

[0005] Therefore, the present application provides a method for interconnecting isolated electrodes to solve the technical problem that the electroplating process cannot cross the electrical isolation structure. By using twice thin gold sputtering and electroplating to thicken the electrode area, and cooperating with the LOR glue coating technology, the reliability and conductivity of the electrode connection are effectively improved, and the yield reduction caused by the complication of the electroplating process is avoided. Through this innovative method, the performance of the chip is improved, the manufacturing cost is reduced, and the application of high-integration semiconductor lasers in a wider field is promoted.

[0006] To achieve the above technical purposes, the present application adopts the following technical solutions:

[0007] The present application provides a method for interconnecting isolated electrodes, comprising:

[0008] Deposition treatment is performed on the chip with an electrical isolation structure to form an electrode on the surface of the chip, and a benzocyclobutene resin is used to preliminarily fill the isolation trench in the chip;

[0009] The first coating of metal stripping glue and photoresist is performed on the wafer surface of the chip and the isolation trench after the preliminary filling, so that the coated glue surface is at the same level;

[0010] The electrode window to be thickened on the chip surface is opened by a photolithography technique, and a first metal layer is covered on the surface of the entire wafer by first thin gold sputtering;

[0011] The second coating of metal stripping glue and photoresist is performed on the first metal layer, and the distance between the edge of the coated glue and the edge of the isolation trench is greater than the distance in the first coating;

[0012] The electrode window to be thickened on the chip surface is opened by a photolithography technique, and a first metal layer is covered on the surface of the entire wafer by first thin gold sputtering;

[0013] The wafer covered with the second metal layer is subjected to electroplating, so that the chip metal layer is thickened in the windowed area to ensure the contact performance of the electrode;

[0014] The electroplated chip is placed in an organic solvent for gold layer stripping to retain the metal layer thickening area of the electrode and remove the metal layer formed in the functional area after sputtering and electroplating.

[0015] Further, the preliminary filling of the isolation trench in the chip by using the benzocyclobutene resin comprises:

[0016] The benzocyclobutene resin is coated on the wafer surface by a uniform glue equipment;

[0017] After exposure under the preset exposure parameter condition, development and passivation operations are performed.

[0018] Further, the thickness of the benzocyclobutene resin is 500 nm.

[0019] Further, the first coating of metal stripping glue and photoresist on the wafer surface of the chip and the isolation trench after the preliminary filling comprises:

[0020] HMDS is coated by spin coating, and baked at a first temperature for a first time length;

[0021] LOR glue is coated and baked at a second temperature for a second time length;

[0022] After coating a layer of photoresist, exposure and development are performed;

[0023] Deionized water is used for rinsing and blowing dry.

[0024] Further, the first temperature condition is 120℃, and the first time length is three minutes.

[0025] Further, the second temperature condition is 170 DEG C, and the second time length is three minutes.

[0026] Further, the photoresist adopts positive glue with a thickness of 1 um.

[0027] Further, the thickness of the metal layer generated after the first thin gold and the second thin gold is in the range of 10-50 nm.

[0028] Further, the opening of the electrode window on the chip surface to be thickened by the photoetching technology comprises:

[0029] After exposure under the condition that the exposure dose is 150-300 mj / cm 2 , the developing operation is carried out.

[0030] Further, the thickness of the metal layer of the electrode to be thickened is within 2 um.

[0031] Compared with the prior art, the interconnection method of the isolated electrode provided by the application has the following advantages:

[0032] (1) The flatness of the chip surface can be effectively improved by filling the isolation groove with benzocyclobutene resin.

[0033] (2) The peeling process after electroplating can be carried out normally by two LOR glue coating operations.

[0034] (3) By two thin gold sputtering technologies, not only the connection between the bottom electrode and the first thin gold layer is ensured, but also the thickness of the electrode surface is ensured, so that the electrode has better conductivity and reliability.

[0035] In summary, the interconnection method of the isolated electrode provided by the application realizes the electrode interconnection of the chip with an isolation structure by a simple process, and solves the technical problem that the electroplating process cannot cross the electric isolation structure. By adopting two thin gold sputtering and electroplating thickening electrode regions, and cooperating with the LOR glue coating technology, the reliability and conductivity of the electrode connection can be effectively ensured, and the yield reduction caused by the complication of the electroplating process is avoided. Through the innovative method provided by the application, the performance of the chip can be effectively improved, and the manufacturing cost can be reduced, so as to promote the application of high-integration semiconductor lasers in a wider field. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 The flowchart of the interconnection method of the isolated electrode provided by the application is shown in the figure;

[0037] Figure 2 The chip cross-sectional view provided by the application with an electric isolation structure is shown in the figure;

[0038] Figure 3A chip cross-section schematic diagram filled with benzocyclobutene resin and after the first coating is provided for the present application;

[0039] Figure 4 A chip structure schematic diagram after the first thin gold is provided for the present application;

[0040] Figure 5 A chip structure schematic diagram after the second coating is provided for the present application;

[0041] Figure 6 A chip structure schematic diagram after the second thin gold is provided for the present application;

[0042] Figure 7 A chip structure schematic diagram after the electroplating is provided for the present application;

[0043] Figure 8 A chip structure schematic diagram after the electrode metal layer thickening is finally completed is provided for the present application. DETAILED DESCRIPTION

[0044] The preferred embodiments of the present application will be described in detail below with reference to the drawings, wherein the drawings constitute a part of this application and serve to explain the principles of the embodiments of the present application, but are not used to limit the scope of the present application.

[0045] Please refer to Figures 1-8 The embodiment of the present application provides an isolation electrode interconnection method, comprising the following manufacturing steps:

[0046] Step S101: depositing treatment is performed on a chip with an electrical isolation structure to form electrodes on the chip surface and to preliminarily fill the isolation trenches in the chip with benzocyclobutene resin; as shown in Figure 2 A chip cross-section schematic diagram after the electrode sputtering process is completed is shown.

[0047] Step S102: the first coating of metal stripping glue and photoresist is performed on the wafer surface of the chip and the preliminarily filled isolation trenches, so that the coated glue surfaces are at the same level; as shown in Figure 3 Figure 3 A chip cross-section schematic diagram filled with benzocyclobutene resin and after the first coating is provided for the present application.

[0048] Step S103: the electrode window to be thickened on the chip surface is opened through photolithography technology, and the first metal layer is covered on the surface of the entire wafer through the first thin gold sputtering; as shown in Figure 4 Figure 4 A chip structure schematic diagram after the first thin gold is provided for the present application.

[0049] ​​Step S104: second coating of metal stripping glue and photoresist on the first metal layer, the distance between the edge of the coated glue and the edge of the isolation trench is greater than that in the first coating; as shown in Figure 5 Figure 5 The chip structure schematic diagram after the second coating is shown.

[0050] Step S105: open the electrode window to be thickened on the chip surface by the photoetching technology, and cover the second metal layer on the wafer surface by the second thin gold sputtering; as shown in Figure 6 Figure 6 The chip structure schematic diagram after the second thin gold sputtering is shown.

[0051] Step S106: electroplate the wafer covered with the second metal layer to thicken the chip metal layer in the windowed area, and ensure the contact performance of the electrode; as shown in Figure 7 Figure 7 The chip structure schematic diagram after the electroplating is shown.

[0052] Step S107: place the electroplated chip in the organic solvent to strip the gold layer, so as to retain the thickened area of the metal layer of the electrode and remove the metal layer formed after the sputtering and electroplating in other functional areas; as shown in Figure 8 Figure 8 The chip structure schematic diagram after the electrode metal layer thickening is completed is shown.

[0053] The method of the embodiment first fills the isolation trench with the benzocyclobutene resin to ensure the flatness of the wafer surface, so that the coating of the metal stripping glue and the photoresist is more uniform, which is conducive to the stripping process. Secondly, the second thin gold ensures the connection between the bottom electrode and the first thin gold. Finally, the metal stripping glue and the photoresist are coated twice to ensure that the stripping process after electroplating can be carried out normally.

[0054] As a specific embodiment, in step S101, the deposition treatment of the chip with the electrical isolation structure is the electrode sputtering process. After the electrode sputtering process, a thin metal film is formed on the chip surface to ensure good conductivity and stability of the circuit connection.

[0055] For the chip with the isolation trench in the middle, such as the traditional EML chip, EA and DFB, the electroplating process cannot be used normally. On the basis of the completed structure, as a preferred embodiment, in step S101, the isolation trench in the chip is first filled with the benzocyclobutene resin, which specifically includes:

[0056] The benzocyclobutene resin is coated on the wafer surface by the uniform glue equipment;

[0057] After exposure under the preset exposure parameter condition, develop and passivate.​​​​

[0058] Specifically, the filling process details are as follows: the benzocyclobutene resin is coated on the wafer surface by a uniform coating device with a rotation speed of 3000-4000r, and is exposed under an exposure parameter of 300mj / cm 2 , developed for 120s and passivated for 4h.

[0059] Further, the thickness of the benzocyclobutene resin is about 500nm. The appropriate thickness of the resin helps to ensure the stability of the electrical isolation effect. Within the thickness range of 500nm, the resin can be filled into the isolation trench in a flat manner, improving the flatness of the isolation trench, thereby improving the overall quality of the chip and avoiding the problems of edge effect or insufficient filling caused by uneven thickness.

[0060] As a preferred embodiment, in step S102, the first coating of the metal stripping glue and the photoresist in the wafer surface of the chip and the isolation trench after the preliminary filling includes:

[0061] HMDS is coated by spin coating, and baked for a first duration under a first temperature condition;

[0062] LOR glue is coated and baked for a second duration under a second temperature condition;

[0063] After coating a layer of photoresist, exposure and development are performed;

[0064] After rinsing with deionized water, blow-drying is performed.

[0065] In some embodiments, the wafer surface is first coated with HMDS (dimethylsilyl chloride) and baked at 120 degrees for 3 minutes, then coated with LOR glue and baked at 170 degrees for 3 minutes, and finally coated with a layer of 1um positive glue, then the exposure, development and cleaning process is performed, and a thin gold layer with a thickness of 30nm is sputtered on the chip surface by a magnetron sputtering machine to complete the first thin gold operation.

[0066] As a specific embodiment, in step S103, the electrode window to be thickened on the chip surface is opened by photolithography technology, specifically: developing for 60 seconds under an exposure dose of 150-300mj / cm 2 . The first metal layer is covered on the surface of the entire wafer by the first thin gold sputtering.

[0067] Due to the undercut characteristics of LOR glue, the thin gold plating layer may not be completely connected with the original electrode, affecting the electrical performance. Only one thin gold operation cannot guarantee the connection with the original electrode, so in step S104, we perform a second thin gold operation to ensure the connection between the bottom electrode and the first thin gold.

[0068] It should be noted that in step S104, since the second thin gold window position is different from the first thin gold, the glue needs to be re-coated.

[0069] As a specific embodiment, in step S105, the second thin gold is the same as the first thin gold process details, only the position is different, the second thin gold is shorter than the first thin gold in the isolation table position, the distance range is limited to within 5 microns, which can ensure the electrode connection.

[0070] As a preferred embodiment, the thickness of the metal layer generated after the first and second thin gold is in the range of 10-50 nm, and the metal layer must contain Au and can contain Ti-Pt. Gold (Au) as the main component of the metal layer has very excellent conductivity, corrosion resistance and good weldability, so that the metal layer can provide reliable electrical connection, suitable for integrated circuits and microelectronic devices that need to operate stably for a long time. The addition of titanium (Ti) and platinum (Pt) can improve the adhesion and stability of the metal layer, especially on some substrates such as silicon wafers or other semiconductor materials. The Ti-Pt alloy layer can better react with the substrate surface to form a strong interface connection, thereby avoiding the peeling of the metal layer under high temperature or current pressure.

[0071] As a preferred embodiment, in S106, the wafer covered with the second metal layer is electroplated to thicken the chip metal layer in the window area to ensure the contact performance of the electrode. After the wafer is placed in the electroplating equipment for electroplating, it is placed in an organic solvent for metal stripping to completely remove the gold sputtered and electroplated this time from other positions except the electrode area.

[0072] The electroplated thickened metal layer can ensure that the electrode area has sufficient conductivity and corrosion resistance, so that the electrode can withstand greater current and temperature changes in the subsequent use process, thereby prolonging the service life and reliability of the device.

[0073] Further, the thickness of the thickened metal layer of the electrode is within 2μm. A suitable metal layer thickness can provide sufficient electrical connection performance while not negatively affecting the overall structure or subsequent process steps.

[0074] In summary, the isolation electrode interconnection method provided by the application effectively improves the flatness of the chip surface by filling the isolation groove with benzocyclobutene resin; ensures that the stripping process after electroplating can proceed normally by two LOR glue coating operations; ensures the connection between the bottom electrode and the first thin gold layer and guarantees the thickness of the electrode surface by two thin gold sputtering technologies, so that the electrode has better conductivity and reliability. The isolation electrode interconnection method provided by the application solves the technical problem that the electroplating process cannot cross the electrical isolation structure, can effectively guarantee the reliability and conductivity of the electrode connection, improve the chip performance, reduce the manufacturing cost, and promote the application of high-integration semiconductor lasers in a wider field.

[0075] The above merely describes the preferred embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application.

Claims

1. An interconnection method of isolating electrodes, characterized by, The method comprises the following steps: Depositing on a chip with an electric isolation structure to form an electrode on the surface of the chip, and filling the isolation groove in the chip with a benzocyclobutene resin; Coating a metal stripping glue and a photoresist on the wafer surface of the chip and in the isolation groove after the preliminary filling for the first time, so that the coated glue surface is at the same level; Opening the electrode window to be thickened on the surface of the chip by a photoetching technology, and covering a first metal layer on the surface of the wafer by a first thin gold sputtering; Coating the metal stripping glue and the photoresist on the first metal layer for the second time, and the distance between the edge of the coated glue and the edge of the isolation groove is greater than that in the first coating; Opening the electrode window to be thickened on the surface of the chip by a photoetching technology, and covering a second metal layer on the surface of the wafer by a second thin gold sputtering; Electroplating the wafer covered with the second metal layer to thicken the metal layer of the chip in the windowed area, and ensuring the contact performance of the electrode; Placing the electroplated chip in an organic solvent to strip the metal layer, so as to retain the thickened area of the metal layer of the electrode and remove the metal layer formed after sputtering and electroplating in other functional areas.

2. The method of claim 1, wherein, The preliminary filling of the isolation groove in the chip with the benzocyclobutene resin comprises the following steps: Coating the benzocyclobutene resin on the surface of the wafer by a uniform glue equipment; After exposure under the preset exposure parameter condition, developing and passivating are performed.

3. The method of claim 1, wherein, The thickness of the benzocyclobutene resin is 500 nm.

4. The method of claim 1, wherein, The first coating of the metal stripping glue and the photoresist on the wafer surface of the chip and in the isolation groove after the preliminary filling comprises the following steps: Coating the HMDS by a spin coating method, and baking at a first temperature condition for a first time length; Coating the LOR glue, and baking at a second temperature condition for a second time length; Exposing and developing after coating a layer of photoresist; Rinsing with deionized water and blowing dry.

5. The method of claim 4, wherein, The first temperature condition is 120 DEG C, and the first time length is three minutes.

6. The method of claim 4, wherein, The second temperature condition is 170 DEG C, and the second time length is three minutes.

7. The method of claim 4, wherein, The photoresist adopts a positive glue with a thickness of 1 um.

8. The method of claim 1, wherein, The thickness of the metal layer generated after the first thin gold sputtering and the second thin gold sputtering ranges from 10 nm to 50 nm.

9. The method of claim 1, wherein, The opening of the electrode window to be thickened on the surface of the chip by the photoetching technology comprises the following steps: Exposure was carried out under the conditions of an exposure dose of 150-300 mj / cm 2 and development was carried out after exposure.

10. The method of claim 1, wherein, The thickness of the thickened metal layer of the electrode is within 2 um.

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