Heterogeneous integrated optical chip, heterogeneous optical chip integration method and device and readable storage medium

Abstract

The invention provides a heterogeneous integrated optical chip, a heterogeneous optical chip integration method, a heterogeneous optical chip integration device and a readable storage medium. The method comprises the following steps: bonding a first wafer and a second wafer; an auxiliary optical waveguide is arranged in the first wafer, and a second layer optical waveguide is arranged in the second wafer; obtaining the bonding offset of the first wafer and the second wafer; designing an auxiliary optical waveguide according to the bonding offset; the auxiliary optical waveguide is configured to compensate for the bonding offset. According to the invention, after the first wafer and the second wafer are bonded, the bonding offset of the first wafer and the second wafer is obtained, and the auxiliary optical waveguide is designed according to the bonding offset, so that the corresponding auxiliary optical waveguide is manufactured according to the bonding offset under the condition that the alignment position of the first evanescent wave coupler and the alignment position of the second evanescent wave coupler are offset. The offset of the first evanescent wave coupler and the offset of the second evanescent wave coupler can be compensated through the auxiliary optical waveguide, and the alignment precision of the heterogeneous integrated chip can be improved.

Description

Technical Field

[0001] The present application relates to the field of chips, and more particularly, to a heterogeneous integrated optical chip, a heterogeneous optical chip integration method, a device, and a readable storage medium. Background Art

[0002] With the rise of technologies such as big data, 5G, virtual reality, Internet of Everything, and ChatGPT, the total amount of communication data generated due to information interaction will continue to show explosive growth in the future. As one of the key technologies in the current communication system, the future development of optical communication technology is crucial. In optical communication technology, how to achieve an optical chip with low insertion loss, low power consumption, high bandwidth, and high integration has always been the core issue for improving the performance of optical modules.

[0003] In the development of optical chips, many excellent material platforms have emerged, such as materials like silicon, silicon nitride, indium phosphide, lithium niobate, and germanium. However, under the increasingly stringent performance requirements, a single material platform can no longer simultaneously meet the high-bandwidth requirements at both the transmitting and receiving ends of the entire optical chip. Taking the silicon photonics platform as an example, although the method of epitaxial germanium can effectively improve the performance of this platform in the field of photoelectric detection, its silicon photonics modulator based on the carrier dispersion effect is greatly limited in bandwidth and insertion loss performance due to its intrinsic absorption and nonlinearity. Therefore, by integrating materials with higher bandwidths in the modulator field, such as lithium niobate and indium phosphide, with the silicon photonics platform through a heterogeneous integration scheme, competitive performance can be maintained at both the transmitting and receiving ends. In the heterogeneous integration scheme, the commonly used method is to integrate multiple material platforms through bonding. However, limited by the bonding accuracy of the bonding equipment, how to achieve efficient coupling of light in the waveguides of multiple materials is a core issue. Summary of the Invention

[0004] In view of this, the purpose of the embodiments of the present application is to provide a heterogeneous integrated optical chip, a heterogeneous optical chip integration method, a device, and a readable storage medium, which can improve the alignment accuracy of heterogeneous integrated optical waveguides under the bonding scheme.

[0005] In a first aspect, an embodiment of the present application provides a heterogeneous optical chip integration method, including: bonding a first wafer and a second wafer; wherein, an auxiliary optical waveguide is provided in the first wafer, and a second-layer optical waveguide is provided in the second wafer; obtaining the bonding offset between the first wafer and the second wafer; designing the auxiliary optical waveguide according to the bonding offset; wherein, the auxiliary optical waveguide is configured to compensate for the bonding offset.

[0006] In the above implementation process, after bonding the first wafer and the second wafer, the bonding offset of the first wafer and the second wafer is obtained, and an auxiliary optical waveguide is designed according to the bonding offset. When the alignment positions of the first evanescent wave coupler and the second evanescent wave coupler are offset, the corresponding auxiliary optical waveguide is fabricated according to the bonding offset. Furthermore, the offset between the first evanescent wave coupler and the second evanescent wave coupler can be compensated by the auxiliary optical waveguide, which can improve the alignment accuracy of the heterogeneous integrated chip. In addition, since the first wafer and the second wafer may include multiple chips, by bonding the first wafer and the second wafer, the bonding of multiple chips can be achieved simultaneously, and then multiple heterogeneous integrated chips can be obtained, improving the chip bonding efficiency and reducing the production cost.

[0007] In one embodiment, a first layer of optical waveguide is further provided in the first wafer; wherein, the auxiliary optical waveguide, the first layer of optical waveguide, and the second layer of optical waveguide form a first evanescent wave coupler, and the auxiliary optical waveguide and the second layer of optical waveguide form a second evanescent wave coupler; the designing of the auxiliary optical waveguide according to the bonding offset includes: determining the waveguide shape of the auxiliary optical waveguide according to the relative positions of the first evanescent wave coupler and the second evanescent wave coupler; determining the waveguide size of the auxiliary optical waveguide according to the bonding offset; and designing the auxiliary optical waveguide through the waveguide shape and the waveguide size.

[0008] In the above implementation process, the waveguide shape of the auxiliary optical waveguide is determined by the relative positions of the first evanescent wave coupler and the second evanescent wave coupler respectively, and the waveguide size of the auxiliary optical waveguide is determined according to the bonding offset, which can achieve the flexible setting of the auxiliary optical waveguide from both the shape and size aspects, improving the flexibility of the waveguide structure of the auxiliary optical waveguide. At the same time, the alignment accuracy of the heterogeneous integrated chip can be further improved.

[0009] In one embodiment, the auxiliary optical waveguide includes: a straight waveguide; the bonding offset includes: a first-direction offset and a second-direction offset; the waveguide size includes a first size and a second size; the determining of the waveguide size of the auxiliary optical waveguide according to the bonding offset includes: determining the first size of the straight waveguide arranged in the first direction in the first direction according to the first-direction offset; and / or determining the second size of the straight waveguide arranged in the second direction in the second direction according to the second-direction offset.

[0010] In the above implementation process, when determining the size of the straight waveguide, it can be directly determined according to the first offset and / or the second offset, and the calculation method is simple and easy to implement, which can improve the determination efficiency and accuracy of the first size and / or the second size of the straight waveguide.

[0011] In one embodiment, the auxiliary optical waveguide includes: a curved waveguide; the waveguide size includes a bending radius; determining the waveguide size of the auxiliary optical waveguide according to the bonding offset includes: determining the bending radius of the curved waveguide according to the offset range of the bonding offset; wherein, the bending radius of the curved waveguide is greater than or equal to a preset minimum radius.

[0012] In the above implementation process, after determining the bonding offset, the bending radius of the curved waveguide can be directly determined according to the offset range to which the bonding offset belongs, which can reduce the calculation amount in the process of determining the bending radius, simplify the difficulty of determining the bending radius, and improve the efficiency of determining the bending radius.

[0013] In one embodiment, the method further includes: before designing the auxiliary optical waveguide through the waveguide shape and the waveguide size, the method further includes: presetting a plurality of candidate structures; wherein, the plurality of candidate structures include waveguide structures of various shapes and various sizes; one or more of the candidate structures are configured to form an auxiliary optical waveguide; designing the auxiliary optical waveguide through the waveguide shape and the waveguide size includes: selecting a first candidate structure according to the waveguide shape; wherein, the first candidate structure includes one or more of all preset-size first candidate straight waveguide structures and all preset-size first candidate curved waveguide structures; matching the first candidate structure according to the waveguide size to one or more target candidate structures whose size range includes the waveguide size; splicing the one or more matched target candidate structures to obtain a design scheme of the auxiliary optical waveguide.

[0014] In the above implementation process, by pre-setting candidate structures of various shapes and sizes, when determining the auxiliary optical waveguide, the corresponding candidate structures can be directly matched according to the waveguide shape and the waveguide size of the auxiliary optical waveguide to obtain the target candidate structures, and then the design scheme of the auxiliary optical waveguide can be obtained by splicing the target candidate structures, without having to manufacture the corresponding waveguide patterns in real time according to the waveguide shape and the waveguide size, which can simplify the process of determining the design scheme and improve the efficiency of determining the design scheme.

[0015] In one embodiment, the auxiliary optical waveguide includes a plurality of design schemes; after designing the auxiliary optical waveguide through the waveguide shape and the waveguide size, the method further includes: calculating, among the plurality of design schemes, the design scheme with the shortest transmission path of light in the auxiliary optical waveguide as the final design scheme of the auxiliary optical waveguide; processing the reserved area of the auxiliary optical waveguide according to the final design scheme to obtain an auxiliary optical waveguide structure that meets the final design scheme.

[0016] In the above implementation process, by selecting the design scheme with the shortest optical transmission path in the auxiliary optical waveguide as the final design scheme of the auxiliary optical waveguide, and fabricating the auxiliary optical waveguide based on this final design scheme, the optical transmission consumption in the heterogeneous integration chip can be reduced.

[0017] In one embodiment, after designing the auxiliary optical waveguide through the waveguide shape and the waveguide size, the method further includes: fabricating an optical lead according to the design scheme of the auxiliary optical waveguide by means of 3D laser direct writing; wherein, the optical lead is configured to connect the first evanescent wave coupler and the second evanescent wave coupler instead of the auxiliary optical waveguide.

[0018] In the above implementation process, a 3D waveguide is fabricated between the first evanescent wave coupler and the second evanescent wave coupler by means of 3D laser direct writing to replace the auxiliary optical waveguide for connection. The fabrication method of the optical lead is to control a high-energy pulsed beam to cause multi-photon polymerization at specific positions of the photoresist to form a 3D polymer waveguide, which can provide a more flexible connection method to solve more complex evanescent wave coupler connection scenarios, such as crossing other same-layer waveguide patterns, avoiding waveguide winding, and minimizing the optical waveguide path to the greatest extent.

[0019] In one embodiment, the material of the first-layer optical waveguide is lithium niobate; and / or the material of the second-layer optical waveguide is silicon nitride; and / or the material of the auxiliary optical waveguide is silicon.

[0020] In the above implementation process, due to the high linear electro-optic effect material of thin-film lithium niobate, which has a very wide transparent window and extremely low intrinsic loss, it is very suitable for fabricating high-bandwidth electro-optic modulators; the silicon nitride material has the characteristic of ultra-low loss and is very suitable for fabricating passive waveguides and devices in optical chips; and silicon, as the most popular optical chip material, its unique CMOS compatibility and high integration have always been the preferred materials for fabricating optical chips, and the method of epitaxial germanium on it provides high-speed optoelectronic detection functions for silicon-based chips. By setting the material of the first-layer optical waveguide as lithium niobate, the second-layer optical waveguide as silicon nitride material, and the auxiliary waveguide layer as silicon, a low-loss high-speed electro-optic modulator can be realized in the first wafer, ultra-low-loss passive insertion loss performance can be achieved by using silicon nitride in the second wafer, and high-speed photodetectors can be fabricated by epitaxial germanium on the silicon of the auxiliary waveguide layer. This method combines the advantages of the three materials themselves and brings the advantages of each material in the optical chip into full play. The optical chip fabricated based on this method has very high performance both at the transceiver ends and in terms of passive insertion loss.

[0021] In one embodiment, the first wafer includes an electro-optic modulator and / or a photodetector; and / or, the second wafer includes the photodetector and / or the electro-optic modulator.

[0022] In the above implementation process, by setting an electro-optic modulator and / or a photodetector in the first wafer, and / or setting an electro-optic modulator and / or a photodetector in the second wafer, the hetero-integrated optical chip after bonding can have both transmitting and receiving performances. In one embodiment, the first wafer is a single first chip, and the second wafer is a single second chip; bonding the first wafer and the second wafer includes: bonding the first chip and the second chip.

[0023] In a second aspect, an embodiment of the present application further provides a hetero-integrated optical chip, including: integrated by the method in the above first aspect, or any possible implementation manner of the first aspect; the hetero-integrated optical chip includes: a bonded first wafer and a second wafer; an auxiliary optical waveguide and a first-layer optical waveguide are arranged in the first wafer, and a second-layer optical waveguide is arranged in the second wafer; wherein, the auxiliary optical waveguide, the second-layer optical waveguide and the first-layer optical waveguide form a first evanescent wave coupler, and the auxiliary optical waveguide and the second-layer optical waveguide form a second evanescent wave coupler; the auxiliary optical waveguide is configured to connect the first evanescent wave coupler and the second evanescent wave coupler, and the auxiliary optical waveguide is further configured to compensate for the bonding offset amount after bonding the first wafer and the second wafer.

[0024] In a third aspect, an embodiment of the present application further provides a hetero-optical chip integration device, including: a bonding module for bonding a first wafer and a second wafer; wherein, an auxiliary optical waveguide is arranged in the first wafer, and a second-layer optical waveguide is arranged in the second wafer; an acquisition module for acquiring the bonding offset amount of the first wafer and the second wafer; a design module for designing the auxiliary optical waveguide according to the bonding offset amount; wherein, the auxiliary optical waveguide is configured to compensate for the bonding offset amount.

[0025] In a fourth aspect, an embodiment of the present application further provides an electronic device, including: a processor and a memory, the memory stores machine-readable instructions executable by the processor, and when the electronic device runs, when the machine-readable instructions are executed by the processor, the steps of the method in the above first aspect, or any possible implementation manner of the first aspect are executed.

[0026] In a fifth aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is run by a processor, the steps of the hetero-optical chip integration method in the above first aspect, or any possible implementation manner of the first aspect are executed.

[0027] To make the above objects, features, and advantages of the present application more obvious and understandable, specific embodiments are hereinafter given, and in conjunction with the accompanying drawings, the detailed description is as follows. Description of the Drawings

[0028] To more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation of the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0029] Figure 1 A cross-sectional view of the heterogeneous integrated optical chip provided by the embodiment of the present application;

[0030] Figure 2 A top view and a cross-sectional view of the insulating layer provided by the embodiment of the present application;

[0031] Figure 3 A top view of the insulating layer before and after processing of the auxiliary optical waveguide provided by the embodiment of the present application;

[0032] Figure 4 A schematic diagram of the bonding process of the heterogeneous integrated optical chip provided by the embodiment of the present application;

[0033] Figure 5 A block diagram of the electronic device provided by the embodiment of the present application;

[0034] Figure 6 A flowchart of the heterogeneous optical chip integration method provided by the embodiment of the present application;

[0035] Figure 7 A top view of the insulating layer when the auxiliary optical waveguide provided by the embodiment of the present application is of a U-shaped structure;

[0036] Figure 8 A top view of the insulating layer when the auxiliary optical waveguide provided by the embodiment of the present application is of a linear structure;

[0037] Figure 9 A top view of the insulating layer when the auxiliary optical waveguide provided by the embodiment of the present application is of an S-shaped structure;

[0038] Figure 10 A top view of the insulating layer when the auxiliary optical waveguide provided by the embodiment of the present application is a splicing structure of two right-angled auxiliary optical waveguides;

[0039] Figure 11 A top view of the insulating layer when the auxiliary optical waveguide provided by the embodiment of the present application is of a right-angled structure;

[0040] Figure 12 Schematic diagrams of the corresponding straight waveguide and complete waveguide settings when the auxiliary optical waveguide provided by the embodiment of the present application is set to various structures;

[0041] Figure 13 Schematic diagram of waveguide size setting of the auxiliary optical waveguide provided in the embodiment of the present application when the auxiliary optical waveguide is of a U-shaped structure;

[0042] Figure 14 Schematic diagram of waveguide size setting of the auxiliary optical waveguide provided in the embodiment of the present application when the auxiliary optical waveguide is of an S-shaped structure;

[0043] Figure 15 Schematic diagram of the optical lead provided in the embodiment of the present application;

[0044] Figure 16 Schematic diagram of the functional modules of the heterogeneous optical chip integration device provided in the embodiment of the present application.

[0045] Description of the drawings: 100 - First wafer, 110 - First layer of optical waveguide, 120 - Auxiliary optical waveguide, 121 - Straight waveguide, 122 - Bending waveguide, 130 - First insulating layer, 140 - First substrate, 200 - Second wafer, 210 - Second layer of optical waveguide, 230 - Second insulating layer, 240 - Second substrate, 150 - First evanescent wave coupler, 250 - Second evanescent wave coupler, 300 - Optical lead, 500 - Electronic device, 511 - Memory, 513 - Processor, 601 - Bonding module, 602 - Acquisition module, 603 - Design module. Detailed implementation manners

[0046] Next, the technical solutions in the embodiments of the present application will be described with reference to the drawings in the embodiments of the present application.

[0047] It should be noted that: Similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, the terms "first", "second", etc. are only used for differential description and cannot be construed as indicating or implying relative importance.

[0048] In today's rapidly developing semiconductor industry, with the continuous progress of technology and the increasing wide application, chip integration technology has become a key force in promoting the performance improvement and function diversification of electronic products. Among them, heterogeneous integration technology, as an advanced packaging and integration method, allows chips with different materials, processes and functions (such as silicon-based chips, compound semiconductor chips, MEMS sensors, etc.) to be efficiently and tightly combined together to achieve more complex and high-performance system-on-chip (SoC) solutions.

[0049] In an ideal heterogeneous integration process, the alignment between different chips should be accurate to ensure the correct connection of materials and optimal performance.

[0050] However, through long-term research, the inventors of this application have found that in actual operation, due to the influence of various factors, such as the physical characteristics of the chip itself, the accuracy limitations of integrated devices, and the thermal stress during the process, the chip is prone to shift during integration. This shift results in poor alignment accuracy of the integrated heterogeneous chips, which may not only affect the transmission quality of electrical signals but also reduce the coupling efficiency in optical signal transmission, thus affecting the speed and stability of data transmission.

[0051] In view of this, this application proposes a heterogeneous optical chip integration method. After bonding the first wafer and the second wafer, the bonding offset amount of the first wafer and the second wafer is obtained, and an auxiliary optical waveguide is designed according to this bonding offset amount. In the case where the alignment positions of the first evanescent wave coupler and the second evanescent wave coupler are shifted, the corresponding auxiliary optical waveguide is fabricated according to the bonding offset amount. Furthermore, the shift of the first evanescent wave coupler and the second evanescent wave coupler can be compensated by this auxiliary optical waveguide, and the alignment accuracy of the heterogeneous integrated chip can be improved.

[0052] To facilitate the understanding of this embodiment, a heterogeneous integrated optical chip implementing the embodiment of this application is first introduced in detail.

[0053] As Figure 1 、 Figure 2 shown, it is a schematic diagram of the heterogeneous integrated optical chip provided by the embodiment of this application, including: the bonded first wafer 100 and second wafer 200.

[0054] Among them, an auxiliary optical waveguide 120 and a first-layer optical waveguide 110 are provided in the first wafer 100, and a second-layer optical waveguide 210 is provided in the second wafer 200. The waveguide structures of the first-layer optical waveguide 110 and the second-layer optical waveguide are fabricated before the first wafer 100 and the second wafer 200 are bonded.

[0055] This heterogeneous integrated optical chip is integrated by the heterogeneous optical chip integration method in the following embodiment.

[0056] As Figure 3 shown, the above-mentioned auxiliary optical waveguide 120, first-layer optical waveguide 110, and second-layer optical waveguide 210 constitute a first evanescent wave coupler 150, and the auxiliary optical waveguide 120 and the second-layer optical waveguide 210 constitute a second evanescent wave coupler 250.

[0057] Among them, the auxiliary optical waveguide 120 is configured to connect the first evanescent wave coupler 150 and the second evanescent wave coupler 250, and the auxiliary optical waveguide 120 is also configured to compensate for the bonding offset amount after the first wafer 100 and the second wafer 200 are bonded.

[0058] As Figure 3 shown, there is a to-be-processed area reserved in the auxiliary optical waveguide 120 (Figure 3 The auxiliary optical waveguide 120 before processing, and the area to be processed is used for processing after the first wafer 100 and the second wafer 200 are bonded. Figure 3 It is shown in that the processed auxiliary optical waveguide 120 is in an S shape.

[0059] It should be understood that generally after the first wafer 100 and the second wafer 200 are bonded, there may be alignment deviations between the first-layer optical waveguide 110 and the second-layer optical waveguide 210 in the first direction and the second direction of the setting plane. In order to reduce the offset of the overall wafer deviation, the deviations in the first direction and the second direction can be compensated by designing the auxiliary optical waveguide 120 with corresponding patterns and sizes, thereby achieving high-precision alignment.

[0060] Optionally, when the first wafer 100 and the second wafer 200 are bonded, the first wafer 100 can be on top and the second wafer 200 can be at the bottom. Or the second wafer 200 can be on top and the first wafer 100 can be at the bottom. The bonding method of the first wafer 100 and the second wafer 200 can be selected according to the actual situation.

[0061] Among them, the insulating layer for bonding the first wafer 100 and the second wafer 200 is silicon oxide.

[0062] In one embodiment, the first wafer 100 specifically includes: a first insulating layer 130 and a first substrate 140; the second wafer 200 specifically includes: a second insulating layer 230 and a second substrate 240.

[0063] Among them, the auxiliary optical waveguide 120 and the first-layer optical waveguide 110 are disposed in the first insulating layer 130, and the second-layer optical waveguide 210 is disposed in the second insulating layer 230. The first substrate 140 is disposed on one side of the first insulating layer 130, and the second substrate 240 is disposed on one side of the second insulating layer 230.

[0064] Optionally, the first wafer 100 may include one or more first chips, and the second wafer 200 may include one or more second chips.

[0065] Among them, when the first wafer 100 includes multiple first chips and the second wafer 200 includes multiple second chips, when the first wafer 100 and the second wafer 200 are bonded, the multiple first chips and the second chips are bonded.

[0066] Specifically, as Figure 4 shown, the bonding method of the first wafer 100 and the second wafer 200 can be as follows:

[0067] Bond the side of the first insulating layer 130 away from the first substrate 140 and the side of the second insulating layer 230 away from the second substrate 240 to achieve the bonding of the first wafer 100 and the second wafer 200. After the first wafer 100 and the second wafer 200 are bonded together, remove the substrate of the upper chip to obtain a heterogeneous integrated optical chip having a first layer optical waveguide 110, a second layer optical waveguide 210, and an auxiliary optical waveguide 120( Figure 4 as shown in: the bonding method with the first wafer 100 on top and the second wafer 200 at the bottom).

[0068] The shape of the above-mentioned auxiliary optical waveguide 120 is determined according to the relative positional relationship between the first evanescent wave coupler 150 and the second evanescent wave coupler 250. The auxiliary optical waveguide 120 can be "U"-shaped, "S"-shaped, linear, right-angled, etc., and the shape of the auxiliary optical waveguide 120 can be selected according to the actual situation.

[0069] In one embodiment, the optical waveguide in the lower chip for heterogeneous integration is an electro-optic crystal thin film layer, and the material can be lithium niobate, indium phosphide, lithium tantalate, etc. The upper chip is an SOI wafer, and the optical waveguide in the upper chip can be silicon nitride.

[0070] For the convenience of understanding this embodiment, the electronic device for implementing the heterogeneous optical chip integration method disclosed in the embodiments of the present application will be introduced in detail below.

[0071] As Figure 5 shown, it is a block diagram of an electronic device. The electronic device 500 may include a memory 511 and a processor 513. Those of ordinary skill in the art can understand that Figure 5 the structure shown is only schematic, and it does not limit the structure of the electronic device 500. For example, the electronic device 500 may further include more or fewer components than Figure 5 shown, or have a configuration different from Figure 5 shown.

[0072] The above-mentioned memory 511 and the processor 513 are directly or indirectly electrically connected to achieve data transmission or interaction. For example, these elements may be electrically connected to each other through one or more communication buses or signal lines. The above-mentioned processor 513 is used to execute the executable module stored in the memory.

[0073] Among them, the memory 511 can be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electric Erasable Programmable Read-Only Memory (EEPROM), etc. Among them, the memory 511 is used to store programs. After receiving an execution instruction, the processor 513 executes the program. The method executed by the electronic device 500 defined by the process disclosed in any embodiment of the present application can be applied to or implemented by the processor 513.

[0074] The above-mentioned processor 513 may be an integrated circuit chip with signal processing capabilities. The above-mentioned processor 513 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a digital signal processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0075] The electronic device 500 in this embodiment can be used to execute each step in the various methods provided in the embodiments of the present application. The implementation process of the heterogeneous optical chip integration method will be described in detail through several embodiments below.

[0076] Please refer to Figure 6 , which is a flowchart of the heterogeneous optical chip integration method provided by the embodiments of the present application. The following will elaborate on the Figure 6 specific process shown in detail.

[0077] Step S201, bond the first wafer 100 and the second wafer 200.

[0078] Among them, an auxiliary optical waveguide 120 is disposed in the first wafer 100, and a second-layer optical waveguide 210 is disposed in the second wafer 200. A processing area to be processed is reserved on the auxiliary optical waveguide 120, and the processing area is configured to be processed after the first wafer 100 and the second wafer 200 are bonded.

[0079] Optionally, when the first wafer 100 and the second wafer 200 are bonded, the first wafer 100 may be on top and the second wafer 200 may be at the bottom. Or the second wafer 200 may be on top and the first wafer 100 may be at the bottom. The bonding method of the first wafer 100 and the second wafer 200 can be selected according to the actual situation.

[0080] Next, taking Figure 4 as an example ( Figure 4 the heterogeneous integration chip shown in which the first wafer 100 is on top and the second wafer 200 is at the bottom), the specific bonding method of the first wafer 100 and the second wafer 200 will be described:

[0081] Bond the side of the first insulating layer 130 away from the first substrate 140 in the first wafer 100 and the side of the second insulating layer 230 away from the second substrate 240 in the second wafer 200 to achieve the bonding of the first wafer 100 and the second wafer 200. After the first wafer 100 and the second wafer 200 are bonded together, remove the first substrate 140 of the first wafer 100 to obtain a heterogeneous integration optical chip with the second-layer optical waveguide 210 and the auxiliary optical waveguide 120.

[0082] In one embodiment, a first-layer optical waveguide 110 is further disposed in the first wafer 100.

[0083] Among them, the auxiliary optical waveguide 120, the first-layer optical waveguide 110, and the second-layer optical waveguide 210 constitute a first evanescent wave coupler 150, and the auxiliary optical waveguide 120 and the second-layer optical waveguide 210 constitute a second evanescent wave coupler 250.

[0084] Step S202, obtain the bonding offset between the first wafer 100 and the second wafer 200.

[0085] The bonding offset here may be the offset of the entire wafer or the offset of each chip on the wafer. The bonding offset can be determined according to the actual situation.

[0086] It should be understood that generally after the first wafer 100 and the second wafer 200 are bonded, there may be alignment deviations in both the first direction and the second direction of the set plane for the first evanescent wave coupler 150 and the second evanescent wave coupler 250.

[0087] Among them, the first direction and the second direction are the chip length direction and the width direction, and the first direction and the second direction are perpendicular to each other.

[0088] In one embodiment, one or more vernier calipers may be provided on the wafer. After the first wafer 100 and the second wafer 200 are bonded, the offset amounts of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 in the first direction and the second direction can be measured through the vernier calipers respectively.

[0089] Step S203: Design the auxiliary optical waveguide 120 according to the bonding offset amount.

[0090] Among them, the auxiliary optical waveguide 120 is configured to enhance the coupling coefficient between the first optical waveguide and the second optical waveguide, so that light can achieve high-efficiency coupling when the first-layer optical waveguide 110 and the second-layer optical waveguide 210 are far apart. The auxiliary optical waveguide 120 is also configured to compensate for the bonding offset amount.

[0091] The bonding offset amount here can be used to determine the shape and size of the auxiliary optical waveguide 120.

[0092] In one embodiment, if the bonding offset amount is the offset amount of each chip on the wafer, the pattern of the auxiliary optical waveguide 120 for each chip can be determined according to the offset amount of each chip.

[0093] In the above implementation process, after the first wafer 100 and the second wafer 200 are bonded, the bonding offset amount of the first wafer 100 and the second wafer 200 is obtained, and the auxiliary optical waveguide 120 is designed according to the bonding offset amount. In the case where the alignment positions of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are offset, the corresponding auxiliary optical waveguide 120 is fabricated according to the bonding offset amount. Furthermore, the offset of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 can be compensated through the auxiliary optical waveguide 120, and the alignment accuracy of the heterogeneous integrated chip can be improved. In addition, since the first wafer 100 and the second wafer 200 may include multiple chips, through the bonding of the first wafer 100 and the second wafer 200, the bonding of multiple chips can be achieved simultaneously, and then multiple heterogeneous integrated chips can be obtained, improving the chip bonding efficiency and reducing the production cost.

[0094] In a possible implementation manner, step S203 includes: determining the waveguide shape of the auxiliary optical waveguide 120 according to the relative positions of the first evanescent wave coupler 150 and the second evanescent wave coupler 250; determining the waveguide size of the auxiliary optical waveguide 120 according to the bonding offset amount; and designing the auxiliary optical waveguide 120 through the waveguide shape and the waveguide size.

[0095] Understandably, to address the alignment issue of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 in the width direction, the first evanescent wave coupler 150 and the second evanescent wave coupler 250 in the bonded heterogeneous integrated chip can be arranged one in front of the other. Among them, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged one in front of the other, they can be aligned in the width direction or misaligned in the length direction.

[0096] To address the alignment issue of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 in the length direction, the first evanescent wave coupler 150 and the second evanescent wave coupler 250 in the bonded heterogeneous integrated chip can be arranged side by side. Among them, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged side by side, they can be aligned in the length direction or misaligned in the length direction.

[0097] Of course, in some special scenarios, the first evanescent wave coupler 150 and the second evanescent wave coupler 250 can also be arranged in different directions respectively.

[0098] In the face of different relative positions of the first evanescent wave coupler 150 and the second evanescent wave coupler 250, correspondingly, in order to connect the first evanescent wave coupler 150 and the second evanescent wave coupler 250, the auxiliary optical waveguide 120 can be set in a corresponding shape.

[0099] For example, as Figure 7 shown, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged in alignment one in front of the other, the auxiliary optical waveguide 120 can be designed in a U shape.

[0100] As Figure 8 shown, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged in alignment side by side, the auxiliary optical waveguide 120 can be designed in a straight line shape.

[0101] As Figure 9 shown, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged misaligned side by side, the auxiliary optical waveguide 120 can be designed in an S shape.

[0102] As Figure 10 shown, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged misaligned side by side, the auxiliary optical waveguide 120 can also be designed as a splicing structure of two right-angle auxiliary optical waveguides.

[0103] As Figure 11 shown, when the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are arranged in different directions respectively, the auxiliary optical waveguide 120 can be designed in a right-angle shape.

[0104] The shape setting of the above-mentioned auxiliary optical waveguide 120 is only exemplary, and the shape setting of the auxiliary optical waveguide 120 can be adjusted according to the actual situation.

[0105] In one embodiment, the bonding offset can include a first-direction offset and a second-direction offset.

[0106] It should be understood that after determining the shape of the auxiliary optical waveguide 120, the first-direction offset and / or the second-direction offset that need to be obtained can be further determined based on the shape of the auxiliary optical waveguide 120, and then the waveguide size can be determined according to the first-direction offset and / or the second-direction offset.

[0107] Optionally, the auxiliary optical waveguide 120 can include a straight waveguide 121 and / or a curved waveguide 122, and the straight waveguide 121 and / or the curved waveguide 122 in the auxiliary optical waveguide 120 can be one or more.

[0108] Among them, the patterns of the auxiliary optical waveguides 120 in the respective chips in one wafer can be the same or different. The patterns of the auxiliary optical waveguides 120 in the respective chips in the wafer can be determined according to the actual situation.

[0109] Exemplarily, as Figure 12 shown ( Figure 12 it is shown in that the patterns of the auxiliary optical waveguides 120 in the respective chips in the same wafer are different), Figure 12 the auxiliary optical waveguide 120 shown in the upper left chip includes two straight waveguides 121 arranged along the first direction and one curved waveguide 122. Figure 12 The auxiliary optical waveguides 120 shown in the upper right and lower right chips respectively include different-structured auxiliary optical waveguides 120 with two straight waveguides 121 arranged along the first direction, one straight waveguide 121 arranged along the second direction, and two curved waveguides 122. Figure 12 The auxiliary optical waveguide 120 shown in the lower left chip includes two straight waveguides 121 arranged along the first direction and two curved waveguides 122.

[0110] Such as Figure 11 shown, Figure 11 it is shown in that the auxiliary optical waveguide 120 includes one straight waveguide 121 arranged along the first direction, one straight waveguide 121 arranged along the second direction, and one curved waveguide 122.

[0111] Figure 8 it is shown in that the auxiliary optical waveguide 120 includes one straight waveguide 121 arranged along the first direction.

[0112] The structure of the above-mentioned auxiliary optical waveguide 120 is only exemplary, and the structure of the auxiliary optical waveguide 120 can be adjusted according to the actual situation.

[0113] Among them, the waveguide size can be determined according to the setting positions of each straight waveguide 121 and / or curved waveguide 122 in the auxiliary optical waveguide 120.

[0114] Correspondingly, the waveguide size may include a first size, a second size, and a bending radius. Among them, the first size is the size of the straight waveguide 121 determined according to the first-direction offset, the second size is the size of the straight waveguide 121 determined according to the second-direction offset, and the bending radius is the radius of the curved waveguide 122.

[0115] In the above implementation process, the waveguide shape of the auxiliary optical waveguide 120 is determined by the relative positions of the first evanescent wave coupler 150 and the second evanescent wave coupler 250 respectively, and the waveguide size of the auxiliary optical waveguide 120 is determined according to the bonding offset. The flexible setting of the auxiliary optical waveguide 120 can be realized from both the shape and the size, improving the flexibility of the waveguide structure of the auxiliary optical waveguide 120. At the same time, the alignment accuracy of the heterogeneous integration chip can be further improved.

[0116] In a possible implementation manner, determining the waveguide size of the auxiliary optical waveguide 120 according to the bonding offset includes: determining the first size of the straight waveguide 121 arranged along the first direction in the first direction according to the first-direction offset; and / or determining the second size of the straight waveguide 121 arranged along the second direction in the second direction according to the second-direction offset.

[0117] It should be understood that when the straight waveguide 121 is included in the auxiliary optical waveguide 120, the length of the straight waveguide 121 along the setting direction of the straight waveguide 121 can be determined according to the bonding offset in this direction.

[0118] Specifically, a first preset length and a second preset length can be set in advance for the straight waveguide 121 in the first direction and the straight waveguide 121 in the second direction respectively. In the case where the first offset and the second offset are determined, the first size is determined by increasing or decreasing the first offset on the basis of the first preset length, and the second size is determined by increasing or decreasing the second offset on the basis of the second preset length.

[0119] Exemplarily, as Figure 13 shown, Figure 13 the auxiliary optical waveguide 120 in Figure 13 includes two straight waveguides 121 arranged along the first direction. The specific setting manners of the first evanescent wave coupler 150, the second evanescent wave coupler 250, and the auxiliary optical waveguide 120 shown on the left in Figure 13As shown on the right, when the second evanescent wave coupler 250 is offset to the right by a first offset relative to the first evanescent wave coupler 150, when setting the auxiliary optical waveguide 120, the first dimension of the straight waveguide 121 in the second evanescent wave coupler 250 can be set to: the first preset length minus the first offset; the first dimension of the straight waveguide 121 in the first evanescent wave coupler 150 is: the first preset length. Alternatively, the first dimension of the straight waveguide 121 in the second evanescent wave coupler 250 is: the first preset length; the first dimension of the straight waveguide 121 in the first evanescent wave coupler 150 is: the first preset length plus the first offset.

[0120] As Figure 14 shown, Figure 14 the auxiliary optical waveguide 120 in includes two straight waveguides 121 arranged along the first direction and a straight waveguide 121 arranged along the second direction. Figure 14 As shown on the left, the specific setting manner of the first evanescent wave coupler 150, the second evanescent wave coupler 250, and the auxiliary optical waveguide 120 without offset is shown. Figure 14 As shown on the right, when the second evanescent wave coupler 250 is offset downward by a second offset relative to the first evanescent wave coupler 150, when setting the auxiliary optical waveguide 120, the first dimension of the straight waveguide 121 in the second evanescent wave coupler 250 can be set to: the first preset length; the first dimension of the straight waveguide 121 in the first evanescent wave coupler 150 is: the second preset length; the second dimension of the straight waveguide 121 arranged along the second direction is: the second preset length plus the second offset.

[0121] In the above implementation process, when determining the dimension of the straight waveguide 121, it can be directly determined according to the first offset and / or the second offset, and the calculation method is simple and easy to implement, which can improve the determination efficiency and accuracy of the first dimension and / or the second dimension of the straight waveguide 121.

[0122] In a possible implementation manner, determining the waveguide dimension of the auxiliary optical waveguide 120 according to the bonding offset includes: determining the bending radius of the bending waveguide 122 according to the offset range of the bonding offset.

[0123] Optionally, after the first wafer 100 and the second wafer 200 are bonded, the first evanescent wave coupler 150 and the second evanescent wave coupler 250 are offset. If the auxiliary optical waveguide 120 includes both the straight waveguide 121 and the bending waveguide 122, the bonding offset can be compensated only by the straight waveguide 121, or only by the bending waveguide 122, or also by the straight waveguide 121 and the bending waveguide 122 together. That is, according to a set of first offset and second offset data, multiple design schemes of the auxiliary optical waveguide 120 can be determined.

[0124] It should be understood that since the size of the curved waveguide 122 is mainly reflected by the bending radius. Therefore, after determining the first offset and the second offset, the bending radius of the curved waveguide 122 can be determined according to the first offset and the second offset.

[0125] The above-mentioned bending radius can be determined in the following ways:

[0126] Method 1: Set corresponding calculation formulas, and calculate the bending radius in real time according to the first offset and / or the second offset, and the calculation formulas.

[0127] Method 2: Multiple bending radii can be set for each curved waveguide 122 respectively, and the offset ranges of the first offset and / or the second offset that can be used for compensation are determined. Then, the multiple bending radii are associated with the corresponding offset ranges of the first offset and / or the second offset. When it is necessary to determine the bending radius of the curved waveguide 122, the bending radius associated with the offset range to which the obtained first offset and / or the second offset belong can be directly matched, and the matched bending radius is used as the bending radius for compensating the current first offset and / or the second offset.

[0128] Method 3: A corresponding neural network model can be created and trained in advance according to multiple first offsets, second offsets, and bending radii. When it is necessary to determine the bending radius of the curved waveguide 122, the current first offset and second offset are input into the neural network model, and the corresponding bending radius is output through the neural network model.

[0129] The above-mentioned determination methods of the bending radius are only exemplary, and the setting method of the bending radius can be adjusted according to the actual situation.

[0130] In one embodiment, a corresponding minimum radius can be set for each curved waveguide 122. The bending radius of the curved waveguide 122 is greater than or equal to the preset minimum radius.

[0131] It should be understood that when the bending radius of the curved waveguide 122 is too small. On the one hand, the manufacturing difficulty of the curved waveguide 122 may increase. On the other hand, when the bending radius of the curved waveguide 122 is too small, it may cause optical scattering loss, thereby increasing the transmission loss of light in the curved waveguide 122.

[0132] In the above implementation process, after determining the bonding offset, the bending radius of the curved waveguide 122 can be directly determined according to the offset range to which the bonding offset belongs, which can reduce the calculation amount in the process of determining the bending radius, simplify the difficulty of determining the bending radius, and improve the efficiency of determining the bending radius.

[0133] In a possible implementation, the method further includes: presetting a plurality of candidate structures.

[0134] Among them, the plurality of candidate structures include waveguide structures of various shapes and various sizes; one or more candidate structures are configured to form an auxiliary optical waveguide 120.

[0135] For example, the candidate structures include: straight waveguides with a taper at one end in length range A, straight waveguides with a taper at one end in length range B, straight waveguides with a taper at one end in length range C, straight waveguides with a taper at one end in length range D, straight waveguides with a taper at one end in length range E, straight waveguides with a taper at one end in length range F, rectangular straight waveguides in length range A, rectangular straight waveguides in length range B, rectangular straight waveguides in length range C, rectangular straight waveguides in length range D, rectangular straight waveguides in length range E, rectangular straight waveguides in length range F, rectangular straight waveguides in length range G, semi-circular bent waveguides in bending radius range A, semi-circular bent waveguides in bending radius range B, semi-circular bent waveguides in bending radius range C, semi-circular bent waveguides in bending radius range E, semi-circular bent waveguides in bending radius range F, 1 / 4 circular arc bent waveguides in bending radius range A, 1 / 4 circular arc bent waveguides in bending radius range B, 1 / 4 circular arc bent waveguides in bending radius range C, 1 / 4 circular arc bent waveguides in bending radius range D, 1 / 4 circular arc bent waveguides in bending radius range E, 1 / 4 circular arc bent waveguides in bending radius range F, 1 / 4 circular arc bent waveguides in bending radius range H, etc.

[0136] The above-mentioned candidate structures are only exemplary, and the candidate structures can be adjusted according to the actual situation.

[0137] It should be understood that when determining the design scheme of the auxiliary optical waveguide 120, corresponding candidate structures can be selected from the candidate structures according to the waveguide shape and waveguide size. Then, the selected target candidate structures are spliced to obtain the design scheme of the auxiliary optical waveguide 120, thereby completing the design of the auxiliary optical waveguide 120.

[0138] Specifically, designing the auxiliary optical waveguide 120 through the waveguide shape and waveguide size includes: selecting a first candidate structure according to the waveguide shape; matching the first candidate structure to one or more target candidate structures whose preset sizes meet the corresponding size ranges of the waveguide size; splicing the one or more target candidate structures that are matched to obtain the design scheme of the auxiliary optical waveguide 120.

[0139] Among them, the first candidate structure includes one or more of all the first candidate straight waveguide structures with preset sizes and all the first candidate bent waveguide structures with preset sizes.

[0140] The first candidate straight waveguide structure here may include one or more shaped straight waveguide structures. For example, the first candidate straight waveguide only includes a straight waveguide with one end being tapered; for another example, the first candidate straight waveguide only includes a rectangular straight waveguide; for still another example, the first candidate straight waveguide includes both a rectangular straight waveguide and a straight waveguide with one end being tapered.

[0141] The first candidate curved waveguide structure may include one or more shaped curved waveguide structures. For example, the first candidate curved waveguide structure only includes a semi-circular curved waveguide; for another example, the first candidate curved waveguide structure only includes a 1 / 4 arc-shaped curved waveguide; for still another example, the first candidate curved waveguide structure includes both a semi-circular curved waveguide and a 1 / 4 arc-shaped curved waveguide.

[0142] It can be understood that after determining the waveguide shape of the auxiliary optical waveguide 120, the corresponding first candidate structure is matched according to the waveguide shape. After screening out the first candidate structure, one or more target candidate structures whose size ranges in the first candidate structure contain the waveguide size are then matched according to the determined one or more waveguide sizes. Finally, the one or more matched target candidate structures are spliced to obtain the final design scheme of the auxiliary optical waveguide 120.

[0143] Exemplarily, if the design scheme of the auxiliary optical waveguide 120 to be finally obtained is Figure 6 the structure shown. The waveguide shape of the auxiliary optical waveguide 120 of this determined structure includes a straight waveguide with one end being tapered and a semi-circular curved waveguide. Then the matched first candidate structures may include: straight waveguides with one end being tapered in A length range, straight waveguides with one end being tapered in B length range, straight waveguides with one end being tapered in C length range, straight waveguides with one end being tapered in D length range, straight waveguides with one end being tapered in E length range, straight waveguides with one end being tapered in F length range, semi-circular curved waveguides in A bending radius range, semi-circular curved waveguides in B bending radius range, semi-circular curved waveguides in C bending radius range, semi-circular curved waveguides in E bending radius range, semi-circular curved waveguides in F bending radius range.

[0144] Further, the size range of the straight waveguide corresponding to the waveguide size can be matched as range A according to the waveguide size, and the size range of the curved waveguide is range B. Then correspondingly, the target candidate structure is: a straight waveguide with one end being tapered in A length range and a semi-circular curved waveguide in B bending radius range. Finally, two straight waveguides with one end being tapered in A length range and one semi-circular curved waveguide in B bending radius range are spliced to obtain Figure 6 the auxiliary optical waveguide 120 shown, thereby completing the design scheme of the auxiliary optical waveguide 120.

[0145] In one embodiment, the candidate straight waveguide structure includes: a first candidate straight waveguide structure and a second candidate straight waveguide structure. Among them, the first candidate straight waveguide structure is a candidate straight waveguide structure arranged along a first direction, and the second candidate straight waveguide structure is a candidate straight waveguide structure arranged along a second direction.

[0146] In the above implementation process, by pre-setting candidate structures with various shapes and sizes, when determining the auxiliary optical waveguide 120, the corresponding candidate structure can be directly matched according to the waveguide shape and waveguide size of the auxiliary optical waveguide 120 to obtain the target candidate structure, and then the design scheme of the auxiliary optical waveguide 120 can be obtained by splicing the target candidate structure. There is no need to fabricate the corresponding waveguide pattern in real time according to the waveguide shape and waveguide size, which can simplify the process of determining the design scheme and improve the efficiency of determining the design scheme.

[0147] In a possible implementation manner, after designing the auxiliary optical waveguide 120 through the waveguide shape and waveguide size, the method further includes: calculating, among multiple design schemes, the design scheme with the shortest transmission path of light in the auxiliary optical waveguide 120 as the final design scheme of the auxiliary optical waveguide 120; processing the reserved area of the auxiliary optical waveguide 120 according to the final design scheme to obtain the auxiliary optical waveguide 120 structure that meets the final design scheme.

[0148] It can be understood that by adjusting the shape, size, etc. of the waveguide, a set of bonding offsets can determine multiple different design schemes. And only one design scheme is required to fabricate the final auxiliary optical waveguide 120. After determining multiple design schemes according to the bonding offsets, the optimal design scheme can be selected from the multiple design schemes as the final design scheme of the auxiliary optical waveguide 120, and the auxiliary optical waveguide 120 is fabricated based on this final design scheme.

[0149] Among them, the design scheme with the shortest transmission path of light in the auxiliary optical waveguide 120 can be recognized as the optimal design scheme.

[0150] In the above implementation process, by selecting the design scheme with the shortest transmission path of light in the auxiliary optical waveguide 120 as the final design scheme of the auxiliary optical waveguide 120 and fabricating the auxiliary optical waveguide 120 based on this final design scheme, the transmission loss of light in the heterogeneous integrated chip can be reduced.

[0151] In a possible implementation manner, after designing the auxiliary optical waveguide 120 through the waveguide shape and waveguide size, the method further includes: fabricating the optical lead 300 according to the design scheme of the auxiliary optical waveguide 120 by means of 3D laser direct writing.

[0152] Among them, as Figure 15As shown, the optical lead 300 is configured to replace the auxiliary optical waveguide 120 to implement the connection between the first evanescent wave coupler 150 and the second evanescent wave coupler 250.

[0153] The specific implementation process of fabricating the optical lead 300 by 3D laser direct writing here can be as follows: An auxiliary optical waveguide 120 model is established according to the determined design scheme of the auxiliary optical waveguide 120, and then materials are stacked layer by layer based on this auxiliary optical waveguide 120 model to construct the optical lead 300. Among them, the material used to construct the optical lead 300 is the material of the auxiliary optical waveguide 120. For example, organic substances, polymers, etc. Since the optical lead 300 is made of the material of the auxiliary optical waveguide 120, this optical lead 300 can also be used to transmit light. Therefore, the optical lead 300 can be used to replace the auxiliary optical waveguide 120 to implement the connection between the first evanescent wave coupler 150 and the second evanescent wave coupler 250.

[0154] In the above implementation process, a 3D waveguide is fabricated between the first evanescent wave coupler 150 and the second evanescent wave coupler 250 by 3D laser direct writing to replace the auxiliary optical waveguide 120 for connection. The manufacturing method of the optical lead is to control a high-energy pulsed beam to cause multi-photon polymerization at specific positions of the photoresist to form a 3D polymer waveguide, which can provide a more flexible connection method to solve more complex evanescent wave coupler connection scenarios, such as crossing other same-layer waveguide patterns, avoiding waveguide winding, and minimizing the optical waveguide path to the greatest extent.

[0155] In a possible implementation manner, the material of the first-layer optical waveguide 110 is lithium niobate; and / or the material of the second-layer optical waveguide 210 is silicon nitride; and / or the material of the auxiliary optical waveguide 120 is silicon.

[0156] In the above implementation process, due to the high linear electro-optic effect material of thin-film lithium niobate, which has a very wide transparent window and extremely low intrinsic loss, it is very suitable for fabricating high-bandwidth electro-optic modulators; the silicon nitride material has the characteristic of ultra-low loss and is very suitable for fabricating passive waveguides and devices in optical chips; and silicon, as the most popular optical chip material, its unique CMOS compatibility and high integration have always been the preferred materials for fabricating optical chips, and the method of epitaxial germanium on it provides high-speed optoelectronic detection functions for silicon-based chips. By setting the material of the first optical waveguide 110 as lithium niobate, setting the second optical waveguide 210 as silicon nitride material, and setting the auxiliary waveguide layer 120 as silicon, a low-loss high-speed electro-optic modulator can be realized in the first wafer 100, ultra-low-loss passive insertion loss performance can be achieved by using silicon nitride in the second wafer 200, and high-speed optoelectronic detectors can be fabricated by epitaxial germanium on the silicon of the auxiliary waveguide 120 layer. This method combines the advantages of the three materials themselves and gives full play to the advantages of each material in the optical chip. The optical chip fabricated based on this method has very high performance both at the transceiver ends and in terms of passive insertion loss.

[0157] In a possible implementation manner, the first wafer 100 includes an electro-optic modulator and / or an optoelectronic detector; and / or the second wafer 200 includes an optoelectronic detector and / or an electro-optic modulator.

[0158] In the above implementation process, by setting an electro-optic modulator and / or an optoelectronic detector in the first wafer 100, and / or setting an electro-optic modulator and / or an optoelectronic detector in the second wafer 200, the hetero-integrated optical chip after bonding can have both transceiver performance.

[0159] In a possible implementation manner, the first wafer 100 is a single first chip, and the second wafer 200 is a single second chip; step S201 includes: bonding the first chip and the second chip.

[0160] Based on the same inventive concept, an hetero-integrated optical chip integration device corresponding to the hetero-integrated optical chip integration method is further provided in the embodiments of the present application. Since the principle of solving problems by the device in the embodiments of the present application is similar to that of the foregoing hetero-integrated optical chip integration method embodiments, the implementation of the device in this embodiment can refer to the description in the embodiments of the above method, and the repeated parts will not be described again.

[0161] Please refer to Figure 16 , which is a schematic diagram of the functional modules of the hetero-integrated optical chip integration device provided in the embodiments of the present application. Each module in the hetero-integrated optical chip integration device in this embodiment is used to execute each step in the above method embodiments. The hetero-integrated optical chip integration device includes a bonding module 601, an acquisition module 602, and a design module 603; wherein,

[0162] The bonding module 601 is used to bond the first wafer and the second wafer; wherein, an auxiliary optical waveguide is arranged in the first wafer, and a second-layer optical waveguide is arranged in the second wafer.

[0163] The obtaining module 602 is used to obtain the bonding offset of the first wafer and the second wafer.

[0164] The design module 603 is used to design the auxiliary optical waveguide according to the bonding offset; wherein, the auxiliary optical waveguide is configured to compensate for the bonding offset.

[0165] In a possible implementation manner, the design module 603 is further used to: determine the waveguide shape of the auxiliary optical waveguide according to the relative positions of the first evanescent wave coupler and the second evanescent wave coupler; determine the waveguide size of the auxiliary optical waveguide according to the bonding offset; design the auxiliary optical waveguide through the waveguide shape and the waveguide size.

[0166] In a possible implementation manner, the design module 603 is specifically used to: determine the first size of the straight waveguide arranged in the first direction in the first direction according to the first direction offset; and / or determine the second size of the straight waveguide arranged in the second direction in the second direction according to the second direction offset.

[0167] In a possible implementation manner, the design module 603 is specifically used to: determine the bending radius of the bending waveguide according to the offset range of the bonding offset; wherein, the bending radius of the bending waveguide is greater than or equal to a preset minimum radius.

[0168] In a possible implementation manner, the heterogeneous optical chip integration device further includes a preset module for presetting a plurality of candidate structures; wherein, the plurality of candidate structures include waveguide structures of various shapes and various sizes; one or more of the candidate structures are configured to form an auxiliary optical waveguide.

[0169] In a possible implementation manner, the design module 603 is specifically used to select a first candidate structure according to the waveguide shape; wherein, the first candidate structure includes one or more of all preset-size first candidate straight waveguide structures and all preset-size first candidate bending waveguide structures; match the first candidate structure to one or more target candidate structures whose size ranges include the waveguide size; splice the matched one or more target candidate structures to obtain a design scheme of the auxiliary optical waveguide.

[0170] In a possible implementation, the heterogeneous optical chip integration device further includes a calculation module, which is configured to calculate, among multiple design schemes, the design scheme with the shortest transmission path of light in the auxiliary optical waveguide as the final design scheme of the auxiliary optical waveguide; and process the reserved area of the auxiliary optical waveguide according to the final design scheme to obtain an auxiliary optical waveguide structure that meets the final design scheme.

[0171] In a possible implementation, the heterogeneous optical chip integration device further includes a manufacturing module, which is configured to manufacture an optical lead in accordance with the design scheme of the auxiliary optical waveguide by means of 3D laser direct writing; wherein the optical lead is configured to replace the auxiliary optical waveguide to realize the connection between the first evanescent wave coupler and the second evanescent wave coupler.

[0172] In a possible implementation, the bonding module 601 is specifically configured to bond the first chip and the second chip.

[0173] In addition, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the steps of the heterogeneous optical chip integration method described in the above method embodiment.

[0174] The computer program product of the heterogeneous optical chip integration method provided by the embodiment of the present application includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the steps of the heterogeneous optical chip integration method described in the above method embodiment. For details, reference can be made to the above method embodiment, which will not be elaborated herein.

[0175] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present application. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the module, program segment, or part of code includes one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0176] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist alone, or two or more modules may be integrated to form an independent part.

[0177] If the above-mentioned functions are implemented in the form of software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes. It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, the elements defined by the statement "including..." do not exclude the existence of additional identical elements in the process, method, article or device including the said elements.

[0178] The foregoing is only the preferred embodiment of the present application and is not used to limit the present application. For those skilled in the art, the present application may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application. It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0179] As described above, this is only the specific implementation manner of the present application. However, the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A heterogeneous optical chip integration method, characterized in that, Including: Bonding a first wafer and a second wafer; wherein, an auxiliary optical waveguide is disposed in the first wafer, and a second-layer optical waveguide is disposed in the second wafer; Obtaining a bonding offset of the first wafer and the second wafer; Designing the auxiliary optical waveguide according to the bonding offset; Wherein, the auxiliary optical waveguide is configured to compensate for the bonding offset.

2. The method according to claim 1, wherein A first-layer optical waveguide is further disposed in the first wafer; wherein, the auxiliary optical waveguide, the first-layer optical waveguide, and the second-layer optical waveguide form a first evanescent wave coupler, and the auxiliary optical waveguide and the second-layer optical waveguide form a second evanescent wave coupler; The designing the auxiliary optical waveguide according to the bonding offset includes: Determining a waveguide shape of the auxiliary optical waveguide according to a relative position of the first evanescent wave coupler and the second evanescent wave coupler; Determining a waveguide size of the auxiliary optical waveguide according to the bonding offset; Designing the auxiliary optical waveguide through the waveguide shape and the waveguide size.

3. The method according to claim 2, characterized in that, The auxiliary optical waveguide includes: a straight waveguide; the bonding offset includes: a first-direction offset and a second-direction offset; the waveguide size includes a first size and a second size; The determining the waveguide size of the auxiliary optical waveguide according to the bonding offset includes: Determining a first size of the straight waveguide disposed along the first direction in the first direction according to the first-direction offset; and / or Determining a second size of the straight waveguide disposed along the second direction in the second direction according to the second-direction offset.

4. The method according to claim 2 or 3, characterized in that The auxiliary optical waveguide includes: a bent waveguide; the waveguide size includes a bending radius; The determining the waveguide size of the auxiliary optical waveguide according to the bonding offset includes: Determining a bending radius of the bent waveguide according to an offset range of the bonding offset; Wherein, the bending radius of the bent waveguide is greater than or equal to a preset minimum radius.

5. The method according to claim 4, wherein Before the designing the auxiliary optical waveguide through the waveguide shape and the waveguide size, the method further includes: Presetting a plurality of candidate structures; wherein, the plurality of candidate structures include waveguide structures of various shapes and various sizes; one or more of the candidate structures are configured to form an auxiliary optical waveguide; The designing the auxiliary optical waveguide through the waveguide shape and the waveguide size includes: Selecting a first candidate structure according to the waveguide shape; wherein, the first candidate structure includes one or more of all preset-size first candidate straight waveguide structures and all preset-size first candidate bent waveguide structures; Matching the first candidate structure according to the waveguide size to one or more target candidate structures whose size range includes the waveguide size; Splicing the one or more matched target candidate structures to obtain a design scheme of the auxiliary optical waveguide.

6. The method according to claim 2, wherein The auxiliary optical waveguide includes a plurality of design schemes; After the designing the auxiliary optical waveguide through the waveguide shape and the waveguide size, the method further includes: Calculating that a design scheme with the shortest transmission path of light in the auxiliary optical waveguide among the plurality of design schemes is the final design scheme of the auxiliary optical waveguide; Process the reserved area of the auxiliary optical waveguide according to the final design scheme to obtain an auxiliary optical waveguide structure that meets the final design scheme.

7. The method according to claim 2, wherein After designing the auxiliary optical waveguide by the waveguide shape and the waveguide size, the method further includes: Fabricate an optical lead according to the design scheme of the auxiliary optical waveguide by 3D laser direct writing; Wherein, the optical lead is configured to connect the first evanescent wave coupler and the second evanescent wave coupler instead of the auxiliary optical waveguide.

8. The method according to claim 2, wherein The material of the first layer of optical waveguide is lithium niobate; and / or The material of the second layer of optical waveguide is silicon nitride; and / or The material of the auxiliary optical waveguide is silicon.

9. The method according to claim 2, wherein The first wafer includes an electro-optic modulator and / or a photodetector; and / or, The second wafer includes the photodetector and / or the electro-optic modulator.

10. The method according to any one of claims 1-9, characterized in that The first wafer is a single first chip, and the second wafer is a single second chip; Bonding the first wafer and the second wafer includes: Bonding the first chip and the second chip.

11. A heterogeneous integrated optical chip, characterized in that, Integrated by the method according to any one of claims 1-10; The heterogeneous integrated optical chip includes: a bonded first wafer and a second wafer; An auxiliary optical waveguide and a first layer of optical waveguide are provided in the first wafer, and a second layer of optical waveguide is provided in the second wafer; Wherein, the auxiliary optical waveguide, the second layer of optical waveguide and the first layer of optical waveguide form a first evanescent wave coupler, and the auxiliary optical waveguide and the second layer of optical waveguide form a second evanescent wave coupler; The auxiliary optical waveguide is configured to connect the first evanescent wave coupler and the second evanescent wave coupler, and the auxiliary optical waveguide is further configured to compensate for the bonding offset after bonding the first wafer and the second wafer.

12. A heterogeneous optical chip integration device, characterized in that, Includes: A bonding module for bonding the first wafer and the second wafer; wherein, an auxiliary optical waveguide is provided in the first wafer, and a second layer of optical waveguide is provided in the second wafer; An acquisition module for acquiring the bonding offset between the first wafer and the second wafer; A design module for designing the auxiliary optical waveguide according to the bonding offset; Wherein, the auxiliary optical waveguide is configured to compensate for the bonding offset.

13. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is run by a processor, it executes the steps of the method according to any one of claims 1 to 10.

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