Silicon carbide epitaxial wafer, preparation method thereof and power device

Abstract

The invention belongs to the field of power devices, and particularly discloses a silicon carbide epitaxial wafer, a preparation method of the silicon carbide epitaxial wafer and a power device. The buffer layer comprises a first buffer layer and a second buffer layer, the first buffer layer is arranged on the surface of one side of the silicon carbide substrate, and the second buffer layer is arranged on the surface, away from the silicon carbide substrate, of the first buffer layer; the silicon carbide epitaxial layer is arranged on the surface, far away from the silicon carbide substrate, of the second buffer layer; wherein the contact angle between the silicon carbide substrate and water is theta1, the contact angle between the first buffer layer and water is theta2, the contact angle between the second buffer layer and water is theta3, and theta1lt is met; theta2, and theta2gt; [theta] 3. By accurately controlling the distribution of the contact angles of the buffer layer, the buffer layer with high crystal quality can be obtained, and the silicon carbide epitaxial wafer with low defect density and high crystal quality can be obtained.

Description

Technical Field

[0001] The present invention belongs to the field of power devices, and particularly relates to a silicon carbide epitaxial wafer, a preparation method thereof, and a power device. Background Art

[0002] A silicon carbide epitaxial wafer is a semiconductor material formed by epitaxially growing a layer of silicon carbide thin film on a silicon carbide substrate, and can be made into various devices with high power, high frequency, and high temperature resistance, and is widely used in the fields of power electronics, radio frequency devices, optoelectronics, etc. The thickness, doping concentration, and conductivity type of the epitaxial layer of the silicon carbide epitaxial wafer can be adjusted according to requirements to meet different application requirements.

[0003] For silicon carbide devices, under the same test conditions, the crystal quality of the silicon carbide epitaxial wafer has a great influence on its yield. The better the crystal quality of the silicon carbide epitaxial wafer, the higher the yield of the silicon carbide device. Therefore, improving the crystal quality of the silicon carbide epitaxial wafer is crucial for reducing device losses and improving the chip yield. Currently, the general preparation method for silicon carbide epitaxial wafers is: etching the surface of the substrate, growing a buffer layer, and growing an epitaxial layer. Among them, the quality of the buffer layer directly determines the quality of the subsequent epitaxial layer grown on its surface, and directly determines the quality of the subsequent epitaxial layer and the entire epitaxial wafer. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems in the related art to some extent. For this purpose, the object of the present invention is to provide a silicon carbide epitaxial wafer, a preparation method thereof, and a power device. By precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, it is beneficial to obtain a buffer layer with high crystal quality, and further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0005] The first aspect of the present invention provides a silicon carbide epitaxial wafer. According to an embodiment of the present invention, the silicon carbide epitaxial wafer includes: A silicon carbide substrate; A buffer layer, the buffer layer includes a first buffer layer and a second buffer layer, the first buffer layer is disposed on one surface of the silicon carbide substrate, and the second buffer layer is disposed on the surface of the first buffer layer away from the silicon carbide substrate; A silicon carbide epitaxial layer, the silicon carbide epitaxial layer is disposed on the surface of the second buffer layer away from the silicon carbide substrate; Wherein, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

[0006] For the silicon carbide epitaxial wafer of the above embodiment of the present invention, by precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, it is beneficial to obtain a buffer layer with high crystal quality, and further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0007] In addition, the silicon carbide epitaxial wafer according to the above embodiment of the present invention may further have the following additional technical features: In some embodiments of the present invention, 20° ≤ θ1 ≤ 30°, 30° < θ2 ≤ 63°, 0° < θ3 ≤ 33° are satisfied; or, 20° ≤ θ1 ≤ 30°, 31° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30° are satisfied.

[0008] In some embodiments of the present invention, the first buffer layer includes a plurality of first sub-buffer layers. Along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase in sequence.

[0009] In some embodiments of the present invention, along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase in gradient or linearly.

[0010] In some embodiments of the present invention, the second buffer layer includes a plurality of second sub-buffer layers. Along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease in sequence.

[0011] In some embodiments of the present invention, along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease in gradient or linearly.

[0012] In some embodiments of the present invention, both the silicon carbide substrate and the buffer layer include doping elements. The doping concentration of the silicon carbide substrate is n1, the doping concentration of the first buffer layer is n2, and the doping concentration of the second buffer layer is n3, satisfying n1 < n2 and n2 > n3.

[0013] In some embodiments of the present invention, 1E16 cm -3 ≤ n1 ≤ 2E18 cm -3 ,2E18 cm -3 < n2 ≤ 6E19cm -3 ,1E16 cm -3 ≤ n3 ≤ 2E18 cm -3 。

[0014] In some embodiments of the present invention, the first buffer layer includes a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase sequentially; and / or, the second buffer layer includes a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease sequentially.

[0015] In some embodiments of the present invention, along the direction away from the silicon carbide substrate, the doping concentration gradient of the plurality of first sub-buffer layers increases or increases linearly; and / or, along the direction away from the silicon carbide substrate, the doping concentration gradient of the plurality of second sub-buffer layers decreases or decreases linearly.

[0016] In some embodiments of the present invention, the thickness of the first buffer layer is 0.14 μm to 3.2 μm; and / or, the thickness of the second buffer layer is 0.14 μm to 3.2 μm; and / or, the total thickness of the buffer layer is 0.28 μm to 6.4 μm.

[0017] In some embodiments of the present invention, the thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm.

[0018] The second aspect of the present invention provides a method for preparing the silicon carbide epitaxial wafer of the above embodiments. According to the embodiments of the present invention, the method includes: Form a first buffer layer on one surface of the silicon carbide substrate; Form a second buffer layer on the surface of the first buffer layer away from the silicon carbide substrate, and the first buffer layer and the second buffer layer together form a buffer layer; Form a silicon carbide epitaxial layer on the surface of the second buffer layer away from the silicon carbide substrate; Wherein, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

[0019] In the method for preparing a silicon carbide epitaxial wafer according to the above embodiments of the present invention, by precisely controlling the distribution of the contact angles of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, it is beneficial to obtain a buffer layer with high crystal quality, and further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0020] In addition, the method for preparing a silicon carbide epitaxial wafer according to the above embodiments of the present invention may further have the following additional technical features: In some embodiments of the present invention, before forming the first buffer layer on one surface of the silicon carbide substrate, the method further includes: etching one surface of the silicon carbide substrate, and the etching conditions include at least one of the following conditions: a) the etching temperature is 1500 o °C - 1600 o °C, b) the etching time is 5 min - 10 min, c) the hydrogen flow rate is 80 slm - 200 slm, d) the reaction pressure is 100 mbar - 150 mbar.

[0021] In some embodiments of the present invention, when forming the first buffer layer, the reaction pressure is 70 mbar - 90 mbar, the central doping source flow rate is 300 sccm - 400 sccm, the carbon source flow rate is 10 sccm - 15 sccm, the silicon source flow rate is 50 sccm - 70 sccm, and the temperature is 1600 o °C - 1700 o °C, and the reaction time is 1 min - 5 min; alternatively, when forming the first buffer layer, the reaction pressure is stepped or linearly reduced from 100 mbar - 150 mbar to 70 mbar - 90 mbar, the central doping source flow rate is stepped or linearly increased from 50 sccm - 100 sccm to 300 sccm - 400 sccm, the carbon source flow rate is stepped or linearly reduced from 15 sccm - 30 sccm to 10 sccm - 15 sccm, the silicon source flow rate is stepped or linearly increased from 10 sccm - 15 sccm to 50 sccm - 70 sccm, and the temperature is stepped or linearly increased from 1450 o °C - 1550 o °C to 1600 o °C - 1700 o °C, and the reaction time is 1 min - 5 min.

[0022] In some embodiments of the present invention, when forming the second buffer layer, the reaction pressure is stepped, linearly or directly increased from 70 mbar - 90 mbar to 110 mbar - 170 mbar, the central doping source flow rate is stepped, linearly or directly reduced from 300 sccm - 400 sccm to 40 sccm - 105 sccm, the carbon source flow rate is stepped, linearly or directly increased from 10 sccm - 15 sccm to 25 sccm - 40 sccm, the silicon source flow rate is stepped, linearly or directly reduced from 50 sccm - 70 sccm to 20 sccm - 50 sccm, and the temperature is stepped, linearly or directly reduced from 1600 o °C - 1700 o °C to 1450o C-1600 o C, with a reaction time of 1 min - 5 min.

[0023] In some embodiments of the present invention, the doping source includes one of nitrogen, ammonia, and trimethylaluminum; and / or, the carbon source includes at least one of ethylene, methane, and propane; and / or, the silicon source includes at least one of trichlorosilane, silane, and dichlorosilane.

[0024] In some embodiments of the present invention, during the formation of the silicon carbide epitaxial layer, the flow rate of the carbon source is controlled to be 150 sccm - 300 sccm, the flow rate of the silicon source is 350 sccm - 600 sccm, and the duration is 5 min - 30 min.

[0025] The third aspect of the present invention provides a power device. According to an embodiment of the present invention, the power device includes the silicon carbide epitaxial wafer of the first aspect or the silicon carbide epitaxial wafer prepared by the method of the second aspect. Thereby, it is beneficial to improve the yield of the power device. It should be noted that the features and advantages described above for the silicon carbide epitaxial wafer also apply to the power device, and will not be elaborated here.

[0026] The additional aspects and advantages of the present invention will be partly given in the following description, partly will become apparent from the following description, or be understood through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, where: Figure 1 is a schematic structural diagram of a silicon carbide epitaxial wafer according to some embodiments of the present invention; Figure 2 is a schematic structural diagram of a silicon carbide epitaxial wafer according to some other embodiments of the present invention; Figure 3 is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 1; Figure 4 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 1; Figure 5 is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 2; Figure 6 is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 2; Figure 7 is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 3; Figure 8It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 3; Figure 9 It is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 4; Figure 10 It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 4; Figure 11 It is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 5; Figure 12 It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 5; Figure 13 It is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 6; Figure 14 It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 6; Figure 15 It is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Example 7; Figure 16 It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Example 7; Figure 17 It is the SIMS test result of the buffer layer of the silicon carbide epitaxial wafer in Comparative Example 1; Figure 18 It is the contact angle test result of the buffer layer of the silicon carbide epitaxial wafer in Comparative Example 1.

[0028] Reference numerals: 100 - silicon carbide substrate, 200 - buffer layer, 210 - first buffer layer, 211 - first sub - buffer layer, 220 - second buffer layer, 221 - second sub - buffer layer, 300 - silicon carbide epitaxial layer. Detailed implementation manners

[0029] The embodiments of the present invention will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present invention, and should not be construed as limiting the present invention.

[0030] The present invention is proposed by the inventor based on the following problems: The various properties of the existing buffer layer cannot directly determine the crystal quality of the subsequent epitaxial layer. Only after the epitaxial layer growth is completed and characterized and tested can the crystal quality of the epitaxial layer be determined. It cannot be used as a performance index for directly regulating the crystal quality of the epitaxial layer, resulting in uneven crystal quality of the epitaxial layer, and thus the product quality of the epitaxial wafer cannot be guaranteed.

[0031] To solve the problems that the existing buffer layer cannot ensure a high crystal quality of the silicon carbide epitaxial layer and high-quality epitaxial wafer products, etc., the first aspect of the present invention proposes a silicon carbide epitaxial wafer with a relatively high crystal quality. According to an embodiment of the present invention, referring to the attached Figure 1 and the attached Figure 2 , the silicon carbide epitaxial wafer includes: a silicon carbide substrate 100; a buffer layer 200, the buffer layer 200 includes a first buffer layer 210 and a second buffer layer 220, the first buffer layer 210 is disposed on one surface of the silicon carbide substrate 100, and the second buffer layer 220 is disposed on the surface of the first buffer layer 210 away from the silicon carbide substrate 100; a silicon carbide epitaxial layer 300, the silicon carbide epitaxial layer 300 is disposed on the surface of the second buffer layer 220 away from the silicon carbide substrate 100; wherein, the contact angle between the silicon carbide substrate 100 and water is θ1, the contact angle between the first buffer layer 210 and water is θ2, and the contact angle between the second buffer layer 220 and water is θ3, satisfying θ1 < θ2 and θ2 > θ3. Further, the contact angle between the surface of the silicon carbide substrate 100 close to the first buffer layer and water is θ1.

[0032] For the silicon carbide epitaxial wafer of the above embodiment of the present invention, by precisely controlling the distribution of the contact angles of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, it is beneficial to obtain a buffer layer with high crystal quality, and further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0033] The reasons for the silicon carbide epitaxial wafer proposed by the present invention to achieve the above beneficial effects are described in detail below: The present invention proposes a silicon carbide epitaxial wafer with a novel buffer layer, and designs a special distribution of the contact angles in the thickness direction of the buffer layer, which is beneficial to grow an epitaxial layer with high crystal quality. Specifically, compared with the contact angle of the silicon carbide substrate, the contact angle of the first buffer layer is larger, so its surface energy is smaller, which is beneficial to promoting the closure and healing of the defects of the silicon carbide substrate, and further avoiding the formation of epitaxial defects such as stacking faults, basal plane dislocations, and large pits, that is, it is beneficial to fully suppress the evolution of the silicon carbide substrate defects into epitaxial defects, and finally ensures the test yield of the device. At the same time, compared with the contact angle of the first buffer layer, the contact angle of the second buffer layer is smaller, so its surface energy is larger, which is beneficial to the adsorption of the gas-phase precursor of the silicon carbide epitaxial layer on the surface of the second buffer layer, thus being beneficial to ensuring the continuous and stable progress of the chemical vapor deposition process of the silicon carbide epitaxial layer and being beneficial to obtaining a silicon carbide epitaxial layer with high crystal quality. Therefore, by precisely controlling the distribution of the contact angles of the buffer layer, it is beneficial to obtain a buffer layer with high crystal quality, and further obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0034] It should be understood that the quality of the buffer layer affects the quality of the silicon carbide epitaxial layer. By precisely controlling the distribution of the contact angle of the buffer layer, it is beneficial to improve the crystal quality of the silicon carbide epitaxial layer, and thus improve the yield of silicon carbide devices.

[0035] Satisfy 20° ≤ θ1 ≤ 30°, 30° < θ2 ≤ 63°, 0° < θ3 ≤ 33°; preferably, satisfy 20° ≤ θ1 ≤ 30°, 31° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30°.

[0036] According to some specific embodiments of the present invention, satisfy 20° ≤ θ1 ≤ 30° (for example, θ1 can be 20°, 21°, 22°, 23°, 24°, 25°, 26°, 27°, 28°, 29°, 30°, etc., or any range within this range, for example, can be 20° ≤ θ1 ≤ 25°, 25° ≤ θ1 ≤ 30°, 23° ≤ θ1 ≤ 28°, etc.), 33° ≤ θ2 ≤ 63° (for example, θ2 can be 33°, 35°, 37°, 40°, 42°, 45°, 47°, 50°, 52°, 55°, 57°, 60°, 63°, etc., or any range within this range, for example, can be 35° ≤ θ2 ≤ 45°, 45° ≤ θ2 ≤ 60°, 40° ≤ θ2 ≤ 50°, etc.), 0° < θ3 ≤ 33° (for example, θ3 can be 1°, 5°, 10°, 15°, 20°, 25°, 30°, 33°, etc., or any range within this range, for example, can be 0° < θ3 ≤ 15°, 15° ≤ θ3 ≤ 30°, 5° ≤ θ3 ≤ 10°, etc.). Thus, by precisely controlling the distribution of the contact angle of the buffer layer, it is further beneficial to obtain a buffer layer with high crystal quality, and thus further beneficial to obtain a silicon carbide epitaxial wafer with low defect density and high crystal quality. Preferably, satisfy 20° ≤ θ1 ≤ 30°, 35° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30°.

[0037] According to still some specific embodiments of the present invention, refer to the attached Figure 2 , the first buffer layer 210 includes a plurality of first sub-buffer layers 211. Along the direction away from the silicon carbide substrate 100, the contact angles of the plurality of first sub-buffer layers 211 with water increase in sequence. When the contact angle of the first buffer layer gradually increases from θ1 to θ2, the surface energy of the first buffer layer gradually decreases. This gradual change enables each first sub-buffer layer to more effectively seal the defects on the surface of the silicon carbide substrate, such as dislocations, microtubes, etc. The process of gradually increasing the contact angle can repair and seal the defects layer by layer, rather than changing the surface energy significantly at one time, thereby more effectively avoiding the diffusion and amplification of defects.

[0038] According to yet some specific embodiments of the present invention, refer to the attached Figure 2, along the direction away from the silicon carbide substrate 100, the contact angle gradients of multiple first sub-buffer layers 211 with water increase incrementally or linearly. When the contact angle of the first buffer layer increases incrementally or linearly from θ1 to θ2, the surface energy gradient of the first buffer layer decreases or linearly decreases. This gradient or linear change enables each first sub-buffer layer to more effectively seal the defects on the surface of the silicon carbide substrate, such as dislocations and microtubes. The process of incrementally or linearly increasing the contact angle can repair and seal the defects layer by layer, rather than drastically changing the surface energy at once, thereby more effectively avoiding the diffusion and amplification of defects.

[0039] According to some further specific embodiments of the present invention, referring to the attached Figure 2 , the second buffer layer 220 includes multiple second sub-buffer layers 221. Along the direction away from the silicon carbide substrate 100, the contact angles of multiple second sub-buffer layers 221 with water decrease in sequence. When the contact angle of the second buffer layer gradually decreases from θ2 to θ3, the surface energy of the second buffer layer gradually increases, which can ensure the uniform adsorption of gas-phase precursor molecules on its surface, guarantee the stability of the chemical vapor deposition (CVD) process, and avoid the discontinuity of the growth interface caused by the sudden change of the surface energy. This stability helps to ensure the high-quality growth of the epitaxial layer and reduce the defects and non-uniformities during the growth process.

[0040] According to some further specific embodiments of the present invention, referring to the attached Figure 2 , along the direction away from the silicon carbide substrate 100, the contact angle gradients of multiple second sub-buffer layers 221 with water decrease incrementally or linearly. When the contact angle of the second buffer layer decreases incrementally or linearly from θ2 to θ3, the surface energy gradient of the second buffer layer increases incrementally or linearly, which can further ensure the uniform adsorption of gas-phase precursor molecules on its surface, further guarantee the stability of the chemical vapor deposition (CVD) process, avoid the discontinuity of the growth interface caused by the sudden change of the surface energy, and thus further help to ensure the high-quality growth of the epitaxial layer and reduce the defects and thickness non-uniformities during the growth process.

[0041] According to some further specific embodiments of the present invention, both the silicon carbide substrate and the buffer layer include doping elements. The doping concentration of the silicon carbide substrate is n1, the doping concentration of the first buffer layer is n2, and the doping concentration of the second buffer layer is n3, satisfying n1 < n2 and n2 > n3. Thus, by regulating the doping concentrations of the silicon carbide substrate, the first buffer layer, and the second buffer layer, it can be further ensured that the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, which is beneficial to obtaining a buffer layer with high crystal quality, and further beneficial to obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0042] It should be noted that the specific types of doping elements in the above-mentioned silicon carbide substrate and buffer layer are not particularly limited. If it is an N-type silicon carbide epitaxial wafer, the doping element can be nitrogen; if it is a P-type silicon carbide epitaxial wafer, the doping element can be aluminum, boron, etc.

[0043] According to some further specific embodiments of the present invention, satisfying 1E16 cm -3 ≤n1≤2E18 cm -3 (for example, n1 can be 1E16 cm -3 、1E17 cm -3 、5E17 cm -3 、1E18 cm -3 、2E18 cm -3 etc., or any range within this range. For example, it can be 2E16 cm -3 ≤n1≤1E18 cm -3 、1E18 cm -3 ≤n1≤2E18 cm -3 、5E17 cm -3 ≤n1≤1E18 cm -3 、3E17 cm -3 ≤n1≤2E18 cm -3 etc.), 2E18 cm -3 <n2≤6E19 cm -3 (for example, n2 can be 2E18 cm -3 、3E18cm -3 、1E19 cm -3 、2E19 cm -3 、3E19 cm -3 、4E19 cm -3 、5E19 cm -3 、6E19 cm -3 etc., or any range within this range. For example, it can be 2E18 cm -3 <n2≤3E19 cm -3 、4E18 cm -3 ≤n2≤6E19 cm -3 、3E18 cm -3 ≤n2≤4E19 cm -3 etc.), 1E16 cm -3 ≤n3≤2E18 cm -3 (for example, n3 can be 1E16 cm -3 、2E16 cm -3 、4E16 cm -3 、1E17 cm -3, 5E17 cm -3 , 1E18 cm -3 , 1.5E18 cm -3 , 2E18 cm -3 etc., or any range within this range. For example, it can be 1E16 cm -3 ≤n3≤1E18 cm -3 , 1E18 cm -3 ≤n3≤2E18 cm -3 , 5E16 cm -3 ≤n3≤1.5E18cm -3 etc.). Thus, by controlling the doping concentrations of the silicon carbide substrate, the first buffer layer, and the second buffer layer, it is further ensured that the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, which is beneficial to obtaining a buffer layer with high crystal quality, and further beneficial to obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0044] According to some further specific embodiments of the present invention, the first buffer layer includes a plurality of first sub-buffer layers. Along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase sequentially. Thus, it can be further ensured that the contact angles between the plurality of first sub-buffer layers and water increase sequentially, so that each first sub-buffer layer can more effectively seal the defects on the surface of the silicon carbide substrate, and further ensure more effectively avoiding the diffusion and amplification of defects.

[0045] According to some further specific embodiments of the present invention, along the direction away from the silicon carbide substrate, the doping concentration gradients of the plurality of first sub-buffer layers increase or increase linearly. Thus, it can be further ensured that the contact angle gradients between the plurality of first sub-buffer layers and water increase or increase linearly. This gradient or linear change enables each first sub-buffer layer to more effectively seal the defects on the surface of the silicon carbide substrate. The process of increasing the contact angle in a gradient or linear manner can repair and seal the defects layer by layer, rather than changing the surface energy significantly at one time, thereby more effectively avoiding the diffusion and amplification of defects.

[0046] According to some further specific embodiments of the present invention, the second buffer layer includes a plurality of second sub-buffer layers. Along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease sequentially. Thus, it can be further ensured that the contact angles between the plurality of second sub-buffer layers and water decrease sequentially, so as to further ensure the uniform adsorption of gas-phase precursor molecules on its surface, further ensure the stability of the chemical vapor deposition (CVD) process, and thus further contribute to ensuring the high-quality growth of the epitaxial layer and reducing defects and non-uniformities during the growth process.

[0047] According to some further specific embodiments of the present invention, the doping concentration gradients of the multiple second sub-buffer layers decrease gradually or linearly. Thereby, it can be further ensured that the contact angle gradients of the multiple second sub-buffer layers with water decrease gradually or linearly, so that the uniform adsorption of gas-phase precursor molecules on their surfaces can be further ensured, further guaranteeing the stability of the chemical vapor deposition (CVD) process and thus further contributing to ensuring the high-quality growth of the epitaxial layer and reducing defects and non-uniformities during the growth process.

[0048] According to some further specific embodiments of the present invention, the thickness of the first buffer layer is 0.14 μm to 3.2 μm, for example, it can be 0.14 μm, 0.2 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.2 μm, etc. Thereby, it can be further beneficial to fully suppress the evolution of silicon carbide substrate defects into epitaxial defects, ultimately ensuring the test yield of the device.

[0049] According to some further specific embodiments of the present invention, the thickness of the second buffer layer is 0.14 μm to 3.2 μm, for example, it can be 0.14 μm, 0.2 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.2 μm, etc. Thereby, it can be further beneficial to ensure the continuous and stable progress of the chemical vapor deposition process of the silicon carbide epitaxial layer and is conducive to obtaining a silicon carbide epitaxial layer with high crystal quality.

[0050] According to some further specific embodiments of the present invention, the total thickness of the buffer layer is 0.28 μm to 6.4 μm, for example, it can be 0.28 μm, 0.4 μm, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, 5 μm, 5.5 μm, 6 μm, 6.4 μm, etc. Thereby, it can be further ensured the crystal quality of the silicon carbide buffer layer, and thus further ensured the crystal quality of the silicon carbide epitaxial wafer.

[0051] According to some further specific embodiments of the present invention, the thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm, for example, it can be 5 μm, 7 μm, 10 μm, 12 μm, 15 μm, 18 μm, 20 μm, etc. Thereby, it can be further ensured the crystal quality of the silicon carbide epitaxial wafer.

[0052] According to some further specific embodiments of the present invention, the doping concentration of the silicon carbide epitaxial layer can be 4E14 cm -3 ~1E17cm -3 。

[0053] The silicon carbide substrate used in the present invention can be a single-crystal silicon carbide substrate or a composite silicon carbide substrate (for example, composed of a polycrystalline layer with a thickness of 350 μm and a single-crystal layer with a thickness of about 1 μm).

[0054] A second aspect of the present invention provides a method for preparing the silicon carbide epitaxial wafer of the above embodiments. According to an embodiment of the present invention, the method includes: S100: forming a first buffer layer on one side surface of the silicon carbide substrate; According to some specific embodiments of the present invention, before forming the first buffer layer on one side surface of the silicon carbide substrate, the method further includes: Etching one side surface of the silicon carbide substrate to remove the surface damage layer, so as to provide a flatter and purer surface for subsequent epitaxial growth; meanwhile, the etching can adjust the microscopic morphology of the silicon carbide substrate surface to make it more conducive to the growth of the epitaxial layer; in addition, the defects on the silicon carbide substrate surface will be replicated and amplified during the epitaxial growth process, thus affecting the performance of the epitaxial layer, and the etching can reduce the defect density on the silicon carbide substrate surface and reduce the influence of these defects on the epitaxial layer.

[0055] As some specific embodiments, the etching conditions include at least one of the following conditions: a) the etching temperature is 1500 o °C - 1600 o °C (for example, it can be 1500 o °C, 1520 o °C, 1540 o °C, 1560 o °C, 1580 o °C, 1600 o °C, etc.), b) the etching time is 5 min - 10 min (for example, it can be 5 min, 6 min, 7 min, 8 min, 9 min, 10 min, etc.), c) the hydrogen flow rate is 80 slm - 200 slm (for example, it can be 80 slm, 100 slm, 120 slm, 140 slm, 160 slm, 180 slm, 200 slm, etc.), d) the reaction pressure is 100 mbar - 150 mbar (for example, it can be 100 mbar, 110 mbar, 120 mbar, 130 mbar, 140 mbar, 150 mbar, etc.). Thus, the etching effect can be further ensured, and at the same time, it is further ensured that the contact angle θ1 between the surface of the etched silicon carbide substrate and water satisfies 20° ≤ θ1 ≤ 30°.

[0056] According to some further specific embodiments of the present invention, when forming the first buffer layer, the reaction pressure is 70 mbar - 90 mbar (for example, it can be 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.), the central doping source flow rate is 300 sccm - 400 sccm (for example, it can be 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.), the carbon source flow rate is 10 sccm - 15 sccm (for example, it can be 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.), the silicon source flow rate is 50 sccm - 70 sccm (for example, it can be 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.), and the temperature is 1600 o °C - 1700 o °C (for example, it can be 1600 o °C, 1620 o °C, 1640 o °C, 1660 o °C, 1680 o °C, 1700 o °C, etc.), and the reaction time is 1 min - 5 min (for example, it can be 1 min, 2 min, 3 min, 4 min, 5 min, etc.). Thus, it can be ensured that the contact angle θ2 between the formed first buffer layer and water satisfies 35° ≤ θ2 ≤ 60°.

[0057] According to some further specific embodiments of the present invention, when forming the first buffer layer, the reaction pressure is stepped or linearly decreased from 100 mbar - 150 mbar (e.g., it can be 100 mbar, 110 mbar, 120 mbar, 130 mbar, 140 mbar, 150 mbar, etc.) to 70 mbar - 90 mbar (e.g., it can be 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.), the central doping source flow rate is stepped or linearly increased from 50 sccm - 100 sccm (e.g., it can be 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm, 100 sccm, etc.) to 300 sccm - 400 sccm (e.g., it can be 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.), the carbon source flow rate is stepped or linearly decreased from 15 sccm - 30 sccm (e.g., it can be 15 sccm, 17 sccm, 20 sccm, 22 sccm, 25 sccm, 28 sccm, 30 sccm, etc.) to 10 sccm - 15 sccm (e.g., it can be 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.), the silicon source flow rate is stepped or linearly increased from 10 sccm - 15 sccm (e.g., it can be 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.) to 50 sccm - 70 sccm (e.g., it can be 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.), and the temperature is from 1450 o C - 1550 o C (e.g., it can be 1450 o C, 1470 o C, 1500 o C, 1520 o C, 1550 o C, etc.) and is stepped or linearly increased to 1600 o C - 1700 o C (e.g., it can be 1600 o C, 1620 o C, 1640 o C, 1660 o C, 1680 o C, 1700 oC, etc.), the reaction time is 1 min - 5 min (for example, it can be 1 min, 2 min, 3 min, 4 min, 5 min, etc.). Thus, it can be ensured that the contact angle θ2 between the formed first buffer layer and water satisfies 35° ≤ θ2 ≤ 60°. At the same time, it can be ensured that the formed first buffer layer includes a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angle gradient between the plurality of first sub-buffer layers and water increases incrementally or linearly.

[0058] S200: Form a second buffer layer on the surface of the first buffer layer away from the silicon carbide substrate; In this step, a second buffer layer is formed on the surface of the first buffer layer away from the silicon carbide substrate, and the first buffer layer and the second buffer layer together form a buffer layer.

[0059] According to some further specific embodiments of the present invention, when forming the second buffer layer, the reaction pressure is stepped, linearly or directly increased from 70 mbar - 90 mbar (such as 70 mbar, 75 mbar, 80 mbar, 85 mbar, 90 mbar, etc.) to 110 mbar - 170 mbar (such as 110 sccm, 120 mbar, 130 mbar, 140 mbar, 150 mbar, 160 mbar, 170 mbar, etc.), the central doping source flow rate is stepped, linearly or directly decreased from 300 sccm - 400 sccm (such as 300 sccm, 320 sccm, 340 sccm, 360 sccm, 380 sccm, 400 sccm, etc.) to 40 sccm - 105 sccm (such as 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm, 100 sccm, 105 sccm, etc.), the carbon source flow rate is stepped, linearly or directly increased from 10 sccm - 15 sccm (such as 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, etc.) to 25 sccm - 40 sccm (such as 25 sccm, 30 sccm, 32 sccm, 34 sccm, 36 sccm, 38 sccm, 40 sccm, etc.), the silicon source flow rate is stepped, linearly or directly decreased from 50 sccm - 70 sccm (such as 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, etc.) to 20 sccm - 50 sccm (such as 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm, 50 sccm, etc.), and the temperature is from 1600 o °C - 1700 o °C (such as 1600 o °C, 1620 o °C, 1640 o °C, 1660 o °C, 1680 o °C, 1700 o °C, etc.) and is stepped, linearly or directly decreased to 1450 o °C - 1600 o °C (such as 1450 o °C, 1500 o °C, 1550 o °C, 1600 oC, etc.), and the reaction time is 1 min - 5 min (for example, it can be 1 min, 2 min, 3 min, 4 min, 5 min, etc.). Thus, it can be ensured that the contact angle θ3 between the formed second buffer layer and water satisfies 0° < θ3 ≤ 30°, so as to satisfy θ1 < θ2 and θ2 > θ3. At the same time, it can be ensured that the formed second buffer layer includes a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angle gradient between the plurality of second sub-buffer layers and water increases incrementally or linearly.

[0060] In the embodiments of the present invention, the specific type of the above doping source is not particularly limited. If it is an N-type silicon carbide epitaxial wafer, the doping element can be nitrogen, and the doping source can be nitrogen gas, ammonia gas, etc.; if it is a P-type silicon carbide epitaxial wafer, the doping element can be aluminum element or boron element, etc., and the doping source can be trimethylaluminum, etc.

[0061] In the embodiments of the present invention, the specific type of the above carbon source is not particularly limited. As some specific embodiments, the carbon source includes at least one of ethylene, methane, and propane.

[0062] In the embodiments of the present invention, the specific type of the above silicon source is not particularly limited. As some specific embodiments, the silicon source includes at least one of trichlorosilane, silane, and dichlorosilane.

[0063] S300: Form a silicon carbide epitaxial layer on the surface of the second buffer layer away from the silicon carbide substrate; According to some further specific embodiments of the present invention, during the process of forming the silicon carbide epitaxial layer, the flow rate of the carbon source is controlled to be 150 sccm - 300 sccm (for example, it can be 150 sccm, 170 sccm, 200 sccm, 220 sccm, 250 sccm, 270 sccm, 300 sccm, etc.), the flow rate of the silicon source is 350 sccm - 600 sccm (for example, it can be 350 sccm, 400 sccm, 450 sccm, 500 sccm, 550 sccm, 600 sccm, etc.), and the duration is 5 min - 30 min (for example, it can be 5 min, 7 min, 9 min, 10 min, 12 min, 15 min, 20 min, 25 min, 30 min, etc.). Thus, it can be further ensured to form a silicon carbide epitaxial layer with high crystal quality.

[0064] The method for preparing a silicon carbide epitaxial wafer according to the above embodiments of the present invention, by precisely controlling the distribution of the contact angle of the buffer layer, that is, the contact angle θ1 between the silicon carbide substrate and water is less than the contact angle θ2 between the first buffer layer and water, and the contact angle θ2 between the first buffer layer and water is greater than the contact angle θ3 between the second buffer layer and water, is beneficial to obtaining a buffer layer with high crystal quality, and further beneficial to obtaining a silicon carbide epitaxial wafer with low defect density and high crystal quality.

[0065] The third aspect of the present invention proposes a power device. According to the embodiments of the present invention, the power device includes the silicon carbide epitaxial wafer of the first aspect or the silicon carbide epitaxial wafer prepared by the method of the second aspect. Thus, it is beneficial to improve the yield of the power device. It should be noted that the features and advantages described above for the silicon carbide epitaxial wafer also apply to the power device, and will not be elaborated here.

[0066] Specifically, the silicon carbide epitaxial wafer of the present invention can be used in various power devices, such as metal oxide semiconductor field effect transistor MOSFET, Schottky barrier diode SBD, insulated gate bipolar transistor IGBT, bipolar junction transistor BJT, etc.

[0067] The embodiments of the present invention will be described in detail below. It should be noted that the embodiments described below are exemplary and are only used to explain the present invention and should not be construed as a limitation of the present invention. Additionally, if not explicitly stated, all reagents used in the following embodiments are commercially available or can be synthesized according to the methods described herein or known methods, and the reaction conditions not listed are also easily obtained by those skilled in the art.

[0068] Example 1 This embodiment includes the following steps: 1. Place the silicon carbide substrate in an epitaxial device for etching. Set the reaction chamber pressure to 120 mbar, the hydrogen flow rate to 180 slm, and raise the temperature from 900 o °C to 1500 o °C within 20 min; etch for 5 min at 1500 o °C.

[0069] 2. Use chemical vapor deposition to grow the buffer layer.

[0070] (1) Set the reaction pressure to 100 mbar, the central nitrogen flow rate to 100 sccm, the ethylene flow rate to 15 sccm, the silicon source flow rate to 15 sccm, and the temperature to 1550 o °C, and hold for 2 min to form the first first sub-buffer layer.

[0071] (2) Set the reaction pressure to 95 mbar, the central nitrogen flow rate to 200 sccm, the ethylene flow rate to 20 sccm, the silicon source flow rate to 20 sccm, and the temperature to 1600 o °C, and hold for 1 min to form the second first sub-buffer layer.

[0072] (3) Set the reaction pressure to 70 mbar, the central nitrogen flow rate to 400 sccm, the ethylene flow rate to 10 sccm, the silicon source flow rate to 70 sccm, and the temperature to 1700 o °C, and hold for 3 min to form the third first sub-buffer layer. The three first sub-buffer layers together form the first buffer layer.

[0073] (4) Adjust the reaction pressure from 70 mbar to 100 mbar, the central nitrogen flow rate from 400 sccm to 100 sccm, the ethylene flow rate from 10 sccm to 25 sccm, the silicon source flow rate from 70 sccm to 55 sccm, and the temperature from 1700 o °C to 1650 o °C, and hold for 4 min to form the first second sub-buffer layer.

[0074] (5) Set the reaction pressure to 170 mbar, the central nitrogen flow rate to 40 sccm, the ethylene flow rate to 40 sccm, the silicon source flow rate to 20 sccm, and the temperature to 1600 o °C, and hold for 5 min to form the second second sub-buffer layer. The two second sub-buffer layers together form the second buffer layer.

[0075] 3. Use chemical vapor deposition for epitaxial layer growth. Set the ethylene, trichlorosilane, central nitrogen, and edge nitrogen flow rates to 160 sccm, 400 sccm, 200 sccm, and 300 sccm respectively. The gas flow rate in the reaction chamber is adjusted within 1 min. Continue for 10 min for epitaxial layer growth, with a thickness of 10 μm.

[0076] 4. Cool down to 900 o °C and then take out the silicon carbide epitaxial wafer to obtain the epitaxial wafer of this example.

[0077] 5. Fabricate a metal-oxide-semiconductor field-effect transistor (MOSFET) from the silicon carbide epitaxial wafer and then test its yield.

[0078] Example 2 - Example 6 The preparation methods of Example 2 - Example 6 are basically the same as that of Example 1, with the only difference being the buffer layer growth: The number of layers set in the buffer layer process of Example 1 is 5 layers. In the buffer layer processes of Examples 2 - 6, steps (1), (2), and (4) are not included, only steps (3) and (5). The corresponding number of buffer layers is only two layers. The first buffer layer is formed in step (3), and the second buffer layer is formed in step (5). The parameters are shown in Table 1.

[0079] Example 7 The preparation method of this example is basically the same as that of Example 1, with the only difference being: 2. Chemical vapor deposition is used for buffer layer growth.

[0080] (3) The reaction pressure is linearly reduced from 100 mbar to 70 mbar, the central nitrogen flow rate is linearly increased from 100 sccm to 400 sccm, the ethylene flow rate is linearly reduced from 15 sccm to 10 sccm, the silicon source flow rate is linearly increased from 15 sccm to 70 sccm, and the temperature is linearly increased from 1550 o °C to 1700 o °C, and the linear change time is 3 min, and then it is maintained for 3 min.

[0081] (5) The reaction pressure is linearly increased from 70 mbar to 170 mbar, the central nitrogen flow rate is linearly reduced from 400 sccm to 50 sccm, the ethylene flow rate is linearly increased from 10 sccm to 40 sccm, the silicon source flow rate is linearly reduced from 70 sccm to 20 sccm, and the temperature is linearly reduced from 1700 o °C to 1600 o °C, and the linear change time is 4 min, and then it is maintained for 5 min.

[0082] Comparative Example 1 The preparation method of this comparative example is basically the same as that of Example 1, with the only difference being the buffer layer growth: In the buffer layer process of this comparative example, steps (2) - (5) are not included, only step (1). The corresponding number of buffer layers is only one layer. The parameters are shown in Table 1.

[0083] Comparative Example 2 The preparation method of this comparative example is basically the same as that of Example 1, with the only difference being the buffer layer growth: The number of layers set in the buffer layer process of Example 1 is 5 layers. In the buffer layer process of Comparative Example 2, steps (1), (2), and (4) are not included, only steps (3) and (5). The corresponding number of buffer layers is only two layers. The first buffer layer is formed in step (3), and the second buffer layer is formed in step (5). The parameters are shown in Table 1. The difference between this comparative example and Example 1 lies in the parameters in Table 1.

[0084] Table 1

[0085] Test method: In the present invention, SIMS (Secondary Ion Mass Spectrometry) is used to test the thickness and doping concentration of the buffer layer of the silicon carbide epitaxial wafer. In SIMS testing, a high-energy ion beam bombards the surface of the sample, sputtering out atoms or molecules on the sample surface. The sputtered atoms or molecules collide with surrounding atoms or molecules, generating new secondary ions. The secondary ions are introduced into a mass spectrometer, and through the action of a magnetic field and an electric field, the secondary ions are separated and detected according to the mass-to-charge ratio. By analyzing the mass and concentration of the secondary ions, the chemical composition and content at different depths of the sample can be obtained. The step size for this test is 7 nm. The results are shown in Table 1.

[0086] In the present invention, the silicon carbide epitaxial wafer is first polished to a certain thickness using a single-sided polishing machine, and then the contact angle of the silicon carbide wafer is tested according to the GBT30447-2013 standard. Five test points are selected for each wafer and the average value is taken. Then, it is polished by a certain thickness again, and the contact angle is continuously tested until the contact angle of each buffer layer is measured. The results are shown in Table 1.

[0087] In the present invention, the rocking curve test of the silicon carbide epitaxial wafer is carried out according to the GB / T 42676-2023 standard. The scanning axis is Omega, the scanning range is 0.1°, the step size is 0.0005°, 0.1 s for each step, and the single scanning time is 20 s. The results are shown in Table 2.

[0088] Table 2

[0089] As can be seen from Table 1, Table 2 and Figure 3 it can be seen that the doping concentration of the buffer layer in Example 1 first increases in a gradient to the target value as the buffer layer thickness increases and remains at a certain thickness. This is to make the contact angle first increase in a gradient to the target value, corresponding to a decrease in surface energy, which is beneficial to suppressing the evolution of substrate defects into epitaxial defects. Secondly, the doping concentration decreases as the buffer layer thickness increases and remains at a certain thickness. This is beneficial to reducing the contact angle to the target value, corresponding to an increase in surface energy, which is beneficial to the adsorption of gas-phase precursors on the buffer layer surface and the occurrence of chemical reactions, facilitating the stable progress of the chemical vapor deposition process. At the same time, changing other reaction parameters can make the contact angle change as Figure 4 shown. Increasing the temperature, decreasing the pressure, and decreasing the carbon-silicon ratio are all beneficial to making the surface of the wafer rich in silicon, thereby reducing the surface energy and increasing the contact angle; the opposite operations can reduce the contact angle. Therefore, the full width at half maximum of the rocking curve of the prepared silicon carbide epitaxial wafer is 17 s, and the crystal quality is relatively high. After fabricating into MOSFETs, the device yield is as high as 95%.

[0090] As can be seen from Table 1 and Table 2, the number of buffer layers corresponding to Example 2 and Example 3 is only two layers, and only the specific values are different, but they are all within the scope specified by the present invention. As Figure 5 , Figure 6 shown, the doping concentration and the changing trend of the contact angle of the buffer layer in Example 2 are consistent with those in Example 1. The doping concentration first increases and then decreases, and the contact angle of the corresponding buffer layer first increases and then decreases. Therefore, the crystal quality of the corresponding silicon carbide epitaxial wafer is better, and the test yield after manufacturing the MOSFET is higher, which is 93%. As Figure 7 , Figure 8 shown, the doping concentration and the changing trend of the contact angle of the buffer layer in Example 3 are consistent with those in Example 1. The crystal quality of the corresponding silicon carbide epitaxial wafer is better, and the test yield after manufacturing the MOSFET is higher, which is 91%. Compared with Example 3, θ2 in Example 2 is larger, which is beneficial to fully suppressing the extension of substrate defects to the epitaxial layer; θ3 in Example 2 is smaller, which is beneficial to the stable progress of the mass transport process of chemical vapor deposition. Therefore, the device yield in Example 2 is higher.

[0091] As can be seen from Table 1, Table 2 and Figures 9 - 12 , in Example 4 and Example 5, by controlling the nitrogen flow rate and other epitaxial process parameters, the doping concentration n2 of the buffer layer (n2 in Example 4 and Example 5 are 6E19 cm -3 , 9E18 cm -3 ), the contact angle θ2 (θ2 in Example 4 and Example 5 are 61° and 34° respectively), and the buffer layer thickness (Example 4 and Example 5 are 5.1 μm and 0.3 μm respectively) all exceed the preferred range of the present invention (1E19 cm -3 <n2≤5E19 cm -3 , 35°≤θ2≤60°, 0.4 μm≤d≤5 μm). When the contact angle θ2 is too high (Example 4), the step flow growth of the buffer layer is disturbed, the epitaxial defect density increases, and the crystal quality of the epitaxial wafer decreases; when the contact angle θ2 is too low (Example 5), the substrate defects are not fully suppressed and are prone to evolve into epitaxial defects, which also reduces the crystal quality of the epitaxial wafer. The full width at half maximum of the rocking curve of the prepared silicon carbide epitaxial wafer is 25 s and 24 s. Therefore, compared with Example 1 - Example 3, the MOSFET test yields corresponding to Example 4 and Example 5 are relatively low, which are 85% and 86% respectively.

[0092] As can be seen from Table 1, Table 2 and Figures 13 - 14It can be seen that the contact angle θ3 (31°) of the buffer layer in Example 6 exceeds the preferred range of the present invention (0 < θ3 ≤ 30°). Since the contact angle θ3 is relatively high, the step flow growth of the buffer layer is disturbed, increasing the epitaxial defect density. The full width at half maximum of the rocking curve of the prepared silicon carbide epitaxial wafer is 23 s, reducing the crystal quality of the epitaxial wafer. Therefore, compared with Examples 1-3, the test yield of the MOSFET corresponding to Example 6 is relatively low, at 87%.

[0093] As can be seen from Table 1, Table 2 and Figures 15 - 16 it can be seen that, compared with Example 1, the device yield of the epitaxial wafer prepared in Example 7 is relatively high. This is because the contact angle between the buffer layers changes in a gradient in Example 1, while the contact angle between the buffer layers changes linearly in Example 7 (as Figure 16 ). Since the increase in the number of sub-buffer layers is beneficial to promoting the reduction of the surface energy of the first buffer layer, thereby more effectively suppressing the extension of substrate surface defects; at the same time, the increase in the number of sub-buffer layers is beneficial to promoting the gradual increase of the surface energy of the second buffer layer, thereby promoting the more stable progress of the chemical vapor deposition process. The linear change of the contact occurrence angle is equivalent to having countless sub-buffer layers. Therefore, the quality of the silicon carbide buffer layer prepared in Example 7 is higher, and then the crystal quality of the silicon carbide epitaxial layer is higher, which increases the device yield.

[0094] As can be seen from Table 1 and Table 2 and Figures 17 - 18 it can be seen that the doping concentration and contact angle of the buffer layer in Comparative Example 1 did not change, that is, the buffer layer is one layer. The contact angle of this comparative example did not increase first, which led to the easy extension of substrate defects to the epitaxial layer, increasing the defect density of the epitaxial wafer. The full width at half maximum of the rocking curve of the prepared silicon carbide epitaxial wafer is 35 s, and the crystal quality is poor, resulting in a relatively low MOSFET test yield, only 80%. Therefore, designing a special change in the contact angle of the buffer layer is crucial for improving the crystal quality of the buffer layer, thereby reducing the epitaxial defect density and improving the device yield.

[0095] As can be seen from Table 1 and Table 2, Comparative Example 2 does not satisfy θ1 < θ2, and θ2 > θ 3。 When growing the first sub-buffer layer, the contact angle is small, and the surface energy corresponding to the wafer surface is large, which exacerbates the extension and expansion of substrate defects; when growing the second sub-buffer layer, the surface energy corresponding to the wafer is small, which is not conducive to the stable progress of the epitaxial process, and ultimately leads to a reduction in the crystal quality of the prepared silicon carbide epitaxial wafer. The full width at half maximum of the test rocking curve is as high as 40 s. Therefore, after preparing the MOSFET, the test yield is also relatively low, as low as 70%.

[0096] In the description of this specification, the description referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0097] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A silicon carbide epitaxial wafer, characterized in that, Comprising: A silicon carbide substrate; A buffer layer, the buffer layer including a first buffer layer and a second buffer layer, the first buffer layer being disposed on one surface of the silicon carbide substrate, and the second buffer layer being disposed on a surface of the first buffer layer away from the silicon carbide substrate; A silicon carbide epitaxial layer, the silicon carbide epitaxial layer being disposed on a surface of the second buffer layer away from the silicon carbide substrate; Wherein, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

2. The silicon carbide epitaxial wafer according to claim 1, characterized in that, Satisfying 20° ≤ θ1 ≤ 30°, 30° < θ2 ≤ 63°, 0° < θ3 ≤ 33°; Or, satisfying 20° ≤ θ1 ≤ 30°, 31° ≤ θ2 ≤ 60°, 0° < θ3 ≤ 30°.

3. The silicon carbide epitaxial wafer according to claim 1, wherein The first buffer layer includes a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase sequentially.

4. The silicon carbide epitaxial wafer according to claim 3, wherein, Along the direction away from the silicon carbide substrate, the contact angles between the plurality of first sub-buffer layers and water increase gradientually or linearly.

5. The silicon carbide epitaxial wafer according to claim 1, wherein The second buffer layer includes a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease sequentially.

6. The silicon carbide epitaxial wafer according to claim 5, wherein, Along the direction away from the silicon carbide substrate, the contact angles between the plurality of second sub-buffer layers and water decrease gradientually or linearly.

7. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that, Both the silicon carbide substrate and the buffer layer include doping elements, the doping concentration of the silicon carbide substrate is n1, the doping concentration of the first buffer layer is n2, and the doping concentration of the second buffer layer is n3, satisfying n1 < n2 and n2 > n3.

8. The silicon carbide epitaxial wafer according to claim 7, wherein Meet 1E16 cm -3 ≤n1≤2E18 cm -3 ,2E18 cm -3 <n2≤6E19 cm -3 ,1E16 cm -3 ≤n3≤2E18 cm -3 。 9. The silicon carbide epitaxial wafer according to claim 7, wherein, The first buffer layer includes a plurality of first sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase sequentially; And / or, the second buffer layer includes a plurality of second sub-buffer layers, and along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease sequentially.

10. The silicon carbide epitaxial wafer according to claim 9, characterized in that, Along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of first sub-buffer layers increase gradientually or linearly; And / or, along the direction away from the silicon carbide substrate, the doping concentrations of the plurality of second sub-buffer layers decrease gradientually or linearly.

11. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that, The thickness of the first buffer layer is 0.14 μm to 3.2 μm; And / or, the thickness of the second buffer layer is 0.14 μm to 3.2 μm; And / or, the total thickness of the buffer layer is 0.28 μm to 6.4 μm.

12. The silicon carbide epitaxial wafer according to any one of claims 1 to 6, characterized in that, The thickness of the silicon carbide epitaxial layer is 5 μm to 20 μm.

13. A method for preparing a silicon carbide epitaxial wafer according to any one of claims 1 to 12, characterized in that, Comprising: Forming a first buffer layer on one surface of the silicon carbide substrate; Forming a second buffer layer on a surface of the first buffer layer away from the silicon carbide substrate, and the first buffer layer and the second buffer layer together form a buffer layer; Forming a silicon carbide epitaxial layer on a surface of the second buffer layer away from the silicon carbide substrate; Wherein, the contact angle between the silicon carbide substrate and water is θ1, the contact angle between the first buffer layer and water is θ2, and the contact angle between the second buffer layer and water is θ3, satisfying θ1 < θ2 and θ2 > θ3.

14. The method according to claim 13, characterized in that, Before forming the first buffer layer on one side surface of the silicon carbide substrate, the method further includes: Etching one side surface of the silicon carbide substrate, and the etching conditions include at least one of the following conditions: a) The etching temperature is 1500 o C - 1600 o °C, b) The etching time is 5 min - 10 min, c) The hydrogen flow rate is 80 slm - 200 slm, d) The reaction pressure is 100 mbar - 150 mbar.

15. The method according to claim 13, characterized in that, When forming the first buffer layer, the reaction pressure is 70 mbar - 90 mbar, the central doping source flow rate is 300 sccm - 400 sccm, the carbon source flow rate is 10 sccm - 15 sccm, the silicon source flow rate is 50 sccm - 70 sccm, the temperature is 1600 o C - 1700 o C, and the reaction time is 1 min - 5 min; Alternatively, when forming the first buffer layer, the reaction pressure is stepped or linearly decreased from 100 mbar - 150 mbar to 70 mbar - 90 mbar, the central doping source flow rate is stepped or linearly increased from 50 sccm - 100 sccm to 300 sccm - 400 sccm, the carbon source flow rate is stepped or linearly decreased from 15 sccm - 30 sccm to 10 sccm - 15 sccm, the silicon source flow rate is stepped or linearly increased from 10 sccm - 15 sccm to 50 sccm - 70 sccm, and the temperature is stepped or linearly increased from 1450 o °C - 1550 o °C to 1600 o °C - 1700 o °C, and the reaction time is 1 min - 5 min.

16. The method according to claim 15, wherein When forming the second buffer layer, the reaction pressure is stepped, linearly increased, or directly increased from 70 mbar to 90 mbar to 110 mbar to 170 mbar, the central doping source flow rate is stepped, linearly decreased, or directly decreased from 300 sccm to 400 sccm to 40 sccm to 105 sccm, the carbon source flow rate is stepped, linearly increased, or directly increased from 10 sccm to 15 sccm to 25 sccm to 40 sccm, the silicon source flow rate is stepped, linearly decreased, or directly decreased from 50 sccm to 70 sccm to 20 sccm to 50 sccm, and the temperature is stepped, linearly decreased, or directly decreased from 1600 o °C to 1700 o °C to 1450 °C to 1600 °C, and the reaction time is 1 min to 5 min.

17. The method according to claim 16, wherein The doping source includes one of nitrogen, ammonia, and trimethylaluminum; And / or, the carbon source includes at least one of ethylene, methane, and propane; And / or, the silicon source includes at least one of trichlorosilane, silane, and dichlorosilane.

18. The method according to any one of claims 13 to 17, characterized in that During the formation of the silicon carbide epitaxial layer, control the flow rate of the carbon source to be 150 sccm - 300 sccm, the flow rate of the silicon source to be 350 sccm - 600 sccm, and the duration to be 5 min - 30 min.

19. A power device, characterized in that, Including the silicon carbide epitaxial wafer described in any one of claims 1 to 12 or the silicon carbide epitaxial wafer prepared by the method described in any one of claims 13 to 18.

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