Ultrasonic radar semiconductor chip pin design method

Abstract

The invention discloses an ultrasonic radar semiconductor chip pin design method, which comprises the following steps that a sensor with a 3PIN structure is adopted, and PIN1, PIN2 and PIN3 are respectively defined as a power supply positive bus interface, a power supply negative bus interface and a DSI3 bus interface according to any sequence; the connection combination of the three PINs is configured, and the polarity of a power supply and a bus interface are identified by combining an internal detection circuit, so that a unique ID is automatically generated after each sensor is electrified; the connection combination comprises six permutation combinations of a power supply positive, a power supply negative and a DSI3 bus, and the six permutation combinations correspond to six unique IDs. Based on a 3PIN sensor structure, automatic identification and positioning of a sensor ID are realized through a flexible pin connection method.

Description

Technical Field

[0001] The present invention relates to the technical field of ultrasonic radar systems, and particularly to a method for designing pins of an ultrasonic radar semiconductor chip. Background Art

[0002] The early ultrasonic radar systems generally had the following architecture (taking a system with 12 ultrasonic sensors as an example):

[0003] As Figure 1 shown, the communication between the controller and the sensors is point-to-point communication, that is, 1 sensor is connected to 1 controller through 1 wire to achieve communication control.

[0004] With the development of technology and the improvement of requirements, the amount of data transmitted by the new ultrasonic radar systems has increased significantly. Many solutions use bus schemes such as DSI3 and PSI5 to achieve communication between the controller and the sensors. There are mainly two structures for such bus methods:

[0005] Structure 1:

[0006] If the previous point-to-point communication is still used, then each sensor communicates with the controller through 1 bus (such as DSI3, PSI5, etc.). For a system with 12 sensors, 12 buses are required to connect to the controller. And all bus communications require a Master chip at the controller end. If each Master has 2-channel bus communication, a 12-sensor ultrasonic radar system requires 6 Masters, and the cost of each Master is quite high, which will result in a high cost of the ultrasonic radar system.

[0007] To save the number of Masters (main control chips) and reduce the system cost, generally, multiple sensors are connected in parallel on the bus. For example, if 6 sensors are connected in parallel on 1 bus and 1 Master has 2-channel bus, then the entire 12-sensor radar system only requires 1 Master, and the system cost is greatly reduced. However, when 6 identical sensors are connected in parallel on the bus, since their IDs are the same and the data on the bus is broadcast, it is impossible to realize which sensor the data on the bus is sent to and which sensor needs to respond to the bus instruction, etc. To solve this problem, generally, 6 power supplies are used to control 6 sensors respectively. When powering on, the corresponding sensor power is turned on respectively and its ID is configured. After the configuration is completed, the next sensor power is turned on and its ID is configured, and so on to complete the configuration of all sensor IDs. Once all sensor IDs are configured, the controller can realize which sensor to send instructions to on the bus and which sensor needs to respond to the controller instruction, etc.

[0008] Of course, the above is the case where one Master comes with a 2-channel bus and 6 sensors are connected to each bus. If 3 sensors are connected to one bus, then a total of 2 Masters and 3 controller power supplies are required, and so on. The principle is the same. Please refer to Figure 2 and Figure 3 as shown

[0009] The above structure is a commonly used solution at present. Although the number of Masters is reduced, the ID control power supply circuit is increased, such as Figure 2 SW1~SW6 shown, which has some deficiencies

[0010] Structure Two:

[0011] The sensors in Structure One only require a 3-PIN structure. If a 4-PIN structure is used, the following daisy-chain structure can be adopted:

[0012] As Figure 4 shown, each sensor is cascaded. One Master chip comes with two DSI3 buses, and 6 or more sensors are cascaded to each bus. The advantage of this structure is that the SW1~SW6 power supply circuit is not required, and each sensor locates its ID by cascading. For example, the first sensor is defaulted to ID1, the second sensor is defaulted to ID2, and so on. The disadvantage is that due to cascading, when one sensor fails, the subsequent sensors cannot work properly, and it is impossible to accurately know whether the subsequent sensors are faulty, that is, the fault location cannot be accurately located, and only the position of the first faulty sensor is known.

[0013] In summary, both of the above two conventional ultrasonic radar system structures have their own deficiencies. Structure One requires a power supply circuit for positioning, increasing the cost. In Structure Two, when one sensor fails, the subsequent sensors cannot work properly and it is impossible to accurately locate whether the subsequent sensors are faulty. To solve the above two deficiencies, the present invention is thus provided. Summary of the Invention

[0014] In view of this, to solve the above technical problems, the object of the present invention is to propose a method for designing the pins of an ultrasonic radar semiconductor chip, which can solve the problems of high cost and inaccurate fault location caused by the dependence of sensor ID configuration on an additional power supply circuit or a daisy-chain structure in the prior art.

[0015] The technical solution adopted is as follows:

[0016] A method for designing the pins of an ultrasonic radar semiconductor chip, which includes the following steps:

[0017] Adopt a sensor with a 3-PIN structure, where PIN1, PIN2, and PIN3 are respectively defined as the positive power supply, negative power supply, and DSI3 bus interface in any order;

[0018] By configuring the connection combinations of the three PINs and combining with the internal detection circuit to identify the power supply polarity and the bus interface, a unique ID is automatically generated for each sensor after power-on.

[0019] The connection combinations include six permutations of the positive power supply, negative power supply, and the DSI3 bus, corresponding to six unique IDs.

[0020] Further, the internal detection circuit includes diodes, switches, and an analog-to-digital conversion module, which is used to dynamically allocate the power supply polarity and bind the bus interface.

[0021] Further, the connection combinations include any one of the following:

[0022] PIN1 is connected to the positive power supply, PIN2 is connected to the negative power supply, and PIN3 is the DSI3 bus;

[0023] PIN1 is connected to the positive power supply, PIN2 is the DSI3 bus, and PIN3 is connected to the negative power supply;

[0024] PIN1 is connected to the negative power supply, PIN2 is connected to the positive power supply, and PIN3 is the DSI3 bus;

[0025] PIN1 is connected to the negative power supply, PIN2 is the DSI3 bus, and PIN3 is connected to the positive power supply;

[0026] PIN1 is the DSI3 bus, PIN2 is connected to the positive power supply, and PIN3 is connected to the negative power supply;

[0027] PIN1 is the DSI3 bus, PIN2 is connected to the negative power supply, and PIN3 is connected to the positive power supply.

[0028] Further, the internal detection circuit is integrated in an application-specific integrated circuit (ASIC).

[0029] The beneficial effects of the present invention are as follows:

[0030] The present invention realizes the self-positioning of sensors through flexible pin connection methods, without the need for additional power supply circuits or cascade structures, while taking into account both cost and reliability, solving the problems of high cost and difficult fault location caused by power supply circuits or cascade structures in the prior art, and realizing the automatic identification and positioning of low-cost and high-reliability sensor IDs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic structural diagram of point-to-point communication between the controller and the sensor.

[0032] Figure 2 It is a schematic structural diagram of a Master with a 2-channel bus and six sensors connected to each bus.

[0033] Figure 3It is a schematic structural diagram of 2 Masters and 3-way controller power supplies.

[0034] Figure 4 For each sensor is cascaded, a schematic structural diagram of a daisy chain with two DSI3 buses built into one Master chip.

[0035] Figure 5 This invention can achieve a circuit schematic diagram for any access of PIN1, PIN2, and PIN3. Specific embodiments

[0036] The present invention will be described in detail below through specific embodiments, but the uses and purposes of these exemplary embodiments are only used to illustrate the present invention and do not constitute any form of limitation to the actual protection scope of the present invention, nor is the protection scope of the present invention limited thereto.

[0037] A method for designing pins of an ultrasonic radar semiconductor chip according to the present invention includes the following steps:

[0038] Adopt a sensor with a 3PIN structure, where PIN1, PIN2, and PIN3 are respectively defined as positive power supply, negative power supply, and DSI3 bus interface in any order;

[0039] By configuring the connection combinations of the three PINs and combining with an internal detection circuit to identify the power supply polarity and bus interface, each sensor automatically generates a unique ID after being powered on;

[0040] The connection combinations include six permutations and combinations of positive power supply, negative power supply, and DSI3 bus, corresponding to six unique IDs.

[0041] As a specific embodiment, the internal detection circuit includes a diode, a switch, and an analog-to-digital conversion module, which is used to dynamically allocate the power supply polarity and bind the bus interface.

[0042] As a specific embodiment, the connection combinations include any one of the following:

[0043] PIN1 is connected to the positive power supply, PIN2 is connected to the negative power supply, and PIN3 is the DSI3 bus;

[0044] PIN1 is connected to the positive power supply, PIN2 is the DSI3 bus, and PIN3 is connected to the negative power supply;

[0045] PIN1 is connected to the negative power supply, PIN2 is connected to the positive power supply, and PIN3 is the DSI3 bus;

[0046] PIN1 is connected to the negative power supply, PIN2 is the DSI3 bus, and PIN3 is connected to the positive power supply;

[0047] PIN1 is the DSI3 bus, PIN2 is connected to the positive power supply, and PIN3 is connected to the negative power supply;

[0048] PIN1 is the DSI3 bus, PIN2 is connected to the negative power supply, and PIN3 is connected to the positive power supply.

[0049] As a specific implementation, the internal detection circuit is integrated in an application-specific integrated circuit (ASIC).

[0050] Specifically, for the present invention:

[0051] 1. Use a 3PIN sensor with Structure 2;

[0052] 2. The positive power supply, negative power supply, and DSI3 can be connected from any PIN;

[0053] 3. Each PIN has an internal ID positioning function;

[0054] 4. From the above three points, theoretically there can be up to 6 ID definitions, as shown in Table 1 below:

[0055] Table 1

[0056] PIN1 PIN2 PIN3 Remarks + － DSI3 ID1 － + DSI3 ID2 + DSI3 － ID3 － DSI3 + ID4 DSI3 + － ID5 DSI3 － + ID6

[0057] The circuit principle that allows any connection of PIN1, PIN2, and PIN3 is as Figure 5 shown.

[0058] Switches K1, K2, and K3 are default closed. In this way, no matter which PIN is connected to the power supply, it can ensure normal power supply to the chip. After the chip works properly, it judges which of PIN1, PIN2, and PIN3 is the positive power supply and negative power supply through the AD1, AD2, and AD3 detection circuits. When the PINs of the positive power supply and negative power supply are identified, the third PIN is the DSI3 port. At this time, K4 closes the switch to the corresponding PIN.

[0059] Suppose PIN1 is connected to the positive power supply and PIN2 is connected to the power supply. The current direction is: PIN1 → D1 → VCC → ASICGND → D4 → PIN2. At this time, PIN3 is DSI3, K4 closes to PIN3, and K3 opens. This sensor can be defined as ID1;

[0060] Similarly, suppose PIN2 is connected to the positive power supply and PIN1 is connected to the negative power supply. The current direction is: PIN2 → D3 → VCC → ASICGND → D2 → PIN1. At this time, PIN3 is DSI3, K4 closes to PIN3, and K3 opens. This sensor can be defined as ID2;

[0061] Similarly, if PIN3 is connected to the positive power supply and PIN1 is connected to the negative power supply, the current direction is: PIN3 → D5 → VCC → ASICGND → D2 → PIN1. At this time, PIN2 is DSI3, K4 is closed to PIN2, and K2 is opened. This sensor can be defined as ID3;

[0062] And so on, any connection method of PIN1, PIN2, and PIN3 can be achieved, so as to realize the ID positioning method of hanging up to 6 sensors on a bus defined by the 3PIN sensor terminal, and solve the deficiencies of the original Structure 1 and Structure 2.

[0063] The above approach is to do design and development according to the requirements of the ASIC.

[0064] The pin design method of the ultrasonic radar semiconductor chip of the present invention is based on the 3PIN sensor structure, and realizes the automatic identification and positioning of the sensor ID through the flexible configuration of the pin connection method. The specific working process is as follows:

[0065] 1. Sensor hardware initialization

[0066] Power supply and bus access:

[0067] The sensor is connected to the system through a 3PIN interface. The three pins (PIN1, PIN2, PIN3) can be arbitrarily defined as the positive power supply (VCC), the negative power supply (GND), or the DSI3 bus interface. For example:

[0068] PIN1: Positive power supply, PIN2: Negative power supply, PIN3: DSI3 bus;

[0069] PIN1: DSI3 bus, PIN2: Positive power supply, PIN3: Negative power supply.

[0070] Internal circuit configuration:

[0071] The sensor internally includes diodes (D1 - D6), switches (K1 - K4), and an analog - to - digital detection module (AD1 - AD3).

[0072] Diodes: Ensure the correct current direction and avoid incorrect power supply polarity.

[0073] Switches (K1 - K4): K1 - K3 are default closed, and K4 is default open, used to dynamically configure the pin functions (for example, closing K4 connects the DSI3 bus to the specified PIN).

[0074] Analog - to - digital detection module: Detect the voltage status of each pin and determine its function (positive power supply, negative power supply, or bus).

[0075] 2. ID detection and function assignment

[0076] Power supply polarity identification:

[0077] After the sensor is powered on, the current flows through the diode to the ASIC chip:

[0078] If PIN1 is connected to the positive power supply, the current path is: PIN1 → D1 → VCC → ASIC → GND → D4 → PIN2 (if PIN2 is the negative power supply).

[0079] If PIN2 is connected to the positive power supply, the current path is: PIN2 → D3 → VCC → ASIC → GND → D2 → PIN1 (if PIN1 is the negative power supply).

[0080] Bus interface binding:

[0081] After the power supply polarity is identified, the PINs with the remaining unassigned power supply functions are automatically bound to the DSI3 bus interface. For example:

[0082] If PIN1 is the positive power supply and PIN2 is the negative power supply, PIN3 is bound to the DSI3 bus (close K4 to PIN3).

[0083] If PIN3 is the positive power supply and PIN1 is the negative power supply, PIN2 is bound to the DSI3 bus (close K4 to PIN2).

[0084] ID generation and feedback:

[0085] The controller broadcasts the initialization instruction through the bus. Each sensor generates a unique ID according to the connection combination (for example, 6 combinations correspond to ID1 - ID6), and feeds it back to the controller through the bus.

[0086] 3. Controller communication and instruction execution

[0087] Address mapping:

[0088] The controller establishes a sensor address table based on the received ID, such as Table 2:

[0089] Table 2

[0090] Sensor position ID Connection combination (PIN1 - PIN3) Left front radar ID1 Positive, negative, DSI3 Right front radar ID2 Positive, DSI3, negative

[0091] Target instruction transmission:

[0092] The controller sends an instruction (such as triggering an ultrasonic signal) to the sensor with a specific ID through the bus. The target sensor responds to the instruction, and other sensors remain silent.

[0093] 4. Fault diagnosis and system expansion

[0094] Fault location:

[0095] If a certain sensor fails to respond, the controller directly reads its ID to accurately locate the fault position (such as "ID3 sensor failure") without the need for cascaded troubleshooting.

[0096] Hot plug support:

[0097] After a new sensor is connected, power-on automatically completes ID recognition and registration to the controller, enabling plug-and-play.

[0098] 5. ASIC integration optimization (optional)

[0099] Diodes, switches, and detection circuits can be integrated into the sensor-specific chip (ASIC), reducing the number of external components, lowering costs, and enhancing reliability.

[0100] Example of the working process

[0101] Take the automotive reverse radar system as an example:

[0102] System power-on: Six 3PIN sensors are connected in parallel to the same DSI3 bus.

[0103] ID self-identification:

[0104] Sensor A: PIN1 = positive, PIN2 = negative, PIN3 = DSI3 → generates ID1.

[0105] Sensor B: PIN1 = DSI3, PIN2 = positive, PIN3 = negative → generates ID5.

[0106] Controller mapping: ID1 corresponds to the left rear radar, and ID5 corresponds to the right front radar.

[0107] Instruction execution: The controller sends a ranging instruction to ID1, and the left rear radar triggers the ultrasonic wave and returns data.

[0108] Fault handling: If ID5 fails to respond, the controller directly prompts "right front radar failure".

[0109] It should be noted that the DSI3 communication bus mentioned above is only an example, and in reality, it can also be other buses such as PSI5.

[0110] The series of detailed descriptions listed above are only specific descriptions of the feasible embodiments of the present invention, and they are not intended to limit the protection scope of the present invention. Any equivalent embodiments or changes made without departing from the technical spirit of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for designing pins of an ultrasonic radar semiconductor chip, characterized in that, It includes the following steps: A sensor with a 3PIN structure is adopted, where PIN1, PIN2, and PIN3 are respectively defined as positive power supply, negative power supply, and DSI 3 bus interface in any order; By configuring the connection combinations of the three PINs and combining with the internal detection circuit to identify the power supply polarity and bus interface, a unique ID is automatically generated for each sensor after power-on; The connection combinations include six permutations and combinations of positive power supply, negative power supply, and DSI 3 bus, corresponding to six unique IDs.

2. The method for designing pins of an ultrasonic radar semiconductor chip according to claim 1, characterized in that The internal detection circuit includes a diode, a switch, and an analog-to-digital conversion module, which is used to dynamically allocate the power supply polarity and bind the bus interface.

3. The method for designing pins of an ultrasonic radar semiconductor chip according to claim 1, wherein, The connection combinations include any one of the following: PIN1 is connected to the positive power supply, PIN2 is connected to the negative power supply, and PIN3 is the DSI 3 bus; PIN1 is connected to the positive power supply, PIN2 is the DSI 3 bus, and PIN3 is connected to the negative power supply; PIN1 is connected to the negative power supply, PIN2 is connected to the positive power supply, and PIN3 is the DSI 3 bus; PIN1 is connected to the negative power supply, PIN2 is the DSI 3 bus, and PIN3 is connected to the positive power supply; PIN1 is the DSI 3 bus, PIN2 is connected to the positive power supply, and PIN3 is connected to the negative power supply; PIN1 is the DSI 3 bus, PIN2 is connected to the negative power supply, and PIN3 is connected to the positive power supply.

4. The method for designing the pins of the ultrasonic radar semiconductor chip according to claim 1, wherein, The internal detection circuit is integrated in an application-specific integrated circuit (ASIC).

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