Bigrid graphene transistor sensor for detecting two miRNAs as well as preparation method and application of bigrid graphene transistor sensor

Through the dual-gate graphene transistor sensor combined with MEMS nanomicromachining technology, the consistency and multi-type detection problems of miRNA detection in the prior art are solved, and efficient and reliable multi-miRNA detection is achieved to adapt to laboratory and industrial production.

CN120369787APending Publication Date: 2025-07-25NINGBO UNIV
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Patent Information

Application Number
CN202510295783.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-13
Publication Date
2025-07-25

AI Technical Summary

Technical Problem

The existing graphene field effect transistor sensors have poor consistency when detecting miRNAs and can only detect a single miRNA, making it difficult to achieve efficient detection of multiple types of miRNAs. The graphene transfer position is inconsistent during the preparation process, resulting in poor repeatability of the detection results.

Method used

The dual-gate graphene transistor sensor is adopted, combined with MEMS nano-micromachining technology, and through strict cleaning and lithography processes, the high-quality transfer and patterning of graphene is ensured, and the combined specific detection of the two miRNAs is achieved.

Benefits of technology

It realizes efficient and reliable detection of multiple types of miRNAs, improves device consistency, simplifies the preparation process, and adapts to laboratory research and industrial production needs.

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Abstract

The invention provides a bigrid graphene transistor sensor for detecting two miRNAs and a preparation method and application of the bigrid graphene transistor sensor, and relates to the technical field of biosensors, and the bigrid graphene transistor sensor comprises a substrate, and two grids, a source electrode and a drain electrode which are arranged on the substrate; a graphene channel is arranged between the source electrode and the drain electrode, each of the grid electrode, the source electrode and the drain electrode comprises a chromium layer and a gold layer, the chromium layer is located between the substrate and the gold layer, the thickness of the chromium layer is 28-32 nm, the thickness of the gold layer is 190-210 nm, the width of the graphene channel is 4-6 mm, and the length of the graphene channel is 0.1-0.3 mm. Compared with the prior art, the two grids share one source-drain channel, so that resources can be saved, different probes are modified by different grids, and when the probes capture miRNA, output electric signals generate different changes.
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Description

Technical Field

[0001] The present invention relates to the technical field of biosensors, and in particular to a double-gate graphene transistor sensor for detecting two miRNAs, and a preparation method and application thereof. Background Art

[0002] The expression of various miRNAs derived from exosomes is dysregulated in the serum of tumor patients and is related to factors such as patient prognosis and chemotherapy sensitivity. In the process of cell apoptosis, exosomes act as carriers to deliver the miRNAs they carry to recipient cells, regulating the proliferation, apoptosis and metastasis of tumor cells. For example, the upregulation of exosomal miRNA-155 can enhance the anti-apoptotic activity of tumor cells and increase resistance to gefitinib. In addition, under the protection of the double lipid membrane of exosomes, miRNAs can be protected from degradation by RNAse. They are highly abundant and widely present in various body fluids, and are gradually becoming important molecular markers for liquid biopsy. Therefore, the analysis and detection of exosomal miRNAs are of great significance for the treatment of cancer. At present, traditional methods for detecting miRNAs include Northern blotting, quantitative real-time polymerase chain reaction, microarray technology, surface plasmon resonance method and fluorescence detection method. These traditional tests can detect the length and molecular weight information of miRNA, with accurate quantitative analysis, and are suitable for precise quantitative analysis. However, the methods are complicated to operate, take a long time to detect, and require specialized laboratories and specialized operators. With the advancement of nanoscience and technology, and the promotion of concepts such as the Internet of Things, big data, artificial intelligence, and mobile health, various biosensors have continued to emerge. Field-effect transistors are emerging biosensors used in cancer detection in recent years. Solution-Gated Graphene Transistors (SGGT) use a single layer of graphene grown on a copper substrate by chemical vapor deposition (CVD) as a sensing channel. Currently, the production requires manual cutting of graphene and transfer to the source and drain electrodes of the transistor using a wet transfer process. This will result in inconsistent positions of each piece transferred to the channel electrode, resulting in poor overall consistency of the device. Poor device consistency will result in significant differences in the detection results of the same biological sample on different devices, thereby reducing the repeatability of the results. In addition, the current SGGT chip for detecting miRNA can only detect one miRNA. For example, patent document CN116930291A has developed a method for detecting miRNA-21 with a minimum detection limit of 10 -20M. However, this detection method can only detect a single miRNA, with low detection efficiency and unable to detect multiple types of miRNAs. To overcome the above problems, the present invention adopts a double-gate SGGT, which can perform combined specific detection of two miRNAs, achieve multitask detection, distinguish different miRNA signals, and has good consistency, providing a convenient and fast detection means for cancer monitoring. Summary of the Invention

[0003] Compared with the prior art, by sequentially cleaning the glass substrate with acetone, isopropyl alcohol, deionized water, and absolute ethanol, the present invention can effectively remove organic pollutants, grease, and other impurities on the surface. At the same time, the pretreatment process not only removes pollutants but also may change the chemical properties of the glass surface, increase its surface energy, make the glass surface more hydrophilic, and is conducive to the uniform transfer and adhesion of graphene, thereby improving the performance of the final device.

[0004] In a possible implementation manner, in the step S1, the solution used for etching treatment is a 1 mM ferric chloride solution.

[0005] Compared with the prior art, the ferric chloride solution can effectively etch the copper substrate with less impact on graphene. This means that graphene can be separated from the copper substrate without damaging it, ensuring the quality and integrity of graphene. At the same time, by adjusting the concentration of the ferric chloride solution (1 mM), the etching rate can be precisely controlled, thus achieving good control of the etching process.

[0006] In a possible implementation manner, the specific steps of the drying treatment are as follows: Stand the glass substrate loaded with graphene for 1 - 2 minutes to completely remove moisture, then air dry for 20 - 30 minutes, and finally dry at 95 - 105 °C for 15 - 25 minutes.

[0007] Compared with the prior art, the present invention first stands the glass substrate loaded with graphene for 1 - 2 minutes to completely remove moisture. This method uses gravity to quickly remove most of the surface moisture, reducing the time of air drying and high-temperature drying, and at the same time avoiding the adverse effects caused by moisture during subsequent high-temperature treatment, such as water bubbles or peeling. The subsequent 20 - 30 minutes of air drying process allows the remaining moisture to slowly evaporate. This step is crucial for preventing thermal stress or physical damage caused by rapid drying. Finally, a drying treatment is carried out at 95 - 105 °C for 15 - 25 minutes. This temperature range is high enough to ensure complete removal of any residual moisture, but not too high to damage graphene or its adhesion performance to the glass substrate.

[0008] In a possible implementation, the specific steps of the soaking treatment are as follows: Immerse the dried substrate in acetone so that the acetone liquid level completely submerges the upper surface of the graphene, heat the acetone to near boiling, soak for 4 - 8 minutes, and then transfer it to another acetone liquid for soaking again for 20 - 40 minutes.

[0009] Compared with the prior art, after such a rigorous cleaning treatment in the present invention, the surface of the graphene will be purer, which is beneficial to the subsequent steps such as spin - coating of photoresist and patterning, ensuring the smooth implementation of these processes and ultimately improving the overall performance and reliability of the double - gate graphene transistor sensor.

[0010] In a possible implementation, the specific operation of step S2 is as follows: Spin - coat photoresist on the side with graphene, and then complete the patterning process through pre - baking, photolithography, development, and post - baking operations in sequence.

[0011] Compared with the prior art, by spin - coating photoresist on the side with graphene and performing a series of operations including pre - baking, exposure (photolithography), development, and post - baking, high - precision patterning of the graphene layer can be achieved.

[0012] In a possible implementation, the model of the photoresist is LC100A, the spin - coating speed is 100 r / min, the time is 30 s, and a photoresist layer with a thickness of 2.4 μm is obtained.

[0013] In a possible implementation, the parameters of the pre - baking operation are as follows: the temperature is 100 - 120 °C and the time is 80 - 100 s.

[0014] In a possible implementation, the exposure time of the photolithography operation is 10 - 20 s.

[0015] In a possible implementation, the parameters of the development operation are as follows: the model of the developer is FHD - 320 and the development time is 40 s.

[0016] In a possible implementation, the parameters of the post - baking operation are as follows: the temperature is 130 - 140 °C and the time is 2 - 4 minutes.

[0017] The present invention adopts the above - mentioned photolithography process parameters, including pre - baking (100 - 120 °C, 80 - 100 seconds), exposure (10 - 20 seconds), development (using FHD - 320 developer, 40 seconds), and post - baking (130 - 140 °C, 2 - 4 minutes), which are carefully designed to ensure high - quality patterning of the photoresist layer. These parameters work together to effectively remove solvents and unexposed areas, enhance adhesion and pattern stability, precisely control the pattern size and shape, lay a solid foundation for subsequent manufacturing steps, and meet the requirements of laboratory research and industrial production at the same time.

[0018] In a possible implementation, in step S3, the time of dry etching with oxygen plasma is 3 - 5 min.

[0019] In a possible implementation, the specific steps of step S5 are as follows: Continue to spin - coat photoresist on the side with the graphene channel, and then perform pre - baking, photolithography, development, and post - baking operations in sequence to complete the patterning process.

[0020] In a possible implementation, the model of the photoresist is LC100A, the spinning speed is 100 r / min, and the time is 30 s, to obtain a photoresist layer with a thickness of 2.4 μm.

[0021] The photoresist layer with a specific thickness adopted in the present invention can better adapt to the subsequent pre - baking, exposure, development, and post - baking and other processing steps. An appropriate photoresist thickness can avoid problems such as pattern distortion caused by being too thin or under - development caused by being too thick, thereby improving the success rate of the entire process flow.

[0022] In a possible implementation, the parameters of the pre - baking operation are as follows: the temperature is 100 - 120 °C, and the time is 80 - 100 s.

[0023] In a possible implementation, the exposure time of the photolithography operation is 10 - 20 s.

[0024] In a possible implementation, the parameters of the development operation are as follows: the model of the developer is FHD - 320, and the development time is 40 s.

[0025] In a possible implementation, the parameters of the post - baking operation are as follows: the temperature is 130 - 140 °C, and the time is 2 - 4 min.

[0026] The present invention adopts the above - mentioned photolithography process parameters, including pre - baking (100 - 120 °C, 80 - 100 s), exposure (10 - 20 s), development (using FHD - 320 developer, 40 s), and post - baking (130 - 140 °C, 2 - 4 min), which are carefully designed to ensure high - quality patterning of the photoresist layer. These parameters work together to effectively remove solvents and unexposed areas, enhance adhesion and pattern stability, accurately control the pattern size and shape, lay a solid foundation for subsequent manufacturing steps, and meet the requirements of laboratory research and industrial production at the same time.

[0027] The third object of the present invention is to provide an application of a double - gate graphene transistor sensor in detecting two types of biological miRNAs. The application specifically includes the following steps: S1. First, rinse the chip with deionized water, and then drop the thiol-DNA biomolecular probes corresponding to the miRNAs to be detected on the two gates respectively and incubate them naturally for 1 h; S2. Rinse the unincubated probes with PBS buffer, and then drop 1 mM MCH on the two gates respectively to block the sites that can bind to the aptamers and prevent non-specific adsorption, and incubate them naturally for 1 h; S3. Rinse the excess MCH with PBS buffer, drop 100 μL of 0.1×PBS solution on the chip surface as the dielectric layer, and then drop 10 μL of the miRNA to be detected and let them react naturally for half an hour for detection; S4. During detection, use a semiconductor analyzer to detect different gates. Set the source-drain voltage to 0.01 V, and increase the gate voltage from 0 V to 1 V with a step of 0.001 V. Drop miRNA solutions with low concentrations to high concentrations in the detection cell. First, detect the concentrations from 10 -20 to 10 -8 M. After adding each miRNA solution and reacting for half an hour, use the semiconductor analyzer to detect the curve to obtain the electrical signal corresponding to the miRNA.

[0028] In summary, the present invention uses MEMS nano-processing technology to pattern graphene, ensuring that the width and length of graphene in each chip channel are consistent, enabling the chip to have good consistency and consistent detection initial values. The corresponding aptamers for miRNA detection can be modified on the gate electrode to detect different miRNAs. In addition, by combining the preparation of the SGGT chip with the MEMS process, the miniaturization, batch preparation, low cost, and easy integration of the SGGT chip are realized. Description of the Drawings

[0029] Figure 1 is a schematic structural diagram of the dual-gate graphene transistor sensor of the present invention; Figure 2 is the detection result of the dual-gate graphene transistor for miRNA-141; Figure 3 is the detection result of the dual-gate graphene transistor for miRNA-21.

[0030] Description of the Reference Numerals: 1 - Gate; 2 - Source; 3 - Graphene Channel; 4 - Drain; Detailed Embodiments

[0031] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention is provided. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not used to limit the parameter range described in the present invention. Reasonable changes derived therefrom are still within the protection scope of the claims of the present invention.

[0032] It should be noted that the endpoints and any values within the ranges disclosed in this document are not limited to the exact ranges or values. These ranges or values should be understood to include values close to these ranges or values. For numerical ranges, the endpoint values of each range, between the endpoint values of each range and individual point values, and between individual point values can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically disclosed in this document.

[0033] Unless otherwise defined, all terms, symbols, and other scientific terms used in this document are intended to have the same meaning as commonly understood by those skilled in the art to which this invention belongs. In some cases, for the purpose of clarification or easy reference, terms with conventional understood meanings are defined in this document, and such definitions in this document should not be understood as indicating a significant difference from the conventional understanding in the art. The technical methods described or cited in this document are generally well understood by those skilled in the art and are adopted by conventional methods. Unless otherwise stated, the use of commercially available kits, reagents, and instruments is carried out according to the protocols and parameters given by the manufacturers.

[0034] The present invention provides a dual-gate graphene transistor sensor for detecting two miRNAs, comprising a substrate and two gates 1, a source 2, and a drain 4 disposed on the substrate; a graphene channel 3 is disposed between the source 2 and the drain 4. The gates 1, the source 2, and the drain 4 all comprise a chromium layer and a gold layer, and the chromium layer is located between the substrate and the gold layer. The thickness of the chromium layer is 28 - 32 nm, the thickness of the gold layer is 190 - 210 nm, the width of the graphene channel 2 is 4 - 6 mm, and the length is 0.1 - 0.3 mm.

[0035] Example 1 This example provides a dual-gate graphene transistor sensor for detecting two miRNAs, which is prepared by the following preparation method: S1. A 4-inch double-sided polished glass substrate is cleaned using an ultrasonic cleaner. It is cleaned with acetone for 20 minutes, and then successively replaced with isopropanol, deionized water, and absolute ethanol for cleaning, with each cleaning time being 20 minutes. After cleaning, it is placed in a blast drying oven for drying;

[0036] S2. The copper-based graphene grown by CVD is etched using a 1 mM ferric chloride solution, and then the graphene is transferred to the glass substrate by a wet transfer process. After transfer, the glass sheet should be erected for 1 - 2 minutes to allow the water to completely drip out, and then left to dry for about 30 minutes and baked at 100 °C for 20 minutes; then soak in acetone, heat the acetone to almost boiling appropriately, and it is better that the acetone liquid surface completely submerges the upper surface of the graphene. After soaking for 5 minutes, transfer it to a new acetone solution and soak for another 30 minutes to remove the graphene protective layer; S3. Spin-coat a photoresist (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm) on the side with graphene, pre-bake (hot plate temperature 110 °C, time 90 s), lithography (exposure time 15 s), development (FHD-320 developer, development time 40 s), and post-bake after development (135 °C, 3 min, the function is to strengthen the photoresist film) to prepare a patterned photoresist mask; S4. Use oxygen plasma dry etching for 4 min to fully remove the graphene area without photoresist protection, and complete the patterning of the graphene channel 3, where the graphene channel 3 is 5 mm wide and 0.2 mm long; S5. Use a stripping process to remove the remaining photoresist; S6. Spin-coat the photoresist again (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm), pre-bake (hot plate temperature 110 °C, time 90 s), lithography (exposure time 15 s), development (FHD-320 developer, development time 40 s), and post-bake after development (135 °C, 3 min, the function is to strengthen the photoresist film) to prepare a patterned photoresist mask; S7. Sputter the gate 1, drain 4, and source 2 in sequence by sputtering process. The specific processes of sputtering the gate 1, drain 4, and source 2 are as follows: sputter 30 nm of chromium as an adhesion layer and 200 nm of gold as an electrode layer; S8. Use a stripping process to remove the photoresist and pattern the electrodes to complete the electrode area; S9. Dice according to the cutting line to obtain individual electrode chips.

[0037] Example 2 This example provides a dual-gate graphene transistor sensor for detecting two miRNAs, which is prepared by the following preparation method: S1. Clean a 4-inch double-sided polished glass substrate using an ultrasonic cleaner: clean with acetone for 10 minutes, then sequentially replace with isopropanol, deionized water, and absolute ethanol for cleaning, with each cleaning time being 10 minutes. After cleaning, place it in a blast drying oven for drying; S2. Etch the copper-based graphene grown by CVD using a 1 mM ferric chloride solution, and then transfer the graphene to the glass substrate by a wet transfer process. After transfer, stand the glass sheet upright for 1 - 2 min to allow the water to completely drip out, and then air dry for about 20 min, and bake at 95 °C for 15 min; then soak in acetone, heat the acetone to almost boiling appropriately, and it is better that the acetone liquid surface completely submerges the upper surface of the graphene. After soaking for 4 min, transfer to a new acetone solution and soak for another 20 min to remove the graphene protective layer; S3. Spin-coat a photoresist (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm) on the side with graphene, perform pre-baking (hot plate temperature 100 °C, time 80 s), photolithography (exposure time 10 s), and development (FHD-320 developer, development time 40 s). After development, perform post-baking (130 °C, 2 min, the function is to solidify the photoresist film) to prepare a patterned photoresist mask; S4. Use oxygen plasma dry etching for 3 min to fully remove the graphene area without photoresist protection, and complete the patterning of the graphene channel. The width of the graphene channel is 4 mm and the length is 0.1 mm; S5. Use a stripping process to remove the remaining photoresist; S6. Spin-coat a photoresist again (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm), perform pre-baking (hot plate temperature 100 °C, time 80 s), photolithography (exposure time 10 s), and development (FHD-320 developer, development time 40 s). After development, perform post-baking (130 °C, 2 min, the function is to solidify the photoresist film) to prepare a patterned photoresist mask; S7. Use a sputtering process to sputter the gate 1, drain 4, and source 2 in sequence. The specific processes of sputtering the gate 1, drain 4, and source 2 are as follows: Sputter 28 nm of chromium as an adhesion layer and 190 nm of gold as an electrode layer; S8. Use a stripping process to remove the photoresist and pattern the electrodes to complete the electrode area; S9. Dice according to the cutting line to obtain individual electrode chips.

[0038] Example 3 This example provides a dual-gate graphene transistor sensor for detecting two miRNAs, which is prepared by the following preparation method: S1. Clean a 4-inch double-sided polished glass substrate using an ultrasonic cleaner: Clean with acetone for 30 minutes, then sequentially replace with isopropanol, deionized water, and absolute ethanol for cleaning, with each cleaning time being 30 minutes. After cleaning, place it in a blast drying oven for drying; S2. Etch the copper-based graphene grown by CVD using a 1 mM ferric chloride solution, and then transfer the graphene to the glass substrate using a wet transfer process. After transfer, stand the glass slide upright for 1 - 2 min to allow the water to completely drip out, and then air dry for about 25 min and bake at 105 °C for 25 min; then soak in acetone, heat the acetone to almost boiling appropriately, and it is better that the acetone liquid surface completely submerges the upper surface of the graphene. After soaking for 8 min, transfer to a new acetone solution and soak for another 40 min to remove the graphene protection layer; S3. Spin-coat a photoresist (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm) on the side with graphene, perform pre-baking (hot plate temperature 1120 °C, time 100 s), photolithography (exposure time 20 s), development (FHD-320 developer, development time 40 s), and post-baking after development (140 °C, 4 min, the function is to solidify the photoresist film) to prepare a patterned photoresist mask; S4. Use oxygen plasma dry etching for 5 min to fully remove the graphene area without photoresist protection, and complete the patterning of the graphene channel. The width of the graphene channel is 6 mm and the length is 0.3 mm; S5. Use a stripping process to remove the remaining photoresist; S6. Spin-coat a photoresist again (positive photoresist LC100A, 1000 r * 30 s, thickness 2.4 μm), perform pre-baking (hot plate temperature 1120 °C, time 100 s), photolithography (exposure time 20 s), development (FHD-320 developer, development time 40 s), and post-baking after development (140 °C, 4 min, the function is to solidify the photoresist film) to prepare a patterned photoresist mask; S7. Use a sputtering process to sputter the gate 1, drain 4, and source 2 in sequence. The specific processes of sputtering the gate 1, drain 4, and source 2 are as follows: sputter 32 nm of chromium as an adhesion layer and 210 nm of gold as an electrode layer; S8. Use a stripping process to remove the photoresist and pattern the electrodes to complete the electrode area; S9. Dice according to the cutting line to obtain individual electrode chips.

[0039] Application Example The detection process of two biological miRNAs. In this application example, the double-gate graphene transistor sensor prepared in Example 1 is used. The specific application process is as follows: (1) First, rinse the chip with deionized water, and drop the thiol-DNA biomolecular probe corresponding to the miRNA to be detected on the gate 1 and incubate naturally for 1 h; (2) Rinse the unincubated probe with PBS buffer, and then drop 1 mM MCH on the gate 1 to block the sites for binding aptamers to prevent non-specific adsorption, and incubate naturally for 1 h; (3) Rinse the excess MCH with PBS buffer, drop 100 μL of 0.1×PBS solution on the chip surface as a dielectric layer, and drop 10 μL of the miRNA to be detected and react naturally for half an hour to perform the detection; (4) During the detection, a semiconductor analyzer was used to detect different gates at different times. The source-drain voltage was set to 0.01 V, and the gate voltage was increased from 0 V to 1 V in steps of 0.001 V. Low to high concentration miRNA solutions were added to the detection tank. The concentration was first detected from 10 -20 to 10 -8 M, after each addition of miRNA solution and half an hour of reaction, the curve is detected using a semiconductor analyzer to obtain the electrical signal responding to miRNA.

[0040] Detection results of miRNA-141 and miRNA-21 by dual-gate graphene transistors ( Figure 2 and Figure 3 ) It can be seen that different concentrations of miRNA target molecules have a significant effect on the electrical properties of the device. As the miRNA concentration increases, the Dirac point voltage of the transfer characteristic curve shifts systematically, indicating that the sensor can sensitively detect the presence of target miRNA molecules and changes in their concentration. The experimental results show that the dual-gate graphene transistor sensor has good sensitivity and resolution in miRNA detection, providing an effective method for biomolecule detection.

[0041] Although the disclosure is disclosed as above, the protection scope of the disclosure is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the disclosure, and these changes and modifications will fall within the protection scope of the present invention.

Claims

1. A dual-gate graphene transistor sensor for detecting two miRNAs, characterized in that, It includes a substrate and two gates, a source electrode and a drain electrode disposed on the substrate; a graphene channel is disposed between the source electrode and the drain electrode. The gate, the source electrode and the drain electrode all include a chromium layer and a gold layer, and the chromium layer is located between the substrate and the gold layer. The thickness of the chromium layer is 28 - 32 nm, the thickness of the gold layer is 190 - 210 nm, the width of the graphene channel is 4 - 6 mm, and the length is 0.1 - 0.3 mm.

2. A preparation method of the double-gate graphene transistor sensor as described in claim 1, characterized in that, The preparation method specifically includes the following steps: S1. After the copper-based graphene grown by chemical vapor deposition is etched, it is transferred to a glass substrate by a wet transfer process, and then dried and soaked. S2. Spin-coat a photoresist on the side with graphene, and pattern the graphene layer. S3. Use oxygen plasma dry etching to remove the graphene region without photoresist protection in step S2 to obtain a graphene channel. S4. Remove the remaining photoresist in step S3. S5. Spin-coat the photoresist again to prepare a patterned photoresist mask. S6. Use the metal sputtering method to sputter two gates, a source electrode and a drain electrode respectively. S7. Remove the residual photoresist in step S6, and pattern two gates, a source electrode and a drain electrode.

3. The preparation method according to claim 2, characterized in that, In step S1, before transferring the graphene to the glass substrate by the wet transfer process, the glass substrate is pretreated. The specific steps of the pretreatment are as follows: In an ultrasonic cleaning machine, first clean with acetone for 10 - 30 min, and then successively clean with isopropyl alcohol, deionized water and absolute ethanol, each cleaning time is 10 - 30 min. After cleaning, put it in a blast drying oven for drying.

4. The preparation method according to claim 2, characterized in that, In step S1, the solution used for the etching treatment is a 1 mM ferric chloride solution. And / or, the specific steps of the drying treatment are: Stand the glass substrate loaded with graphene for 1 - 2 min to completely remove moisture, then air-dry for 20 - 30 min, and finally dry at 95 - 105 °C for 15 - 25 min. And / or, the specific steps of the soaking treatment are as follows: Immerse the substrate after the drying treatment in acetone, make the acetone liquid level completely submerge the upper surface of the graphene, heat the acetone to near boiling, soak for 4 - 8 min, and then transfer it to another acetone liquid for soaking again for 20 - 40 min.

5. The preparation method according to claim 2, characterized in that, The specific operation of step S2 is as follows: Spin-coat a photoresist on the side with graphene, and then successively perform pre-baking operation, photolithography operation, development operation and post-baking operation to complete the patterning process.

6. The preparation method according to claim 5, characterized in that, The model of the photoresist is LC100A, the spinning speed is 100 r / min, the time is 30 s, and a photoresist layer with a thickness of 2.4 μm is obtained. And / or, the parameters of the pre-baking operation are as follows: The temperature is 100 - 120 °C, and the time is 80 - 100 s. And / or, the exposure time of the photolithography operation is 10 - 20 s. And / or, the parameters of the development operation are as follows: The model of the developer is FHD-320, and the development time is 40 s. And / or, the parameters of the post-baking operation are as follows: The temperature is 130 - 140 °C, and the time is 2 - 4 min.

7. The preparation method according to claim 2, characterized in that, In step S3, the time of using oxygen plasma dry etching is 3 - 5 min.

8. The preparation method according to claim 2, characterized in that, The specific steps of step S5 are as follows: Spin-coat photoresist on the side with the graphene channel, and then perform pre-baking, photolithography, development, and post-baking operations in sequence to complete the patterning process.

9. The preparation method according to claim 8, characterized in that, The model of the photoresist is LC100A. The spinning speed is 100 r / min and the time is 30 s, obtaining a photoresist layer with a thickness of 2.4 μm. And / or, the parameters of the pre-baking operation are as follows: the temperature is 100 - 120 °C and the time is 80 - 100 s. And / or, the exposure time of the photolithography operation is 10 - 20 s. And / or, the parameters of the development operation are as follows: the model of the developer is FHD-320 and the development time is 40 s. And / or, the parameters of the post-baking operation are as follows: the temperature is 130 - 140 °C and the time is 2 - 4 min.

10. Application of the double-gate graphene transistor sensor as described in claim 1 in detecting two biological miRNAs, characterized in that, The application specifically includes the following steps: S1. First, rinse the chip with deionized water, and then drop the thiol-DNA biomolecular probe corresponding to the detected miRNA on the two gates respectively and incubate naturally for 1 h. S2. Rinse the unincubated probe with PBS buffer, and then drop 1 mM MCH on the two gates respectively to block the sites for binding aptamers to prevent non-specific adsorption, and incubate naturally for 1 h. S3. Rinse the excess MCH with PBS buffer, drop 100 μL of 0.1×PBS solution on the chip surface as the dielectric layer, and drop 10 μL of the miRNA to be detected and react naturally for half an hour to perform the detection. S4. When detecting, use a semiconductor analyzer to detect different gates. The source-drain voltage is set to 0.01 V, and the gate voltage is increased from 0 V to 1 V in steps of 0.001 V. Drop miRNA solutions with low to high concentrations in the detection slot. First, detect the concentration from 10 -20 to 10 -8 M. After each addition of miRNA solution and reacting for half an hour, use a semiconductor analyzer to detect the curve, and the electrical signal responsive to miRNA can be obtained.

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