Half adder based on graphene metasurface

Abstract

The invention discloses a half adder based on a graphene metasurface, and belongs to the technical field of terahertz communication modulation. The multilayer structure is composed of a silicon substrate and a single-layer graphene pattern. Based on the principle of plasma induced transparency, the graphene metasurface designed by the invention has the function of a half adder, and a new thought is provided for the design of a terahertz multifunctional device in the future.

Description

Technical Field

[0001] The present invention relates to the technical field of plasmon-induced transparency, and more particularly, to a half adder based on a graphene metasurface. Background Art

[0002] Electromagnetically induced transparency (EIT) is a destructive interference between different energy levels in an atomic system. It produces narrow transmission peaks in the spectrum. However, the realization of EIT requires extremely low temperatures and relatively strict rare gas experimental conditions. Therefore, plasmon-induced transparency (PIT), an optical effect similar to EIT, has attracted great attention due to its remarkable advantages and wide practical applications. To overcome the limitations of these experimental conditions, many metal-based metamaterial structures have been proposed and proven to achieve the PIT effect. As a phenomenon similar to EIT, PIT has great potential in various applications. However, due to material defects, previous PIT structures are inevitably affected by limited plasmon lifetimes and high ohmic losses. These drawbacks seriously hinder the practical applications of tunable PIT devices.

[0003] Graphene is the strongest and thinnest material in nature. Strictly speaking, graphene belongs to a simple substance and conducts electrons faster than all known conductors at room temperature. The electrical properties of graphene can be summarized in two points: 1. extremely high carrier mobility; 2. tunable conduction type. A graphene metasurface refers to a two-dimensional planar structure composed of artificially arranged units, which can flexibly control the amplitude, phase, and polarization of incident electromagnetic waves. Nowadays, graphene materials have been widely used in the field of PIT due to their tunable characteristics.

[0004] An optical half adder can perform optical micro-operations in a digital optical system and an optical processor, and the arithmetic logic unit in the processing unit performs various operations. In the fields of optical computing and signal processing, various logical operations and algorithms have been proposed in recent decades. In the design of arithmetic logic units, most previous work has used Mach-Zehnder interferometers, semiconductor optical amplifiers, terahertz optical asymmetric demultiplexers, and beam splitters. The use of these optical elements makes the optical circuits diverse, large in volume, and not equipped with photon integration facilities. Moreover, the frequency bands of the above implementation methods are all in the near-infrared band, and there are few optical half adders implemented in the terahertz band. Therefore, it is particularly important to use plasmon-induced transparency technology to implement a half adder in the terahertz band. Summary of the Invention

[0005] To solve the above problems, the present invention discloses a half adder based on a graphene metasurface.

[0006] The present invention is achieved through the following technical solutions:

[0007] A half adder based on a graphene metasurface, comprising a silicon substrate layer and a top graphene layer; the top graphene layer is etched on the upper surface at the central position of the silicon substrate layer.

[0008] In the above solution, the silicon substrate layer is square in a positive top view angle; the top graphene layer is composed of a cross formed by rotating and superimposing four quarter graphene rings and four L-shaped graphene at the four corners of the upper surface of the silicon substrate layer, and the layer is symmetric about the two axes in the xOy plane.

[0009] In the above solution, the material of the substrate layer is silicon; the thickness of the substrate layer is 0.2 μm; the materials of the graphene layers are all graphene; the thickness of the graphene is 1 nm.

[0010] In the above solution, the same voltage is applied to the two different patterns of the top graphene layer, and the polarization direction of the terahertz wave is switched between 0° and 90°. By changing the voltage applied to the graphene layer to control the Fermi level, the device realizes the logic function of the half adder.

[0011] The above-mentioned half adder based on a graphene metasurface can realize the logic function of the half adder; its characteristics are:

[0012] By controlling the gate voltages of the two different patterns of graphene in the top graphene layer, and simultaneously adjusting the Fermi levels of both, controlling the polarization direction of the terahertz wave to switch between 0° and 90°, so that the two patterns produce bright modes at different frequency points in the terahertz band, and then plasmon-induced transparency phenomenon appears under the action of destructive interference, so that the transmittance at specific frequency points is different; the gate voltages of graphene and the polarization direction of the terahertz wave form 4 input modes, and then the carry output and result bit output of the half adder can be realized at 2 selected frequency points respectively. Its characteristics are:

[0013] When the output of the half adder is "00", the absorption rate is low at the selected frequency point 1 and low at the selected frequency point 2;

[0014] When the output of the half adder is "10", the absorption rate is high at the selected frequency point 1 and low at the selected frequency point 2;

[0015] When the output of the half adder is "01", the absorption rate is low at the selected frequency point 1 and high at the selected frequency point 2;

[0016] That is, as described above, the present invention obtains a terahertz band device that realizes the logic function of a half adder by comprehensively adjusting the voltage and the polarization direction of the incident wave for the metasurface structure. In addition, the present invention can flexibly select the encoding frequency point and the decoding frequency point through an external bias voltage without changing the parameters of the structure. The present invention has the characteristics of simple structure, flexible tunability, fast output rate, easy integration, etc. Description of the Drawings

[0017] Figure 1 It is a schematic diagram of the unit structure of a half adder based on a graphene metasurface.

[0018] Figure 2 It is a side view of the unit structure of a half adder based on a graphene metasurface.

[0019] Figure 3 It is a schematic diagram of the top graphene layer structure of a half adder based on a graphene metasurface.

[0020] Figure 4 It is the transmission spectrum of a half adder based on a graphene metasurface that realizes the logic function of a half adder. Detailed Embodiment

[0021] To describe the solution and advantages of the present invention in more detail, the present invention will be further explained below with reference to the drawings and in conjunction with embodiments. The following embodiments are only some of the embodiments shown, rather than all embodiments.

[0022] An embodiment of a half adder based on a graphene metasurface is as Figure 1 shown. A top graphene layer as Figure 3 shown is plated on a 0.2 μm thick silicon substrate; the thickness of the graphene layer in this example is 1 nm.

[0023] A side view embodiment of the unit structure of a half adder based on a graphene metasurface is as Figure 2 shown. Two different patterns of graphene on the top graphene layer are controlled by the same electrode.

[0024] A structural diagram embodiment of the top graphene layer of a half adder based on a graphene metasurface is as Figure 3As shown, the first graphene unit is formed by stacking four quarter - rings that are rotated 90 degrees with respect to each other. The mid - arc of the first graphene ring sub - unit is tangent to the horizontal and vertical axes of the graphene layer unit structure. The outer diameter r1 of the ring sub - unit is 3.6 μm, and the ring width m is 0.8 μm. The second graphene unit contains four L - shaped unit structures, and the lengths of each rectangular unit structure are equal and are related to each other by rotating 90 degrees clockwise around the center of the graphene layer unit structure. The length a of the long arm of the L - shaped graphene unit is 2.5 μm, the length b of the short arm is 1.1 μm, and the wall thickness c is 0.5 μm. The side length P of the unit structure is 10 μm.

[0025] Some embodiments of the transmission spectrum for realizing the half - adder logic function of a half - adder based on a graphene metasurface are as Figure 4 shown. The Fermi levels of the two patterned graphene layers at the top graphene layer are set to 0.8 eV or 1.0 eV, and the polarization angle of the terahertz wave is set to 0° or 90°. Then, the result - bit output and carry - output of the half - adder can be obtained at two frequency points: frequency point 1 is 2.5 THz and frequency point 2 is 2.784 THz, respectively.

[0026] In this embodiment, the half - adder logic device defines that the transmittance at a certain terahertz frequency point higher than 60% is the logic state "1"; and the transmittance at a certain terahertz frequency point lower than 40% is the logic state "0".

[0027] As Figure 4 shown, when the Fermi levels of the top graphene layer are both set to 0.8 eV and the polarization angle of the incident terahertz wave is 0°, the input of the half - adder is defined as "00". The transmittance at frequency point 1 is 0.177, lower than 40%, and the transmittance at frequency point 2 is 0.281, lower than 40%. Then, the result - bit output of the half - adder is "0", and the carry - output is "0".

[0028] As Figure 4 shown, when the Fermi levels of the top graphene layer are both set to 0.8 eV and the polarization angle of the incident terahertz wave is 90°, the input of the half - adder is defined as "01". The transmittance at frequency point 1 is 0.947, higher than 60%, and the transmittance at frequency point 2 is 0.284, lower than 40%. Then, the result - bit output of the half - adder is "1", and the carry - output is "0".

[0029] As Figure 4 shown, when the Fermi levels of the top graphene layer are both set to 1.0 eV and the polarization angle of the incident terahertz wave is 0°, the input of the half - adder is defined as "10". The transmittance at frequency point 1 is 0.848, higher than 60%, and the transmittance at frequency point 2 is 0.159, lower than 40%. Then, the result - bit output of the half - adder is "1", and the carry - output is "0".

[0030] As Figure 4 shown, when the Fermi levels of the top graphene layer are both set to 1.0 eV and the polarization angle of the incident terahertz wave is 90°, the input of the half adder at this time is defined as "11". The transmittance at frequency point 1 is 0.308, which is lower than 40%, and the transmittance at frequency point 2 is 0.936, which is higher than 60%. Then the result bit output of the half adder is "0" and the carry output is "1".

[0031] A half adder based on a graphene metasurface can demonstrate the logical function and output result of the half adder through the above embodiments, successfully realizing the design of a half adder in the terahertz band.

[0032] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, and the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general purpose computer, a special purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate means for implementing the functions specified in one process Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0033] In the description of the present invention, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0034] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.

Claims

1. A half adder based on a graphene metasurface, characterized in that: It consists of a top substrate layer and an N×M array of periodic graphene layer square unit structures on the surface; M is an integer greater than or equal to 2, and N is an integer greater than or equal to 2; the center of the graphene layer unit structure coincides exactly with the center of the substrate layer and is axisymmetric about the horizontal and vertical directions; the graphene layer unit structure includes a first graphene unit and a second graphene unit; the center of the first graphene unit coincides exactly with the center of the substrate layer and is axisymmetric about the horizontal and vertical directions; the first graphene unit includes a first graphene circular ring sub-unit, a second graphene rhombus sub-unit, a third graphene rhombus sub-unit, and a fourth graphene rhombus sub-unit. The mid-arc of the first graphene circular ring sub-unit is tangent to the horizontal and vertical axes of the graphene layer unit structure; the second, third, and fourth graphene circular ring sub-units are in a relationship where the first graphene circular ring sub-unit is rotated 90 degrees, 180 degrees, and 270 degrees clockwise around the center of the graphene layer unit structure; the second graphene unit contains four L-shaped unit structures and the lengths of each rectangular unit structure are equal and are in a relationship of being rotated 90 degrees clockwise around the center of the graphene layer unit structure.

2. The half adder based on graphene metasurface according to claim 1, characterized in that: The length and width of the substrate layer are equal; the material of the substrate layer is silicon material; the thickness of the substrate layer is 0.2 μm; the material of the graphene layer unit structure is graphene material; the thickness of the graphene layer unit structure is 1 nm; the side length P of the metasurface unit structure is 10 μm.

3. A half adder based on a graphene metasurface according to claim 1, characterized in that: The outer diameters r1 of the first, second, third, and fourth graphene circular ring sub-units are 3.6 μm, and the ring width m is 0.8 μm; the long arm length a of the L-shaped graphene unit is 2.5 μm, the short arm length b is 1.1 μm, and the wall thickness c is 0.5 mm.

4. A half adder based on a graphene metasurface according to claim 1, characterized in that: Under the conditions of 2.52 THz, 2.784 THz being the valleys and 2.712 THz being the peak, the graphene metasurface structure generates a PIT window in the THz range of 0.5 to 6.0, where a transmittance of 0.881 is obtained at the peak of 2.712 THz, and transmittances of 0.098 and 0.280 are obtained at the valleys of 2.520 THz and 2.784 THz.

5. Using a half adder based on a graphene metasurface according to claim 1, the terahertz wave emitted by a terahertz emitter is transmitted through an adjustable graphene metasurface structure and then received by a terahertz receiver; the Fermi level of the graphene layer and the polarization direction of the terahertz wave emitted by the terahertz emitter are controlled by an externally applied electrode to control the adjustable graphene metasurface structure at 2.500 THz and 2.784 THz to achieve the logic function of the half adder; characterized in that: When the bias voltages applied to the first graphene unit and the second graphene unit are 0.8 eV and the polarization angle of the terahertz wave is 0°, the transmittances of the graphene metasurface half adder at 2.500 THz and 2.784 THz are 0.177 and 0.281 respectively; When the bias voltages applied to the first graphene unit and the second graphene unit are 0.8 eV and the polarization angle of the terahertz wave is 90°, the transmittances of the graphene metasurface half adder at 2.500 THz and 2.784 THz are 0.947 and 0.284 respectively; When the bias voltages applied to the first graphene unit and the second graphene unit are 1.0 eV and the polarization angle of the terahertz wave is 0°, the transmittances of the graphene metasurface half adder at 2.500 THz and 2.784 THz are 0.848 and 0.159 respectively; When the bias voltages applied to the first graphene unit and the second graphene unit are 1.0 eV and the polarization angle of the terahertz wave is 90°, the transmittances of the graphene metasurface half adder at 2.500 THz and 2.784 THz are 0.308 and 0.936 respectively.

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