Method for processing a circuit board

Abstract

The application discloses a processing method of a circuit board, and the processing method comprises the following steps: laminating an insulating layer filled with anti-plating ink and a core plate into a multilayer board; drilling the multilayer board to form a blind hole, and the blind hole is provided with the anti-plating ink; ablating both ends of the blind hole to expose copper foil at the bottom of the core plate layer; performing copper deposition processing on the blind hole to cover the blind hole with a first metal layer; washing and removing the anti-plating ink in the blind hole; and drilling the multilayer board to separate the first metal layer above the position where the anti-plating ink is removed from the first metal layers on both sides to form independent wirings. The blind hole is drilled in the multilayer board, then the whole board is subjected to the copper deposition process, and then the anti-plating ink is washed and removed; a drill bit with a small size aperture is used to remove the copper layer at the position where the anti-plating ink is washed and removed; the blind hole can be divided into four parts to form four independent wirings, the density of interlayer interconnection is greatly increased, and therefore the product can meet the demand of high-frequency and high-speed products.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and in particular to a method for processing a circuit board. Background Technology

[0002] As the foundation for all end products to realize their electronic performance, PCBs face increasingly higher requirements in design and manufacturing. In particular, the significant increase in chip pins presents a considerable challenge to the overall density of PCB traces. Research is underway to break through limitations in increasing wiring density within a limited space by modifying via diameters and utilizing large-size blind vias to create multiple outgoing lines.

[0003] In related technologies, the processing of large-size blind vias requires first fabricating elongated slot-shaped blind vias. After electroplating the blind vias, multiple traces are created by laser ablation of the plated copper, tin etching, and drilling away the copper in the middle of the gap using a large-diameter drill bit. The laser method is sometimes limited by the thickness of the polypropylene (PP), which carries the risk of incomplete ablation. The large-diameter drilling method can reduce the width of the wiring space, and the tin-plated followed by tin-removal etching method is also limited by the capabilities of laser processing.

[0004] However, the above solutions can only produce two independent lines at a time. Although the design of large-size blind vias to disconnect multiple lines can indeed increase the wiring area, in the future scenario of increasingly high-density device designs, it is still necessary to conduct preliminary research on a design that can add additional lines so that the performance of the next generation of PCB-based products can be better. Summary of the Invention

[0005] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a circuit board processing method that forms four independent traces, greatly increasing the density of interlayer interconnection, thereby enabling the product to meet the requirements of high-frequency and high-speed products.

[0006] According to an embodiment of the present invention, a method for processing a circuit board includes: laminating an insulating layer filled with resist plating ink and a core board into a multilayer board; drilling holes in the multilayer board to form blind vias, wherein the resist plating ink is disposed within the blind vias; ablating both ends of the blind vias to expose the copper foil at the bottom of the core board layer; performing copper plating on the blind vias to cover the blind vias with a first metal layer; washing away the resist plating ink from the blind vias; and drilling holes in the multilayer board to separate the first metal layer above the location where the resist plating ink has been removed from the first metal layers on both sides, thereby forming independent traces.

[0007] According to the circuit board processing method of the present invention, blind holes are drilled into the multilayer board, and then the entire board is subjected to a copper plating process. Then, the copper layer at the location of the ink removal is removed by using a small-diameter drill bit to remove the ink. The blind holes can be divided into four parts to form four independent traces, which greatly increases the density of interlayer interconnection, thereby enabling the product to meet the requirements of high-frequency and high-speed products.

[0008] According to some embodiments of the present invention, the processing method further includes: thickening the multilayer board by electroplating to make the first metal layer thicker.

[0009] According to some embodiments of the present invention, the processing method further includes filling the blind hole with resin.

[0010] According to some embodiments of the present invention, the processing method further includes: performing an outer layer copper overlay process on the multilayer board to form a second metal layer on the outermost layer of the blind via.

[0011] According to some embodiments of the present invention, the processing method further includes: performing outer layer pattern processing on the multilayer board and applying solder resist protection.

[0012] According to some embodiments of the present invention, the processing method further includes: slotting the insulating layer and the core board layer, and filling the slotted area with anti-plating ink.

[0013] According to some embodiments of the present invention, elongated slots are formed in the insulating layer and the core board layer.

[0014] According to some embodiments of the present invention, the processing method further includes: when drilling the multilayer board, controlling the drilling depth of the anti-plating ink area to retain at least a portion of the anti-plating ink.

[0015] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0016] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 1 ; Figure 2 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 2 ; Figure 3 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 3 ; Figure 4This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 4 ; Figure 5 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 5 ; Figure 6 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 6 ; Figure 7 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 7 ; Figure 8 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 8 ; Figure 9 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 9 ; Figure 10 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 ; Figure 11 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 one; Figure 12 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 two; Figure 13 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 three; Figure 14 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 Four; Figure 15 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 five; Figure 16 This is a schematic diagram of a circuit board processing method according to an embodiment of the present invention. Figure 10 six.

[0017] Figure label: 11. Insulating layer; 12. Core board layer; 13. Blind hole; 14. Anti-plating ink; 15. First metal layer; 16. Resin; 17. Second metal layer. Detailed Implementation

[0018] The embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention are described in detail below.

[0019] The following is for reference. Figures 1-16A method for manufacturing a circuit board according to an embodiment of the present invention is described.

[0020] Reference Figures 3-11 As shown, the circuit board processing method of this embodiment includes: pressing an insulating layer 11 filled with anti-plating ink 14 and a core board layer 12 into a multilayer board. Figure 3 As shown, multiple core boards are laminated with insulating layer 11 as needed. Through lamination, signal lines, power lines, and ground lines can be laid between different layers to form a good signal loop and improve the rigidity and durability of the circuit board. During the electroplating process, anti-plating ink 14 can shield areas that do not need to be plated, ensuring that only specific parts can be electroplated, thereby controlling the scope of electroplating or etching.

[0021] Holes are drilled in the multilayer board to form blind holes 13, and anti-plating ink 14 is placed inside the blind holes 13. For example... Figures 4-5 As shown, the blind hole 13 is treated with anti-plating ink 14 to protect this part from being covered in subsequent processes. The drilling method can be mechanical drilling.

[0022] The two ends of the blind via 13 are ablated to expose the copper foil at the bottom of the core layer 12. For example... Figure 6 As shown, after drilling the multilayer board, the lower end of the blind via 13 may be the substrate of the insulating layer 11 or the core layer 12. By ablating the medium around the blind via 13, the copper foil of the core layer 12 is exposed for further processing. The ablation of both ends of the blind via 13 can be performed using laser drilling.

[0023] The blind via 13 is subjected to copper plating to cover it with a first metal layer 15. For example... Figure 7 As shown, the holes formed by mechanical drilling or laser drilling have walls mainly composed of non-conductive materials. If electroplating is performed directly, the current cannot pass through these hole walls, making copper plating impossible. Therefore, a first metal layer 15 needs to be formed on the hole wall of the blind hole 13 through a copper plating process to achieve the adhesion of electroplated copper.

[0024] Remove the anti-plating ink 14 from the blind hole 13. For example... Figures 8-9 As shown, the anti-toxic ink in the blind hole 13 is removed, and only the area where the anti-plating ink 14 was originally applied does not form the first metal layer 15. In other words, the first metal layer 15 in the blind hole 13 is initially separated by the area where the anti-plating ink 14 was applied. The anti-plating ink 14 can be removed by chemical or physical methods.

[0025] Drilling is performed on the multilayer board to separate the first metal layer 15 above the location where the resist ink 14 has been removed from the first metal layers 15 on both sides, thus forming independent traces. For example... Figures 10-11As shown, the drilling divides the first metal layer 15 on the periphery of the blind hole 13 and connects it to the original location of the anti-plating ink 14 at the bottom of the blind hole 13. The isolated first metal layer 15 between two adjacent drilled holes can form independent traces. In this embodiment, small-sized drilling is performed on the multilayer board, and four holes are drilled on the periphery of the blind hole 13, which can form four independent traces, greatly increasing the density of interlayer interconnection, thereby enabling the product to meet the requirements of high-frequency and high-speed products.

[0026] Therefore, by drilling blind vias 13 into the multilayer board, then performing a copper plating process on the entire board, and then removing the copper layer at the location of the removed ink by using a small-diameter drill bit, the blind vias 13 can be divided into four parts, forming four independent traces, which greatly increases the density of interlayer interconnection, thereby enabling the product to meet the needs of high-frequency and high-speed products.

[0027] Reference Figure 12 As shown, the processing method also includes: thickening the multilayer board by electroplating to make the first metal layer 15 thicker. Since the area where the resist ink 14 was previously set does not form the first metal layer 15, only the part where the first metal layer 15 was originally formed thickens after electroplating, which can further deepen the four lines and meet the interlayer interconnection requirements of the four parts, greatly increasing the flexibility of the interlayer interconnection density.

[0028] Reference Figures 13-14 As shown, the processing method also includes filling the blind vias 13 with resin 16. That is, the multilayer board is vacuum-sealed with resin 16, and the blind vias 13 are filled with resin 16. After the resin 16 is filled, gas residue can be avoided, ensuring strong soldering, enhancing the structural strength of the via, reducing the impact of thermal stress, improving PCB durability, making the dielectric constant uniform, improving signal stability, and also allowing the upper layer circuits to be directly routed, avoiding additional jumpers or bridging, and increasing wiring density.

[0029] Reference Figure 15 As shown, the processing method further includes: performing an outer layer copper coating process on the multilayer board to form a second metal layer 17 on the outermost layer of the blind via 13. Specifically, the outermost layer of the multilayer board undergoes chemical copper plating and electroplating thickening processes to form the second metal layer 17, which covers the outermost layer of the blind via 13. In this way, subsequent pattern processing can be performed on the second metal layer 17, enhancing the electrical performance of the multilayer board, improving soldering reliability, optimizing signal integrity, increasing mechanical strength, and preventing chemical contamination and corrosion.

[0030] Reference Figure 16As shown, the processing method also includes: processing the outer layer pattern of the multilayer board and applying solder mask protection. Specifically, solder mask protection refers to applying a special solder mask layer during the printed circuit board manufacturing process to prevent unnecessary solder from flowing to areas that should not be soldered. The solder mask protection layer covers the exposed copper traces, preventing solder from splashing onto areas that should not be soldered during soldering, preventing short circuits and missoldering, and also effectively protecting the traces from direct exposure to air, preventing oxidation and corrosion.

[0031] Reference Figures 1-2 As shown, the processing method further includes: slotting the insulating layer 11 and the core board layer 12, and filling the slotted area with anti-plating ink 14. Elongated slots can be made in the insulating layer 11 and the core board layer 12.

[0032] Furthermore, the processing method also includes: when drilling the multilayer board, controlling the drilling depth of the area of ​​the resist plating ink 14 to retain at least part of the resist plating ink 14. At least part of the resist plating ink 14 can control the gap between the first metal layer 15 in different areas, which facilitates subsequent small-size drilling to ensure that individual traces can be formed.

[0033] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0034] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0035] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A method for processing a circuit board, characterized in that, Processing methods include: The insulating layer filled with anti-plating ink and the core board are laminated into a multilayer board; The multilayer board is drilled to form blind holes, and the anti-plating ink is disposed in the blind holes, with the opposite sides of the anti-plating ink contacting the hole wall of the blind hole; The blind holes are ablated at both ends along their length to expose the copper foil at the bottom of the core layer; The blind via is subjected to copper plating to cover the inside of the blind via with a first metal layer; The anti-plating ink is washed off inside the blind holes; The multilayer board is drilled to separate the first metal layer above the location where the anti-plating ink has been removed from the first metal layers on both sides, so as to form independent traces.

2. The circuit board processing method according to claim 1, characterized in that, The processing method further includes: The multilayer board is electroplated to thicken the first metal layer.

3. The circuit board processing method according to claim 2, characterized in that, The processing method further includes: The blind hole is filled with resin.

4. The circuit board processing method according to claim 3, characterized in that, The processing method further includes: The multilayer board is coated with an outer copper layer to form a second metal layer on the outermost layer of the blind via.

5. The circuit board processing method according to claim 4, characterized in that, The processing method further includes: The outer layer pattern of the multilayer board is processed and solder mask protection is applied.

6. The circuit board processing method according to claim 1, characterized in that, The processing method further includes: Grooves are cut into the insulation layer and the core board layer, and anti-plating ink is filled into the grooved areas.

7. The method for processing a circuit board according to claim 6, characterized in that, Elongated slots are formed in the insulating layer and the core board layer.

8. The method for processing a circuit board according to claim 1, characterized in that, The processing method further includes: When drilling holes in the multilayer board, the drilling depth of the anti-plating ink area is controlled to retain at least a portion of the anti-plating ink.

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