Electronic filter circuit

Abstract

The present description relates to an electronic filter circuit comprising: an integrated passive device; a bulk acoustic wave filter stacked on the integrated passive device on a first surface side of the integrated passive device; and at least one conductive post spanning the integrated passive device and connecting an electrode of the bulk acoustic wave filter to a contact element located on a second surface of the integrated passive device opposite the first surface and intended to be connected to an external element.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is a translation of and claims the benefit of priority from French patent application No. 2401259, filed on February 8, 2024, entitled “Circuitélectronique de filtrage”, which is incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] The present disclosure relates generally to electronic devices and, more particularly, to electronic filter circuits. Background Art

[0004] Many electronic devices include at least one electronic filter circuit. For example, such circuits are integrated into cellular phones or smartphones to prevent interference with the phone's radio frequency communication receive channel caused by radio frequency signals transmitted by other electronic devices or noise originating from external radio frequency sources. However, existing electronic filter circuits suffer from various drawbacks. Summary of the Invention

[0005] There is a need to overcome all or some of the shortcomings of existing electronic filter circuits.

[0006] To this end, an embodiment provides an electronic filter circuit comprising: an integrated passive device; a bulk acoustic wave filter stacked on the integrated passive device on a first surface side of the integrated passive device; and at least one conductive pillar spanning the integrated passive device and connecting an electrode of the bulk acoustic wave filter to a contact element located on a second surface of the integrated passive device opposite to the first surface and intended to be connected to an external element.

[0007] According to an embodiment, the integrated passive device forms a lid of a bulk acoustic wave filter.

[0008] According to an embodiment, the first surface and a third surface of the BAW filter located in front of the first surface define a cavity.

[0009] According to an embodiment, the cavity has a thickness defined by a height of the at least one conductive pillar, the at least one conductive pillar protruding from the first surface.

[0010] According to an embodiment, the cavity is laterally delimited by a peripheral wall.

[0011] According to an embodiment, the peripheral wall is made of an insulating material, preferably a polymer material.

[0012] According to an embodiment, at least one conductive pillar is located inside the cavity.

[0013] According to an embodiment, an integrated passive device comprises a first semiconductor substrate comprising a region inside and on top of which at least one filter, preferably at least one bandpass filter, more preferably an RLC filter, is formed.

[0014] According to an embodiment, a bulk acoustic wave filter includes a second semiconductor substrate including a region in which a bulk acoustic wave filter structure connected to an electrode is formed inside and on top of the region.

[0015] An embodiment provides an electronic device, preferably a cellular phone or a smart phone, comprising a radio frequency integrated circuit including an electronic filter circuit as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0017] Figure 1 is a simplified and partially cross-sectional view of an example of an electronic filter circuit according to an embodiment;

[0018] Figure 2A 、 Figure 2B 、 Figure 2C 、 Figure 2D and Figure 2E each a simplified and partial cross-sectional view of a structure obtained at the end of a certain step of a method for manufacturing an integrated passive device according to an embodiment;

[0019] Figure 3A 、 Figure 3B and Figure 3C each being a simplified and partially cross-sectional view of a structure obtained at the end of a certain step of a method of manufacturing an electronic filter circuit according to an embodiment; and

[0020] Figure 4 is a simplified and partial top view of an example of a device integrating an electronic filter circuit. DETAILED DESCRIPTION

[0021] Similar features in the various figures are denoted by similar reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals and may be arranged in the same structure, dimensions, and material properties.

[0022] For the sake of clarity, only the steps and elements that are useful for understanding the embodiments are described in detail. In particular, the application of the electronic filter circuit is not described in detail. The embodiments are compatible with all or most applications of the electronic filter circuit, and those skilled in the art can make possible modifications after reading this description.

[0023] Unless otherwise indicated, when two elements are referred to as being connected together, this means a direct connection without any intervening elements other than conductors, and when two elements are referred to as being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0024] In the following description, when referring to terms such as "edge", "back", "top", "bottom", "left", "right" etc. that define absolute positions, or terms such as "above", "below", "upper", "lower" etc. that define relative positions, or terms such as "horizontal", "vertical" etc. that define directions, unless otherwise indicated, they refer to the orientation of the drawing.

[0025] Unless otherwise indicated, the expressions "about," "approximately," "substantially," and "around" mean plus or minus 10%, preferably plus or minus 5%.

[0026] In the following description, unless otherwise specified, the terms "insulating" and "conductive" mean electrical insulation and electrical conduction, respectively.

[0027] Figure 1 is a partial and simplified cross-sectional view of an example of an electronic filter circuit 100 according to an embodiment.

[0028] In the example shown, the electronic filter circuit 100 includes an integrated passive device 101 including a semiconductor substrate 103, for example a wafer made of a semiconductor material such as silicon. In this example, the semiconductor substrate 103 includes a region 105 that is adjacent to a surface 103A of the semiconductor substrate 103 (at Figure 1 In the orientation shown in FIG. 1 , the lower surface of substrate 103 is flush, and at least one bandpass filter, such as an integrated passive device (IPD) filter, is formed therein. Region 105, for example, includes a plurality of passive electronic components, each of which is selected from the group consisting of: a resistive component, such as a resistor; a capacitive component, such as a capacitor; and an inductive component, such as an inductor.

[0029] As an example, the region 105 includes an RLC filter including at least one resistive component, at least one capacitive component, and at least one inductive component. Figure 1 The structure of region 105 is not shown in detail in order not to overload the drawing. In particular, the passive electronic components formed in region 105 of semiconductor substrate 103 are not shown.

[0030] In the illustrated example, the integrated passive device 101 further comprises an interconnect structure 107 coating the surface 103A of the semiconductor substrate 103. The interconnect structure 107 comprises, for example, an insulating layer 109 and a stack of conductive tracks 111 located within and / or between the insulating layers 109, some of which are in contact with the region 105.

[0031] In the example shown, each conductive track 111 is connected to a contact element 113 located on surface 103A of semiconductor substrate 103. For example, conductive tracks 111 enable contact elements 113 to be connected to terminals of passive electronic components formed in region 105. For example, contact elements 113 are intended to be connected to components external to circuit 100. In the example shown, contact elements 113 are each connected via solder balls 115 to contact elements 117 supported by a support substrate 119. Support substrate 119 is, for example, a printed circuit board. Each contact element 117 is, for example, a conductive pad or a conductive track.

[0032] In the example shown, the circuit 100 further includes a bulk acoustic wave (BAW) filter 151 on a side of the semiconductor substrate 103 opposite to its surface 103A (at Figure 1 The integrated passive device 101 is stacked with a semiconductor substrate 153 (located on the upper surface side of the substrate 103 in an orientation of φ104). In the example shown, the bulk acoustic wave filter 151 includes a semiconductor substrate 153, for example, a wafer made of a semiconductor material such as silicon, having a bulk acoustic wave filter structure 155 connected to electrodes 157 formed inside and on top thereof.

[0033] Structure 155 is, for example, of the FBAR (Film Bulk Acoustic Resonator) type, also known as a "diaphragm" bulk acoustic wave filter. In this case, structure 155 includes a diaphragm, for example made of an insulating material, and at least one piezoelectric layer located on the diaphragm, the diaphragm being suspended above an air-filled cavity formed in substrate 153, the at least one piezoelectric layer being interposed, for example, between electrodes 157. Figure 1 The structure 155 is not shown in detail in order not to overload the drawing. Alternatively, the structure 155 may be of the SMR (solid mounted resonator) type. In this case, the structure 155 comprises, for example, a diaphragm of insulating material located on and in contact with the Bragg mirror, and at least one piezoelectric layer located on the diaphragm, for example, between the electrodes 157.

[0034] In the illustrated example, the integrated passive device 101 is separated from the bulk acoustic wave filter 151 by a cavity 171. In this example, the cavity 171 is formed from the surface 103B of the semiconductor substrate 103 (i.e., at Figure 1103B) vertically extending from the upper surface of the integrated passive device 101 to the surface 153A of the semiconductor substrate 153 of the bulk acoustic wave filter 151 located in front of the surface 103B (i.e., in the Figure 1 In the illustrated example, the cavity 171 is laterally delimited or defined by a peripheral wall 173. Figure 1 In the example shown in FIG, peripheral wall 173 extends perpendicularly from surface 103B of substrate 103 to surface 153A of substrate 153. Peripheral wall 173 is, for example, made of an insulating material such as a polymer. Cavity 171 defined by wall 173 and surfaces 103B and 153A is, for example, filled with air. Alternatively, the interior of cavity 171 may be under a partial vacuum.

[0035] In the example shown, circuit 100 also includes conductive pillars 181 that span integrated passive device 101, and each conductive pillar connects one of electrodes 157 of bulk acoustic wave filter 151 to one of contact elements 113. In the illustrated example, each conductive pillar 181 protrudes from surface 103B of semiconductor substrate 103, spans cavity 171, and sits atop and in contact with one of electrodes 157. As an example, the height of each pillar 181 defines the height or thickness of cavity 171.

[0036] For example, in a top view, the peripheral wall 173 has an annular shape surrounding the conductive pillar 181. This advantageously enables the conductive pillar 181 to be protected from external stresses, such as mechanical shocks. This further enables the lateral dimensions of the electronic filter circuit to be reduced, for example, compared to an arrangement in which the electrode 157 of the BAW filter 151 is connected to the contact element 117 of the support substrate 119 via a pillar located outside the cavity 171. As an example, in a top view, the peripheral wall 173 has an outer periphery of any shape, such as a substantially rectangular, oval, square, circular, etc. The cavity 171 is, for example, tight or sealed. This prevents particles or moisture from entering the cavity 171. As a variant, the peripheral wall 173 can have openings, in particular to allow for air exchange between the interior of the cavity 171 and the external environment. For example, this facilitates pressure balancing between the interior and exterior of the cavity 171, for example to account for heating of the circuit 100 during its operation.

[0037] In circuit 100, integrated passive device 101 advantageously serves as a cover for BAW filter 151. This advantageously avoids the use of a dedicated cover that does not include electronic components. In other words, the use of integrated passive device 101 as a cover for BAW filter 151 enables the combination of mechanical protection, particularly provided by substrate 103 and peripheral wall 173, and filtering, particularly implemented by region 105, in the same component.

[0038] Figure 1 The circuit 100 is shown as an example including two conductive pillars 181, each of which connects one of the contact elements 113 of the integrated passive device 101 to one of the electrodes 157 of the bulk acoustic wave filter 151. However, this example is not limiting, and the circuit 100 may more generally include an integer number of conductive pillars greater than or equal to one, each of which connects a contact element of the integrated passive device 101 to an electrode of the bulk acoustic wave filter 151.

[0039] An advantage of filters using integrated passive devices is that they have high rejection performance in the attenuation bands located on either side of their passband. However, a disadvantage of these filters is that they have wide transition bands between their passband and each of their attenuation bands. Conversely, BAW filters have the advantage of having a narrower transition band than filters using integrated passive devices, but suffer from lower rejection performance. The fact that integrated passive device 101 and BAW filter 151 are combined in circuit 100 makes it possible to combine the advantages of these two filters while eliminating or reducing their disadvantages. For example, circuit 100 has a narrower transition band than that of integrated passive device 101 alone, and has better rejection performance than BAW filter 151 alone.

[0040] Furthermore, since the integrated passive device 101 and the BAW filter 151 of the circuit 100 are stacked, space is advantageously saved, which further enables a shorter connection between the integrated passive device 101 and the BAW filter 151, thereby providing a lower resistance.

[0041] Figure 2A 、 Figure 2B 、 Figure 2C 、 Figure 2D and Figure 2E Each is a simplified and partial cross-sectional view of a structure obtained at the end of a certain step of a method for manufacturing an integrated passive device 101 according to an embodiment.

[0042] Figure 2A The structure obtained after forming the region 105 and the interconnect structure 107 on the surface 103A of the substrate 103 is shown. One or more electronic components (not shown) are formed inside and / or on top of the region 105. According to an embodiment, at this stage of the process, the substrate 103 corresponds to a wafer, and a plurality of regions 105 with integrated passive devices are formed inside and / or on top of the substrate 103. These regions 105 can be the same or different. Figure 2A, a single region 105 is shown, and the interconnect structure 107 comprises a conductive track 111 connected to the region 105 and an insulating layer 109 covering the conductive track 111 and the surface 103A of the substrate 103 around the conductive track 111. At this stage of the method, the thickness of the substrate 103 is greater than the desired final thickness of the substrate 103. At this stage of the method, the thickness of the substrate 103 is, for example, in the range from 500 μm to 1.3 mm.

[0043] Figure 2B The structure obtained after forming openings 201 at the desired locations of each connecting column 181 and forming openings 203 at the desired locations of insulating wall 205 is shown. Openings 201 and 203 completely span the interconnect structure 107 and extend from surface 103A to a portion of the thickness of substrate 103. Opening 201 has the same depth and opening 203 has the same depth. The depth of opening 201 is greater than the depth of opening 203. The depth of opening 203 is, for example, substantially equal to the desired final thickness of substrate 103. The depth of opening 203 is, for example, in the range of 50 to 300 μm. Openings 201 and 203 are formed, for example, by a deep reactive ion etching (DRIE) step. Depending on the method used to form openings 201 and 203, openings 201 and 203 can be formed simultaneously or in separate steps. In particular, for deep reactive ion etching, the etching rate depends on the diameter of the opening, so opening 203, for example, having a width less than the average diameter of opening 201, can be formed simultaneously with opening 201.

[0044] The cross section of each opening 201 may have any shape. For example, each opening 201 may have a substantially circular shape, a rectangular shape with rounded corners, an elliptical shape, etc. in top view. For example, the opening 201 may have a depth depending on the desired height of the pillar 181 .

[0045] Figure 2B The structure obtained after forming an insulating layer 207 in each opening 201 and forming an insulating wall 205 in each opening 203 is further shown. At this stage of the method, the insulating layer 207 coats the sidewalls and bottom of the opening 201. This step may include depositing the insulating layer on the walls of the opening 203 and on the walls of the opening 201 at the same time, with the insulating layer having a thickness such that it fills, i.e., completely fills, the opening 203, but does not fill each opening 201, so that after forming the insulating layer, a cavity 209 is present in each opening 201.

[0046] Figure 2CThe structure obtained after the following steps are shown: for each connecting stud to be formed, an opening 211 is formed in the insulating layer 109 to expose one of the conductive tracks 111; a mask (not shown) is deposited on the insulating layer 207, including, for each connecting stud to be formed, over the openings exposing the cavities 209, the openings 211, and the portions of the insulating layer 109 that couple the cavities 209 to the openings 211; and an interface layer 215 is formed in each opening. At this stage of the method, the interface layer 215 covers all the walls of the cavities 209, in particular the sidewalls and the bottom of the cavities 209, the walls of the openings 211, and the exposed portions of the insulating layer 109 that couple the cavities 209 to the corresponding openings 211. The mask may correspond to a film applied to the insulating layer 109.

[0047] Figure 2C The structure obtained after the following steps are further shown: for each connecting stud to be formed, each cavity 209 is completely filled with a conductive material, thereby forming the shaft of the connecting stud 181 and forming a connecting portion 217 of each connecting stud. Connecting portion 217 corresponds, for example, to one of the contact elements 113 of circuit 100. The conductive material forming the shaft can be deposited by electrodeposition on interface layer 215. In this case, the deposition of the conductive material is performed starting from interface layer 215 in a direction substantially perpendicular to interface layer 215. This advantageously allows the filling of cavity 209 even when the form factor of cavity 209, i.e., the ratio of cavity height to cavity diameter, is high, because the deposition of the conductive material is performed, in particular, starting from the sidewalls of cavity 209.

[0048] Figure 2C Further shown is the structure obtained after removing the film and forming an insulating layer 219 covering the connection portion 217 for each connection pillar 181 .

[0049] Figure 2D The structure obtained after etching substrate 103 from surface 103B of substrate 103 is shown. At the end of the etching step, for each connecting pillar 181, a portion of the shaft surrounded by interface layer 215 and insulating layer 207 protrudes from surface 103B of substrate 103 along a height H. Height H, for example, substantially corresponds to the thickness of future cavity 171. The etching step can involve selective chemical etching of the material forming insulating layer 207. For example, etching of substrate 103 stops when the ends of the walls are flush with lower surface 103B. Height H is determined by the etching step.

[0050] Figure 2DThe structure obtained after forming an insulating layer 221 on the surface 103B of the substrate 103 is further shown. The insulating layer 221 is made of, for example, the same material as the insulating layer 207, and the thickness of the insulating layer 221 is, for example, substantially equal to the sum of the thickness of the insulating layer 207 and the desired final thickness of the insulating layer 221 at this stage of the method, for example, equal to twice the thickness of the insulating layer 207.

[0051] Figure 2E The structure obtained after the portion of the insulating layer 207 exposed on the surface 103B side of the substrate 103 is completely etched is shown. This step can further result in etching of the insulating layer 221 across the thickness of the insulating layer 207. The insulating layer 221 is then obtained with the desired final thickness.

[0052] Figure 2E Further shown is the structure obtained after etching the interface layer 215 covering the end surface, forming a top coating layer 223 , and forming a piece of bonding material 225 for each connection pillar 181 .

[0053] Figure 2E Also shown is the structure obtained after a cutting step to separate the integrated passive devices 101. As an example, the cutting lines are located between the walls 205 of adjacent integrated passive devices 101.

[0054] Each such individualized integrated passive device 101 can then be bonded to an external component, such as a support substrate 119. The wall 205 protects the region 105 of the integrated passive device 101, particularly from electrostatic discharge at the sidewalls of the integrated passive device 101 during handling and bonding of the integrated passive device 101 to an external component.

[0055] Figure 3A 、 Figure 3B and Figure 3C Each is a fabricated electronic filter circuit according to an embodiment, e.g. Figure 1 A simplified and partially cross-sectional view of the structure obtained at the end of a certain step of the method of the circuit 100. Figures 3A to 3C The steps described can be found in the previous Figures 2A to 2E The described steps of forming the integrated passive device 101 may be performed before, during, or after.

[0056] Figure 3A The structure obtained after forming the structure 155 inside and on top of the semiconductor substrate 153 and after forming the electrode 157 is shown.

[0057] Figure 3AThe structure obtained after forming the peripheral wall 173 on the surface 153A of the semiconductor substrate 153 is further shown. At the end of this step, the peripheral wall 173 has a height substantially equal to the height H of the pillars 181, for example.

[0058] Figure 3B Shows that Figure 2E The integrated passive device 101 is transferred to Figure 3A As an example, the integrated passive device 101 is connected to the bulk acoustic wave filter 151. Figure 2E The orientation of the semiconductor substrate 103 is reversed so that the surface 103B of the semiconductor substrate 103 is located in front of the surface 153A of the bulk acoustic wave filter 151. Then, for example, the block of bonding material 225 of the integrated passive device 101 is brought into contact with the electrode 157 of the bulk acoustic wave filter 151, with the peripheral wall 173 supported on the surface 103B of the semiconductor substrate 103. This, for example, results in the electronic filter circuit 100.

[0059] Figure 3C The structure obtained after bonding the electronic filter circuit 100 to the support substrate 119 is shown. As an example, the insulating layer 219 has previously been opened vertically in line with the contact elements 113 to clear their surfaces opposite the pillars 181. The circuit 100 is then transferred to the support substrate 119, for example, so that the surface 103A of the semiconductor substrate 103 is located in front of the contact elements 117 of the support substrate 119.

[0060] Figure 4 is a simplified and partial top view of an example of a device 400 integrating an electronic filter circuit, such as circuit 100. In the example shown, device 400 is a cellular telephone or smart phone.

[0061] In this example, the device 400 includes a processing circuit 401 (AP), such as a microcontroller or main microprocessor of the device 400. The processing circuit 401 is connected to, for example, a radio frequency integrated circuit 403 (RFIC) that includes the electronic filter circuit 100. In the illustrated example, the radio frequency integrated circuit 403 is connected to an antenna 405 (ANT), such as a radio frequency communication antenna of the device 400. Although Figure 4 This is not described in detail in order to avoid overloading the drawing, but the radio frequency integrated circuit 403 may also include components and circuits for realizing functions such as impedance matching, amplification, modulation / demodulation, switching, etc.

[0062] The apparatus 400 may also include other components, such as Figure 4 Other electronic components or circuits not shown in the figure. Figure 4 In FIG. 4 , the function block 407 (FCT) is represented.

[0063] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations may be combined, and that further variations will occur to those skilled in the art. In particular, those skilled in the art will be able to provide and manufacture a circuit similar to circuit 100 but including a plurality of integrated passive devices 101 stacked on top of each other based on the teachings of this description.

[0064] In addition, although Figure 4 While the circuit 100 is integrated into a cellular phone or smartphone as an example, the embodiments are not limited to this example and are more generally applicable to any device or system with wireless communication capabilities, such as in the field of telematics. In particular, the circuit 100 can be integrated into a motor vehicle, for example, to enable wireless Internet access functionality, communication between the vehicle and external equipment or systems, autonomous driving, etc.

[0065] Finally, based on the functional indications given above, the practical implementation of the described embodiments and variants is within the capabilities of a person skilled in the art.In particular, the described embodiments are not limited to the specific examples of materials and dimensions mentioned in this description.

Claims

1. An electronic filter circuit comprising: integrated passive devices; a bulk acoustic wave filter stacked on the integrated passive device on a first surface side of the integrated passive device; as well as At least one conductive pillar spans the integrated passive device and connects an electrode of the BAW filter to a contact element located on a second surface of the integrated passive device opposite to the first surface and intended to be connected to an external element.

2. The circuit according to claim 1, wherein The integrated passive device forms a lid of the bulk acoustic wave filter.

3. The circuit according to claim 1, wherein The first surface and a third surface of the BAW filter located in front of the first surface define a cavity.

4. The circuit according to claim 3, wherein The cavity has a thickness defined by a height of the at least one conductive post, the at least one conductive post protruding from the first surface.

5. The circuit according to claim 3, wherein The cavity is laterally bounded by a peripheral wall.

6. The circuit according to claim 5, wherein The peripheral wall is made of insulating material.

7. The circuit according to claim 3, wherein The at least one conductive pillar is located inside the cavity.

8. The circuit according to claim 1, wherein The integrated passive device includes a first semiconductor substrate, wherein the first semiconductor substrate includes a region with at least one filter formed inside and on top of the region.

9. The circuit according to claim 1, wherein The BAW filter includes a second semiconductor substrate including a region in which a BAW filter structure connected to the electrode is formed inside and on top of the region.

10. An electronic device comprising: Electronic filter circuit, comprising: integrated passive devices; a bulk acoustic wave filter stacked on the integrated passive device on a first surface side of the integrated passive device; and At least one conductive pillar spans the integrated passive device and connects an electrode of the BAW filter to a contact element located on a second surface of the integrated passive device opposite to the first surface and intended to be connected to an external element. The electronic device according to claim 10 , wherein: The integrated passive device forms a lid of the bulk acoustic wave filter.

12. The electronic device according to claim 10, wherein: The first surface and a third surface of the BAW filter located in front of the first surface define a cavity.

13. The electronic device according to claim 12, wherein: The cavity has a thickness defined by a height of the at least one conductive post, the at least one conductive post protruding from the first surface.

14. The electronic device according to claim 12, wherein: The cavity is laterally bounded by a peripheral wall.

15. The electronic device according to claim 14, wherein: The peripheral wall is made of insulating material.

16. The electronic device according to claim 12, wherein: The at least one conductive pillar is located inside the cavity.

17. The electronic device according to claim 10, wherein: The integrated passive device includes a first semiconductor substrate, wherein the first semiconductor substrate includes a region with at least one filter formed inside and on top of the region.

18. The electronic device according to claim 10, wherein: The BAW filter includes a second semiconductor substrate including a region in which a BAW filter structure connected to the electrode is formed inside and on top of the region.

19. The electronic device according to claim 10, wherein: The electronic device is a cellular phone.

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