Manufacturing method of interconnection structure circuit board and interconnection structure circuit board

Abstract

The invention relates to the technical field of circuit board connection, in particular to a manufacturing method of an interconnection structure circuit board and the interconnection structure circuit board. The method comprises the steps of performing groove filling processing on one end of a through hole of a first sub-board to obtain a first interconnection interface; performing convex block filling processing on one end of the through hole of the second daughter board to obtain a second interconnection interface; performing connection preprocessing on a first interconnection interface of the first daughter board; and pressing and curing the first interconnection interface and the second interconnection interface to obtain the interconnection structure circuit board. According to the invention, the combination reliability of the interconnection structure can be effectively improved, and the layering risk is effectively inhibited.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board connection, and in particular to a method for manufacturing an interconnected structure circuit board and an interconnected structure circuit board. Background Art

[0002] In the related technologies, in the fields of communications, high-performance computing, and consumer electronics, Z-directed interconnect technology can achieve ultra-multi-layer interconnection, vertical stacking of multiple chips, and smaller-sized high-performance packaging to meet the needs of large-capacity, high-speed information transmission. However, in the existing technology, the interconnection interface of Z-directed interconnection technology is a conductive paste superimposed between two layers of copper surfaces. When heated, the interface between the copper surface and the conductive paste is relatively easy to delaminate, especially in the case of multi-layer interconnection, where each interconnection interface is more prone to delamination. The delamination phenomenon not only leads to a decline in signal transmission performance and power distribution failure, but can even cause catastrophic failures such as short circuits, seriously restricting the reliability and service life of electronic equipment.

[0003] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the Invention

[0004] The main purpose of the embodiments of the present application is to provide a method for manufacturing an interconnected structure circuit board and an interconnected structure circuit board, which can effectively improve the reliability of the interconnection structure and effectively suppress the risk of delamination.

[0005] To achieve the above-mentioned purpose, one aspect of an embodiment of the present application provides a method for manufacturing an interconnected structure circuit board, the method comprising:

[0006] Performing a groove filling process on one end of the through hole of the first daughter board to obtain a first interconnection interface;

[0007] Performing a bump filling process on one end of the through hole of the second daughter board to obtain a second interconnection interface;

[0008] Performing connection preprocessing on the first interconnection interface of the first sub-board;

[0009] The first interconnection interface and the second interconnection interface are pressed and cured to obtain the interconnection structure circuit board.

[0010] In some embodiments, the step of filling a groove at one end of the through hole of the first daughter board to obtain the first interconnection interface includes the following steps:

[0011] Obtaining the first sub-board provided with the through hole;

[0012] Performing plugging treatment on the through hole by using a plugging material;

[0013] shallowly drilling or removing the glue at one end of the plugging material after the plugging treatment, so as to form a shallow groove at one end of the plugging material of the first sub-board;

[0014] Electroplating is performed on the other end of the through hole after the plugging treatment and the surface of the shallow groove to obtain the first interconnection interface provided with the shallow groove after the electroplating.

[0015] In some embodiments, performing a bump filling process on one end of the through hole of the second daughter board to obtain the second interconnection interface includes the following steps:

[0016] Acquire the second sub-board provided with the through hole;

[0017] Performing plugging treatment on the through hole by using a plugging material;

[0018] Electroplating the second sub-board after the plugging treatment to seal both ends of the plugging material of the second sub-board;

[0019] A bump is provided above one end of the through hole after electroplating to obtain the second interconnection interface provided with the bump.

[0020] In some embodiments, the bumps are provided by local electroplating or local copper reduction.

[0021] In some embodiments, grooves are provided on the surface of the bump.

[0022] In some embodiments, performing connection preprocessing on the first interconnection interface of the first daughter board includes the following steps:

[0023] providing an adhesive layer and a maylar film on the first interconnected interface;

[0024] Performing window processing on the adhesive layer and the maylar film beside the shallow groove;

[0025] Filling the conductive paste into the shallow groove after the windowing process;

[0026] The maylar film is removed after pre-baking the first interconnect interface.

[0027] In some embodiments, the length of the bump is less than the sum of the depth of the shallow groove and the thickness of the adhesive layer.

[0028] In some embodiments, the step of pressing and curing the first interconnection interface and the second interconnection interface to obtain the interconnection structure circuit board includes the following steps:

[0029] Aligning the protrusion of the second sub-board with the shallow groove of the first sub-board;

[0030] inserting the bump into the conductive paste in the shallow groove;

[0031] The first sub-board and the second sub-board are pressed and cured in a high-temperature and high-pressure environment to obtain the interconnected structure circuit board.

[0032] In some embodiments, the circuit board further includes a third daughter board, and the method for manufacturing the interconnection structure circuit board of the third daughter board includes the following steps:

[0033] Performing the groove filling process on one end of the through hole of the third sub-board to obtain a third interconnection interface;

[0034] Performing the filling bump process on the other end of the through hole of the second sub-board to obtain a fourth interconnection interface;

[0035] Performing the connection preprocessing on the third interconnection interface of the third daughter board;

[0036] The first interconnection interface and the second interconnection interface as well as the third interconnection interface and the fourth interconnection interface are pressed and cured to obtain the interconnection structure circuit board including the third sub-board.

[0037] To achieve the above-mentioned purpose, another aspect of an embodiment of the present application provides an interconnected structure circuit board, which is manufactured by the aforementioned method for manufacturing an interconnected structure circuit board.

[0038] The embodiments of the present application include at least the following beneficial effects: The present application provides a method for manufacturing an interconnected structure circuit board and an interconnected structure circuit board. This solution connects the first sub-board and the second sub-board to form an interconnected structure circuit board by filling grooves and filling bumps on the first sub-board and pre-treating the connection of the first sub-board. This fundamentally solves the problem of thermal stratification of multi-layer interconnected structure circuit boards, as well as processes such as pressing and curing under high temperature and high pressure environments, significantly improving the thermal reliability of multi-layer interconnected structure circuit boards, ensuring the long-term stable operation of multi-layer interconnected structure circuit boards, and effectively extending the service life of electronic equipment. Through-hole plugging treatment, bump and groove design, combined with electroplating and window opening processes, enhance electrical connection stability and mechanical strength. Shallow grooves, bumps and conductive paste filling expand the contact area, improve connection firmness, and optimize heat dissipation performance. At the same time, ultra-multi-layer interconnection and high-performance packaging are achieved to meet the needs of large-capacity and high-speed information transmission, significantly improving the reliability and service life of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 yes Figure 1 It is a flow chart of conventional process;

[0040] Figure 2This is a flow chart of a method for manufacturing an interconnected structure circuit board provided in an embodiment of the present application;

[0041] Figure 3 yes Figure 1 Flowchart of step S100 in FIG.

[0042] Figure 4 is a schematic diagram of a cross section of the first sub-plate;

[0043] Figure 5 is a schematic diagram of a cross section of the first daughter board after the via plugging process;

[0044] Figure 6 is a schematic diagram of a cross section of a first sub-plate provided with a shallow groove;

[0045] Figure 7 is a schematic diagram of a cross section of the first daughter board after electroplating;

[0046] Figure 8 is a schematic diagram of a cross section of a second sub-board provided with a through hole;

[0047] Figure 9 is a schematic diagram of the cross section of the second daughter board after electroplating;

[0048] Figure 10 is a schematic diagram of a cross section of a second sub-board provided with bumps;

[0049] Figure 11 is a schematic diagram of a cross section of the first sub-plate after connection pre-processing;

[0050] Figure 12 is a schematic diagram of a cross section of the first sub-board and the second sub-board after pressing and curing;

[0051] Figure 13 It is a schematic diagram of a cross section of an interconnection structure circuit board with a third daughter board. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are merely examples of devices and methods consistent with some aspects of the embodiments of the present application.

[0053] It will be understood that the terms "first", "second", etc. used in this application may be used herein to describe various concepts, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another. For example, without departing from the scope of the embodiments of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0054] The terms "at least one", "plurality", "each", "any", etc. used in this application include "at least one", "two" or more, "plurality" or "each", "any" or "any one", "each" or "any one" as used herein.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0056] In related technologies, such as Figure 1 As shown, Figure 1 This is a flow chart of a conventional process, with the blocks corresponding to each step representing schematic cross-sections of circuit boards. The conventional process for Z-direction interconnection involves laying a prepreg and Mylar film on the surface of a first circuit board without vias. The process is then heated to 100 to 135°C and vacuum-pressed. Laser drilling is then used to drill holes in the prepreg and Mylar film on the first circuit board. Conductive paste is then printed in the holes. The first circuit board with the conductive paste is baked at 60°C for 15 minutes. Conductive paste is then printed a second time over the paste to increase its height. The Mylar film is then removed to expose more of the paste, creating a raised conductive paste surface relative to the prepreg. The flat surface of a second circuit board without vias is then pressed onto the raised conductive paste surface. The first and second circuit boards are then pressed and cured to form an integrated interconnected circuit board structure. The conventional interconnection interface is a combination of copper surface, conductive paste, and copper surface. Under heat, the interface between the copper surface and the conductive paste can easily delaminate due to varying degrees of heat absorption and deformation. Delamination is particularly prone to occur at each interconnection interface when there is more than one interconnection interface in the circuit board structure.

[0057] In view of this, an embodiment of the present application provides a method for manufacturing an interconnection structure circuit board.

[0058] Figure 2 This is an optional flow chart of a method for manufacturing an interconnected structure circuit board provided in an embodiment of the present application. Figure 2The method may include but is not limited to steps S100 to S400.

[0059] Step S100: performing a groove filling process on one end of the through hole of the first daughter board to obtain a first interconnection interface;

[0060] Step S200: performing a bump filling process on one end of the through hole of the second daughter board to obtain a second interconnection interface;

[0061] Step S300: performing connection preprocessing on the first interconnection interface of the first daughter board;

[0062] Step S400: Pressing and curing the first interconnection interface and the second interconnection interface to obtain an interconnection structure circuit board.

[0063] Specifically, a shallow groove is provided on the first sub-board by filling the groove process, and a bump is provided on the second sub-board by filling the bump process. In order to make the first sub-board and the second sub-board connected more tightly, connection pre-treatment is performed on the side of the first sub-board provided with the shallow groove, and the first interconnection interface of the first sub-board and the second interconnection interface of the second sub-board are aligned, pressed and cured to form a whole, thereby obtaining an interconnection structure circuit board. Compared with conventional connection methods, this method allows the formed bump to be embedded in the shallow groove, forming a fully surrounded structure for the bump, thereby effectively improving the reliability of the connection of the interconnection structure circuit board.

[0064] In some embodiments, as Figure 3 As shown, Figure 3 yes Figure 2 Flowchart of step S100 in FIG. Figure 1 Step S100 includes but is not limited to steps S110 to S140:

[0065] Step S110: obtaining a first sub-board provided with a through hole;

[0066] Step S120: plugging the through hole with a plugging material;

[0067] Step S130: shallowly drilling or removing the glue at one end of the plugging material after the plugging process to form a shallow groove at one end of the plugging material of the first daughter board;

[0068] Step S140: electroplating the other end of the through hole after the plugging treatment and the surface of the shallow groove to obtain a first interconnected interface with a shallow groove after electroplating.

[0069] Specifically, in step S110, Figure 4 As shown, Figure 4This is a schematic diagram of a cross-section of the first sub-board, showing the first sub-board with through-holes. In a circuit board, a first sub-board with through-holes is one in which through-holes are provided on the board body, extending from one side to the other. These through-holes completely penetrate the entire first sub-board. Through-holes are typically used to connect circuits at different levels, providing a path for electrical connections while also providing mechanical support. They are typically produced by drilling holes using a mechanical drill or laser drilling technology to achieve electrical connections.

[0070] In step S120, if Figure 5 As shown, Figure 5 This is a schematic diagram of a cross-section of the first daughterboard after plugging. During the interconnected circuit board manufacturing process, the through-holes of the first daughterboard are plugged to meet varying process and electrical performance requirements. The plugging material used during plugging offers flexibility, allowing for the selection of conductive or non-conductive materials, such as epoxy resin. Upon curing, it forms an insulating layer that prevents solder from flowing into the holes during soldering, causing short circuits. It also improves board surface flatness, providing a better soldering foundation for surface mount components.

[0071] In step S130, if Figure 6 As shown, Figure 6 This is a schematic diagram of the cross-section of the first sub-board, which is equipped with a shallow groove. During the interconnection circuit board manufacturing process, after the through-hole plugging process is completed, a shallow groove can be formed at one end of the plugged hole by partially removing the plugging material through shallow drilling or debonding. The shallow drilling process uses a high-precision CNC drilling machine to perform micro-cutting on the plugged hole surface with a tiny feed rate, precisely controlling the groove depth and shape, quickly removing excess plugging material, and forming a smooth shallow groove. The debonding process uses a chemical solution to etch the plugged hole surface, selectively dissolving the plugging material and gradually forming the desired shallow groove structure. Both processes can form a specific shallow groove at one end of the plugged hole, providing an adaptive structural foundation for subsequent process requirements.

[0072] In step S140, if Figure 7 As shown, Figure 7 This is a schematic diagram of the cross-section of the first sub-board after electroplating. After the plug-hole shallow groove processing is completed, the first sub-board is double-sided electroplated. By immersing the circuit board in the plating solution and connecting the power supply to form an electrolytic circuit, the electrochemical principles of the electroplating process are utilized to cause metal ions to migrate directionally under the action of the electric field and deposit on the surface of the circuit board. During this process, not only is a layer of electroplating evenly covered on both sides of the circuit board, but also the ends of the through-holes formed by shallow grooves through shallow drilling or degumming are fully wetted by the electroplating solution and the current conduction is used to achieve metal deposition on the groove walls and ends, thus forming a continuous and dense electroplating layer, thus obtaining the first interconnection interface with shallow grooves after electroplating. This process effectively enhances the conductivity, wear resistance, and oxidation resistance of the two ends of the through-hole, ensuring the reliability and stability of the circuit board's electrical connection.

[0073] In some embodiments, in step S200, one end of the through hole of the second sub-board is filled with a bump to obtain a second interconnection interface. This is achieved by plugging the obtained second sub-board and then electroplating it to form an electroplating layer at both ends of the through hole, and then setting a bump at one end of the through hole. The side of the second sub-board where the bump is provided is the second interconnection interface.

[0074] Specifically, if Figure 8 、 Figure 9 and Figure 10 As shown. Take another daughterboard with through-holes, the second daughterboard, and plug the through-holes. The plugging material can be flexibly selected based on actual needs. If maintaining the conductivity of the through-hole is required, a conductive paste containing silver or copper particles can be used. If insulation and board surface flatness are the priorities, a non-conductive material such as epoxy resin can be used and injected into the through-holes via vacuum printing or pressure filling.

[0075] After the plugging process is completed, the second daughter board is electroplated. The daughter board is immersed in the electroplating solution, and a uniform and dense electroplating layer is formed on the surface of the daughter board and at both ends of the through hole through the principle of electrochemical deposition. During the electroplating process, the electric current causes the metal ions in the electroplating solution to migrate directionally and deposit on the surface of the daughter board. Over time, a metal plating layer with a certain thickness is gradually built up, effectively improving the conductivity, corrosion resistance and wear resistance of the daughter board. At the same time, the electroplating layer at both ends of the through hole can enhance the stability of the electrical connection with external components or other circuit boards. After the electroplating is completed, a bump is set at one end of the through hole. One end of the through hole is selected according to the actual needs of the interconnection structure circuit board, and the bump is set at the selected end.

[0076] In some embodiments, the material of the bump includes copper pillars, solder or conductive glue. If the material of the bump is a copper pillar, the bump can be formed by local copper reduction or local electroplating process based on the electroplating layer of the through hole of the second sub-board. When the local copper reduction process is adopted, the surface of the second sub-board except for the target bump area is first coated with anti-corrosion ink, and a precise protective pattern is formed through exposure and development. Then the sub-board is immersed in etching solution. The copper layer not covered by the ink is gradually dissolved and removed, and the target area is able to protrude to form a bump due to the retained copper layer. This process can accurately control the shape and height of the bump. The local electroplating process is the opposite. First, an insulating layer is coated on the entire surface of the sub-board. A window is opened in a specific area at one end of the through hole by laser etching or photolithography technology to expose the electroplating layer as a conductive base. Then, the sub-board is placed in the electroplating solution. The electroplating principle is used to make the metal ions directionally deposited in the window area and gradually thicken, finally forming a bump structure of the desired height and shape. Both processes can achieve high-precision processing of bumps. The former focuses on subtractive manufacturing and is suitable for modifying existing copper layers; the latter adopts additive manufacturing, which can flexibly adjust the bump size to meet different circuit interconnection and mechanical assembly requirements.

[0077] If the bump material is a solder bump, flux must first be printed on the electroplating layer at one end of the through-hole, and then a reflow process is used to melt the pre-placed solder balls at high temperature to form a regular bump structure. When using conductive glue bumps, a dispensing machine is used to precisely apply high-viscosity conductive glue to the through-hole port, and after curing, a raised structure with good conductivity and mechanical strength is formed.

[0078] In some embodiments, after the bump is formed, grooves can be formed on the bump surface to increase its surface area. These grooves can include roughening or irregularly shaped bumps, enabling a stronger bond with the conductive paste during subsequent processing. The grooves can be achieved through laser roughening, chemical roughening, or mechanical grinding. Alternatively, photolithography can be used to coat the bump surface with photoresist, which is then exposed and developed using a mask to precisely define the groove area. An etching process is then used to etch the exposed areas with a chemical etchant or plasma, removing material layer by layer to form a regular groove structure. Alternatively, high-precision machining can be used, using micro-milling cutters or laser engraving equipment, to cut or burn the bump surface along a pre-set path, directly producing the desired groove shape and depth. These grooves also help distribute stress and optimize heat dissipation, ensuring efficient, non-delamination, and reliable operation of the interconnected circuit board.

[0079] In some embodiments, in step S300, Figure 11 As shown, Figure 11 The figure is a schematic diagram of the cross-section of the first sub-board after connection pretreatment. The first interconnection interface of the first sub-board undergoes connection pretreatment, and an adhesive layer and maylar film are provided on the first interconnection interface. The adhesive layer includes a prepreg or a pure adhesive film. The adhesive layer and maylar film can be prefabricated by directly bonding the adhesive layer provided with the maylar film to the first interconnection interface, and the adhesive layer is directly connected to the first interconnection interface. Next, a window treatment is performed on the first interconnection interface provided with the adhesive layer and maylar film. The position where the window treatment is performed on the first interconnection interface is above the shallow groove on the first sub-board. First, the window position is precisely calibrated to ensure that the window position is the same as the shallow groove position. Subsequently, the window is created using techniques such as photolithography or laser processing. In the case of photolithography, photoresist is first evenly coated on the adhesive layer and the Mylar film. A mask is then used to expose the film, causing a photochemical reaction in the photoresist corresponding to the shallow groove. A developer then dissolves the uncured portion, exposing the area where the window is to be created. In the case of laser processing, a computer-controlled high-energy laser beam precisely scans and cuts the Mylar film and adhesive layer at the shallow groove location along a pre-set path, instantly vaporizing or ablating the material to form a regular window. After the window is created, any remaining debris and impurities are removed to ensure a clean window edge.

[0080] After the window is opened, conductive paste is precisely filled into the shallow groove at the window location, the first interconnect interface. Based on the window size and design requirements, a conductive paste with an appropriate particle size and viscosity, such as an epoxy-based paste containing silver or copper particles, is selected to ensure effective filling and conductive properties. By controlling the needle's movement trajectory, dispensing pressure, and time during the dispensing process, the conductive paste is evenly injected into the window area, ensuring that the paste completely covers the shallow groove while preventing overflow and contamination of surrounding areas. After filling, the conductive paste is pre-baked. Using hot air or vacuum curing processes, the resin components in the paste are gradually cross-linked and hardened under specific temperature and pressure conditions. The Mylar film primarily serves as an insulator, protector, and support, protecting the substrate surface from scratches and contamination. Its excellent mechanical strength also provides stable support for process operations, preventing the adhesive layer and other materials from flowing freely and impacting the manufacturing process. Since the pre-baked conductive paste and adhesive layer are in a plastic, semi-solid state and cannot flow freely, the Mylar film must be removed for the subsequent steps to proceed smoothly.

[0081] In some embodiments, since the top of the bump is not necessarily flat, when the top of the bump contacts the electroplating layer in the shallow groove, it is a hard contact. If the bump contacts the electroplating layer hard, it may damage the electroplating layer, causing leakage of the internal material of the electroplating layer, etc., affecting the performance of the interconnected structure circuit board. In addition, due to the different materials of the electroplating layer and the bump, the deformation amount generated under heat is also inconsistent, or the bonding layer becomes thinner due to the influence of the external environment. Similarly, if the bump is too long, it is easy to damage the electroplating layer and affect the overall performance. For this reason, the length of the bump is set to be less than the sum of the depth of the shallow groove and the thickness of the bonding layer to ensure that the bump does not contact the electroplating layer during the connection process. At the same time, the top of the bump and the conductive paste in the middle of the electroplating layer form spatial redundancy, which also enables the conductive paste in the subsequent steps to fully surround the bump and make the connection tighter.

[0082] In some embodiments, in step S400, Figure 12 As shown, Figure 12It is a schematic diagram of the cross section of the first sub-board and the second sub-board after pressing and curing. For pressing and curing the first interconnection interface and the second interconnection interface to obtain an interconnection structure circuit board, specifically, the first interconnection interface of the first sub-board after connection pretreatment is aligned with the second interconnection interface of the second sub-board, at this time, the shallow groove of the first interconnection interface and the bump of the second interconnection interface are on the same vertical line. The bump is inserted into the conductive paste in the shallow groove until the second sub-board is connected to the adhesive layer, and at this time the conductive paste completely wraps the bump. Since the adhesive layer has a certain thickness, there is no direct contact between the first sub-board and the second sub-board after connection pretreatment through the adhesive layer. Then the first sub-board and the second sub-board are pressed into a whole under a high temperature and high pressure environment. At this time, the conductive paste in the shallow groove is sintered and cured during the pressing process. Since the bump penetrates the conductive paste, it forms a fully enclosed whole with the bump, thereby obtaining an interconnection structure circuit board, that is, an interconnection structure circuit board with a two-layer structure. Therefore, the reliability of the interconnection structure circuit board is effectively improved and the risk of delamination is effectively suppressed.

[0083] In some instances, such as Figure 13 As shown, Figure 13 This is a schematic diagram of a cross-section of a circuit board with an interconnected structure having a third sub-board. In order to meet more requirements in circuit board design, a third sub-board is specially provided. A third sub-board with a through hole is obtained, and the through hole of the third sub-board is plugged with a plugging material. One end of the plugging material after the plugging treatment is shallowly drilled or debonded to form a shallow groove at one end of the plugging material of the third sub-board. The other end of the through hole after the plugging treatment and the surface of the shallow groove are electroplated to obtain a third interconnection interface with a shallow groove after electroplating. A second sub-board with a through hole is obtained, and the through hole is plugged with a plugging material. The second sub-board after the plugging treatment is electroplated to seal both ends of the plugging material of the second sub-board. Bumps are provided above both ends of the electroplated through hole to obtain a second interconnection interface with bumps at both ends of the second sub-board. An adhesive layer and maylar film are applied to the third interconnect interface. Window treatment is performed on the adhesive layer and maylar film adjacent to the shallow groove of the third sub-board. Conductive paste is then filled into the windowed shallow groove of the third sub-board. The third interconnect interface is pre-baked and the maylar film is removed to complete the connection pretreatment of the third interconnect interface. Two bumps on the second sub-board are aligned with the shallow grooves of the first and third sub-boards, respectively. The two bumps are then pressed into the conductive paste within the shallow grooves of the first and third sub-boards. The first and second interconnect interfaces, as well as the third and fourth interconnect interfaces, are pressed and cured in a high-temperature, high-pressure environment to obtain an interconnect structure circuit board including the third sub-board, i.e., a three-layer interconnect structure circuit board.

[0084] In some embodiments, in order to meet the needs of more complex circuit board design, shallow grooves can be set at both ends of the through-holes of the first sub-board and the third sub-board respectively by filling grooves, that is, obtaining the first interconnection interface, the third interconnection interface, the fifth interconnection interface and the sixth interconnection interface, and performing connection pretreatment respectively. In addition, a fourth sub-board and a fifth sub-board with through-holes are obtained, and bumps are set at one end of the through-holes of the fourth sub-board and the fifth sub-board respectively by filling bumps, that is, obtaining the seventh interconnection interface and the eighth interconnection interface. The first interconnection interface and the second interconnection interface, the third interconnection interface and the fourth interconnection interface, the fifth interconnection interface and the seventh interconnection interface, the sixth interconnection interface and the eighth interconnection interface are pressed and cured to obtain an interconnection structure circuit board including the fourth sub-board and the fifth sub-board, that is, an interconnection structure circuit board of five-layer sub-boards. By analogy, according to the method provided in the present application, an interconnection structure circuit board of four-layer sub-boards or an interconnection structure circuit board of multiple sub-boards can also be made, all of which are within the scope of protection of the present application.

[0085] The present application also provides an interconnected structure circuit board, which is manufactured by the above-mentioned method for manufacturing an interconnected structure circuit board. A sub-board with through holes is obtained, grooves are filled, and connection pre-processing is performed. Another sub-board is then obtained, bumps are filled, and the two treated sub-boards are pressed together and cured to obtain an interconnected structure circuit board. Compared to circuit boards obtained by conventional processes, the interconnected structure circuit board of the present application effectively improves the reliability of the interconnected structure circuit board because the bumps are embedded in the conductive paste to form a fully enclosed structure, avoiding delamination or poor connection.

[0086] It can be understood that the contents of the above method embodiments are all applicable to the present device embodiments, the functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0087] The embodiments described in the embodiments of this application are intended to more clearly illustrate the technical solutions of the embodiments of this application and do not constitute a limitation on the technical solutions provided by the embodiments of this application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0088] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0089] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0090] It should be understood that in this application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0091] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but are not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and essence of the present invention should be within the scope of the present invention.

Claims

1. A method for manufacturing an interconnected structure circuit board, characterized in that: The method comprises: Performing a groove filling process on one end of the through hole of the first daughter board to obtain a first interconnection interface; Performing a bump filling process on one end of the through hole of the second daughter board to obtain a second interconnection interface; Performing connection preprocessing on the first interconnection interface of the first sub-board; The first interconnection interface and the second interconnection interface are pressed and cured to obtain the interconnection structure circuit board.

2. The production method according to claim 1, characterized in that The step of filling the groove at one end of the through hole of the first sub-board to obtain the first interconnection interface comprises the following steps: Obtaining the first sub-board provided with the through hole; Performing plugging treatment on the through hole by using a plugging material; shallowly drilling or removing the glue at one end of the plugging material after the plugging treatment, so as to form a shallow groove at one end of the plugging material of the first sub-board; Electroplating is performed on the other end of the through hole after the plugging treatment and the surface of the shallow groove to obtain the first interconnection interface provided with the shallow groove after the electroplating.

3. The production method according to claim 2, characterized in that: The step of filling one end of the through hole of the second daughter board with a bump to obtain a second interconnection interface comprises the following steps: Acquire the second sub-board provided with the through hole; Performing plugging treatment on the through hole by using a plugging material; Electroplating the second sub-board after the plugging treatment to seal both ends of the plugging material of the second sub-board; A bump is provided above one end of the through hole after electroplating to obtain the second interconnection interface provided with the bump.

4. The production method according to claim 3, characterized in that: The bumps are provided by local electroplating or local copper reduction.

5. The production method according to claim 3, characterized in that: The surface of the bump is provided with grooves.

6. The production method according to claim 3, characterized in that: The performing connection preprocessing on the first interconnection interface of the first daughter board includes the following steps: providing an adhesive layer and a maylar film on the first interconnected interface; Performing window processing on the adhesive layer and the maylar film beside the shallow groove; Filling the conductive paste into the shallow groove after the windowing process; The maylar film is removed after pre-baking the first interconnect interface.

7. The production method according to claim 6, characterized in that: The length of the protrusion is smaller than the sum of the depth of the shallow groove and the thickness of the bonding layer.

8. The manufacturing method according to claim 6, characterized in that: The step of pressing and curing the first interconnection interface and the second interconnection interface to obtain the interconnection structure circuit board comprises the following steps: Aligning the protrusion of the second sub-board with the shallow groove of the first sub-board; inserting the bump into the conductive paste in the shallow groove; The first sub-board and the second sub-board are pressed and cured in a high-temperature and high-pressure environment to obtain the interconnected structure circuit board.

9. The production method according to claim 1, characterized in that: The circuit board further includes a third daughter board, and the method for manufacturing the interconnection structure circuit board of the third daughter board includes the following steps: Performing the groove filling process on one end of the through hole of the third sub-board to obtain a third interconnection interface; Performing the filling bump process on the other end of the through hole of the second sub-board to obtain a fourth interconnection interface; Performing the connection preprocessing on the third interconnection interface of the third daughter board; The first interconnection interface and the second interconnection interface as well as the third interconnection interface and the fourth interconnection interface are pressed and cured to obtain the interconnection structure circuit board including the third sub-board.

10. An interconnection structure circuit board, characterized in that: Made by the method for making an interconnected structure circuit board as claimed in any one of claims 1 to 9.

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