Pixel circuit and driving method thereof

Abstract

The invention discloses a pixel circuit and a driving method thereof. The pixel circuit comprises a driving module, a coupling module, a compensation module and a voltage writing module, the first end of the compensation module is connected with the first end of the driving module, the second end of the compensation module is connected with the control end of the driving module, and the compensation module is used for transmitting threshold voltage information of the driving module to the driving module; the coupling module is connected between the voltage write-in module and the first end of the driving module and is used for transmitting a first initialization voltage and a data voltage to the coupling module in a time-sharing manner; the coupling module is used for coupling the voltage containing the data voltage to the control end of the driving module. Transistors included in the driving module and transistors included in the compensation module are oxide transistors, and at least one of the at least two transistors included in the voltage writing module is a low-temperature polycrystalline silicon transistor. The pixel circuit comprises an oxide transistor and a low-temperature polycrystalline silicon transistor, and display uniformity and low power consumption of a screen body are both considered.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof. Background Art

[0002] With the development of display technology, people's requirements for display panels are getting higher and higher.

[0003] Display panels typically include multiple pixel circuits, each containing a driver transistor that generates a drive signal to drive a light-emitting device. However, existing pixel circuits cannot simultaneously achieve multiple performance goals, making existing display panels unable to meet user needs. Summary of the Invention

[0004] The present invention provides a pixel circuit and a driving method thereof to solve the problem that a display panel cannot achieve multiple excellent performances.

[0005] According to one aspect of the present invention, there is provided a pixel circuit, comprising a driving module, a coupling module, a compensation module and a voltage writing module;

[0006] The first end of the compensation module is connected to the first end of the driving module, and the second end of the compensation module is connected to the control end of the driving module. The compensation module is used to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage of the first end of the driving module after being discharged by the driving module;

[0007] The first end of the coupling module is connected to the voltage writing module, the second end of the coupling module is connected to the first end of the driving module, and the voltage writing module is used to transmit the first initialization voltage and the data voltage to the first end of the coupling module in a time-sharing manner;

[0008] The coupling module is used to couple the voltage containing the data voltage to the control terminal of the driving module;

[0009] The transistors included in the driving module and the transistors included in the compensation module are both oxide transistors. The voltage writing module includes at least one transistor, and at least one transistor in the voltage writing module is a low-temperature polysilicon transistor.

[0010] Optionally, a display cycle of the pixel circuit includes a write frame and a hold frame, and the pixel circuit also includes a light-emitting module and an anode reset module, and the anode reset module is connected to the first end of the light-emitting module and is used to provide a second initialization voltage to the first end of the light-emitting module in response to the first scanning signal in the second initialization phase of the write frame.

[0011] Optionally, the conduction frequency of the anode reset module is greater than the conduction frequency of the compensation module.

[0012] Optionally, the anode reset module is further configured to respond to the first scanning signal during a second initialization phase of the holding frame and provide the second initialization voltage to the first end of the light-emitting module;

[0013] The compensation module is used to be turned off in the holding frame;

[0014] Optionally, in the writing frame and the holding frame, the conduction frequency of the anode reset module is the same.

[0015] Optionally, a display cycle of the pixel circuit includes a writing frame and a holding frame; the pixel circuit further includes a first light emitting control module and a second light emitting control module;

[0016] The first end of the first light-emitting control module is connected to the first power supply, the second end of the first light-emitting control module is connected to the first end of the driving module, the first end of the second light-emitting control module is connected to the second end of the driving module, and the second end of the second light-emitting control module is connected to the first end of the light-emitting module. The first light-emitting control module is used to respond to the first light-emitting control signal and turn on during the light-emitting stage of the writing frame and the light-emitting stage of the holding frame, and the second light-emitting control module is used to respond to the second light-emitting control signal and turn on during the light-emitting stage of the writing frame and the light-emitting stage of the holding frame.

[0017] Optionally, the holding frame includes a light-emitting stage and a black insertion stage. In the black insertion stage, the first light-emitting control module is turned off in response to the first light-emitting control signal, and the second light-emitting control module is turned on in response to the second light-emitting control signal.

[0018] Optionally, the voltage writing module includes an initialization unit and a data writing unit; the initialization unit is connected to the first end of the coupling module, and is configured to provide the first initialization voltage to the first end of the coupling module in response to the second scanning signal during the first initialization phase of the writing frame;

[0019] The data writing unit is connected to the first end of the coupling module and is used to provide the data voltage to the first end of the coupling module in response to the third scanning signal during the data writing phase of the writing frame;

[0020] The coupling module is used to transmit the voltage containing the data voltage to the control end of the driving module via the turned-on compensation module;

[0021] Optionally, within the writing frame, the first initialization phase and the data writing phase are not performed simultaneously, and the first initialization phase is earlier than the data writing phase.

[0022] Optionally, the compensation module is used to respond to the fourth scanning signal and turn on during the threshold compensation stage of the write frame, so as to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage after the first end of the driving module is discharged through the driving module, the second light-emitting control module and the anode reset module.

[0023] Optionally, for any of the written frames,

[0024] The threshold compensation phase and the data writing phase partially overlap;

[0025] Optionally, a start time of the threshold compensation phase is earlier than a start time of the data writing phase, and an end time of the threshold compensation phase is earlier than an end time of the data writing phase;

[0026] Optionally, for any of the write frames, the threshold compensation phase and the first initialization phase partially overlap, and a deadline of the threshold compensation phase is later than a deadline of the first initialization phase;

[0027] For any write frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase.

[0028] Optionally, the compensation module is further configured to first turn on and then turn off in response to the fourth scanning signal during the data writing phase of the writing frame, so as to transmit the voltage containing the data voltage to the control terminal of the driving module;

[0029] Optionally, in the data writing phase of any of the writing frames, the on-time length of the compensation module is equal to the off-time length of the compensation module.

[0030] Optionally, the type of transistors included in the first light emitting control module is opposite to the type of transistors included in the anode reset module, and the first light emitting control signal is multiplexed into the first scanning signal;

[0031] Optionally, the transistor included in the first light emitting control module is a P-type transistor, and the transistor included in the anode reset module is an N-type transistor;

[0032] Optionally, the transistor included in the first light emitting control module is a low-temperature polysilicon transistor, and the transistor included in the anode reset module is an oxide transistor;

[0033] Optionally, for any write frame, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase.

[0034] Optionally, the type of transistors included in the first light emitting control module is opposite to the type of transistors included in the anode reset module;

[0035] In a display panel corresponding to the pixel circuits, the pixel circuits are arranged in an array;

[0036] The first light emitting control modules located in the same row of pixel circuits are connected to the same first light emitting control signal, and the anode reset modules located in the same row of pixel circuits are connected to the same first scanning signal;

[0037] In two adjacent rows of pixel circuits, the first light emitting control signal connected to the pixel circuits in the previous row is multiplexed into the first scanning signal connected to the pixel circuits in the next row;

[0038] Optionally, the transistor included in the first light emitting control module is a P-type transistor, and the transistor included in the anode reset module is an N-type transistor;

[0039] Optionally, the transistor included in the first light emitting control module is a low-temperature polysilicon transistor, and the transistor included in the anode reset module is an oxide transistor;

[0040] Optionally, in any of the writing frames, the second initialization phase includes the threshold compensation phase and part of the data writing phase;

[0041] Optionally, in any of the write frames, a start time of the second initialization phase is earlier than a start time of the threshold compensation phase, and an end time of the second initialization phase is the same as an end time of the threshold compensation phase;

[0042] Optionally, in any of the write frames, the second initialization phase overlaps with the data write phase, the start time of the second initialization phase is earlier than the start time of the data write phase, and the end time of the second initialization phase is earlier than the end time of the data write phase.

[0043] Optionally, the type of transistors included in the second light emitting control module is the same as the type of transistors included in the initialization unit, and the second light emitting control signal is multiplexed into the second scanning signal;

[0044] Optionally, the transistor included in the second light emitting control module and the transistor included in the initialization unit are both P-type transistors;

[0045] Optionally, the transistor included in the second light emitting control module and the transistor included in the initialization unit are both low-temperature polysilicon transistors;

[0046] Optionally, the transistor included in the data writing unit is a P-type transistor;

[0047] Optionally, the transistor included in the data writing unit is a low-temperature polysilicon transistor.

[0048] Optionally, the type of transistors included in the data writing unit is opposite to the type of transistors included in the initialization unit, and the third scanning signal is multiplexed into the second scanning signal.

[0049] Optionally, the type of transistors included in the second light emitting control module is the same as the type of transistors included in the initialization unit, and the second scanning signal is multiplexed into the second light emitting control signal.

[0050] Optionally, the transistor included in the data writing unit is a P-type transistor, the transistor included in the initialization unit is an N-type transistor, and the transistor included in the second light emitting control module is an N-type transistor;

[0051] Optionally, the transistor included in the data writing unit is a low-temperature polysilicon transistor, the transistor included in the initialization unit is an oxide transistor, and the transistor included in the second light emitting control module is an oxide transistor.

[0052] Optionally, the transistor included in the data writing unit is an N-type transistor, the transistor included in the initialization unit is a P-type transistor, and the transistor included in the second light emitting control module is a P-type transistor;

[0053] Optionally, the transistor included in the data writing unit is an oxide transistor, the transistor included in the initialization unit is a low-temperature polysilicon transistor, and the transistor included in the second light emitting control module is a low-temperature polysilicon transistor.

[0054] Optionally, the pixel circuit further includes a storage module, wherein the storage module is connected between the control terminal of the driving module and the first terminal of the light-emitting module;

[0055] Optionally, the storage module includes a first capacitor, a first end of the first capacitor is connected to the control end of the driving module, and a second end of the first capacitor is connected to the first end of the light-emitting module.

[0056] Optionally, the driving module includes a first transistor, wherein a first electrode of the first transistor is respectively connected to the second end of the first light emitting control module, the second end of the coupling module, and the first end of the compensation module, a second electrode of the first transistor is connected to the first end of the second light emitting control module, and a gate of the first transistor is connected to the second end of the compensation module;

[0057] The data writing unit includes a second transistor, a first electrode of the second transistor is connected to a data line for providing a data voltage, a second electrode of the second transistor is connected to the first end of the coupling module, and a gate of the second transistor is connected to the third scanning signal;

[0058] The initialization unit includes a third transistor, a first electrode of the third transistor is connected to the first initialization signal line providing the first initialization voltage, a second electrode of the third transistor is connected to the first end of the coupling module, and a gate of the third transistor is connected to the second scanning signal;

[0059] The compensation module includes a fourth transistor, wherein a first electrode of the fourth transistor is respectively connected to the first end of the driving module, the second end of the coupling module, and the second end of the first light-emitting control module, a second electrode of the fourth transistor is connected to the control end of the driving module, and a gate of the fourth transistor is connected to the fourth scanning signal;

[0060] The first light emitting control module includes a fifth transistor, a first electrode of the fifth transistor is connected to the first power supply, a second electrode of the fifth transistor is respectively connected to the first terminal of the compensation module, the first terminal of the driving module, and the second terminal of the coupling module, and a gate of the fifth transistor is connected to the first light emitting control signal;

[0061] The second light emitting control module includes a sixth transistor, a first electrode of the sixth transistor is connected to the second end of the driving module, a second electrode of the sixth transistor is connected to the first end of the light emitting module, and a gate of the sixth transistor is connected to the second light emitting control signal;

[0062] The anode reset module includes a seventh transistor, a first electrode of the seventh transistor is connected to a second initialization signal line providing the second initialization voltage, a second electrode of the seventh transistor is connected to a first end of the light-emitting module, a gate of the seventh transistor is connected to the first scanning signal, and a second end of the light-emitting module is connected to a second power supply;

[0063] The coupling module includes a second capacitor, a first end of the second capacitor is respectively connected to the data writing unit and the initialization unit, and a second end of the second capacitor is respectively connected to the second end of the first light-emitting control module, the first end of the driving module and the first end of the compensation module.

[0064] According to another aspect of the present invention, there is further provided a pixel circuit, comprising: a driving module, a compensation module, a first light emitting control module, a second light emitting control module, an anode reset module and a light emitting module;

[0065] The first end of the compensation module is connected to the first end of the driving module, and the second end of the compensation module is connected to the control end of the driving module. The compensation module is used to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage of the first end of the driving module after being discharged by the driving module;

[0066] The first light control module, the driving module, the second light control module and the light emitting module are sequentially connected in series between a first power supply and a second power supply; the first light control module is configured to be turned on in response to a first light control signal;

[0067] The anode reset module is used for providing a second initialization voltage to the first end of the light emitting module in response to the first scanning signal;

[0068] The type of transistor included in the first light emitting control module is opposite to the type of transistor included in the anode reset module;

[0069] The first light-emitting control signal is multiplexed into the first scanning signal, or, in a display panel corresponding to the pixel circuit, the pixel circuits are arranged in an array, the first light-emitting control modules located in the same row of pixel circuits are connected to the same first light-emitting control signal, and the anode reset modules located in the same row of pixel circuits are connected to the same first scanning signal, and in two adjacent rows of pixel circuits, the first light-emitting control signal connected to the pixel circuit in the upper row is multiplexed into the first scanning signal connected to the pixel circuit in the next row.

[0070] Optionally, the pixel circuit further includes a voltage writing module and a coupling module;

[0071] The first end of the coupling module is connected to the voltage writing module, the second end of the coupling module is connected to the first end of the driving module, and the voltage writing module is used to transmit the first initialization voltage and the data voltage to the first end of the coupling module in a time-sharing manner;

[0072] The coupling module is used to couple the voltage containing the data voltage to the control terminal of the driving module;

[0073] Optionally, the voltage writing module includes an initialization unit and a data writing unit; a display cycle of the pixel circuit includes a writing frame and a holding frame;

[0074] The initialization unit is connected to the first end of the coupling module, and is configured to provide the first initialization voltage to the first end of the coupling module in response to the second scanning signal during the first initialization phase of the writing frame;

[0075] The data writing unit is connected to the first end of the coupling module and is used to provide the data voltage to the first end of the coupling module in response to the third scanning signal during the data writing phase of the writing frame;

[0076] The coupling module is used to transmit the voltage containing the data voltage to the control end of the driving module via the turned-on compensation module;

[0077] Optionally, the compensation module is used to respond to the fourth scanning signal and turn on during the threshold compensation stage of the write frame, so as to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage after the first end of the driving module is discharged through the driving module, the second light-emitting control module and the anode reset module.

[0078] According to another aspect of the present invention, there is also provided a driving method for a pixel circuit, wherein a display cycle of the pixel circuit at least includes writing a frame;

[0079] The driving method of the pixel circuit includes:

[0080] In a first initialization phase of a writing frame, the voltage writing module provides the first initialization voltage to the first terminal of the coupling module in response to a second scanning signal;

[0081] During the threshold compensation phase of the write frame, the compensation module is turned on in response to the fourth scan signal to transmit the threshold voltage information of the driving module to the control terminal of the driving module according to the voltage of the first terminal of the driving module after being discharged by the driving module;

[0082] During the data writing phase of the writing frame, the voltage writing module provides the data voltage to the first terminal of the coupling module in response to the third scanning signal, so that the coupling module couples the voltage containing the data voltage to the control terminal of the driving module.

[0083] Optionally, the pixel circuit further includes a light emitting module, an anode reset module, a first light emitting control module and a second light emitting control module.

[0084] The driving method of the pixel circuit further includes:

[0085] In the second initialization phase of the writing frame, the anode reset module is turned on in response to the first scanning signal to provide a second initialization voltage to the first end of the light emitting module;

[0086] During the light-emitting phase of the writing frame, the first light-emitting control module is turned on in response to the first light-emitting control signal, and the second light-emitting control module is turned on in response to the second light-emitting control signal, so that the driving module generates a driving current according to the data voltage to drive the light-emitting module to emit light;

[0087] Optionally, within the write frame, the first initialization phase and the data writing phase are not performed simultaneously, and the first initialization phase is earlier than the data writing phase;

[0088] Optionally, for any of the writing frames, the threshold compensation phase and the data writing phase partially overlap;

[0089] Optionally, a start time of the threshold compensation phase is earlier than a start time of the data writing phase, and an end time of the threshold compensation phase is earlier than an end time of the data writing phase;

[0090] Optionally, for any of the write frames, the threshold compensation phase and the first initialization phase partially overlap, and a deadline of the threshold compensation phase is later than a deadline of the first initialization phase;

[0091] For any write frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase.

[0092] The technical solution of the embodiment of the present invention compensates the threshold voltage of the driving module through the compensation module to avoid the threshold voltage drift affecting the display uniformity. The data voltage written by the voltage writing module is coupled to the control terminal of the driving module through the compensation module through the coupling module to realize the writing of the data voltage so that the subsequent driving module generates a driving current according to the data voltage to drive the light-emitting module to emit light. The transistors included in the driving module and the compensation module are both oxide transistors. The oxide transistor has a small leakage current in the off state. The compensation module is connected to the control terminal of the driving module. The compensation module has a small leakage current in the off state, which makes the potential change of the control terminal of the driving module small, thereby ensuring better display uniformity. At least one transistor in the voltage writing module is a low-temperature polysilicon transistor. The low-temperature polysilicon transistor has high mobility and fast switching speed, which improves display reliability. The low-temperature polysilicon transistor does not require a large cross-voltage drive, which is conducive to reducing the power consumption of the screen. The pixel circuit in this embodiment includes both oxide transistors and low-temperature polysilicon transistors, which can take into account both display uniformity and low power consumption of the screen.

[0093] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0094] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0095] Figure 1 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0096] Figure 2 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0097] Figure 3 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0098] Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0099] Figure 5 A simulation waveform diagram of the working process of a pixel circuit provided by an embodiment of the present invention;

[0100] Figure 6 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0101] Figure 7 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0102] Figure 8 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0103] Figure 9 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0104] Figure 10 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0105] Figure 11 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0106] Figure 12 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0107] Figure 13 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0108] Figure 14 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0109] Figure 15 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0110] Figure 16 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0111] Figure 17 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0112] Figure 18 A simulation waveform diagram of the working process of another pixel circuit provided by an embodiment of the present invention;

[0113] Figure 19 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0114] Figure 20 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0115] Figure 21 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0116] Figure 22A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0117] Figure 23 The present invention provides a flowchart of a method for driving a pixel circuit. DETAILED DESCRIPTION

[0118] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0119] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0120] As described in the background art, the performance of existing display panels is relatively simple and cannot take into account multiple excellent performances at the same time, such as low power consumption and display uniformity. The inventors have found that the reason is that the types of transistors included in the pixel circuits of existing display panels are relatively simple. Specifically, the pixel circuit includes multiple transistors. Taking the common 7T1C (7 transistors and 1 capacitor) pixel circuit as an example, all the transistors included in the pixel circuit are oxide transistors, so that the leakage current of the transistor connected to the gate of the driving transistor is small, thereby reducing the magnitude of the leakage current of the gate of the driving transistor, maintaining the stability of the gate potential, and improving display uniformity. Alternatively, all the transistors included in the pixel circuit are low-temperature polysilicon transistors, which have high mobility, fast switching speed, high reliability, and low-temperature polysilicon transistors have low driving voltage, which is conducive to reducing screen power consumption. Therefore, the functions of the existing pixel circuits are relatively simple and cannot meet the increasingly high display requirements.

[0121] In response to the above technical problems, an embodiment of the present invention provides a new type of pixel circuit, which includes both oxide transistors and low-temperature polysilicon transistors, while taking advantage of the smaller leakage current of oxide transistors and the high stability, high mobility and low power consumption of low-temperature polysilicon transistors.

[0122] Figure 1 A schematic diagram of a pixel circuit according to an embodiment of the present invention is provided. Figure 1 , the pixel circuit includes: a driving module 10, a coupling module 11, a compensation module 12 and a voltage writing module 13;

[0123] A first end of the compensation module 12 is connected to a first end D of the driving module 10, and a second end of the compensation module 12 is connected to a control end G of the driving module 10. The compensation module 12 is configured to transmit threshold voltage information of the driving module 10 to the control end G of the driving module 10 based on a voltage at the first end D of the driving module 10 after discharge by the driving module 10.

[0124] The first end of the coupling module 11 is connected to the voltage writing module 13, and the second end of the coupling module 11 is connected to the first end of the driving module 10. The voltage writing module 13 is used to transmit the first initialization voltage and the data voltage to the first end of the coupling module 11 in a time-sharing manner;

[0125] The coupling module 11 is used to couple the voltage containing the data voltage Vdata to the control terminal of the driving module 10;

[0126] The transistors included in the driving module 10 and the transistors included in the compensation module 12 are all oxide transistors. The voltage writing module 13 includes at least one transistor, and at least one transistor in the voltage writing module 13 is a low-temperature polysilicon transistor.

[0127] In an optional embodiment, the second terminal S of the driver module 10 is directly or indirectly connected to the second power supply VSS, and the first terminal D of the driver module 10 is directly or indirectly connected to the first power supply VDD, where the voltage of the first power supply VDD is greater than the voltage of the second power supply VSS. When compensating the threshold voltage of the driver module 10, the compensation module 12 is turned on, the potential of the control terminal of the driver module 10 is equal to the potential of the first terminal D of the driver module 10, and a potential difference exists between the potential of the first terminal D and the potential of the second terminal S of the driver module 10. The first terminal D of the driver module 10 discharges to the second terminal S of the driver module 10 until the potential difference between the control terminal G and the second terminal S of the driver module 10 is equal to Vth. At this time, the driver module 10 is turned off, the discharge stops, and the threshold voltage compensation is completed, where Vth is the threshold voltage of the transistor included in the driver module.

[0128] The voltage writing module 13 is used to transmit the first initialization voltage Vini to the first terminal of the coupling module 11 during the first initialization phase, resetting the coupling module 11. It is also used to write the data voltage Vdata to the first terminal of the coupling module 11 during the data writing phase. The first initialization voltage Vini is written to the first terminal of the coupling module 11 before the data voltage Vdata. The voltage jump amount at the first terminal of the coupling module 11 is (Vdata - Vini). Based on the voltage coupling characteristics of the coupling module 11, during the data writing phase, the coupling module 11 couples (Vdata - Vini) to the control terminal of the driving module 10, thereby coupling the voltage containing the data voltage Vdata to the control terminal of the driving module 10, thereby implementing the writing of the data voltage. In an optional embodiment, the voltage writing module 13 includes only one transistor, the first electrode of which is respectively connected to a first initialization signal line for transmitting the first initialization voltage Vini and a data line for transmitting the data voltage Vdata. During the first initialization phase, the first initialization voltage Vini is output on the first initialization signal line, and no voltage is output on the data line. During the data writing phase, the data voltage Vdata is output on the data line, and no voltage is output on the first initialization signal line. The first initialization voltage Vini and the data voltage Vdata are then transmitted to the first end of the coupling module 11 in a time-sharing manner via a transistor. In other optional embodiments, the voltage writing module 13 may include two transistors, one connected to the first initialization signal line for transmitting the first initialization voltage Vini, and the other connected to the data line for transmitting the data voltage Vdata. The two transistors are then turned on in a time-sharing manner to transmit the first initialization voltage Vini and the data voltage Vdata to the coupling module 11 in a time-sharing manner. Alternatively, the voltage writing module 13 may include three transistors, one of which is turned on in the first initialization phase to transmit the first initialization voltage Vini to the coupling module 11, and the other two transistors are connected in series with the same gate signal connected, and are turned on in the data writing phase to transmit the data voltage Vdata to the coupling module 11.

[0129] In an optional embodiment, the compensation module 12 includes a transistor, and one of the transistors is an oxide transistor. This allows the off-state current of the compensation module 12 to be small after the data voltage is written and the compensation module 12 is turned off, thereby reducing the voltage variation at the control terminal G of the driving module 10, which helps maintain the stability of the potential of the control terminal G and improves display uniformity. In other embodiments, the compensation module 12 may also include at least two transistors, and all transistors included in the compensation module 12 are oxide transistors.

[0130] In an optional embodiment, the voltage writing module 13 includes two transistors, one of which is configured to transmit the first initialization voltage Vini to the first terminal of the coupling module 11 after being turned on, and the other of which is configured to transmit the data voltage Vdata to the first terminal of the coupling module 11 after being turned on, and the two transistors are not turned on at the same time. At least one of the at least two transistors included in the voltage writing module 13 is a low-temperature polysilicon transistor, which can improve circuit reliability. Low-temperature polysilicon transistors have a low driving voltage across the transistor, which helps reduce screen power consumption.

[0131] The technical solution of the embodiment of the present invention compensates the threshold voltage of the driving module through the compensation module to prevent the threshold voltage drift from affecting the display uniformity. The data voltage written by the voltage writing module is coupled to the control terminal of the driving module through the compensation module through the coupling module, so that the data voltage is written so that the driving module can subsequently generate a driving current according to the data voltage to drive the light-emitting module to emit light. The transistors included in the driving module and the compensation module are both oxide transistors. The oxide transistors have a small leakage current in the off state. The compensation module is connected to the control terminal of the driving module. The compensation module has a small leakage current in the off state, which makes the potential change of the control terminal of the driving module small, thereby improving the display uniformity. At least one of the at least two transistors included in the voltage writing module is a low-temperature polysilicon transistor. The low-temperature polysilicon transistor has high mobility and fast switching speed, which improves the display reliability. The low-temperature polysilicon transistor does not require a large cross-voltage drive, which is conducive to reducing the power consumption of the screen. The pixel circuit in this embodiment includes both oxide transistors and low-temperature polysilicon transistors, which can take into account both display uniformity and low power consumption of the screen.

[0132] Figure 2 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 2 The pixel circuit further includes: a light emitting module 14 and an anode reset module 15, wherein the anode reset module 15 is connected to the first end of the light emitting module 14 and is configured to provide a second initialization voltage Vref to the first end of the light emitting module 14 in response to the first scan signal S1.

[0133] Anode reset module 15 is a switch module. Its control terminal is connected to first scan signal S1. In response to first scan signal S1 being turned on, a second initialization voltage Vref is connected to the first terminal of light-emitting module 14. This resets light-emitting module 14 and prevents residual charge from the previous display frame from affecting the current display frame. Light-emitting module 14 may be an OLED device. The first terminal of light-emitting module 14 may be the anode of the OLED device, and the second terminal of light-emitting module 14 may be the cathode of the OLED device.

[0134] Continue to refer Figure 2 Optionally, the conduction frequency of the anode reset module 15 is greater than the conduction frequency of the compensation module 12.

[0135] Only when the compensation module 12 is turned on can the coupling module 11 couple a voltage related to the data voltage to the control terminal G of the driving module 10, completing the writing of the data voltage. In an optional embodiment, the on-frequency of the compensation module 12 is equal to the refresh frequency of the pixel circuit, which is the frequency at which the voltage related to the data voltage is written to the control terminal G of the driving module 10. The on-frequency of the positive reset module 15 is greater than the on-frequency of the compensation module 12, or greater than the refresh frequency of the pixel circuit. This allows the first terminal of the light-emitting module 14 to be reset at a frequency greater than the refresh frequency of the pixel circuit. Resetting the light-emitting module 14 at a high frequency can shorten the time interval of the light-emitting module 14 in the black state, making the user less sensitive to flicker, improving the flicker problem caused by resetting the first terminal of the light-emitting module 14 at a low frequency, and enhancing display quality.

[0136] Continue to refer Figure 2 , Optionally, a display cycle of the pixel circuit includes a writing frame F1 and a holding frame F2;

[0137] The anode reset module 15 is configured to respond to the first scan signal S1 during the second initialization phase of the write frame to provide a second initialization voltage to the first terminal of the light-emitting module 14 , and is further configured to respond to the first scan signal S1 during the second initialization phase of the hold frame to provide the second initialization voltage Vref to the first terminal of the light-emitting module 14 .

[0138] The compensation module 12 is configured to be turned off during the hold frame.

[0139] A display cycle of the pixel circuit can be understood as the time interval between the previous write frame and the next write frame. During the write frame, data voltages are written, meaning that voltages related to the data voltages are coupled to the control terminal G of the driver module 10. During the hold frame, the compensation module 12 is turned off, and no data voltages are written, meaning that voltages related to the data voltages are not coupled to the control terminal G of the driver module 10.

[0140] In the writing frame and the holding frame, the conduction frequency of the anode reset module 15 is the same. Whether in the writing frame or the holding frame, the first end of the light-emitting module 14 is reset once, so that even if the refresh frequency is low, high-frequency reset of the light-emitting module 14 can still be achieved, which is beneficial to eliminating the problem of low-frequency flicker under low refresh.

[0141] Continue to refer Figure 2 Optionally, a display cycle of the pixel circuit includes a writing frame and a holding frame; the pixel circuit further includes a first light emitting control module 16 and a second light emitting control module 17;

[0142] A first end of the first light-emitting control module 16 is connected to the first power supply VDD, a second end of the first light-emitting control module 16 is connected to the first end D of the driving module 10, a first end of the second light-emitting control module 17 is connected to the second end S of the driving module 10, and a second end of the second light-emitting control module 17 is connected to the first end of the light-emitting module 14. The control end of the first light-emitting control module 16 is connected to the first light-emitting control signal EM1, and the control end of the second light-emitting control module 17 is connected to the second light-emitting control signal EM2. The first light-emitting control module 16 is configured to be turned on in response to the first light-emitting control signal EM1 during the light-emitting phase of writing a frame and the light-emitting phase of maintaining a frame, and the second light-emitting control module 17 is configured to be turned on in response to the second light-emitting control signal EM2 during the light-emitting phase of writing a frame and the light-emitting phase of maintaining a frame.

[0143] Both the first and second light control modules 16 and 17 are switch modules that, when switched on, connect the first and second terminals of the modules. Light-emitting module 14 must emit light regardless of whether it is writing or holding a frame. Therefore, during the light-emitting phase, the first and second light control modules 16 and 17 are switched on in response to signals from their respective control terminals. The driver module 10 then generates a drive current based on the data voltage to drive the light-emitting module 14 to emit light.

[0144] Optionally, the hold frame includes a light-emitting phase and a black insertion phase. During the black insertion phase, the first light-emitting control module 16 is turned off in response to the first light-emitting control signal EM1, and the second light-emitting control module 17 is turned on in response to the second light-emitting control signal EM2. The light-emitting phase of the hold frame is used for display, so both the first light-emitting control module 16 and the second light-emitting control module 17 are turned on to form a path for the drive current to flow, allowing the light-emitting module 14 to emit light. During the black insertion phase of the hold frame, the first light-emitting control module 16 is turned off to block the path for the drive current to flow, preventing the light-emitting module 14 from emitting light.

[0145] Continue to refer Figure 2 Optionally, the voltage writing module 13 includes an initialization unit 131 and a data writing unit 132, the initialization unit 131 is connected to the first end of the coupling module 11, and the control end of the initialization unit 131 is connected to the second scanning signal S2, and is used to respond to the second scanning signal S2 to provide the first initialization voltage Vini to the first end of the coupling module 11 in the first initialization phase of the writing frame;

[0146] The data writing unit 132 is connected to the first end of the coupling module 11. The control end of the data writing unit 132 receives the third scanning signal S3 and is configured to provide a data voltage Vdata to the first end of the coupling module 11 in response to the third scanning signal S3 during the data writing phase of the writing frame.

[0147] The coupling module 11 is used to transmit the voltage including the data voltage Vdata to the control terminal G of the driving module 10 via the turned-on compensation module 12 .

[0148] The initialization unit 131 and the data writing unit 132 are both switching units, which connect the two ends of the unit after being turned on. Specifically, in the first initialization phase of the write frame, the initialization unit 131 is turned on in response to the second scan signal S2 to provide the first initialization voltage Vini to the first end of the coupling module 11. At the same time, the data writing unit 132 is turned off in response to the third scan signal S3. In the data writing phase of the write frame, the initialization unit 131 is turned off in response to the second scan signal S2, and the data writing unit 132 is turned on in response to the third scan signal S3 to provide the data voltage Vdata to the first end of the coupling module 11. In the write frame, the first initialization phase and the data writing phase are not performed at the same time, and the first initialization phase is earlier than the data writing phase. After the first initialization voltage Vini is written to the first end of the coupling module 11, and then the data voltage Vdata is written, a voltage jump occurs at the first end of the coupling module 11, and the voltage jump amount (Vdata-Vini) is coupled to the second end of the coupling module 11, that is, the first end D of the driving module 11. The voltage jump amount (Vdata-Vini) is then transmitted to the control end G of the driving module 10 through the conductive compensation module.

[0149] Continue to refer Figure 2 Optionally, the control end of the compensation module 12 is connected to the fourth scanning signal S4, and is used to respond to the fourth scanning signal S4 and turn on during the threshold compensation stage of the writing frame, so as to transmit the threshold voltage information of the driving module 10 to the control end G of the driving module 10 according to the voltage of the first end of the driving module 10 after being discharged through the driving module 10, the second light-emitting control module 17 and the anode reset module 15.

[0150] The second light-emitting control module 17 is configured to be turned on in response to the second light-emitting control signal EM2 during the threshold compensation phase of the write frame, and the anode reset module 15 is configured to be turned on in response to the first scanning signal S1 during the threshold compensation phase of the write frame, thereby causing the first terminal D of the driving module 10 to discharge to the second initialization voltage Vref via the second light-emitting control module 17 and the anode reset module 15 until the potential of the control terminal G of the driving module 10 is equal to Vref+Vth. The driving module 10 is then turned off, the discharge ends, and the threshold compensation is completed.

[0151] Optionally, for any write frame, the threshold compensation phase and the data write phase partially overlap. The overlap between the threshold compensation phase and the data write phase allows the data write unit 132 and the compensation module 12 to be turned on simultaneously, so that the voltage containing the data voltage can be transmitted to the control terminal G of the driver module 10 through the coupling module 11 and the turned-on compensation module 12.

[0152] The start time of the threshold compensation phase is earlier than the start time of the data writing phase, and the end time of the threshold compensation phase is earlier than the end time of the data writing phase.

[0153] The threshold compensation phase precedes the data writing phase, so that the threshold voltages of the transistors included in the driver module 10 are compensated in the threshold compensation phase. After the threshold voltage compensation is performed in the threshold compensation phase, the data writing phase begins. During the data writing phase, the compensation module 12 is also turned on for a period of time. After the data writing unit 132 is turned on in response to the third scan signal S3, it writes the data voltage Vdata to the first terminal of the coupling module 11. The coupling module 11 then couples the voltage related to the data voltage to the control terminal G of the driver module 10 via the turned-on compensation module 12, thereby writing the data voltage. The threshold compensation phase precedes the data writing phase, and the threshold voltage compensation process is separated from the data voltage writing process. This ensures that the duration of the threshold compensation phase is not limited by the duration of the data writing phase. This avoids the situation where the threshold compensation and data writing are performed in the same phase, resulting in a shorter data writing phase at high refresh rates, which can lead to insufficient threshold compensation and affect display uniformity. In this embodiment, the separation of the data voltage writing and threshold voltage compensation processes allows for sufficient compensation of the threshold voltage of the driver module 10 at high refresh rates, achieving broadband driving and improving display uniformity.

[0154] Optionally, for any written frame, the threshold compensation phase and the first initialization phase partially overlap, and the end time of the threshold compensation phase is later than the end time of the first initialization phase. For any written frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase.

[0155] Continue to refer Figure 2 Optionally, the compensation module 12 is further configured to be turned on and then turned off in response to the fourth scanning signal S4 during the data writing phase of the writing frame, so as to transmit the voltage containing the data voltage to the control terminal G of the driving module 10.

[0156] During the data writing phase, the compensation module 12 is turned on in response to the fourth scan signal S4 and transmits a voltage containing the data voltage to the control terminal G of the driver module 10, thereby writing the data voltage into the control terminal G of the driver module 10. Subsequently, when the compensation module 12 is turned off in response to the fourth scan signal S4, the potential of the control terminal G of the driver module 10 remains at the voltage last written before the compensation module 12 was turned off. Therefore, even if the data voltage Vdata changes at a high frequency, as long as the voltage written by the data writing unit 132 is the voltage required for the current display when the compensation module 12 transitions from on to off, even if the data voltage transmitted by the data writing unit 132 changes after the compensation module 12 is turned off, it will not be written into the control terminal of the driver module 10, thereby achieving high-frequency driving of the pixel circuit.

[0157] Furthermore, during the data writing phase of any writing frame, the on-time of the compensation module 12 is equal to the off-time of the compensation module 12 , so that the coupling module 11 fully couples the voltage including the data voltage to the control terminal G of the driving module 10 through the compensation module 12 .

[0158] Continue to refer Figure 2 Optionally, the type of transistors included in the first light emitting control module 16 is opposite to the type of transistors included in the anode reset module 15, and the first light emitting control signal EM1 is multiplexed into the first scanning signal S1.

[0159] The transistors included in the first light-emission control module 16 are of opposite types to those included in the anode reset module 15. The first light-emission control signal EM1 is multiplexed into the first scanning signal S1. Therefore, when the first light-emission control module 16 is turned on, the anode reset module 15 is turned off; and when the first light-emission control module 16 is turned off, the anode reset module 15 is turned on. Multiplexing the first light-emission control signal EM1 into the first scanning signal S1 simplifies the circuit structure, reduces the number of signal lines, and helps improve pixel density.

[0160] Optionally, the transistors included in the first light emitting control module 16 are P-type transistors, and the transistors included in the anode reset module 15 are N-type transistors. Further, the transistors included in the first light emitting control module 16 are low temperature polysilicon transistors, and the transistors included in the anode reset module 15 are oxide transistors.

[0161] The transistors included in the first light-emitting control module 16 are low-temperature polysilicon transistors. Low-temperature polysilicon transistors have high reliability, small characteristic drift, and small threshold voltage variation, so they have little impact on the driving current, reducing the attenuation of the driving current, which is beneficial to improving the current life of the screen.

[0162] Continue to refer Figure 2Optionally, the type of transistors included in the second light emitting control module 17 is the same as the type of transistors included in the initialization unit 131, and the second light emitting control signal EM2 is multiplexed into the second scanning signal S2.

[0163] When the second light control module 17 is turned on, the initialization unit 131 is also turned on. When the second light control module 17 is turned off, the initialization unit 131 is turned off. The second light control signal EM2 is multiplexed into the second scanning signal S2, which can further simplify the circuit structure, reduce the number of signal lines, and further improve pixel density.

[0164] Optionally, the transistors included in the second light-emitting control module 17 and the transistors included in the initialization unit 131 are both P-type transistors. Further, the transistors included in the second light-emitting control module 17 and the transistors included in the initialization unit 131 are both low-temperature polysilicon transistors, and the transistors included in the data writing unit 132 are P-type transistors; the transistors included in the data writing unit 132 are low-temperature polysilicon transistors.

[0165] Optionally, the pixel circuit further includes a storage module 18 , which is connected between the control terminal G of the driving module 10 and the first terminal of the light-emitting module 14 .

[0166] Figure 3 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention is shown in FIG. Figure 2 and Figure 3 In this embodiment, the transistors included in the driver module 10, the transistor 12 included in the compensation module 12, and the transistor included in the anode reset module 15 are all N-type transistors, and the transistors included in the first light-emitting control module 16, the transistors included in the second light-emitting control module 17, the transistors included in the initialization unit 131, and the transistors included in the data writing unit 132 are all P-type transistors. The gate of the N-type transistor is turned on when the gate is at a high level and turned off when the gate is at a low level, while the gate of the P-type transistor is turned on when the gate is at a low level and turned off when the gate is at a high level. The write frame F1 includes a first initialization phase t5, a second initialization phase t6, a threshold compensation phase t2, a data write phase t3, and a light-emitting phase t4. The hold frame F2 includes a second initialization phase and a light-emitting phase t8.

[0167] Figure 3 The middle starting stage t1 is the light-emitting stage of the previous display frame, and the first light-emitting control module 16 and the second light-emitting control module 17 are turned on, so that the driving module 10 drives the light-emitting module 14 to emit light.

[0168] During the first initialization phase t5, the initialization unit 131 is turned on in response to the low level of the second scan signal S2, transmitting the first initialization voltage Vini to the first terminal of the coupling module 11, thereby resetting the coupling module 11. The second light-emission control module 17 is turned on in response to the low level of the second light-emission control signal EM2, and the anode reset module 15 is turned on in response to the high level of the first scan signal S1, thereby transmitting the second initialization voltage Vref to the second terminal S of the driver module 10 and the first terminal of the light-emitting module 14. The compensation module 11 is turned on in response to the high level of the fourth scan signal S4, and the data writing unit 132 is turned off in response to the high level of the third scan signal S3. The first light-emission control module 16 is turned off in response to the high level of the first light-emission control signal EM1.

[0169] In the second initialization stage t6 , the anode reset module 15 is turned on in response to the high level of the first scan signal S1 to transmit the second initialization voltage Vref to the first end of the light emitting module 14 to reset the light emitting module 14 .

[0170] During the threshold compensation phase t2 of the write frame, the initialization unit 131 is first turned on and then turned off in response to the second scanning signal S2. While turned on, it transmits the first initialization voltage Vini to the first terminal of the coupling module 11, resetting the coupling module 11. The second light-emitting control module 17 is first turned on and then turned off in response to the second light-emitting control signal EM2, and the anode reset module 15 is turned on in response to the high level of the first scanning signal S1. Furthermore, when both the anode reset module 15 and the second light-emitting control module 17 are turned on, the second initialization voltage Vref is transmitted to the second terminal S of the driver module 10. After the anode reset module 15 is turned on, it resets the light-emitting module 14. The compensation module 12 is turned on in response to the fourth scan signal S4, connecting the control terminal G of the driver module 10 to the first terminal D of the driver module 10. The potential of the first terminal D of the driver module 10 is the voltage provided by the first power supply VDD, which has a potential difference with the second initialization voltage Vref. The first terminal D of the driver module 10 discharges to the second terminal S of the driver module 10 until the potential VG of the control terminal of the driver module 10 reaches Vref + Vth. The driver module 10 is then turned off, completing the compensation of the threshold voltage of the driver module 10. The first light control module 16 is turned off in response to the high level of the first light control signal EM1. The data writing unit 132 is first turned off and then turned on in response to the third scan signal S3. When the initialization unit 131 is turned on, the data writing unit 132 is turned off. When the data writing unit 132 is turned on, the initialization unit 131 is turned off. The off time of the second light control module 17 is the same as the on time of the data writing unit 132 and the off time of the initialization unit 131.

[0171] During the data writing phase t3 of the write frame, the initialization unit 131 is turned off in response to the high level of the second scan signal S2, the second light-emitting control module 17 is turned off in response to the high level of the second light-emitting control signal EM2, and the first light-emitting control module 16 is turned off in response to the high level of the first light-emitting control signal EM1. The compensation module 12 is first turned on in response to the fourth scan signal S4, and the data writing unit 132 is turned on in response to the low level of the third scan signal S3, thereby transmitting the data voltage Vdata to the first terminal of the coupling module 11. The coupling module 11 couples the voltage jump amount (Vdata-Vini) at the first terminal to the second terminal, so that the potential VG of the control terminal G of the driving module 10 = Vref + Vth + (Vdata-Vini) * Cst1 / (Cst1 + Cst2). Where Cst1 is the capacitance value of the coupling module 11, and Cst2 is the capacitance value of the storage module 18. The compensation module 12 then turns off in response to the fourth scan signal S4, storing the voltage containing the data voltage Vdata at the control terminal G of the driver module 10. Even if the data voltage written by the data write unit 132 changes during the remaining phase, it will not affect the potential of the control terminal G of the driver module 10, and thus will not affect the light emitting brightness. During the data write phase t3 of the write frame, the anode reset module 15 turns on in response to the high level of the first scan signal S1, resetting the anode of the light emitting module 14.

[0172] During the light-emitting phase t4 of the write frame, the anode reset module 15 is turned off in response to the low level of the first scan signal S1, the compensation module 12 is turned off in response to the low level of the fourth scan signal S4, the data write unit 132 is turned off in response to the high level of the third scan signal S3, and the initialization unit 131 is turned on in response to the low level of the second scan signal S2. The first light-emitting control module 16 is turned on in response to the low level of the first light-emitting control signal EM1, and the second light-emitting control module 17 is turned on in response to the low level of the second light-emitting control signal EM2. The driver module 10 generates a drive current I based on the potential of the control terminal G of the driver module 10 to drive the light-emitting module 14 to emit light. Drive current I = K(VGS-Vth) 2 =K(((Vdata-Vini)*Cst1 / (Cst1+Cst2))) 2 , K is the proportional factor. As can be seen from the above formula, the driving current is not affected by the threshold voltage Vth of the driving module 10, the voltage of the first power supply VDD, and the voltage of the second power supply VSS, thereby compensating for the threshold voltage and eliminating the influence of the voltage drop (IR Drop), thereby improving display uniformity.

[0173] From the above, it can be seen that for any writing frame, the start time of the second initialization phase t6 is the same as the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is later than the end time of the threshold compensation phase t2.

[0174] During the black insertion phase t7 of the holding frame, the anode reset module 15 is turned on in response to the high level of the first scanning signal S1 , thereby resetting the first end of the light emitting module 14 .

[0175] In the light-emitting phase t8 of the holding frame, the first light-emitting control module 16 is turned on in response to the low level of the first light-emitting control signal EM1, and the second light-emitting control module 17 is turned on in response to the low level of the second light-emitting control signal EM2. The driving module 10 generates a driving current according to the data voltage to drive the light-emitting module 14 to emit light.

[0176] During the entire holding frame F2 , the compensation module 12 and the data writing unit 132 are both maintained in the off state, and the initialization unit 131 and the second light emitting control module 17 are both maintained in the on state.

[0177] against Figure 2 The pixel circuit shown in FIG. 1 , the embodiment of the present invention further provides a specific pixel circuit, such as Figure 4 As shown, Figure 4 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 2 and Figure 4 Optionally, the driving module 10 includes a first transistor T1, a first electrode of the first transistor T1 is respectively connected to the second end of the first light emitting control module 16, the second end of the coupling module 11, and the first end of the compensation module 12, a second electrode of the first transistor T1 is connected to the first end of the second light emitting control module 17, and a gate of the first transistor T1 is connected to the second end of the compensation module 12 and the storage module 18;

[0178] The data writing unit 132 includes a second transistor T2, a first electrode of the second transistor T2 is connected to a data line for providing a data voltage Vdata, a second electrode of the second transistor T2 is connected to a first end of the coupling module 11, and a gate of the second transistor T2 is connected to a third scanning signal S3;

[0179] The initialization unit 131 includes a third transistor T3, a first electrode of the third transistor T3 is connected to the first initialization signal line providing the first initialization voltage Vini, a second electrode of the third transistor T3 is connected to the first end of the coupling module 11, and a gate of the third transistor T3 is connected to the second scanning signal S2;

[0180] The compensation module 12 includes a fourth transistor T4. A first electrode of the fourth transistor T4 is respectively connected to the first terminal D of the driving module 10, the second terminal of the coupling module 11, and the second terminal of the first light-emitting control module 16. A second electrode of the fourth transistor T4 is connected to the control terminal G of the driving module 10. A gate of the fourth transistor T4 is connected to the fourth scanning signal S4.

[0181] The first light emitting control module 16 includes a fifth transistor T5, a first electrode of the fifth transistor T5 is connected to the first power supply VDD, a second electrode of the fifth transistor T5 is respectively connected to the first terminal of the compensation module 12, the first terminal D of the driving module 10, and the second terminal of the coupling module 11, and a gate of the fifth transistor T5 is connected to the first light emitting control signal EM1;

[0182] The second light emitting control module 17 includes a sixth transistor T6, a first electrode of the sixth transistor T6 is connected to the second terminal S of the driving module 10, a second electrode of the sixth transistor T6 is connected to the first terminal of the light emitting module 14, and a gate of the sixth transistor T6 is connected to the second light emitting control signal EM2;

[0183] The anode reset module 15 includes a seventh transistor T7, a first electrode of the seventh transistor T7 is connected to the second initialization signal line providing the second initialization voltage Vref, a second electrode of the seventh transistor T7 is connected to the first end of the light-emitting module 14, a gate of the seventh transistor T7 is connected to the first scan signal S1, and a second end of the light-emitting module 14 is connected to the second power supply VSS;

[0184] The coupling module 11 includes a second capacitor C2, the first end of the second capacitor C2 is respectively connected to the data writing unit 132 and the initialization unit 131, and the second end of the second capacitor C2 is respectively connected to the second end of the first light-emitting control module 16, the first end D of the driving module 10 and the first end of the compensation module 12.

[0185] The storage module 18 includes a first capacitor C1 , a first end of the first capacitor C1 is connected to the control end G of the driving module 10 , and a second end of the first capacitor C1 is connected to the first end of the light emitting module 14 .

[0186] In this embodiment, the first transistor T1, the fourth transistor T4, and the seventh transistor T7 are all N-type transistors, and the third transistor T3, the second transistor T2, the fifth transistor T5, and the sixth transistor T6 are all P-type transistors. The first emission control signal EM1 is multiplexed into the first scan signal S1, that is, the gate of the seventh transistor T7 is connected to the first emission control signal EM1. The second emission control signal EM2 is multiplexed into the second scan signal S2, that is, the gate of the third transistor T3 is connected to the second emission control signal EM2. Figure 4 For the driving timing of the pixel circuit, see Figure 3 , the specific work process and Figure 2 The same, no longer repeated here.

[0187] use Figure 4 The pixel circuit shown drives the light-emitting module to emit light, and performs simulation to obtain Figure 5 The simulation diagram shown, Figure 5 A simulation waveform diagram of the working process of a pixel circuit provided by an embodiment of the present invention, Figure 5 The waveform diagram includes the driving current I, the potential VG of the control terminal of the driving module, the third scanning signal S3, the first light-emitting control signal EM1, the second light-emitting control signal EM2 and the fourth scanning signal S4, wherein the horizontal axis of each waveform is time, in units of s, the vertical axis of the driving current I is current, in units of A, and the vertical axes of the other signals are all voltage, in units of V. Figure 2 、 Figure 4 and Figure 5 It can be seen that in the threshold compensation stage, the potential of the control terminal G of the driving module 10, ie, the gate of the first transistor T1, gradually decreases over time to compensate for the threshold voltage.

[0188] against Figure 2 and Figure 4 In the pixel circuit shown, the first light-emitting control signal EM1 is multiplexed into the first scanning signal S1 to save the number of scanning drive circuits, which is conducive to achieving a narrow bezel of the screen. In other optional embodiments, the first light-emitting control signal EM1 and the first scanning signal S1 connected to the same pixel circuit can come from different stages of the shift register in the same group of scanning drive circuits. Specifically, Figure 6 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 7 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 7 To correspond to Figure 6 A specific circuit structure, refer to Figure 6 and Figure 7 , the type of transistor included in the first light emitting control module 16 is opposite to the type of transistor included in the anode reset module 15;

[0189] In a display panel corresponding to the pixel circuits, the pixel circuits are arranged in an array;

[0190] The first light emitting control modules 16 located in the same row of pixel circuits are connected to the same first light emitting control signal EM1, and the anode reset modules 15 located in the same row of pixel circuits are connected to the same first scanning signal;

[0191] In two adjacent rows of pixel circuits, the first light emitting control signal EM1 ′ connected to the pixel circuits in the previous row is multiplexed into the first scanning signal connected to the pixel circuits in the next row.

[0192] Figure 6 and Figure 2 The difference between the pixel circuits shown is that the control terminal of the anode reset module 15 receives a different signal. Figure 7 and Figure 4 The difference between the pixel circuits shown is that the signal connected to the gate of the seventh transistor T7 is different, and the other structures are the same and will not be described here. Figure 6 and Figure 7 , Figure 6 and Figure 7 If the pixel circuit is located in the nth row, then the first scan signal connected to the control terminal of the anode reset module 15 or the first scan signal connected to the gate of the seventh transistor T7 is the first light-emitting control signal connected to the pixel circuit in the n-1th row, that is, the first light-emitting control signal EM1' connected to the pixel circuit in the previous row. The display panel includes a scan drive circuit for providing the first light-emitting control signal EM1. The scan drive circuit includes a cascade-connected multi-stage shift register. The first output terminal of the shift register is connected to the pixel circuit in the corresponding row for outputting the first light-emitting control signal EM1 to the pixel circuit in the corresponding row. The first output terminal of the shift register is also connected to the gate of each seventh transistor T7 in the pixel circuit in the next row. This enables the first scan signal and the first light-emitting control signal to share a set of scan drive circuits, thereby reducing the number of scan drive circuits. Figure 8 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention, Figure 8 Applies to Figure 6 as well as Figure 7 The pixel circuit shown, refer to Figure 6-Figure 8 In this embodiment, the start time of the second initialization phase t6 is earlier than the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is the same as the end time of the threshold compensation phase t2; in any writing frame, the second initialization phase t6 overlaps with the data writing phase t3, the start time of the second initialization phase t6 is earlier than the start time of the data writing phase t3, and the end time of the second initialization phase t6 is earlier than the end time of the data writing phase. Figure 8 The driving timing shown is similar to Figure 3 Similarly, the specific driving process is similar to Figure 3 In this embodiment, the first light emitting control signal EM1' connected to the pixel circuit in the previous row is multiplexed into the first scanning signal connected to the pixel circuit in the next row, which facilitates different layouts.

[0193] In addition to the above Figure 2 and Figure 6 ,or, Figure 4 and Figure 7 In addition to the pixel circuit shown in FIG. 1 , in order to further reduce the number of scan drive circuits in the display panel, this embodiment provides a third pixel circuit. Figure 9 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 9 and Figure 2The only difference is that the control terminals of the initialization unit 131 and the control terminals of the second light-emitting control module 17 are connected to different signals. Specifically, in the third pixel circuit, the first light-emitting control signal EM1 is multiplexed into the first scan signal, the type of transistors included in the data write unit 132 is opposite to the type of transistors included in the initialization unit 131, and the third scan signal S3 is multiplexed into the second scan signal. The type of transistors included in the second light-emitting control module 17 is the same as the type of transistors included in the initialization unit 1321, and the second scan signal is multiplexed into the second light-emitting control signal. That is, the control terminals of the second light-emitting control module 17, the data write unit 132, and the initialization unit 131 are connected to the same signal, and the third scan signal S3 is multiplexed into the second light-emitting control signal EM2 and the second scan signal S2. The control terminals of the second light-emitting control module 17, the initialization unit 131, and the data write unit 132 are all connected to the third scan signal S3, thereby reducing the number of scan drive circuits.

[0194] Figure 10 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 10 for Figure 9 A corresponding specific pixel circuit structure, Figure 9 The transistors included in the middle driving module 10, the transistors included in the compensation module 12, the transistors included in the second light emitting control module 17, the transistors included in the anode reset module 15, and the transistors included in the initialization unit 131 are all N-type transistors, further oxide transistors, and the transistors included in the first light emitting control module 16 and the data writing unit 132 are all P-type transistors, further low-temperature polysilicon transistors. Specifically, Figure 10 In the embodiment, the first transistor T1, the sixth transistor T6, the seventh transistor T7, the fourth transistor T4 and the third transistor T3 are all N-type transistors, further oxide transistors, and the fifth transistor T5 and the second transistor T2 are all P-type transistors, further low-temperature polysilicon transistors. Figure 11 Another driving timing diagram of a pixel circuit provided by an embodiment of the present invention is shown in FIG. Figure 11 In any write frame F1, the start time of the first initialization phase t5 is the same as the start time of the threshold compensation phase t2, and the end time of the first initialization phase t5 is earlier than the end time of the threshold compensation phase t2. The second initialization phase t6 includes the first initialization phase t5 and the data writing phase t3. That is, the start time of the second initialization phase t6 is the same as the start time of the first initialization phase t5 and earlier than the start time of the data writing phase t3, and the end time of the second initialization phase t6 is the same as the end time of the data writing phase t3. The start time of the second initialization phase t6 is the same as the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is later than the end time of the threshold compensation phase t2. Figure 11 The working process of the pixel circuit Figure 3 Similar, no further description is given here.

[0195] The third pixel circuit provided by this embodiment, namely Figure 9 or Figure 10 The pixel circuit shown only requires three sets of scan driving circuits to provide the first light emitting control signal EM1, the fourth scan signal S4 and the third scan signal S3 respectively. The number of required scan driving circuits is small, and narrower left and right borders of the screen can be achieved.

[0196] Based on the third pixel circuit, the embodiment of the present invention further provides a fourth pixel circuit, Figure 12 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 13 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 13 for Figure 12 A corresponding specific circuit structure, Figure 12 and Figure 9 The difference lies in the different signals connected to the anode reset module 15. Specifically, in two adjacent rows of pixel circuits, the first light-emitting control signal EM1' connected to the pixel circuit in the previous row is multiplexed into the first scanning signal connected to the pixel circuit in the next row, that is, the control end of the anode reset module 15 is connected to the first light-emitting control signal EM1' connected to the pixel circuit in the previous row. Figure 13 and Figure 10 The only difference is that the signal connected to the gate of the seventh transistor T7 is the first light emitting control signal EM1' connected to the pixel circuit in the previous row. Figure 14 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention, Figure 14 The drive timing shown is applicable to Figure 12 and Figure 13In the pixel circuit shown in this embodiment, for any write frame, the start time of the first initialization phase t5 is the same as the start time of the threshold compensation phase t2, and the end time of the first initialization phase t5 is earlier than the end time of the threshold compensation phase t2. The first initialization phase t5 does not overlap with the data write phase t3. The start time of the second initialization phase t6 is earlier than the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is the same as the end time of the threshold compensation phase t2. In the fourth pixel circuit, the signals received by the control terminal of the first light-emitting control module 16 and the signals received by the control terminal of the anode reset module 15 are provided by a group of scan drive circuits. The signals received by the control terminals of the initialization unit 131, the data write unit 132, and the second light-emitting control module 17 are also provided by a group of scan drive circuits. The signals received by the control terminal of the compensation module 12 are also provided by a group of scan drive circuits. Only three groups of scan drive circuits are required, simplifying the structure of the display panel and facilitating the realization of a narrow screen frame. In this embodiment, the first light-emitting control signal EM1' received by the pixel circuits in the previous row is multiplexed as the first scan signal received by the pixel circuits in the next row, facilitating different layouts.

[0197] Figure 15 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 15 , Figure 15 In the embodiment, the type of transistor included in the second light-emitting control module 17 is the same as the type of transistor included in the initialization unit 131, and the type of transistor included in the data writing unit 132 is opposite to the type of transistor included in the initialization unit 131. Further, the transistor included in the initialization unit 131 is a P-type transistor, the transistor included in the second light-emitting control module 17 is a P-type transistor, the transistor included in the data writing unit 132 is an N-type transistor, the transistor included in the compensation module 12 is an N-type transistor, the transistor included in the driving module is an N-type transistor, the transistor included in the anode reset module 15 is an N-type transistor, and the transistor included in the first light-emitting control module 16 is a P-type transistor. Further, the transistor included in the data writing unit 132 is an oxide transistor, the transistor included in the initialization unit 131 is a low-temperature polysilicon transistor, and the transistor included in the second light-emitting control module 17 is a low-temperature polysilicon transistor. Figure 15 The pixel circuit shown is Figure 2 The difference between the pixel circuit shown is that Figure 15 The transistors included in the data writing unit 132 are N-type transistors, Figure 15 The control end of the data writing unit 132 , the control end of the initialization unit 131 and the control end of the second light emitting control module 17 are all connected to the second light emitting control signal EM2 . Figure 16 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 16for Figure 15 A corresponding specific pixel circuit structure, Figure 16 and Figure 4 The only difference is that the gate of the second transistor T2 is connected to the second light emitting control signal EM2. Figure 17 Another driving timing diagram of a pixel circuit provided by an embodiment of the present invention is shown in FIG. Figure 15-17 In any write frame F1, the start time of the first initialization phase t5 is the same as the start time of the threshold compensation phase t2, and the end time of the first initialization phase t5 is earlier than the end time of the threshold compensation phase t2. The second initialization phase t6 includes the first initialization phase t5 and the data writing phase t3. That is, the start time of the second initialization phase t6 is the same as the start time of the first initialization phase t5 and earlier than the start time of the data writing phase t3, and the end time of the second initialization phase t6 is the same as the end time of the data writing phase t3. The start time of the second initialization phase t6 is the same as the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is later than the end time of the threshold compensation phase t2.

[0198] Figure 17 The driving process shown is similar to Figure 3 The driving process shown is similar and will not be described here. Figure 15 or Figure 16 The pixel circuit shown is simulated to obtain Figure 18 The working process waveform of the pixel circuit shown in the figure is as follows: Figure 18 A simulation waveform diagram of the working process of another pixel circuit provided by an embodiment of the present invention, Figure 18 The simulation waveform shown is the same as Figure 5 Similar, no further description is given here.

[0199] exist Figure 15 Based on the pixel circuit shown, another method can be provided with Figure 15 Similar pixel circuits, Figure 19 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 19 and Figure 15 The difference between the pixel circuits shown is that the control terminal of the anode reset module 15 receives different signals. Figure 19 In two adjacent rows of pixel circuits, the first light-emitting control signal EM1' connected to the pixel circuit in the previous row is multiplexed into the first scanning signal connected to the pixel circuit in the next row, that is, the signal connected to the control end of the anode reset module 15 is the first light-emitting control signal EM1' connected to the pixel circuit in the previous row. Figure 20 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 20 for Figure 19 A specific structure of the corresponding pixel circuit, Figure 20and Figure 16 The difference is that the signal connected to the gate of the seventh transistor T7 is the first light emitting control signal EM1' connected to the pixel circuit in the previous row. Figure 21 This is a driving timing diagram of another pixel circuit provided by an embodiment of the present invention. In this embodiment, in any write frame F1, the start time of the second initialization phase t6 is earlier than the start time of the threshold compensation phase t2, and the end time of the second initialization phase t6 is the same as the end time of the threshold compensation phase t2. The second initialization phase t6 overlaps with the data write phase t3, and the start time of the second initialization phase t6 is earlier than the start time of the data write phase t3, and the end time of the second initialization phase t6 is earlier than the end time of the data write phase t3. For any write frame, the threshold compensation phase t2 and the data write phase t3 partially overlap. The start time of the threshold compensation phase t2 is earlier than the start time of the data write phase t3, and the end time of the threshold compensation phase t2 is earlier than the end time of the data write phase t3. The threshold compensation phase t2 partially overlaps with the first initialization phase t5, and the end time of the threshold compensation phase t2 is later than the end time of the first initialization phase t6. In this embodiment, the first light-emitting control signal EM1' connected to the pixel circuits in the previous row is multiplexed as the first scanning signal connected to the pixel circuits in the next row, facilitating different layouts.

[0200] Whether it is Figure 16 The pixel circuit shown is still Figure 20 The pixel circuits shown in the figure all use three sets of scanning drive circuits to provide gate access signals for each transistor. The number of scanning drive circuits is small, which is conducive to achieving a narrow frame of the screen. At the same time, compared with Figure 10 or Figure 13 The pixel circuit shown, Figure 16 or Figure 20 The pixel circuit includes four N-type transistors and three P-type transistors, and the N-type transistors and P-type transistors are formed in different layers. The number ratio of the two types of transistors is more balanced, which can reduce the lateral area occupied and is conducive to achieving higher pixel density.

[0201] An embodiment of the present invention further provides a pixel circuit, Figure 22 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 22 The pixel circuit includes: a driving module 10, a compensation module 12, a first light emitting control module 16, a second light emitting control module 17, an anode reset module 15 and a light emitting module 14;

[0202] A first end of the compensation module 12 is connected to a first end D of the driving module 10, and a second end of the compensation module 12 is connected to a control end G of the driving module 10. The compensation module 12 is configured to transmit threshold voltage information of the driving module 10 to the control end G of the driving module 10 based on a voltage at the first end D of the driving module 10 after discharge by the driving module 10.

[0203] The first light control module 16, the driving module 10, the second light control module 17 and the light emitting module 14 are sequentially connected in series between the first power supply VDD and the second power supply VSS; the first light control module 16 is configured to be turned on in response to the first light control signal EM1;

[0204] The anode reset module 15 is configured to provide a second initialization voltage Vref to the first terminal of the light emitting module 14 in response to the first scan signal S1;

[0205] The type of transistor included in the first light emitting control module 16 is opposite to the type of transistor included in the anode reset module 15;

[0206] The first light-emitting control signal EM1 is multiplexed into the first scanning signal S1, or, in a display panel corresponding to the pixel circuit, the pixel circuits are arranged in an array, the first light-emitting control modules 16 located in the same row of pixel circuits are connected to the same first light-emitting control signal EM1, and the anode reset modules 15 located in the same row of pixel circuits are connected to the same first scanning signal S1, and in two adjacent rows of pixel circuits, the first light-emitting control signal connected to the pixel circuit in the previous row is multiplexed into the first scanning signal S1 connected to the pixel circuit in the next row.

[0207] In this embodiment, during the threshold compensation phase of the write frame, the first terminal of the driver module 10 discharges via the second light-emitting control module 17 and the anode reset module 15 until the potential difference between the control terminal and the second terminal S of the driver module 10 equals the threshold voltage of the driver module 10. Discharge then terminates, completing threshold compensation. The anode reset module 15 is configured to conduct during the second initialization phase to provide a second initialization voltage Vref to the first terminal of the light-emitting module 14, i.e., the anode of the light-emitting module 14, thereby resetting the anode. During the light-emitting phase of the write frame, the first light-emitting control module 16 and the second light-emitting control module 17 conduct, causing the driver module 10 to drive the light-emitting module 14 to emit light according to the generated drive current.

[0208] In this embodiment, the first light-emitting control signal EM1 is multiplexed into the first scan signal S1, or the first light-emitting control signal received in the previous row of pixel circuits is multiplexed into the first scan signal S1 received in the next row of pixel circuits. This allows the signal received by the control terminal of the first light-emitting control module 16 and the signal received by the control terminal of the anode reset module 15 to be generated by the same scan drive circuit, thereby reducing the number of scan drive circuits and facilitating the realization of a narrow screen bezel. Furthermore, the first light-emitting control signal received in the previous row of pixel circuits is multiplexed into the first scan signal S1 received in the next row of pixel circuits, making the layout more convenient.

[0209] Optionally, the pixel circuit further includes a voltage writing module and a coupling module, the structure of which is similar to Figure 2 Same, see Figure 2 ;

[0210] The first end of the coupling module 11 is connected to the voltage writing module 13, and the second end of the coupling module 11 is connected to the first end D of the driving module 10. The voltage writing module 13 is used to transmit the first initialization voltage Vini and the data voltage Vdata to the first end of the coupling module 11 in a time-sharing manner;

[0211] The coupling module 11 is used to couple a voltage including the data voltage Vdata to the control terminal G of the driving module 10 .

[0212] Furthermore, the voltage writing module 13 includes an initialization unit 131 and a data writing unit 132; a display cycle of the pixel circuit includes a writing frame and a holding frame;

[0213] The initialization unit 131 is connected to the first end of the coupling module 11 and is configured to provide a first initialization voltage Vini to the first end of the coupling module 11 in response to the second scanning signal S2 during a first initialization phase of a writing frame.

[0214] The data writing unit 132 is connected to the first end of the coupling module 11 and is configured to provide a data voltage Vdata to the first end of the coupling module 11 in response to the third scanning signal S3 during a data writing phase of a writing frame.

[0215] The coupling module 11 is used to transmit the voltage including the data voltage Vdata to the control end of the driving module 10 via the turned-on compensation module 12;

[0216] The compensation module 12 is configured to be turned on in response to the fourth scanning signal S4 during the threshold compensation phase of the write frame, so as to transmit the threshold voltage information of the driving module 10 to the control terminal of the driving module 10 according to the voltage at the first terminal D of the driving module 10 after being discharged through the driving module 10, the second light-emitting control module 17, and the anode reset module 15.

[0217] The working principle of the pixel circuit in this embodiment is similar to Figure 2 The same is true in , so I will not repeat it here.

[0218] The embodiment of the present invention further provides a driving method for a pixel circuit. Figure 23 A flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention, wherein a display cycle of the pixel circuit at least includes writing a frame, referring to Figure 2 and Figure 23 , the method comprising:

[0219] S110 : In the first initialization phase of the writing frame, the voltage writing module 13 provides the first initialization voltage Vini to the first terminal of the coupling module 11 in response to the second scanning signal S2 .

[0220] The voltage writing module 13 is a switching module. The second scanning signal S2 controls whether the first end of the coupling module 11 is connected to the first initialization voltage Vini. In the first initialization stage of the writing frame, the voltage writing module 13 is controlled by the second scanning signal to connect the second end of the coupling module 11 to the first initialization voltage Vini, and then the first initialization voltage Vini is provided to the first end of the coupling module 11.

[0221] S120: In the threshold compensation stage of the write frame, the compensation module 12 is turned on in response to the fourth scan signal S4 to transmit the threshold voltage information of the driving module to the control terminal G of the driving module 10 according to the voltage of the first terminal D of the driving module 10 after being discharged by the driving module 10.

[0222] During the threshold compensation phase of the write frame, a potential difference exists between the first terminal D and the second terminal S of the driving module 10. Therefore, the first terminal D discharges toward the second terminal S to reduce the potential of the control terminal G of the driving module 10 until the potential difference between the control terminal and the second terminal is equal to the threshold voltage of the driving module 10. At this time, the threshold voltage compensation is completed.

[0223] S130: In the data writing phase of the writing frame, the voltage writing module 13 responds to the third scanning signal S3 to provide the data voltage Vdata to the first end of the coupling module 11, so that the coupling module 11 couples the voltage containing the data voltage Vdata to the control end G of the driving module 10.

[0224] The voltage writing module 13 is a switching module. The third scanning signal S3 controls whether the first end of the coupling module 11 is connected to the data voltage Vdata. During the data writing stage of the writing frame, the third scanning signal S3 controls the voltage writing module 13 to connect the second end of the coupling module 11 to the data voltage Vdata, and then provides the data voltage Vdata to the first end of the coupling module 11. Then, the voltage containing the data voltage Vdata is coupled to the control end of the driving module 10 through the coupling module and the compensation module.

[0225] The technical solution of the embodiment of the present invention compensates the threshold voltage of the driving module through the compensation module to prevent the threshold voltage drift from affecting the display uniformity. The data voltage written by the voltage writing module is coupled to the control terminal of the driving module through the compensation module through the coupling module, so that the data voltage is written so that the driving module can subsequently generate a driving current according to the data voltage to drive the light-emitting module to emit light. The transistors included in the driving module and the compensation module are both oxide transistors. The oxide transistors have a small leakage current in the off state. The compensation module is connected to the control terminal of the driving module. The compensation module has a small leakage current in the off state, which makes the potential change of the control terminal of the driving module small, thereby improving the display uniformity. At least one of the at least two transistors included in the voltage writing module is a low-temperature polysilicon transistor. The low-temperature polysilicon transistor has high mobility and fast switching speed, which improves the display reliability. The low-temperature polysilicon transistor does not require a large cross-voltage drive, which is conducive to reducing the power consumption of the screen. The pixel circuit in this embodiment includes both oxide transistors and low-temperature polysilicon transistors, which can take into account both display uniformity and low power consumption of the screen.

[0226] Optionally, the pixel circuit further includes an anode reset module, a first light emitting control module, and a second light emitting control module, and the driving method of the pixel circuit further includes:

[0227] In the second initialization phase of the writing frame, the anode reset module is turned on in response to the first scanning signal to provide a second initialization voltage to the first end of the light emitting module;

[0228] During the light emitting phase of the writing frame, the first light emitting control module is turned on in response to the first light emitting control signal, and the second light emitting control module is turned on in response to the second light emitting control signal, so that the driving module generates a driving current according to the data voltage to drive the light emitting module to emit light.

[0229] In the writing frame, the first initialization phase and the data writing phase are not performed simultaneously, and the first initialization phase is earlier than the data writing phase;

[0230] For any writing frame, the threshold compensation phase and the data writing phase partially overlap;

[0231] The start time of the threshold compensation phase is earlier than the start time of the data writing phase, and the end time of the threshold compensation phase is earlier than the end time of the data writing phase;

[0232] For any of the written frames, the threshold compensation phase and the first initialization phase partially overlap, and the end time of the threshold compensation phase is later than the end time of the first initialization phase;

[0233] For any written frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase. It should be understood that the various forms of the process shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and this document is not limited here.

[0234] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that: include: Driving module, coupling module, compensation module and voltage writing module; The first end of the compensation module is connected to the first end of the driving module, and the second end of the compensation module is connected to the control end of the driving module. The compensation module is used to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage of the first end of the driving module after being discharged by the driving module; The first end of the coupling module is connected to the voltage writing module, the second end of the coupling module is connected to the first end of the driving module, and the voltage writing module is used to transmit the first initialization voltage and the data voltage to the first end of the coupling module in a time-sharing manner; The coupling module is used to couple the voltage containing the data voltage to the control terminal of the driving module; The transistors included in the driving module and the transistors included in the compensation module are both oxide transistors. The voltage writing module includes at least one transistor, and at least one transistor in the voltage writing module is a low-temperature polysilicon transistor.

2. The pixel circuit according to claim 1, wherein: A display cycle of the pixel circuit includes a write frame and a hold frame. The pixel circuit also includes a light-emitting module and an anode reset module. The anode reset module is connected to the first end of the light-emitting module and is used to provide a second initialization voltage to the first end of the light-emitting module in response to a first scan signal in a second initialization phase of the write frame.

3. The pixel circuit according to claim 2, wherein: The conduction frequency of the anode reset module is greater than the conduction frequency of the compensation module; Preferably, the anode reset module is further configured to respond to the first scanning signal during a second initialization phase of the holding frame and provide the second initialization voltage to the first end of the light emitting module; The compensation module is used to be turned off in the holding frame; Preferably, in the writing frame and the holding frame, the conduction frequency of the anode reset module is the same.

4. The pixel circuit according to claim 2, wherein: A display cycle of the pixel circuit includes a writing frame and a holding frame; the pixel circuit also includes a first light emitting control module and a second light emitting control module; A first end of the first light-emitting control module is connected to a first power source, a second end of the first light-emitting control module is connected to a first end of the driving module, a first end of the second light-emitting control module is connected to a second end of the driving module, and a second end of the second light-emitting control module is connected to a first end of the light-emitting module, the first light-emitting control module is configured to be turned on in response to a first light-emitting control signal during both a light-emitting phase of a writing frame and a light-emitting phase of a holding frame, and the second light-emitting control module is configured to be turned on in response to a second light-emitting control signal during both a light-emitting phase of a writing frame and a light-emitting phase of a holding frame; Preferably, the holding frame includes a light-emitting phase and a black-insertion phase. In the black-insertion phase, the first light-emitting control module is turned off in response to the first light-emitting control signal, and the second light-emitting control module is turned on in response to the second light-emitting control signal.

5. The pixel circuit according to claim 4, wherein: The voltage writing module includes an initialization unit and a data writing unit; the initialization unit is connected to the first end of the coupling module and is used to provide the first initialization voltage to the first end of the coupling module in response to the second scanning signal during the first initialization phase of the writing frame; The data writing unit is connected to the first end of the coupling module and is used to provide the data voltage to the first end of the coupling module in response to the third scanning signal during the data writing phase of the writing frame; The coupling module is used to transmit the voltage containing the data voltage to the control end of the driving module via the turned-on compensation module; Preferably, within the writing frame, the first initialization phase and the data writing phase are not performed simultaneously, and the first initialization phase is earlier than the data writing phase; Preferably, the compensation module is used to respond to the fourth scanning signal and turn on during the threshold compensation stage of the write frame, so as to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage after the first end of the driving module is discharged through the driving module, the second light-emitting control module and the anode reset module.

6. The pixel circuit according to claim 5, wherein: For any of the writing frames, the threshold compensation phase and the data writing phase partially overlap; Preferably, the starting time of the threshold compensation phase is earlier than the starting time of the data writing phase, and the ending time of the threshold compensation phase is earlier than the ending time of the data writing phase; Preferably, for any of the write frames, the threshold compensation phase and the first initialization phase partially overlap, and a deadline of the threshold compensation phase is later than a deadline of the first initialization phase; For any write frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase.

7. The pixel circuit according to claim 6, wherein: The compensation module is further configured to first turn on and then turn off in response to the fourth scanning signal during the data writing phase of the writing frame, so as to transmit the voltage containing the data voltage to the control terminal of the driving module; Preferably, in the data writing phase of any of the writing frames, the on-time length of the compensation module is equal to the off-time length of the compensation module.

8. The pixel circuit according to claim 6, wherein: The type of transistors included in the first light emitting control module is opposite to the type of transistors included in the anode reset module, and the first light emitting control signal is multiplexed into the first scanning signal; Preferably, the transistor included in the first light emitting control module is a P-type transistor, and the transistor included in the anode reset module is an N-type transistor; Preferably, the transistor included in the first light emitting control module is a low-temperature polysilicon transistor, and the transistor included in the anode reset module is an oxide transistor; Preferably, for any write frame, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase.

9. The pixel circuit according to claim 6, wherein: The type of transistor included in the first light emitting control module is opposite to the type of transistor included in the anode reset module; In a display panel corresponding to the pixel circuits, the pixel circuits are arranged in an array; The first light emitting control modules located in the same row of pixel circuits are connected to the same first light emitting control signal, and the anode reset modules located in the same row of pixel circuits are connected to the same first scanning signal; In two adjacent rows of pixel circuits, the first light emitting control signal connected to the pixel circuits in the previous row is multiplexed into the first scanning signal connected to the pixel circuits in the next row; Preferably, the transistor included in the first light emitting control module is a P-type transistor, and the transistor included in the anode reset module is an N-type transistor; Preferably, the transistor included in the first light emitting control module is a low-temperature polysilicon transistor, and the transistor included in the anode reset module is an oxide transistor; Preferably, in any of the write frames, the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase; Preferably, in any of the write frames, the second initialization phase overlaps with the data write phase, the start time of the second initialization phase is earlier than the start time of the data write phase, and the end time of the second initialization phase is earlier than the end time of the data write phase.

10. The pixel circuit according to claim 8 or 9, characterized in that: The type of transistors included in the second light emitting control module is the same as the type of transistors included in the initialization unit, and the second light emitting control signal is multiplexed into the second scanning signal; Preferably, the transistor included in the second light emitting control module and the transistor included in the initialization unit are both P-type transistors; Preferably, the transistor included in the second light emitting control module and the transistor included in the initialization unit are both low-temperature polysilicon transistors; Preferably, the transistor included in the data writing unit is a P-type transistor; Preferably, the transistor included in the data writing unit is a low-temperature polysilicon transistor.

11. The pixel circuit according to claim 8 or 9, characterized in that: The data writing unit includes a transistor of a type opposite to that of the initialization unit, and the third scan signal is multiplexed into the second scan signal.

12. The pixel circuit according to claim 11, wherein: The type of transistors included in the second light emitting control module is the same as the type of transistors included in the initialization unit, and the second scanning signal is multiplexed into the second light emitting control signal.

13. The pixel circuit according to claim 12, wherein: The transistor included in the data writing unit is a P-type transistor, the transistor included in the initialization unit is an N-type transistor, and the transistor included in the second light emitting control module is an N-type transistor; Preferably, the transistor included in the data writing unit is a low-temperature polysilicon transistor, the transistor included in the initialization unit is an oxide transistor, and the transistor included in the second light emitting control module is an oxide transistor.

14. The pixel circuit according to claim 12, wherein: The transistor included in the data writing unit is an N-type transistor, the transistor included in the initialization unit is a P-type transistor, and the transistor included in the second light emitting control module is a P-type transistor; Preferably, the transistor included in the data writing unit is an oxide transistor, the transistor included in the initialization unit is a low-temperature polysilicon transistor, and the transistor included in the second light emitting control module is a low-temperature polysilicon transistor.

15. The pixel circuit according to claim 4, wherein: The pixel circuit further includes a storage module connected between the control terminal of the driving module and the first terminal of the light emitting module; Preferably, the storage module includes a first capacitor, a first end of the first capacitor is connected to the control end of the driving module, and a second end of the first capacitor is connected to the first end of the light emitting module.

16. The pixel circuit according to claim 5, wherein: The driving module includes a first transistor, wherein a first electrode of the first transistor is respectively connected to the second end of the first light emitting control module, the second end of the coupling module, and the first end of the compensation module, a second electrode of the first transistor is connected to the first end of the second light emitting control module, and a gate of the first transistor is connected to the second end of the compensation module; The data writing unit includes a second transistor, a first electrode of the second transistor is connected to a data line for providing a data voltage, a second electrode of the second transistor is connected to the first end of the coupling module, and a gate of the second transistor is connected to the third scanning signal; The initialization unit includes a third transistor, a first electrode of the third transistor is connected to the first initialization signal line providing the first initialization voltage, a second electrode of the third transistor is connected to the first end of the coupling module, and a gate of the third transistor is connected to the second scanning signal; The compensation module includes a fourth transistor, wherein a first electrode of the fourth transistor is respectively connected to the first end of the driving module, the second end of the coupling module, and the second end of the first light-emitting control module, a second electrode of the fourth transistor is connected to the control end of the driving module, and a gate of the fourth transistor is connected to the fourth scanning signal; The first light emitting control module includes a fifth transistor, a first electrode of the fifth transistor is connected to the first power supply, a second electrode of the fifth transistor is respectively connected to the first terminal of the compensation module, the first terminal of the driving module, and the second terminal of the coupling module, and a gate of the fifth transistor is connected to the first light emitting control signal; The second light emitting control module includes a sixth transistor, a first electrode of the sixth transistor is connected to the second end of the driving module, a second electrode of the sixth transistor is connected to the first end of the light emitting module, and a gate of the sixth transistor is connected to the second light emitting control signal; The anode reset module includes a seventh transistor, a first electrode of the seventh transistor is connected to a second initialization signal line providing the second initialization voltage, a second electrode of the seventh transistor is connected to a first end of the light-emitting module, a gate of the seventh transistor is connected to the first scanning signal, and a second end of the light-emitting module is connected to a second power supply; The coupling module includes a second capacitor, a first end of the second capacitor is respectively connected to the data writing unit and the initialization unit, and a second end of the second capacitor is respectively connected to the second end of the first light-emitting control module, the first end of the driving module and the first end of the compensation module.

17. A pixel circuit, characterized in that: include: A driving module, a compensation module, a first light-emitting control module, a second light-emitting control module, an anode reset module and a light-emitting module; The first end of the compensation module is connected to the first end of the driving module, and the second end of the compensation module is connected to the control end of the driving module. The compensation module is used to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage of the first end of the driving module after being discharged by the driving module; The first light control module, the driving module, the second light control module and the light emitting module are sequentially connected in series between a first power supply and a second power supply; the first light control module is configured to be turned on in response to a first light control signal; The anode reset module is used for providing a second initialization voltage to the first end of the light emitting module in response to the first scanning signal; The type of transistor included in the first light emitting control module is opposite to the type of transistor included in the anode reset module; The first light-emitting control signal is multiplexed into the first scanning signal, or, in a display panel corresponding to the pixel circuit, the pixel circuits are arranged in an array, the first light-emitting control modules located in the same row of pixel circuits are connected to the same first light-emitting control signal, and the anode reset modules located in the same row of pixel circuits are connected to the same first scanning signal, and in two adjacent rows of pixel circuits, the first light-emitting control signal connected to the pixel circuit in the upper row is multiplexed into the first scanning signal connected to the pixel circuit in the next row.

18. The pixel circuit according to claim 17, wherein: It also includes a voltage writing module and a coupling module; The first end of the coupling module is connected to the voltage writing module, the second end of the coupling module is connected to the first end of the driving module, and the voltage writing module is used to transmit the first initialization voltage and the data voltage to the first end of the coupling module in a time-sharing manner; The coupling module is used to couple the voltage containing the data voltage to the control terminal of the driving module; Preferably, the voltage writing module includes an initialization unit and a data writing unit; a display cycle of the pixel circuit includes a writing frame and a holding frame; The initialization unit is connected to the first end of the coupling module, and is configured to provide the first initialization voltage to the first end of the coupling module in response to the second scanning signal during the first initialization phase of the writing frame; The data writing unit is connected to the first end of the coupling module and is used to provide the data voltage to the first end of the coupling module in response to the third scanning signal during the data writing phase of the writing frame; The coupling module is used to transmit the voltage containing the data voltage to the control end of the driving module via the turned-on compensation module; Preferably, the compensation module is used to respond to the fourth scanning signal and turn on during the threshold compensation stage of the write frame, so as to transmit the threshold voltage information of the driving module to the control end of the driving module according to the voltage after the first end of the driving module is discharged through the driving module, the second light-emitting control module and the anode reset module.

19. A method for driving a pixel circuit, characterized in that: Used to drive the pixel circuit according to any one of claims 1 to 16, wherein a display cycle of the pixel circuit includes at least a writing frame; The driving method of the pixel circuit includes: In a first initialization phase of a writing frame, the voltage writing module provides the first initialization voltage to the first terminal of the coupling module in response to a second scanning signal; During the threshold compensation phase of the write frame, the compensation module is turned on in response to the fourth scan signal to transmit the threshold voltage information of the driving module to the control terminal of the driving module according to the voltage of the first terminal of the driving module after being discharged by the driving module; During the data writing phase of the writing frame, the voltage writing module provides the data voltage to the first terminal of the coupling module in response to the third scanning signal, so that the coupling module couples the voltage containing the data voltage to the control terminal of the driving module.

20. The driving method of the pixel circuit according to claim 19, wherein: The pixel circuit further includes a light emitting module, an anode reset module, a first light emitting control module and a second light emitting control module. The driving method of the pixel circuit further includes: In the second initialization phase of the writing frame, the anode reset module is turned on in response to the first scanning signal to provide a second initialization voltage to the first end of the light emitting module; During the light-emitting phase of the writing frame, the first light-emitting control module is turned on in response to the first light-emitting control signal, and the second light-emitting control module is turned on in response to the second light-emitting control signal, so that the driving module generates a driving current according to the data voltage to drive the light-emitting module to emit light; Preferably, within the writing frame, the first initialization phase and the data writing phase are not performed simultaneously, and the first initialization phase is earlier than the data writing phase; Preferably, for any of the writing frames, the threshold compensation phase and the data writing phase partially overlap; Preferably, the starting time of the threshold compensation phase is earlier than the starting time of the data writing phase, and the ending time of the threshold compensation phase is earlier than the ending time of the data writing phase; Preferably, for any of the write frames, the threshold compensation phase and the first initialization phase partially overlap, and a deadline of the threshold compensation phase is later than a deadline of the first initialization phase; For any write frame, the second initialization phase and the threshold compensation phase partially overlap, the start time of the second initialization phase is the same as the start time of the threshold compensation phase, and the end time of the second initialization phase is later than the end time of the threshold compensation phase, or the start time of the second initialization phase is earlier than the start time of the threshold compensation phase, and the end time of the second initialization phase is the same as the end time of the threshold compensation phase.

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