Method for improving resistance uniformity of SiC wafer
By adjusting the angle and position of seed crystals, the small facets are grown to the edge of the crystal and removed in the cutting process, the problem of SiC wafer resistance is solved, efficient wafer resistance uniformity and cost savings are achieved, and the stability and reliability of crystal growth are improved.
Patent Information
- Application Number
- CN202510477375.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-16
- Publication Date
- 2025-08-15
AI Technical Summary
SiC wafer resistance uniformity is poor, and existing growth methods are difficult to control small faces during crystal growth, resulting in uneven resistivity, affecting wafer quality and reliability, especially when large-size wafers grow.
By adjusting the angle and position of the seed crystal, the facets are grown to the edge of the crystal, and the facets are removed in the subsequent cutting process. A graphite crucible and an angled seed stent are used to ensure the uniformity of the wafer resistance. Graphite is used as the seed stent material, and its inclination angle is adjusted as needed to control the crystal growth direction.
It improves the uniformity of SiC wafer resistance, reduces waste in the wafer slicing stage, saves chip production costs, improves the stability and reliability of crystal growth, and achieves a resistivity uniformity of more than 90%.
Smart Images
Figure CN120485942A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of wafer resistance processing, and more particularly to a method for improving the resistance uniformity of a SiC wafer. Background Art
[0002] Silicon carbide (SiC) has excellent material properties, such as high thermal conductivity and good mechanical robustness, which ensure its reliability and service life in harsh environments and can meet the needs of high-end applications in fields such as aerospace, defense, electric vehicles and industrial systems. The ultra-high thermal conductivity of SiC wafers enables equipment to operate at higher temperatures without affecting equipment performance. However, the performance of SiC wafers is affected by several key indicators, among which resistance uniformity is one of the most important influencing indicators. This indicator directly determines the electrical performance of the SiC wafer and is related to the reliability of the performance of SiC components. In the process of growing SiC crystals using the conventional PVT method, there will be growth feature surfaces on the crystal, commonly known as small faces. The small faces are the source of crystal growth and are also dense areas of crystal defects. The doping at the small faces is uneven, resulting in the resistivity at the small faces being about 10% lower than that at other locations, thereby affecting the uniformity of resistance of the entire SiC wafer. At present, the resistivity uniformity of high-quality SiC wafers needs to be ≥90%, and that of research-grade SiC wafers ≥80%. The presence of small faces will inevitably affect the uniformity of SiC wafer resistance. The growth method used in existing SiC crystal growth technology will produce irregularly shaped small faces on the crystal, making the overall quality distribution of the crystal uneven. There is a resistivity deviation between the small face area and other areas, which reduces the quality of SiC wafer preparation.
[0003] The main problems of the existing technology are as follows:
[0004] 1. Crystal form control is difficult. During the growth process of SiC crystals, defects such as micropipes, polymorphic inclusions, and dislocations are easily generated. It is necessary to precisely control key technical parameters such as the silicon-carbon ratio, temperature gradient, and airflow pressure to ensure stable crystal growth and reduce the probability of defect formation. This increases the difficulty of controlling the resistance uniformity of SiC wafers to a certain extent.
[0005] 2. SiC wafers are subdivided into 4-inch, 6-inch and 8-inch sizes. The market demand for large-size SiC wafers is strong. The SiC semiconductor material manufacturing field and market are moving towards larger sizes. 12-inch SiC wafers have already appeared. With the expansion of wafer size, the difficulty of crystal growth technology and process complexity increase, which in turn makes it more difficult to control the resistance uniformity of SiC wafers.
[0006] 3. The PVT method is a conventional method for growing SiC crystals. In a closed crystal growth furnace, a high temperature of over 2000°C is used to cause the raw materials to sublime and convert them into gaseous substances that crystallize and grow on the surface of the seed crystal. The crystal growth speed is slow, and the growth temperature control requirements are high. The crystal growth process is poorly controllable. A more refined, accurate, and feasible small-face adjustment method is required to achieve the goal of improving the resistance uniformity of SiC wafers.
[0007] Based on the above problems, the present invention proposes a method for improving the resistance uniformity of SiC wafers. During the crystal growth process, the position and angle of the seed crystal are precisely adjusted to guide the seed crystal to grow in a predetermined direction. At the same time, the small face is adjusted to the edge of the crystal to avoid the problem of increased micropipe and dislocation density caused by the growth of the small face. The small face is removed by cutting the edge through post-processing to solve the resistivity deviation problem between the small face and other areas, and finally a SiC wafer with a resistivity uniformity of more than 90% is obtained. Summary of the Invention
[0008] In order to overcome the above-mentioned defects in the prior art, the present invention provides a method for improving the resistance uniformity of SiC wafers to solve the problems existing in the above-mentioned background technology.
[0009] The present invention provides the following technical solution: a method for improving the resistance uniformity of a SiC wafer, which is achieved by a SiC wafer resistance uniformity device, wherein the SiC wafer resistance uniformity device includes a graphite crucible, an outer side of the graphite crucible is provided with a heat-insulating soft / hard felt, an inner bottom of the graphite crucible is provided with a SiC raw material, an angled seed crystal holder is installed at the top of the inner side of the graphite crucible, a seed crystal is connected to the bottom of the angled seed crystal holder, heating modules are installed on both sides of the heat-insulating soft / hard felt, and an observation window is opened on the top of the heat-insulating soft / hard felt.
[0010] Further, the following steps are included:
[0011] S1. Graphite is selected as the material for the seed crystal holder. According to the need to adjust the growth position of the small facet, a seed crystal holder with an angle of θ with the parallel direction is processed. The seed crystal is firmly bonded to the seed crystal holder using adhesive. The SiC raw material and the seed crystal holder are placed in a crucible.
[0012] S2. Close and seal the crystal growth furnace, extract the air inside the graphite crucible to a vacuum state, and after all conditions inside the crucible are stable, inject nitrogen into the crucible and start the heating module to gradually increase the crystal growth temperature;
[0013] S3, after 45 hours and high temperature heating at 2100 ° C, the SiC raw material is decomposed and sublimated. The gas phase material is first transferred to the position closest to the seed crystal and crystallized, forming a growth facet at the edge of the seed crystal. After the facet is formed, the heating temperature is gradually increased to 2600 ° C in the furnace to stabilize the temperature gradient in the furnace, improve the lateral growth ability of the facet, and then continue to grow horizontally;
[0014] S4. After the crystal growth is completed, annealing and cooling are carried out in situ, and the crystal is taken out for processing and cutting to remove the small faces at the edge of the crystal to obtain a wafer with more uniform resistance.
[0015] Furthermore, the size of the outer side of the graphite crucible is clearance-matched with the size of the inner side of the soft / hard insulation felt, and the size of the top of the angled seed crystal holder is the same as the size of the top of the inner side of the graphite crucible.
[0016] Furthermore, the inclination angle of the bottom of the angled seed crystal holder can be adjusted according to actual production requirements.
[0017] Technical effects and advantages of the present invention:
[0018] 1. The present invention precisely adjusts the angle of the seed crystal to adjust the small facets of crystal growth to the edge position, and removes the small facets in the subsequent cutting process, thereby ensuring the consistency of wafer quality and achieving the purpose of improving the uniformity of wafer resistance. This method solves the problem of controlling the seed crystal angle during crystal growth, controls the seed crystal angle more accurately, guides the crystal growth direction more accurately, and improves the stability and reliability of the crystal growth process. This method is feasible and operable, and has low implementation cost. Graphite is used as the seed crystal holder material, and the tilt angle of the seed crystal holder is machined as needed. The position of the small facet is directly adjusted to the edge of the seed crystal, so that the small facet grows outward along the edge of the seed crystal, avoiding the accumulation of defects inside the crystal and preventing the emergence of highly doped regions. The small facet adjustment cost is low and has no impact on the original growth conditions inside the growth furnace.
[0019] 2. Based on the principle that the seed crystal placement angle affects the crystal growth orientation and quality, the present invention designs the angle of the graphite seed crystal holder so that the seed crystal edge position first crystallizes into a small facet. The small facet is removed through a subsequent cutting process. This solves the problem of resistance deviation between the small facet and other areas, improves the uniformity of resistance of the wafer in later processing, and can improve crystal utilization. During the wafer slicing process, the wafer needs to be cut into 4.5mm×4.5mm square chips, and the crystal of approximately 3mm at the edge of the wafer needs to be cut off. This method adjusts the small facet to grow to the edge of the crystal, which not only improves the uniformity of wafer resistance, but also avoids the problem of crystal waste in the slicing stage, saving chip production costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1This is a cross-sectional view of the device for improving SiC wafer resistance uniformity according to the present invention.
[0021] Figure 2 The present invention provides an operational process for improving SiC wafer resistance uniformity.
[0022] The accompanying drawings are marked as follows: 1. graphite crucible; 2. SiC raw material; 3. soft / hard insulation felt; 4. angled seed crystal holder; 5. seed crystal; 6. heating module; 7. observation window. DETAILED DESCRIPTION
[0023] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the present invention. In addition, the forms of the various structures described in the following embodiments are merely examples. The method for improving the resistance uniformity of SiC wafers involved in the present invention is not limited to the various structures described in the following embodiments. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0024] Reference Figure 1 and Figure 2 The present invention provides a method for improving the resistance uniformity of SiC wafers, which is achieved by a SiC wafer resistance uniformity device. The SiC wafer resistance uniformity device includes a graphite crucible 1, an outer side of the graphite crucible 1 is provided with a heat-insulating soft / hard felt 3, an inner bottom of the graphite crucible 1 is provided with a SiC raw material 2, an inner top of the graphite crucible 1 is provided with an angled seed crystal holder 4, a seed crystal 5 is connected to the bottom of the angled seed crystal holder 4, heating modules 6 are installed on both sides of the heat-insulating soft / hard felt 3, and an observation window 7 is provided on the top of the heat-insulating soft / hard felt 3; by precisely adjusting the angle of the seed crystal, the small facet of the crystal growth is adjusted to the edge position, and the small facet is removed in the subsequent cutting process, thereby ensuring the consistency of wafer quality and achieving the purpose of improving the resistance uniformity of the wafer. This method is used to solve the problem of seed crystal angle control during crystal growth. The seed crystal angle can be controlled more accurately, the crystal growth direction can be guided more accurately, and the stability and reliability of the crystal growth process can be improved. This method has good feasibility and operability and is low in cost. Graphite is used as the seed crystal holder material, and the inclination angle of the seed crystal holder is processed as needed. The position of the small face is directly adjusted to the edge of the seed crystal, so that the small face grows outward along the edge of the seed crystal, avoiding the accumulation of defects inside the crystal and preventing the emergence of high-doping areas. The cost of small face adjustment is low and has no effect on the original growth conditions inside the growth furnace.
[0025] In a preferred embodiment, the method comprises the following steps:
[0026] S1. Graphite is selected as the material for the seed crystal holder. According to the need to adjust the growth position of the small facet, a seed crystal holder with an angle of θ with the parallel direction is processed. The seed crystal is firmly bonded to the seed crystal holder using adhesive. The SiC raw material and the seed crystal holder are placed in a crucible.
[0027] S2. Close and seal the crystal growth furnace, extract the air inside the graphite crucible to a vacuum state, and after all conditions inside the crucible are stable, inject nitrogen into the crucible and start the heating module to gradually increase the crystal growth temperature;
[0028] S3, after 45 hours and high temperature heating at 2100 ° C, the SiC raw material is decomposed and sublimated. The gas phase material is first transferred to the position closest to the seed crystal and crystallized, forming a growth facet at the edge of the seed crystal. After the facet is formed, the heating temperature is gradually increased to 2600 ° C in the furnace to stabilize the temperature gradient in the furnace, improve the lateral growth ability of the facet, and then continue to grow horizontally;
[0029] S4. After the crystal growth is completed, it is annealed in situ and cooled. The crystal is removed for processing and cutting. The small facets at the edge of the crystal are removed to obtain a wafer with more uniform resistance. Based on the principle that the seed crystal placement angle affects the crystal growth orientation and quality, the angle of the graphite seed crystal holder is designed so that the edge of the seed crystal first crystallizes to form a small facet. The small facet is removed through the subsequent cutting process. This solves the problem of resistance deviation between the small facet and other areas, improves the uniformity of resistance of the wafer in the later processing, and can improve crystal utilization. During the wafer slicing process, the wafer needs to be cut into 4.5mm×4.5mm square chips, and the crystal of about 3mm at the edge of the wafer needs to be cut off. This method adjusts the growth of the small facet to the edge of the crystal, which not only improves the uniformity of wafer resistance, but also avoids the problem of crystal waste in the slicing stage, saving chip production costs.
[0030] In a preferred embodiment, the size of the outer side of the graphite crucible 1 is gap-matched with the size of the inner side of the insulating soft / hard felt 3 , and the size of the top of the angled seed crystal holder 4 is the same as the size of the top inside the graphite crucible 1 .
[0031] In a preferred embodiment, the tilt angle of the bottom of the angled seed crystal holder 4 can be adjusted according to actual production requirements.
[0032] The working principle of the present invention is as follows: Step 1, graphite is selected as the material for making the seed crystal holder, and according to the need to adjust the growth position of the small facet, the seed crystal holder is processed with an angle of θ with the parallel direction, the seed crystal is firmly bonded to the seed crystal holder using adhesive, and the SiC raw material and the seed crystal holder are placed in the crucible;
[0033] Step 2: Close and seal the crystal growth furnace, extract the air inside the graphite crucible to a vacuum state, and after all conditions inside the crucible are stable, inject nitrogen into the crucible and start the heating module to gradually increase the crystal growth temperature;
[0034] Step 3: After 45 hours of high-temperature heating at 2100°C, the SiC raw material is decomposed and sublimated. The gas phase material is first transferred to the position closest to the seed crystal and crystallized, forming a growth facet at the edge of the seed crystal. After the facet is formed, the heating temperature is gradually increased to 2600°C in the furnace to stabilize the temperature gradient in the furnace, improve the lateral growth ability of the facet, and then continue to grow horizontally;
[0035] Step 4: After the crystal growth is completed, it is annealed in situ and cooled. The crystal is removed for processing and cutting, and the small facets at the edge of the crystal are removed to obtain a wafer with more uniform resistance. Based on the principle that the seed crystal placement angle affects the crystal growth orientation and quality, the angle of the graphite seed crystal holder is designed so that the edge of the seed crystal first crystallizes to form a small facet. The small facet is removed through the subsequent cutting process. This solves the problem of resistance deviation between the small facet and other areas, improves the uniformity of resistance of the wafer in later processing, and can improve crystal utilization. During the wafer slicing process, the wafer needs to be cut into 4.5mm×4.5mm square chips, and the crystal of approximately 3mm at the edge of the wafer needs to be cut off. This method adjusts the growth of the small facet to the edge of the crystal, which not only improves the uniformity of wafer resistance, but also avoids the problem of crystal waste in the slicing stage, saving chip production costs.
[0036] Finally, a few points should be explained: First, in the description of this application, it should be noted that, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense, and may refer to mechanical or electrical connections, internal communication between two components, or direct connection. "Up," "down," "left," and "right" are only used to indicate relative positional relationships. When the absolute positions of the objects being described change, the relative positional relationships may also change.
[0037] Secondly: The drawings of the embodiments disclosed in the present invention only involve structures related to the embodiments disclosed in the present invention. Other structures may refer to conventional designs. The same embodiment and different embodiments of the present invention may be combined with each other without conflict.
[0038] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for improving the resistance uniformity of a SiC wafer, characterized by: The method is realized by a SiC wafer resistance uniformity device, which comprises a graphite crucible (1), an outer side of the graphite crucible (1) is provided with a heat-insulating soft / hard felt (3), an inner bottom of the graphite crucible (1) is provided with a SiC raw material (2), an angled seed crystal holder (4) is installed on the top of the inner side of the graphite crucible (1), a seed crystal (5) is connected to the bottom of the angled seed crystal holder (4), heating modules (6) are installed on both sides of the heat-insulating soft / hard felt (3), and an observation window (7) is opened on the top of the heat-insulating soft / hard felt (3).
2. The method for improving SiC wafer resistance uniformity according to claim 1, wherein: The following steps are involved: S1. Graphite is selected as the material for the seed crystal holder. According to the need to adjust the growth position of the small facet, a seed crystal holder with an angle of θ with the parallel direction is processed. The seed crystal is firmly bonded to the seed crystal holder using adhesive. The SiC raw material and the seed crystal holder are placed in a crucible. S2. Close and seal the crystal growth furnace, extract the air inside the graphite crucible to a vacuum state, and after all conditions inside the crucible are stable, inject nitrogen into the crucible and start the heating module to gradually increase the crystal growth temperature; S3, after 45 hours and high temperature heating at 2100 ° C, the SiC raw material is decomposed and sublimated. The gas phase material is first transferred to the position closest to the seed crystal and crystallized, forming a growth facet at the edge of the seed crystal. After the facet is formed, the heating temperature is gradually increased to 2600 ° C in the furnace to stabilize the temperature gradient in the furnace, improve the lateral growth ability of the facet, and then continue to grow horizontally; S4. After the crystal growth is completed, annealing and cooling are carried out in situ, and the crystal is taken out for processing and cutting to remove the small faces at the edge of the crystal to obtain a wafer with more uniform resistance.
3. The method for improving SiC wafer resistance uniformity according to claim 1, wherein: The size of the outer side of the graphite crucible (1) is clearance-matched with the size of the inner side of the heat-insulating soft / hard felt (3), and the size of the top of the angled seed crystal holder (4) is the same as the size of the top of the inner side of the graphite crucible (1).
4. The method for improving SiC wafer resistance uniformity according to claim 1, wherein: The inclination angle of the bottom of the angled seed crystal holder (4) can be adjusted according to actual production requirements.