Substrate for calibrating lithographic apparatus

Abstract

A method of calibrating a lithographic apparatus, the method comprising the steps of: obtaining a substrate having a Young's modulus that does not vary substantially with an orientation of an axis defining the Young's modulus in a plane of the substrate and provided with a reference feature; clamping the substrate to a substrate table of a lithographic apparatus; disposing patterned features to the clamped substrate using the lithographic apparatus, each patterned feature disposed adjacent to a corresponding reference feature; measuring the position of each patterned feature relative to its corresponding reference feature; and calibrating a grid associated with positioning of the substrate by the lithographic apparatus based on the measured position of the patterned feature.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to EP application 23150716.1, filed on January 9, 2023, which is incorporated herein by reference in its entirety. Technical Field

[0003] The present invention relates to a substrate and a method for manufacturing a substrate configured for calibrating a lithographic apparatus. Furthermore, the present invention relates to calibration of a lithographic apparatus to reduce positional errors generated during a patterning operation of the lithographic apparatus. Background Art

[0004] A lithographic apparatus is a machine configured to apply a desired pattern to a substrate. Lithographic apparatuses are used, for example, in the manufacture of integrated circuits (ICs). A lithographic apparatus can project a pattern (often also referred to as a "design layout" or "design"), for example, at a patterning device (e.g., a mask) onto a layer of radiation-sensitive material (resist) disposed on a substrate (e.g., a wafer).

[0005] To project patterns onto substrates, lithography equipment uses electromagnetic radiation. The wavelength of this radiation determines the minimum size of features that can be formed on the substrate. Typical wavelengths currently in use are 365 nm (i-line), 248 nm deep ultraviolet (DUV), 193 nm deep ultraviolet (DUV), and 13.5 nm. Compared to DUV lithography equipment using radiation with a wavelength of, for example, 193 nm, lithography equipment using extreme ultraviolet (EUV) radiation with a wavelength in the range of 4 nm to 20 nm (e.g., 6.7 nm or 13.5 nm) can be used to form smaller features on substrates.

[0006] Low-k1 lithography can be used to process features smaller than the classical resolution limit of the lithographic apparatus. In this context, the resolution equation can be expressed as CD = k1 × λ / NA, where λ is the wavelength of the radiation employed, NA is the numerical aperture of the projection optics in the lithographic apparatus, CD is the "critical dimension" (typically the smallest feature size printed, but in this case, the half-pitch), and k1 is the empirical resolution factor. Generally, the smaller k1, the more difficult it is to replicate a pattern on a substrate that resembles the shape and size planned by the circuit designer to achieve specific electrical functionality and performance. To overcome these difficulties, complex fine-tuning steps can be applied to the lithographic apparatus and / or design layout. These fine-tuning steps include, for example, but are not limited to, optimization of the NA, customized illumination schemes, the use of phase-shifting patterning devices, various optimizations of the design layout (such as optical proximity correction (OPC, sometimes also referred to as "optical process correction") in the design layout), or other methods generally referred to as "resolution enhancement techniques" (RET). Alternatively, rigorous control loops for controlling the stability of the lithographic apparatus can be used to improve pattern reproduction at low k1.

[0007] An example of such a control loop is the so-called baseline control of a lithographic apparatus. Baseline control is implemented to correct for drifts of measurement and actuation components within the lithographic apparatus, thereby keeping the operation of the lithographic apparatus stable over time. In order to implement baseline control, it is often necessary to periodically perform reference exposures on a so-called reference substrate. The reference substrate is typically made of the same material as a conventional product wafer, typically (110) or (100) crystalline silicon. The reference wafer is provided with reference features, which are typically etched into the reference substrate during a dedicated reference substrate manufacturing step. During the reference exposure, the lithographic apparatus patterns a photoresist layer applied to the reference substrate to form patterned features. Subsequently, the positional deviations between the patterned features and the reference features are measured, for example using an overlay measurement metrology tool. Based on these measured deviations, the lithographic apparatus is calibrated.

[0008] However, during the clamping of a conventional reference substrate to a substrate stage of a lithographic apparatus, undesirable non-uniform and asymmetric in-plane deformations (IPD) of the reference substrate may be induced. These non-uniform and often asymmetric deformations may reduce the accuracy of the calibration procedure, as portions of the IPD may be falsely attributed to drift of the lithographic apparatus. Summary of the Invention

[0009] It is desirable to provide a substrate for calibrating a lithographic apparatus and a method of manufacturing a substrate which reduces the problem of uneven and / or asymmetric IPD of a substrate when the substrate is clamped to a substrate table.

[0010] It would also be desirable to provide a method of calibrating a lithographic apparatus that reduces the problem of non-uniform IPD of a substrate when the substrate is clamped to a substrate table.

[0011] In a first aspect, there is provided a substrate for calibrating a lithographic apparatus, wherein a Young's modulus of the substrate is substantially invariant with the orientation of an axis defining the Young's modulus within the plane of the substrate.

[0012] In a second aspect, a method for manufacturing a substrate for calibrating a lithographic apparatus is provided, the method comprising: obtaining a substrate made of (111)-oriented silicon; and providing reference features on the substrate using a reactive ion etching (RIE) process.

[0013] In a third aspect, a method for calibrating a lithographic apparatus is provided, the method comprising the following steps: obtaining a substrate, the substrate being provided with reference features and having a Young's modulus that does not substantially vary with the orientation of an axis defining the Young's modulus within the plane of the substrate; clamping the substrate onto a substrate stage of the lithographic apparatus; setting patterned features on the clamped substrate using the lithographic apparatus, each patterned feature being set adjacent to a corresponding reference feature; measuring the position of each patterned feature relative to its corresponding reference feature; and calibrating a grid associated with the positioning of the lithographic apparatus with respect to the substrate based on the measured positions of the patterned features.

[0014] By using a substrate made of a material whose Young's modulus has no dependence on the orientation of the substrate relative to the substrate table, such as (111) oriented crystalline silicon, the clamping force applied to the substrate will produce a more uniform and largely radially symmetric IPD.

[0015] A more uniform and symmetric IPD will be seen in overlay measurements used to calibrate lithographic equipment, which can be better corrected and more easily modeled than the less uniform and less symmetric IPD contribution to overlay associated with prior art reference substrates made of (110) or (001) silicon. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings, in which:

[0017] Figure 1 depicts a schematic overview of a lithographic apparatus;

[0018] Figure 2 depicts a schematic overview of a lithography unit;

[0019] Figure 3depicts a schematic representation of overall lithography showing the collaboration between three key technologies for optimizing semiconductor manufacturing;

[0020] Figure 4 is a schematic diagram of the control mechanism in the photolithography process using the stability module;

[0021] Figure 5 is a graph showing the angular dependence of Young's modulus for three crystal orientations of silicon.

[0022] Figure 6a and Figure 6b A first and a second substrate loading sequence are depicted.

[0023] Figure 7a and Figure 7b The geometric integrity of reference features applied to a reference substrate according to an embodiment of the present invention is illustrated.

[0024] Figure 8a and Figure 8b The improvement observed in the measured overlay fingerprint by using a reference substrate according to an embodiment of the present invention is illustrated. DETAILED DESCRIPTION

[0025] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including ultraviolet radiation (e.g., having a wavelength of 365 nm, 248 nm, 193 nm, 157 nm, or 126 nm) and EUV (extreme ultraviolet radiation, e.g., having a wavelength in the range of about 5 nm to 100 nm).

[0026] As used herein, the terms "reticle," "mask," or "patterning device" should be broadly interpreted to refer to a general patterning device that can be used to impart an incident radiation beam with a patterned cross-section corresponding to the pattern to be produced in a target portion of the substrate. The term "light valve" may also be used in this context. In addition to classical masks (transmissive or reflective, binary, phase-shift, hybrid, etc.), examples of other such patterning devices include programmable mirror arrays and programmable LCD arrays.

[0027] Figure 1A lithographic apparatus LA is schematically depicted. The lithographic apparatus LA comprises an illumination system (also referred to as an illuminator) IL configured to condition a radiation beam B (e.g., UV radiation, DUV radiation, or EUV radiation), a mask support (e.g., a mask table) MT configured to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device MA according to specific parameters, a substrate support (e.g., a wafer stage) WT configured to hold a substrate (e.g., a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate support according to specific parameters, and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

[0028] In operation, the illumination system IL receives a radiation beam from a radiation source SO, for example, via a beam delivery system BD. The illumination system IL may include various types of optical components for directing, shaping, and / or controlling the radiation, such as refractive, reflective, magnetic, electromagnetic, electrostatic, and / or other types of optical components, or any combination thereof. The illuminator IL may be used to condition the radiation beam B so that it has a desired spatial and angular intensity distribution in its cross-section at the plane of the patterning device MA.

[0029] The term "projection system" PS as used herein should be broadly interpreted as covering various types of projection systems including refractive, reflective, catadioptric, anamorphic, magnetic, electromagnetic and / or electrostatic, or any combination thereof, appropriate to the exposure radiation used and / or other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term "projection lens" herein may be considered synonymous with the more general term "projection system" PS.

[0030] The lithographic apparatus LA may be of a type in which at least a portion of the substrate may be overlapped by a liquid having a relatively high refractive index (e.g., water) to fill the space between the projection system PS and the substrate W - this is also known as immersion lithography. More information on immersion technology is given in US6952253, which is incorporated herein by reference.

[0031] The lithographic apparatus LA may also be of a type having two (also referred to as "dual stage") or more substrate supports WT. In such a "multi-stage" machine, the substrate supports WT may be used in parallel, and / or steps preparing for subsequent exposure of the substrate W may be performed on a substrate W on one of the substrate supports WT while another substrate W on another substrate support WT is being used to expose a pattern on another substrate W.

[0032] In addition to the substrate support WT, the lithographic apparatus LA can include a measurement stage. The measurement stage is arranged to hold sensors and / or cleaning equipment. The sensors can be arranged to measure properties of the projection system PS or properties of the radiation beam B. The measurement stage can hold multiple sensors. The cleaning equipment can be arranged to clean part of the lithographic apparatus, such as part of the projection system PS or part of the system for providing immersion liquid. The measurement stage can be moved beneath the projection system PS when the substrate support WT is away from the projection system PS.

[0033] In operation, a radiation beam B is incident on a patterning device MA (e.g. a mask) which is held on a mask support MT and is patterned by a pattern (design layout) present on the patterning device MA. After having passed the mask MA, the radiation beam B passes through a projection system PS which focuses the beam onto a target portion C of a substrate W. With the aid of a second positioner PW and a position measurement system IF, the substrate support WT can be accurately moved, for example, in order to position different target portions C in the path of the radiation beam B at focused and aligned positions. Similarly, a first positioner PM and possibly a further position sensor (the further position sensor not being in position) are provided. Figure 1 The patterning device MA (shown explicitly in FIG) can be used to accurately position the patterning device MA relative to the path of the radiation beam B. The mask alignment marks M1, M2 and the substrate alignment marks P1, P2 can be used to align the patterning device MA and the substrate W. Although the substrate alignment marks P1, P2 are shown occupying dedicated target portions, the substrate alignment marks P1, P2 shown can be located in spaces between target portions. When the substrate alignment marks P1, P2 are located between target portions C, they are referred to as scribe lane alignment marks.

[0034] like Figure 2As shown, the lithography apparatus LA may form part of a lithocell LC, sometimes also referred to as a litho cell or (lithography) cluster. The lithocell LC typically also includes equipment for performing pre-exposure and post-exposure processes on a substrate W. Typically, this equipment includes a spin coater SC for depositing a resist layer, a developer DE for developing the exposed resist, a chill plate CH for adjusting the temperature of the substrate W, for example, for adjusting the solvent in the resist layer, and a bake plate BK. A substrate handling device (or robot) RO picks up substrates W from input / output ports I / O1 and I / O2, moves the substrates W between various processing equipment, and delivers them to a loading station LB of the lithography apparatus LA. The equipment in the lithocell, often collectively referred to as a track or coating and developing system, is typically controlled by a track or coating and developing system control unit TCU, which itself may be controlled by a supervisory control system SCS, which in turn controls the lithography apparatus LA, for example, via a litho control unit LACU.

[0035] In order to correctly and consistently expose substrates W exposed by lithographic apparatus LA, it is desirable to inspect the substrates to measure properties of the patterned structures, such as overlay errors between subsequent layers, line thickness, critical dimensions (CDs), etc. To this end, an inspection tool (not shown) may be included in lithography cell LC. If an error is detected, particularly if the inspection is performed before exposing or processing other substrates W from the same batch or lot, adjustments may be made to the exposure of subsequent substrates and / or other processing steps to be performed on substrates W, for example.

[0036] Inspection equipment, which may also be referred to as metrology equipment, is used to determine properties of a substrate W, and in particular, to determine how properties vary between different substrates W, or how properties associated with different layers of the same substrate W vary from layer to layer. Alternatively, the inspection equipment may be configured to identify defects on the substrate W and may, for example, be part of a lithography cell LC, or may be integrated into a lithography apparatus LA, or may even be a standalone device. The inspection equipment may measure properties on a latent image (the image in the resist layer after exposure), a semi-latent image (the image in the resist layer after a post-exposure bake step (PEB), a developed resist image (in which exposed or unexposed portions of the resist have been removed), or even an etched image (after a pattern transfer step such as etching).

[0037] Typically, the patterning process in the lithographic apparatus LA is one of the most critical steps in the process requiring high-precision sizing and placement of structures on the substrate W. To ensure this high precision, the three systems can be combined into a so-called "holistic" control environment, such as Figure 3One of these systems is a lithography apparatus LA connected to a metrology tool MT (second system) and a computer system CL (third system). Key to this "holistic" environment is optimizing the collaboration between these three systems to enhance the overall process window and providing a tight control loop to ensure that the patterning performed by the lithography apparatus LA remains within the process window. The process window defines the range of process parameters (e.g., dose, focus, overlay) within which a particular manufacturing process produces a defined outcome (e.g., a functional semiconductor device). Process parameters in the lithography or patterning process are typically allowed to vary within this range.

[0038] The computer system CL can use (a portion of) the design layout to be patterned to predict which resolution enhancement technology to use and perform computational lithography simulations and calculations to determine which mask layouts and lithographic equipment settings achieve the largest overall process window for the patterning process (in Figure 3 Typically, the resolution enhancement technique is arranged to match the patterning possibilities of the lithographic apparatus LA. The computer system CL may also be used to detect where within the process window the lithographic apparatus LA is currently operating (e.g. by using input from a metrology tool MT) to predict whether defects may be present due to, for example, suboptimal processing (e.g., in the example of FIG. 1 ). Figure 3 , which is represented by an arrow pointing to “0” in the second scale SC2).

[0039] The metrology tool MT may provide input to the computer system CL to enable accurate simulations and predictions, and may provide feedback to the lithographic apparatus LA to identify, for example, possible drift in the calibration state of the lithographic apparatus LA (e.g., Figure 3 represented by multiple arrows in the third scale SC3).

[0040] Figure 4 The overall lithography and metrology methodology including the stability module 500 (essentially an application running on a server in this example) is depicted. Three main process control loops are shown, labeled 1, 2, and 3.

[0041] The first loop calibrates the lithographic apparatus using a stability module 500 and a reference substrate (reference wafer) with reference features to control the apparatus's stability. The figure shows a reference wafer (MW) 505 being transferred from a lithocell 510, where it has been exposed by the lithographic apparatus to form patterned features near the reference features. By measuring the overlay error between the patterned features and the reference features using a metrology tool (MT) 515, the performance deviation of the lithographic apparatus can be measured. The determined overlay error enables the determination of calibration parameters for accurate positioning of subsequent substrates or patterns provided by the lithographic apparatus.

[0042] Typically, these calibration parameters are based on applying a model (e.g., including polynomial basis functions defined across the entire substrate) to the measurement data to obtain model parameters describing the grid of the lithography tool. This grid definition is used to position the substrate so that the pattern is provided at the correct location on the wafer. The calibration parameters can be calculated by the stability module (SM) 500 to provide feedback 550 that is passed to the lithography equipment within the lithocell 510 and used when performing further exposures on the patterned product wafer.

[0043] The second (APC) loop is used for local scan control on the product (determining focus, dose, and overlay on the product wafer). The exposed product wafer 520 is transferred to the metrology unit 515, where information related to parameters such as critical dimension, sidewall angle, and overlay is determined and transferred to the advanced process control (APC) module 525. This data is also transferred to the stability module 500. Process corrections 540 are made before the manufacturing execution system (MES) 535 takes over, communicating with the stability module 500 to control the lithographic equipment.

[0044] The third control loop allows for integration of metrology into the second (APC) loop (e.g., for double patterning). Etched wafer 530 is passed to metrology unit 515, which again measures parameters read from the wafer, such as critical dimension, sidewall angle, and overlay. These parameters are passed to advanced process control (APC) module 525. This loop continues in the same manner as the second loop.

[0045] The subject matter of the invention described in this document relates to a first loop: calibrating a lithographic apparatus based on periodic measurements of a reference substrate provided with reference features. As previously described, the periodic measurements are typically overlay measurements recorded as a wafer map including an overlay measurement grid (which can be represented as overlay residuals). The reference features are etched into the reference substrate, and the patterned features are positioned adjacent to the reference features, for example, in a photoresist layer on top of the reference features. Typically, the reference features are configured as the bottom grating of an overlay mark, and the patterned features are configured as the top grating of the overlay mark. The overlay mark then consists of two gratings stacked on top of each other. Overlay measurements are performed by a metrology tool 515 and are related to the relative position of the patterned features with respect to the reference features. A properly calibrated lithographic apparatus is capable of correctly positioning the patterned features relative to their corresponding reference features. In the event of drift in the positioning (sub)system of the lithographic apparatus, the overlay measurement detects changes in the overlay between the patterned features and the reference features. The measured overlay error is then used to (re)calibrate the positioning system of the lithographic apparatus by correcting an internal grid of the positioning system of the lithographic apparatus used to control the substrate position and / or an image positioning system such as a controller of a projection lens.

[0046] During alignment (measurement) and patterning steps in a lithographic apparatus, a reference substrate is clamped to the apparatus's substrate table (often also referred to as a substrate holder). Traditionally, the substrate table has multiple burls to support the substrate. The total area of the burls in contact with the substrate is typically smaller than the total area of the substrate.

[0047] It is important that such clamping does not significantly deform the reference substrate, as this could lead to induced overlay errors that are not caused by any systematic drift within the lithographic apparatus. In particular, inhomogeneous or non-radially symmetric deformations of the substrate in the plane can lead to relatively large calibration errors because: i) the alignment system is typically unable to easily correct for these deformations because there are typically too few alignment marks to accurately capture the inhomogeneous or asymmetric deformations; and ii) these deformations cannot be modeled by low-order polynomials. The measured overlay data needs to be modeled to derive the parameters for calibrating the lithographic apparatus. Using high-order polynomials will almost certainly reduce the noise suppression efficiency and increase the risk of introducing high-frequency components in the modeled data that are not actually related to any drift mechanism within the lithographic apparatus. Therefore, asymmetric and / or inhomogeneous in-plane deformations of the reference substrate should be avoided.

[0048] The mechanism behind clamping-induced in-plane deformation (IPD) of the substrate is related to the loading process. First, the substrate is supported by so-called electronic pins (e-pins), which hold the substrate in place at three locations. Therefore, the weight of the substrate causes deformation, and it is desirable to relieve this deformation before exposure. On the other hand, it is desirable to hold the substrate very securely during exposure. This is for two reasons. First, to achieve high throughput, the substrate is subjected to very large accelerations during the exposure sequence and must remain stationary on the substrate holder. Second, the substrate absorbs energy from the projection beam during exposure, causing localized heating. This localized heating can lead to thermal expansion, which can cause slippage between the substrate and the burl, resulting in overlay errors. Securely holding the substrate in the substrate holder can counteract this deformation.

[0049] Two clamping techniques are commonly used. In vacuum clamping, for example, a pressure differential is established across the substrate by connecting the space between the substrate holder and the substrate to a negative pressure lower than the high pressure above the substrate. This pressure differential generates a force that holds the substrate to the substrate holder. In electrostatic clamping, electrostatic forces are used to exert a force between the substrate and the substrate holder. Several different arrangements are known to achieve this. In one arrangement, a first electrode is provided on the lower surface of the substrate, and a second electrode is provided on the upper surface of the substrate holder (also referred to as the clamping surface). A potential difference is established between the first and second electrodes. In another arrangement, two semicircular electrodes are provided on the substrate holder, and a conductive layer is provided on the substrate. A potential difference is applied between the two semicircular electrodes, so that the two semicircular electrodes and the conductive layer on the substrate act as two capacitors in series.

[0050] It is commonly observed that clamping flat or non-flat (curved) substrates causes deformation of the substrate. This is due to frictional forces that arise between the substrate and the substrate holder, hindering stress-free flattening of the substrate when placed on the clamping surface of the substrate holder. These forces are directed into the plane of the substrate and generate significant compressive and / or tensile stress components. Through elastic deformation, these stress components can cause translation of features on the substrate, which can significantly reduce the overlay performance of the lithographic apparatus. However, the frictional forces must be sufficiently high to keep the substrate securely attached to the substrate holder during the lithographic process.

[0051] Therefore, in general, any measured overlay error is inevitably caused by the above-mentioned clamping-induced IPD. It is proposed to reduce the effect of the above-mentioned clamping-induced IPD on substrates used for calibrating lithographic equipment by selecting a substrate material with a stiffness (represented by the Young's modulus of the substrate material) that is substantially independent of the orientation of the axis defining the Young's modulus. For production substrates, the choice of material usually depends on the requirements related to the semiconductor material required for the proper operation of the devices built on the substrate (using various processes such as lithography, deposition and etching). However, for (reference) substrates used only for calibration purposes, the constraints on the material selection are less stringent. A good example of a suitable material for such a reference substrate would be crystalline silicon with the crystal axis oriented in (111).

[0052] Figure 5 The values of the Young's modulus along axes in the plane of the substrate with angles between 0 and 90 degrees are shown. It is clear that the Young's modulus of (111) silicon is independent of the orientation of the axis defining the Young's modulus. This is in contrast to typical materials used for reference substrates in the prior art and for most product substrates, such as silicon (110) and silicon (001), which show a strong dependence of the Young's modulus on the orientation (angle) of the axis, and therefore also on the orientation of the substrate relative to the substrate holder (e.g., its angular orientation as indicated by the position of the notch in the substrate). Apart from the above-mentioned invariant properties, (111) silicon is otherwise comparable to other crystalline silicon species used for reference substrates and product substrates in the prior art. The latter means that the use of a (111) silicon reference substrate does not lead to unforeseen problems, such as those related to differences in mechanical and surface properties (e.g., thermal behavior, back surface roughness, friction, etc.).

[0053] The effect of choosing (111) silicon, or any other suitable material with an angularly invariant Young's modulus, is that the clamping force will produce a more symmetrical, uniform deformation profile across the entire substrate. As mentioned above, asymmetric and non-uniform IPD profiles are problematic because they are more difficult to correct and require higher-order models to characterize.

[0054] To verify whether the (111) silicon substrate can indeed provide a more favorable clamping induced overlap effect (due to IPD), the following Figure 6a and Figure 6b The experiment shown. Figure 6aA conventional clamping sequence (A) is depicted. A (curved) substrate 600 is initially held by electrical pins 602 (two black lines supporting the substrate) of a substrate holder 604, and a strong clamping force (indicated by multiple arrows 603 within the substrate stage) is applied to quickly and securely clamp the substrate, as shown on the right side of the figure; the substrate does not have time to stabilize, and friction between the burls and the backside of the substrate is expected to introduce a large amount of IPD, as indicated by the wrinkled surface 600' of the substrate after clamping. Figure 6b An alternative clamping sequence (E) is depicted, which is not preferred during normal production and calibration exposures because it takes a considerable amount of time to execute. The substrate is again held by the electrical pins 602, but now the pins are slowly lowered 613 (without clamping force present) to allow the curved substrate to stabilize. An air cushion is formed during the substrate's descent 613. Once the reference substrate is in full contact with the burl and stabilized, a clamping force 610 is introduced to prepare the reference substrate for patterning. Since no clamping force is acting on the reference substrate during its descent, there is no significant friction that could cause a clamping-related IPD contribution. Consequently, the surface of substrate 600" is relatively undeformed and flat.

[0055] To determine the contribution of clamping-induced IPD to overlay error when following a conventional clamping sequence, a reference substrate was patterned twice by a lithographic apparatus, once with the conventional clamping sequence and once with the clamping sequence (E). After each individual patterning step, the overlay error between the patterned features and the reference features was measured. The difference in the measured overlay between the first patterning step associated with the conventional clamping sequence and the second patterning step associated with the alternative clamping sequence was attributed to the clamping-induced overlay error. By performing this procedure on a conventional silicon (110) reference substrate and the proposed improved (111) silicon reference substrate, it was determined whether the (111) silicon reference substrate indeed produces a less pronounced asymmetric and / or non-uniform clamping-induced overlay error contribution.

[0056] To prepare for the above procedure, the newly proposed (111) reference substrate needs to be fabricated. Given that the orientation of the crystal axis of (111) silicon is biased (the crystal axis is not perpendicular to the normal of its surface), a reactive ion etching (RIE) process was chosen to provide etched reference features for the (111) silicon reference substrate. RIE-based etching was chosen because it is expected to work well for materials such as those where chemical-based etching methods would produce non-perpendicular etched features (because the chemical etchant generally travels along the crystal axis of the material being etched).

[0057] To verify the geometric integrity of the RIE-based reference features, reference features were placed on both (110) and (111) silicon substrates. The positional error of the reference features was determined for eight different wavelengths using the alignment system of the lithography equipment. The variation in the positional error determined across the eight wavelengths indicates the amount of geometric deformation (relative to the nominal rectangular shape of the feature).

[0058] Figure 7a The observed position variation across wavelength is shown. It has been found that the inner region of the prior art (110 silicon) reference substrate does not exhibit significant feature deformation, while the outer region near the edge of the substrate shows that the features may have significant tilt (skew).

[0059] Figure 7b It is shown that the new (111 Si) reference substrate also has a fingerprint of nearly identical feature position variation across wavelength as the prior art reference substrate. Therefore, it can be concluded that the geometric quality of the RIE-based reference features on the (111) Si reference substrate is not significantly degraded when compared to the reference features on the prior art reference substrate, giving confidence that overlay measurements can be directly compared between the prior art and the new (111) Si reference substrates.

[0060] For both (110) and (111) silicon substrates, use Figure 6a and Figure 6b The contribution of the clamping-induced IPD to the overlapping fingerprints was derived using the procedure explained in the accompanying text.

[0061] Figure 8a It shows that for the prior art (110) reference substrate, the overlay error caused by clamping (depicted by the black arrow) is very small in some areas A1 and A2, while in some areas the overlay error is significantly larger. Figure 8a It can be concluded that for the prior art reference substrate, the overlay error caused by clamping is highly asymmetric and not very uniform.

[0062] Figure 8b It is shown that for the new (111) reference substrate, the clamping-induced overlay error is distributed in a more radially symmetric pattern, since the regions B1 and B2 with the observed lower clamping-induced overlay error are oriented almost concentrically. Therefore, it can be concluded that the use of a (111) silicon reference substrate will reduce the impact of the clamping-induced contribution to the overlay error, because Figure 8b The patterns are easier to model with low-order models (fewer high-frequency components) and are easier to correct because fingerprints are more similar to simple scaling deformations.

[0063] As an alternative to using a (111) silicon reference substrate, other materials such as amorphous silicon, glass-like materials, metals, or ceramic materials can also be considered. Generally, these materials also have a Young's modulus that is invariant with angle and are therefore expected to be equally suitable for manufacturing a reference substrate that can reduce the effects of clamping-induced IPD. However, (111) silicon may be preferred because it shares many properties with prior art reference substrates and the most widely used product wafers.

[0064] According to an embodiment of the present invention, an existing method for calibrating a lithographic apparatus is improved by using a reference substrate. In an embodiment, the method comprises at least the following steps:

[0065] a) obtaining a substrate provided with a reference feature and having a Young's modulus that does not substantially vary with the orientation of an axis defining the Young's modulus within the plane of the substrate;

[0066] b) clamping the substrate onto a substrate table of the lithographic apparatus;

[0067] c) providing patterned features on the clamped substrate using the lithographic apparatus, each patterned feature being provided adjacent to a corresponding reference feature;

[0068] d) measuring the position of each patterned feature relative to its corresponding reference feature; and

[0069] e) calibrating a grid associated with positioning of the lithographic apparatus with respect to the substrate based on the measured positions of the patterned features.

[0070] In an embodiment, the substrate is a wafer made of silicon having a (111) crystal direction.

[0071] In an embodiment, the substrate is a wafer made of an amorphous material, such as amorphous silicon, glass, metal, or ceramic material.

[0072] In an embodiment, the reference features are provided to the substrate by a reactive ion etching (RIE) process.

[0073] In one embodiment, the patterned features are formed in a photoresist layer disposed on the substrate.

[0074] In an embodiment, the position of the patterned features relative to the reference features is measured by an overlay measurement device.

[0075] In an embodiment, the method further comprises modeling the measured locations to obtain a fingerprint of the measured locations across the entire substrate.

[0076] The model used can be chosen to include only low-order polynomial basis functions, for example restricted to third order across the entire surface of the (reference) substrate. This significantly suppresses measurement noise, and the IPD induced by the improved clamping of the reference substrate does not cause large inhomogeneous and asymmetric components, thus not affecting the accuracy of the calibration parameters derived from the model.

[0077] In an embodiment, the model consists of polynomial basis functions describing up to third order behavior across the entire substrate.

[0078] In an embodiment, a method of providing a reference feature on a substrate for calibrating a lithographic apparatus is provided, the method comprising: obtaining a substrate made of (111) oriented silicon; and providing the reference feature to the substrate using a reactive ion etching (RIE) process.

[0079] In an embodiment, a substrate for calibrating a lithographic apparatus is provided, characterized in that the Young's modulus of the substrate does not substantially vary with the orientation of an axis defining the Young's modulus within the plane of the substrate.

[0080] In an embodiment, the substrate is a wafer made of crystalline silicon having a (111) orientation.

[0081] In an embodiment, the substrate is made of an amorphous material, such as amorphous silicon, glass, metal, or ceramic material.

[0082] In an embodiment, the substrate further comprises reference features provided to the substrate by a reactive ion etching (RIE) process.

[0083] In an embodiment, the reference feature is configured as a bottom grating of combined overlapping marks.

[0084] In an embodiment, the patterned features are configured as a top grating of combined overlapping marks.

[0085] Although specific reference may be made herein to the use of lithographic apparatus in IC manufacturing, it should be understood that the lithographic apparatus described herein may have other applications. Possible other applications include the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat panel displays, liquid crystal displays (LCDs), thin film magnetic heads, and the like.

[0086] Although specific reference may be made herein to embodiments of the present invention in the context of inspection or metrology equipment, embodiments of the present invention may be used in other equipment. Embodiments of the present invention may form part of a mask inspection equipment, a lithography equipment, or any equipment that measures or processes an object such as a wafer (or other substrate) or a mask (or other pattern forming device). It should also be noted that the terms "metrology equipment" or "metrology system" encompass or may be replaced by the terms "inspection equipment" or "inspection system". The metrology or inspection equipment disclosed herein may be used to detect defects on or within a substrate and / or defects in structures on the substrate. In such embodiments, the characteristics of the structure on the substrate may be related to defects in the structure, the absence of a particular portion of the structure, or the presence of unwanted structures on the substrate.

[0087] Although specific reference is made to a "metrology device / tool / system" or an "inspection device / tool / system," these terms may also refer to the same or similar types of tools, devices, or systems. For example, an inspection device or metrology device including embodiments of the present invention may be used to determine a characteristic of a physical system, such as a structure on a substrate or wafer. For example, an inspection device or metrology device including embodiments of the present invention may be used to detect defects in a substrate, or defects in a structure on a substrate or wafer. In such embodiments, the characteristic of the physical structure may be related to a defect in the structure, the absence of a particular portion of the structure, or the presence of an unwanted structure on the substrate or wafer.

[0088] Although specific reference may have been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention is not limited to optical lithography and may be used in other applications such as imprint lithography where the context permits.

[0089] Although specific embodiments of the present invention have been described above, it should be understood that the present invention may be practiced in other ways than those described. The above description is intended to be illustrative rather than restrictive. Therefore, it will be clear to those skilled in the art that modifications may be made to the described invention without departing from the scope of the claims set forth below.

Claims

1. A method for calibrating a lithographic apparatus, the method comprising the following steps: a) obtaining a substrate provided with reference features; b) clamping the substrate onto a substrate table of the lithographic apparatus; c) providing patterned features on the clamped substrate using the lithographic apparatus, each patterned feature being provided adjacent to a corresponding reference feature; d) measuring the position of each patterned feature relative to its corresponding reference feature; and e) calibrating a grid associated with positioning of the lithographic apparatus with respect to the substrate based on the measured positions of patterned features, It is characterized by: The Young's modulus of the substrate is substantially invariant with the orientation of an axis defining the Young's modulus within the plane of the substrate.

2. The method according to claim 1, wherein the substrate is a wafer made of silicon having a (111) crystal orientation.

3. The method according to claim 1, wherein the substrate is a wafer made of an amorphous material, such as amorphous silicon, glass, metal or ceramic material. The method of claim 2 , wherein the reference features are provided to the substrate by a reactive ion etching (RIE) process.

5. The method of any preceding claim, wherein the patterned features are formed in a photoresist layer disposed on the substrate.

6. A method according to any one of the preceding claims, wherein the position of the patterned features relative to the reference features is measured by an overlay measurement device.

7. The method of any preceding claim, further comprising modeling the measured positions to obtain a fingerprint of the measured positions across the entire substrate. The method of claim 7 , wherein the model consists of polynomial basis functions describing up to third-order behavior across the entire substrate.

9. A method of providing reference features on a substrate for calibrating a lithographic apparatus, the method comprising: obtaining a substrate made of (111)-oriented silicon; as well as The reference features are provided to the substrate using a reactive ion etching (RIE) process.

10. A substrate for calibrating a lithographic apparatus, characterized in that The Young's modulus of the substrate is substantially invariant with the orientation of an axis defining the Young's modulus within the plane of the substrate.

11. The substrate according to claim 10, wherein the substrate is a wafer made of crystalline silicon having a (111) orientation. 12 . The substrate according to claim 10 , wherein the substrate is made of an amorphous material, such as amorphous silicon, glass, metal or ceramic material.

13. The substrate of claim 11, further comprising providing reference features to the substrate by a reactive ion etching (RIE) process.

14. The substrate of any one of claims 10 to 13, wherein the reference features are configured as a bottom grating of combined overlay marks.

15. The substrate of claim 14, further comprising patterned features within a photoresist layer disposed on a surface of the substrate, and wherein the patterned features are configured as a top grating of combined overlay marks.

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