Printed circuit board

Abstract

The present disclosure provides a printed circuit board including: a glass layer; the first insulating layer is arranged on the glass layer; the first interconnection layer is arranged on the first insulating layer; and a first protective layer covering a portion of an upper surface of the glass layer, at least a portion of a side surface of the glass layer, and at least a portion of a side surface of the first insulating layer.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2024-0033073 filed on March 8, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] The present disclosure relates to a printed circuit board. Background Art

[0003] Recently, due to the development of artificial intelligence (AI) technology and other factors, multi-chip packages (MCPs) including memory chips (such as high-bandwidth memory (HBM)), processor chips (such as central processing units (CPUs) and graphics processing units (GPUs)), and logic chips (such as application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs)) have been used to process exponentially growing data. In particular, the number of CPU and GPU cores in server products has increased rapidly, and the demand for large-area substrates has also increased. Due to the thermal and mechanical stability of glass materials, warping issues can be overcome when using glass materials, and therefore, attempts to use glass materials continue. Summary of the Invention

[0004] One aspect of the present disclosure is to provide a printed circuit board including a glass layer.

[0005] Another aspect of the present disclosure is to provide a printed circuit board that can improve breakage characteristics of a glass layer.

[0006] Another aspect of the present disclosure is to provide a printed circuit board having improved reliability.

[0007] According to one aspect of the present disclosure, a printed circuit board includes: a glass layer; a first insulating layer disposed on the glass layer; a first interconnect layer disposed on the first insulating layer; and a first protective layer covering a portion of an upper surface of the glass layer, at least a portion of a side surface of the glass layer, and at least a portion of a side surface of the first insulating layer.

[0008] According to another aspect of the present disclosure, a printed circuit board includes: a glass layer; a first insulating layer disposed on the glass layer; and a first interconnect layer disposed on the first insulating layer; wherein a width of the first insulating layer is smaller than a width of the glass layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which: Figure 1is a cross-sectional view schematically showing an example of a printed circuit board; Figure 2 is a cross-sectional view schematically showing another example of a printed circuit board; Figure 3 is a cross-sectional view schematically showing another example of a printed circuit board; Figure 4 is a cross-sectional view schematically showing another example of a printed circuit board; and Figures 5 to 8 is a cross-sectional view schematically illustrating an example of a method for manufacturing a printed circuit board. DETAILED DESCRIPTION

[0010] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. For clarity, the shapes and sizes of elements in the drawings may be exaggerated or reduced.

[0011] printed circuit boards Figure 1 is a cross-sectional view schematically showing an example of a printed circuit board.

[0012] Reference Figure 1 A printed circuit board (PCB) according to an example may include: a glass layer 110; a first insulating layer 111 disposed on the glass layer 110; a first interconnect layer 121 disposed on the first insulating layer 111; and a first protective layer 150 covering a portion of the upper surface of the glass layer 110, at least a portion of the side surface of the glass layer 110, and at least a portion of the side surface of the first insulating layer 111. In addition, in the PCB according to the example, the coefficient of thermal expansion (CTE) of the first protective layer 150 may be greater than the CTE of the first insulating layer 111.

[0013] Because the PCB according to this example includes glass layer 110, it can achieve excellent flatness and, thanks to its low coefficient of thermal expansion (CTE), can also facilitate warpage control. In particular, since the PCB according to this example has glass layer 110 as its core, warpage control is beneficial for the completed PCB and can also be beneficial during the stacking of other insulating layers. Furthermore, flatness can be further improved, further facilitating the formation of high-density microcircuits with fine pitches. Furthermore, because glass layer 110 possesses the dielectric properties of glass (e.g., a variable dielectric constant (Dk) ranging from 2.5 to 11), the number of PCB layers can be reduced, further increasing design freedom.

[0014] Glass layer 110 may comprise glass (an amorphous solid). Glass may include, for example, pure silica (approximately 100% SiO₂), soda-lime glass, borosilicate glass, aluminosilicate glass, and the like. However, the present disclosure is not limited thereto, and alternative glass materials (such as fluoride glass, phosphate glass, and chalcogenide glass) may also be used as the material for glass layer 110. Furthermore, other additives may be included to form glass with specific physical properties. These additives may include magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, antimony, and carbonates (e.g., calcium carbonate (e.g., limestone) and sodium carbonate (e.g., soda)) and / or oxides of these and other elements. Glass layer 110 is distinct from layers comprising glass fiber (e.g., glass fabric, exemplified by glass cloth) (e.g., copper-clad laminate (CCL), prepreg (PPG), and the like), and may be understood as, for example, flat glass.

[0015] The first insulating layer 111 may include one or more insulating layers and may include an organic insulating material. The organic insulating material may include a thermosetting resin (such as epoxy resin), a thermoplastic resin (such as polyimide), or a material including an inorganic filler, an organic filler, and / or glass fiber (such as glass fabric, for example, glass cloth) and a resin. For example, the insulating material may be a non-photosensitive insulating material (such as Ajinomoto built-up film (ABF) or PPG), but is not limited thereto, and other polymer materials may also be used. Alternatively, the insulating material may be a photosensitive insulating material, such as a photosensitive dielectric (PID). Furthermore, the insulating material may include an adhesive sheet (such as a bonding sheet (BS)). The first insulating layer 111 may be disposed on each of the upper and lower surfaces of the glass layer 110.

[0016] The width of the first insulating layer 111 may be narrower than that of the glass layer 110. The PCB according to the example may be a result of forming the first insulating layer 111 on the glass layer 110, removing a portion of the first insulating layer 111, and then cutting the glass layer 110.

[0017] To improve production yield, a PCB may be manufactured with a panel substrate or a strip substrate, and then singulation may be performed to complete individual unit substrates. Here, when the panel substrate or the strip substrate is cut for singulation, expansion or contraction may occur more in the first insulating layer 111 having a relatively large thermal expansion coefficient than in the glass layer 110 having a relatively small thermal expansion coefficient. Here, when cooling is performed during the singulation operation, the first insulating layer 111 may contract more, resulting in a stress difference with the glass layer 110, and tensile stress may occur on the side of the glass layer 110, which may cause cracks to appear on the side of the glass layer 110. A PCB with cracks may be defective, and microcracks appearing inside and outside the glass layer 110 may cause failure of the PCB during subsequent use of the PCB.

[0018] According to an example, since singulation is performed during the operation of cutting the glass layer 110 after removing a portion of the first insulating layer 111, stress occurring when the first insulating layer 111 and the glass layer 110 are cut simultaneously can be minimized. Here, grooves can be formed at the cutting positions for singulation to remove a portion of the first insulating layer 111 (i.e., such that the width of the removed portion of the first insulating layer 111 is greater than the width of the removed portion of the glass layer 110). Therefore, since a portion of the first insulating layer 111 is further removed at the position where the glass layer 110 is cut, the width of the first insulating layer 111 according to an example can be narrower than the width of the glass layer 110.

[0019] The width of the first insulating layer 111 can be measured by imaging a cross-section of the PCB cut in the stacking direction using a scanning microscope or the like. The width of the first insulating layer 111 may refer to the horizontal distance across both sides of the first insulating layer 111 and may be the average of the distances measured at five arbitrary points. The width of the glass layer 110 can also be measured in the same manner and may be measured as the horizontal distance across both sides of the glass layer 110.

[0020] The first interconnect layer 121 may include one or more interconnect layers and may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the first interconnect layer 121 includes copper (Cu), but is not limited thereto. Each of the first interconnect layers 121 may perform various functions depending on the design. For example, the first interconnect layer 121 may include signal patterns, power patterns, ground patterns, etc. Each of these patterns may have various shapes (such as lines, planes, pads, etc.). Each of the first interconnect layers 121 may include an electroless plating layer (e.g., an electroless copper layer) and an electrolytic plating layer (e.g., an electrolytic copper layer). Alternatively, each of the first interconnect layers 121 may include a metal foil (e.g., a copper foil) and an electrolytic plating layer (e.g., an electrolytic copper layer). Alternatively, each of the first interconnect layers 121 may include a metal foil (e.g., a copper foil), an electroless plating layer (e.g., an electroless copper layer), and an electrolytic plating layer (e.g., an electrolytic copper layer). Each of the first interconnect layers 121 may include a sputtered layer instead of an electroless plating layer (e.g., a chemical copper plating layer), and may include both, if desired. The first interconnect layers 121 may be disposed on the first insulating layer 111, but are not limited thereto, and may also be disposed on the upper and / or lower surfaces of the glass layer 110.

[0021] The first interconnect layer 121 may be formed by any of a semi-additive process (SAP), a modified semi-additive process (MSAP), a via-hole (TT) process, and a subtractive process, but is not limited thereto. Any method that can form a circuit on a PCB may be used without limitation. Furthermore, the first interconnect layer 121 may be formed by various methods depending on the purpose and design.

[0022] The PCB according to an example may further include a first via layer 131 penetrating at least a portion of the first insulating layer 111 to connect the first interconnection layers 121 to each other.

[0023] The first via layer 131 may comprise a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the first via layer 131 comprises copper (Cu), but is not limited thereto. The first via layer 131 may include filled vias that fill each via hole, and may also include conformal vias disposed along the via hole walls. The first via layer 131 may perform various functions depending on the design. For example, the first via layer 131 may include ground vias, power vias, signal vias, and the like. Similar to the first interconnect layer 121, the first via layer 131 may include an electroless plating layer (e.g., a chemical copper plating layer) and an electrolytic plating layer (e.g., an electrolytic copper plating layer). Alternatively, the first via layer 131 may include a metal foil (e.g., a copper foil) and an electrolytic plating layer (e.g., an electrolytic copper plating layer). The first via layer 131 may include a sputtered layer instead of an electroless plated layer (eg, a chemical copper plated layer), or may include both, if necessary.

[0024] The PCB according to an example may further include a through via 130 penetrating the glass layer 110 .

[0025] Through via 130 may comprise a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal may include copper (Cu), but is not limited thereto. Through via 130 may penetrate the region between the upper and lower surfaces of glass layer 110. The upper and lower surfaces of through via 130 may be substantially coplanar with the upper and lower surfaces of glass layer 110, respectively. Through via 130 may be filled with a single metal layer and may be a so-called filled via. However, this is not limiting and through via 130 may have various structures. For example, through via 130 may be a conformal via disposed along the wall surface of a via hole. Through via 130 may perform various functions depending on the design. For example, through via 130 may include a ground via, a power via, a signal via, etc. Through via 130 may have a generally circular, elliptical, or polygonal shape in plan view, but is not limited thereto. For example, in order to ensure close contact by increasing the specific surface area, the through-hole 130 may have a composite shape in which various shapes are combined into one shape on a plane. The side surface of the through-hole 130 may be substantially perpendicular to the upper and lower surfaces of the through-hole 130, but is not limited thereto. If necessary, the side surface of the through-hole 130 may be tapered to have an hourglass shape in cross section, etc.

[0026] The PCB according to this example may also include a solder resist layer 140 disposed on the first insulating layer 111. The solder resist layer 140 may be disposed on the uppermost and lowermost sides of the PCB to protect the PCB from external influences. A known solder resist may be used for the solder resist layer 140. The solder resist layer 140 may include, but is not limited to, a liquid or film-type material, and other types of insulating materials may also be used. The solder resist layer 140 may include a thermosetting resin and an inorganic filler dispersed in the thermosetting resin, but may not include glass fiber. The insulating material may be a photosensitive insulating resin, and the filler may be an inorganic filler and / or an organic filler, but is not limited to these. Other polymer materials may also be used as needed. The solder resist layer 140 may have an opening, and at least a portion of the first interconnect layer 121 may be exposed through the opening. The portion of the first interconnect layer 121 exposed through the opening can be connected to a device (such as a semiconductor chip) and may also be connected to a mainboard or another PCB. The portion of the interconnect layer exposed through the opening serves as a solder pad, and a surface treatment layer may be further formed on the solder pad as needed. Optionally, a metal bump or a metal pillar may be further formed on the pad, or the pad may have a structure protruding in a pillar shape as needed.

[0027] A PCB according to an example embodiment may include a first protective layer 150 covering a portion of the upper surface of the glass layer 110, at least a portion of the side surface of the glass layer 110, and at least a portion of the side surface of the first insulating layer 111. In other words, the first protective layer 150 may be disposed on the outer surface of the PCB. This may be the result of the following operation: during the manufacturing operation of the PCB according to an example embodiment, after the panel substrate or strip substrate is singulated to form unit substrates, the first protective layer 150 is formed on the side surface of each unit substrate. The first protective layer 150 may be formed on the side surface of the PCB using methods such as liquid coating or liquid spraying, and may also be formed by immersing one side of the PCB in a liquid material. The first protective layer 150 may extend to at least a portion of the side surface of the glass layer 110, a portion of the upper surface of the glass layer 110, and at least a portion of the side surface of the first insulating layer 111, forming a single body. Here, the first protective layer 150 is not limited to covering a portion of the upper surface of the glass layer 110 and may also cover a portion of the lower surface of the glass layer 110. In addition, the first protective layer 150 may cover at least a portion of the side surface of the solder resist layer 140. This may be the result of singulating the panel substrate or the strip substrate after forming the solder resist layer 140 and then forming the first protective layer 150. The present disclosure is not necessarily limited thereto, and for example, after the singulation operation, the solder resist layer 140 may be formed after forming the first protective layer 150, and the solder resist layer 140 may be formed on the first protective layer 150.

[0028] Here, the outer side of the first protective layer 150 may be substantially flat, and in this case, the outer side of the PCB according to the example may be substantially flat. Not limited thereto, the outer side of the first protective layer 150 may be conformally formed along the shape of the side surface of the first insulating layer 111 and the side surface of the glass layer 110.

[0029] In addition, the first protective layer 150 of the PCB according to the example may have a thermal expansion coefficient greater than that of the first insulating layer 111, and the first protective layer 150 may have a thermal expansion coefficient greater than that of the glass layer 110. Since the first protective layer 150 may have a thermal expansion coefficient greater than that of the first insulating layer 111, the PCB according to the example may prevent the growth of cracks occurring in the glass layer 110. Furthermore, during the operation of singulating into unit substrates, the first protective layer 150 may partially penetrate into cracks occurring in the outer surface of the glass layer 110 to reduce the cracks, and since residual compressive stress may be generated in the glass layer 110, it may perform a dual function of preventing cracks. In addition, since the first protective layer 150 can be formed on the outermost side of the PCB, it can prevent external impact from being directly applied to the glass layer 110, prevent the glass layer 110 from being damaged by external impact, and protect the first insulating layer 111 and the solder resist layer 140 from external impact applied to the side surface of the first insulating layer 111 or impact applied to the side surface of the solder resist layer 140.

[0030] The first protective layer 150 may include an insulating material, and may include an organic insulating material. A known underfill material may be used for the first protective layer 150. Alternatively, a material used as a solder resist may be used as the organic insulating material, depending on the situation. The organic insulating material may include a thermosetting resin and an inorganic filler dispersed in the thermosetting resin, but may not include glass fiber. The insulating material may be a photosensitive insulating resin, but may also include other resins (such as epoxy resin). The filler may be an inorganic filler and / or an organic filler, but is not limited thereto. Other polymer materials may also be used as needed. The first protective layer 150 is formed from a material with a high coefficient of thermal expansion and is formed on the side surface of the PCB to protect the PCB from damage, but is not limited thereto. There are no material limitations for the first protective layer 150. In other words, any insulating material with a coefficient of thermal expansion greater than that of each of the first insulating layer 111 and the glass layer 110 may be used.

[0031] Here, the first protective layer 150 may include a material substantially different from that of the first insulating layer 111. The first insulating layer 111 is used to insulate between the first interconnection layers 121 of the PCB, while the first protective layer 150 is not intended for interlayer insulation but is intended to protect the glass layer 110 and the first insulating layer 111, so the first protective layer 150 may include a material substantially different from that of the first insulating layer 111.

[0032] The first protective layer 150 may be formed by applying a liquid insulating material and then curing it, but is not limited thereto. Any method for forming the first protective layer 150 on the outer side of the PCB, such as spraying or dipping, may be used without limitation, and is not limited to coating.

[0033] The first protective layer 150 may include one or more protective layers. Figure 1 , the first protective layer 150 is shown as a single layer, but is not limited thereto, and the first protective layer 150 may include a plurality of first protective layers. When the first protective layer 150 includes a plurality of first protective layers, each of the plurality of first protective layers 150 may include substantially the same insulating material, but is not necessarily limited thereto, and may include different insulating materials. When the first protective layer 150 includes a plurality of first protective layers, the plurality of first protective layers 150 may be formed by forming another first protective layer 150 after forming one first protective layer 150. In this case, the boundaries between the respective first protective layers 150 may be confirmed, but is not necessarily limited thereto, and the boundaries between the plurality of first protective layers 150 may not be obvious. Here, the boundaries between the plurality of first protective layers 150 may be determined by observing a cut cross-section of the PCB with a scanning microscope.

[0034] exist Figure 1 In the embodiment of the present invention, the PCB structure is depicted as symmetrical with respect to glass layer 110, but this is for convenience and is not necessarily limited to this. For example, the number of first insulating layers 111 located above glass layer 110 may be different from the number of first insulating layers 111 located below glass layer 110, the first interconnect layers 121 provided on the upper and lower surfaces of glass layer 110 may be different from each other, and the first interconnect layer 121 may not be provided on one of the upper and lower surfaces of glass layer 110, thereby having an asymmetrical structure.

[0035] The PCB according to the example is not limited to Figure 1 The configuration shown in , and may further include conventional components of a PCB, and some components may be omitted. In other words, the PCB may further include components that can be used by those skilled in the art.

[0036] Figure 2 is a cross-sectional view schematically showing another example of a PCB.

[0037] According to another example, the PCB may further include a second insulating layer 112 disposed on the first insulating layer 111 and a second interconnection layer 122 disposed on the second insulating layer 112 , and an average pitch of the second interconnection layer 122 may be smaller than an average pitch of the first interconnection layer 121 .

[0038] According to another example, a PCB may have an asymmetric structure in which the insulating layer structure stacked on the upper side of glass layer 110 is asymmetrical with the insulating layer structure stacked on the lower side of glass layer 110. Even if the insulating layer structures stacked on the upper side and the lower side of glass layer 110 are asymmetrical, glass layer 110 ensures rigidity, thereby protecting the PCB from bending or warping. Without limitation, even if the insulating materials of first insulating layer 111 and second insulating layer 112 have different compositions, the PCB can still be protected from bending or warping.

[0039] The second insulating layer 112 may include one or more insulating layers and may include an organic insulating material. The organic insulating material may include a thermosetting resin (such as epoxy resin), a thermoplastic resin (such as polyimide), or a material including inorganic fillers, organic fillers, and / or glass fibers (such as glass fabric, for example, glass cloth) and a resin. For example, the insulating material may be a non-photosensitive insulating material (such as ABF or PPG), but is not limited thereto, and other polymer materials may also be used. Alternatively, the insulating material may be a photosensitive insulating material (such as PID). Furthermore, the insulating material may include an adhesive sheet (such as BS). The second insulating layer 112 may be disposed on the first insulating layer 111, but is not necessarily limited thereto, and may be directly stacked on the glass layer 110 to contact the glass layer 110.

[0040] First insulating layer 111 and second insulating layer 112 may include different insulating materials. The fact that first insulating layer 111 and second insulating layer 112 may include different insulating materials means that they include different types of insulating materials from the aforementioned insulating material group, and even if they correspond to the same type of insulating material, the type or component ratio of the insulating material of first insulating layer 111 may be different from the type or component ratio of the insulating material of second insulating layer 112. For example, first insulating layer 111 and second insulating layer 112 may each include ABF, but the components included in first insulating layer 111 and the components included in second insulating layer 112 may be different. For example, first insulating layer 111 and second insulating layer 112 may each include filler, but the fillers may be different, such that first insulating layer 111 and second insulating layer 112 may include different insulating materials. Alternatively, the filler included in second insulating layer 112 may have a finer structure than the filler included in first insulating layer 111. In this case, the filler may be an inorganic filler, but is not necessarily limited to this. The fact that the filler included in the second insulating layer 112 is finer than the filler included in the first insulating layer 111 may mean that the size (such as diameter or volume) of the filler included in the second insulating layer 112 is smaller than the size (such as diameter or volume) of the filler included in the first insulating layer 111. Since the second insulating layer 112 may include a filler finer than that of the first insulating layer 111, the second insulating layer 112 may be more conducive to fine pattern processing than the first insulating layer 111, and thus the second interconnection layer 122 disposed on the second insulating layer 112 may include a finer interconnection structure than the first interconnection layer 121.

[0041] The fact that the fillers included in first insulating layer 111 and second insulating layer 112 are different from each other can be confirmed by analyzing a polished or cut cross-section of the PCB. Each filler can be compared using a scanning microscope or an optical microscope based on the polished or cut cross-section of the PCB, and if necessary, the polished or cut cross-section can be stained to facilitate filler identification. The filler's size (such as diameter or volume) can be measured using a scanning microscope or an optical microscope based on the polished or cut cross-section of the PCB as described above, and the average of the values ​​measured at any five points can be determined as the filler's size.

[0042] The second interconnect layer 122 may include one or more interconnect layers and may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the second interconnect layer 122 includes copper (Cu), but is not limited thereto. The second interconnect layer 122 may perform various functions depending on the design. For example, the second interconnect layer 122 may include signal patterns, power patterns, ground patterns, etc. Each of these patterns may have various shapes (such as lines, planes, and pads). The second interconnect layer 122 may include an electroless plating layer (e.g., an electroless copper layer) and an electrolytic plating layer (e.g., an electrolytic copper layer). Alternatively, the second interconnect layer 122 may include a metal foil (e.g., a copper foil) and an electrolytic plating layer (e.g., an electrolytic copper layer). Alternatively, the second interconnect layer 122 may include a metal foil (e.g., a copper foil), an electroless plating layer (e.g., an electroless copper layer), and an electrolytic plating layer (e.g., an electrolytic copper layer). The second interconnect layer 122 may include a sputtered layer instead of an electroless plating layer (e.g., a chemical copper plating layer), and may include both if desired. The second interconnect layer 122 may be disposed on the second insulating layer 112, but is not limited thereto, and may be directly disposed on the upper and / or lower surfaces of the glass layer 110.

[0043] The second interconnection layer 122 may be formed by one of SAP, MSAP, TT process, and subtractive method, but is not limited thereto, and any method that can form a circuit on a PCB may be used without limitation. Furthermore, the second interconnection layer 122 may be formed by different methods depending on the purpose and design, etc.

[0044] The average pitch of the second interconnection layer 122 may be smaller than the average pitch of the first interconnection layer 121. That is, the average distance between the interconnection patterns of the second interconnection layer 122 may be smaller than the average distance between the interconnection patterns of the first interconnection layer 121, and the interconnection density of the second interconnection layer 122 may be greater than the interconnection density of the first interconnection layer 121.

[0045] The average pitch of the second interconnection layer 122 can be measured by imaging a polished or cut cross-section of the PCB with a scanning microscope, and the average pitch can be the average of the pitches between adjacent interconnection patterns measured at five arbitrary points. The average interlayer insulation distance can also be measured by imaging a polished or cut cross-section of the PCB with a scanning microscope, and the average interlayer insulation distance can be the average of the insulation distances between interconnection layers adjacent to each other measured vertically at five arbitrary points.

[0046] That is, the interconnection pattern included in the second interconnection layer 122 may be a high-density fine interconnection pattern having a line width / space (L / S) smaller than that of the interconnection pattern included in the first interconnection layer 121. As a non-limiting example, the interconnection pattern included in the second interconnection layer 122 may have a line width / space (L / S) of about 2 m / 2 The line width / space of the second interconnect layer 122 is preferably 100 m, but is not limited thereto. Since the second interconnect layer 122 has a high interconnection density, it can be effective in interconnecting electronic components such as semiconductor chips. In other words, the second interconnect layer 122 can be used as a redistribution layer for the semiconductor chip, etc., by mounting the semiconductor chip, etc.

[0047] Typically, a PCB including an interconnection layer having a fine interconnection pattern suffers from warping due to the asymmetry of the substrate. However, since the PCB according to another example includes the glass layer 110 having excellent rigidity, warping due to asymmetry can be prevented even if the interconnection layer having a fine interconnection pattern is implemented only on one side of the substrate.

[0048] According to another example, the PCB may further include a second via layer 132 that penetrates at least a portion of the second insulating layer 112 to connect the second interconnect layers 122 to each other. The second via layer 132 may comprise a metal. Examples of the metal include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, but not limited to, the second via layer 132 comprises copper (Cu). The second via layer 132 may include filled vias that fill each via hole, but may also include conformal vias arranged along the via hole walls. The second via layer 132 may perform various functions depending on the design. For example, the second via layer 132 may include ground vias, power vias, signal vias, and the like. Similar to the second interconnect layer 122, the second via layer 132 may include both an electroless plating layer (e.g., a chemical copper plating layer) and an electrolytic plating layer (e.g., an electrolytic copper plating layer). Alternatively, the second via layer 132 may include a metal foil (e.g., a copper foil) and an electrolytically plated layer (e.g., an electrolytic copper layer). The second via layer 132 may include a sputtered layer rather than an electroless plated layer (e.g., a chemically plated copper layer), and may include both, if desired. The width of the second insulating layer 112 may be narrower than the width of the glass layer 110, and the width of the second insulating layer 112 may be substantially the same as the width of the first insulating layer 111. This may be the result of the following operation: in a method for manufacturing a PCB according to another example, an operation of removing a portion of the second insulating layer 112 is performed during an operation of removing a portion of the first insulating layer 111, and then an operation of cutting the glass layer 110 is performed. Since the first insulating layer 111 and the second insulating layer 112 each include an organic insulating material, the operation of removing a portion of the second insulating layer 112 can be performed during the operation of removing a portion of the first insulating layer 111.

[0049] The first protective layer 150 may cover at least a portion of the side surface of the second insulating layer 112. This may be a result of forming the first protective layer 150 after cutting the glass layer 110, and the first protective layer 150 may cover at least a portion of the side surface of the glass layer 110, a portion of the upper surface and a portion of the lower surface of the glass layer 110, at least a portion of the side surface of the first insulating layer 111, and may extend to cover at least a portion of the side surface of the second insulating layer 112.

[0050] In a PCB according to another example, the solder resist layer 140 may be provided on the second insulating layer 112. The first protective layer 150 may cover at least a portion of a side surface of the solder resist layer 140 in the same manner as the PCB according to the example.

[0051] In accordance with Figure 2In another example PCB, descriptions other than the description about the second insulating layer 112, the second via layer 132, and the second interconnection layer 122 may be applied in the same manner as the description of the PCB according to the example, and thus, repeated descriptions are omitted.

[0052] Figure 3 is a cross-sectional view schematically showing another example of a PCB.

[0053] According to another example, the PCB may further include a second protective layer 160 disposed between the glass layer 110 and the first protective layer 150. The second protective layer 160 may contact at least a portion of the side surface of the glass layer 110, a portion of the upper surface and a portion of the lower surface of the glass layer 110, and at least a portion of the side surface of the first insulating layer 111. In other words, the second protective layer 160 may be disposed between the glass layer 110 and the first protective layer 150, and may extend to be disposed between the side surface of the first insulating layer 111 and the first protective layer 150. The thermal expansion coefficient of the second protective layer 160 may be greater than the thermal expansion coefficient of the first insulating layer 111, and may also be greater than the thermal expansion coefficient of the glass layer 110.

[0054] The second protective layer 160 may include an insulating material, and may include an organic insulating material. The second protective layer 160 may serve as a unit for improving the adhesion between the first protective layer 150 and the stacked body of the PCB. As a non-limiting example, the second protective layer 160 may include a resin (such as an epoxy resin), and the filler may be an inorganic filler and / or an organic filler, but is not limited thereto, and other polymer materials may be used as needed. Optionally, the second protective layer 160 may include an adhesive sheet, a coupling agent, etc. In other words, any material that ensures adhesion to the glass layer 110 or ensures adhesion to the side surface of the first insulating layer 111 that has been stacked and cured may be used without limitation.

[0055] The insulating material of the second protective layer 160 is not limited thereto, and the second protective layer 160 may include one material selected from the insulating material group of the first protective layer 150. That is, the second protective layer 160 may use an underfill material, and a known underfill material may be used. In addition, as described above in the description of the PCB according to the example, in some cases, a material used as a solder resist may also be used as an insulating material for the second via layer 132, and repeated details will be omitted.

[0056] Since the second protective layer 160 can be formed in a different operation than the operation of forming the first protective layer 150, the boundary between the first protective layer 150 and the second protective layer 160 can be observed in a cross-section of the PCB using a scanning microscope. However, without limitation thereto, if the first protective layer 150 is formed immediately after the second protective layer 160 is formed, the boundary between the first protective layer 150 and the second protective layer 160 may not be obvious. The method of forming the second protective layer 160 can be performed using the same method as the method of forming the first protective layer 150, but the present disclosure is not necessarily limited thereto, and the second protective layer 160 can be formed in various ways depending on the material of the second protective layer 160.

[0057] Here, the second protective layer 160 may include one or more second protective layers. Figure 3 , the second protective layer 160 is shown as a single layer, but is not limited to this, and the second protective layer 160 may include a plurality of second protective layers. When the second protective layer 160 includes a plurality of second protective layers, each of the plurality of second protective layers 160 may include substantially the same insulating material, but is not necessarily limited to this, and may include different insulating materials. When the second protective layer 160 includes a plurality of second protective layers, the plurality of second protective layers 160 may be formed by forming another second protective layer 160 after forming one second protective layer 160. In this case, the boundaries between the plurality of second protective layers 160 may be confirmed, but is not necessarily limited to this, and the boundaries between the plurality of second protective layers 160 may not be obvious. Here, the boundaries between the plurality of second protective layers 160 can be confirmed by observing a polished cross section or a cut cross section of the PCB with a scanning microscope.

[0058] In accordance with Figure 3 In another example of the PCB, the description other than the description about the second protective layer 160 can be the same as that according to Figure 1 The same manner as the description of the example PCB applies, and therefore, repeated description is omitted.

[0059] Figure 4 is a cross-sectional view schematically showing another example of a PCB.

[0060] According to another example, the PCB may further include at least one third protective layer 170 disposed between the second protective layer 160 and the first protective layer 150. The third protective layer 170 may be disposed on the second protective layer 160 and may be conformally disposed along a boundary of the second protective layer 160. The third protective layer 170 may have a thermal expansion coefficient greater than that of the first insulating layer 111, and the third protective layer 170 may have a thermal expansion coefficient greater than that of the glass layer 110. Similar to the first protective layer 150 and / or the second protective layer 160, the third protective layer 170 may prevent cracks from growing in the glass layer 110. In addition, the adhesion between the second protective layer 160 and the first protective layer 150 may be improved.

[0061] The third protective layer 170 may include an insulating material, and may include an organic insulating material. A known underfill material may be used for the third protective layer 170. Alternatively, a material used as a solder resist may be used as the organic insulating material, depending on the situation. The organic insulating material may include a thermosetting resin and an inorganic filler dispersed in the thermosetting resin, but may not include glass fiber. The insulating material may be a photosensitive insulating resin, but may also be other resins (such as epoxy resin). The filler may be an inorganic filler and / or an organic filler, but is not limited to these. Other polymer materials may also be used as needed. The third protective layer 170 is not limited to these materials and may be of any type, as long as it has a high coefficient of thermal expansion and is formed on the side surface of the PCB to protect the PCB from damage. In other words, any insulating material may be used as long as the third protective layer 170 includes an insulating material with a coefficient of thermal expansion greater than that of each of the first insulating layer 111 and the glass layer 110. The third protective layer 170 may include an insulating material substantially the same as that of the first protective layer 150, but is not necessarily limited to this and may include a different type of insulating material. When the third protective layer 170 includes an insulating material substantially the same as that of the first protective layer 150, the third protective layer 170 may have a thermal expansion coefficient substantially the same as that of the first protective layer 150, but is not necessarily limited thereto, and the third protective layer 170 may have a thermal expansion coefficient smaller than that of the first protective layer 150. When the thermal expansion coefficient of the third protective layer 170 is greater than that of the first insulating layer 111 and less than that of the first protective layer 150, the third protective layer 170 may be provided as an intermediate between the first insulating layer 111 and the first protective layer 150. That is, the third protective layer 170 may function to reduce the degree of thermal expansion of each of the first insulating layer 111 and the first protective layer 150.

[0062] The third protective layer 170 may be formed by coating a liquid insulating material and then solidifying it, but the present disclosure is not necessarily limited thereto. Here, the method of forming the third protective layer 170 may be used without limitation as long as it is a method for forming the third protective layer 170 on the outside of the PCB (such as spraying or dipping), and the third protective layer 170 is not necessarily limited to being formed by coating. According to another example, a PCB is shown in which the first protective layer 150 is formed after the third protective layer 170 is formed, but the present disclosure is not necessarily limited thereto, and the boundary between the first protective layer 150 and the third protective layer 170 may not be obvious. Figure 4 In the embodiment, the third protective layer 170 is formed on the second protective layer 160 , but the present disclosure is not necessarily limited thereto, and the second protective layer 160 may be omitted as needed.

[0063] In accordance with Figure 4 In another example of the PCB, the description other than the description about the third protective layer 170 can be the same as that according to Figure 3 The same manner as the description of the other example PCB applies, and therefore, repeated description is omitted.

[0064] Method for manufacturing PCB Figures 5 to 8 is a cross-sectional view schematically illustrating an example of a method for manufacturing a PCB.

[0065] The method for manufacturing the PCB according to the example may include the following operations: singulating a large-area panel substrate or a strip substrate into unit substrates. After the singulation operation, the manufacturing method may include an operation of forming a first protective layer 150 on the side surfaces of the glass layer 110 and the side surfaces of the first insulating layer 111.

[0066] Reference Figure 5 The manufacturing method includes forming a glass layer 110, a first insulating layer 111, a first interconnect layer 121, and a solder resist layer 140. That is, the manufacturing method may include forming a panel substrate or a strip substrate. Here, in the operation of forming each component, each component may be formed by forming a known PCB build-up structure method.

[0067] Reference Figure 6, the manufacturing method may include an operation of removing a portion of the first insulating layer 111. This is to first remove a portion of the first insulating layer 111 before the singulation operation and before cutting the glass layer 110. The portion of the first insulating layer 111 close to the cutting line used for singulation into unit substrates can be removed. The operation of removing a portion of the first insulating layer 111 can be performed by a method using a laser, but is not limited to this. As a non-limiting example, the operation of removing a portion of the first insulating layer 111 can be performed by laser ablation. However, the method for removing a portion of the first insulating layer 111 is not limited to this, and any method available to those skilled in the art (such as using a mechanical method or a chemical method) can be used without limitation. As a result of removing a portion of the first insulating layer 111, a portion of the upper surface and a portion of the lower surface of the glass layer 110 can be exposed to the outside, and a cutting mark used to cut the glass layer 110 can be exposed to the outside.

[0068] Reference Figure 7 , the manufacturing method may include an operation of cutting the glass layer 110 and cutting it into unit substrates. The cutting may be performed along a portion of the upper surface and a portion of the lower surface of the glass layer 110 exposed to the outside, and the cutting may be performed by mechanical processing or a chemical method. As non-limiting examples, a sawing process or a laser processing process may be used, a method such as etching may be used, and these methods may be used in combination. However, the method of processing and cutting the glass layer 110 is not limited thereto, and any method available to those skilled in the art may be used without limitation. Here, since the operation of cutting the glass layer 110 is performed after the operation of removing a portion of the first insulating layer 111, the width of the first insulating layer 111 may be narrower than the width of the glass layer 110, the side surface of the first insulating layer 111 may not be coplanar with the side surface of the glass layer 110, and the side surface of the glass layer 110 may further protrude relative to the side surface of the first insulating layer 111.

[0069] Reference Figure 8 The manufacturing method may include forming a first protective layer 150 on the side surface of the glass layer 110. More specifically, the first protective layer 150 may be formed on at least a portion of the side surface of the glass layer 110, a portion of the upper surface and a portion of the lower surface of the glass layer 110, and at least a portion of the side surface of the first insulating layer 111. The first protective layer 150 may be formed by applying a liquid insulating material and then curing it, but is not necessarily limited to this. Any coating method may be used as long as it forms the first protective layer 150 on the outer side of the PCB (such as spraying or dipping). After singulation into unit substrates, the first protective layer 150 is formed on the side surface of each unit substrate, and by forming the first protective layer 150, the side surfaces of the unit substrates may have a substantially flat surface.

[0070] As one of various effects of the present disclosure, a PCB including a glass layer may be provided.

[0071] As another of the various effects of the present disclosure, a PCB capable of improving breakage characteristics of a glass layer may be provided.

[0072] As another of the various effects of the present disclosure, a PCB with improved reliability may be provided.

[0073] The present disclosure may also include methods of forming components that can be utilized by those skilled in the art and is not limited to the contents expressed in the accompanying drawings. Figure 2 Another example of a PCB, according to Figure 3 Another example of a PCB and a Figure 4 Another example of the content of the PCB, those skilled in the art can use the known method of forming the assembly and combine Figures 5 to 8 The method to perform manufacturing according to Figure 2 Another example of a PCB manufacturing method according to Figure 3 Another example of a PCB and a method of manufacturing the same according to Figure 4 Another example of a PCB method.

[0074] In the present disclosure, the expression "covering" may include not only the case of complete covering but also the case of at least partial covering, and may include not only the case of direct covering but also the case of indirect covering. In addition, the expression "filling" may include not only the case of complete filling but also the case of substantial filling, and may include the case where, for example, some air gaps or voids exist.

[0075] In the present disclosure, “substantially” may include process errors occurring in a manufacturing process, positional deviations, errors during measurement, etc. For example, substantially coplanar may include not only being completely on the same plane but also being approximately on the same plane.

[0076] In this disclosure, the term "same material" may refer not only to the same material but also to the same type of material. Thus, the components of the materials may be substantially the same, but their specific component ratios may be slightly different. In this disclosure, "different insulating materials" may refer to materials that do not correspond to the same insulating material.

[0077] In the present disclosure, a cross-sectional view may show the cross-sectional shape of an object when it is cut vertically, the cross-sectional shape of an object when it is cut vertically, or the cross-sectional shape of an object when it is viewed from a side perspective. In addition, a plan view may show the planar shape of an object when it is cut horizontally, or the planar shape of an object when it is viewed from a top or bottom perspective.

[0078] In the present disclosure, for the sake of convenience, "lower" in the lower side, lower part, lower surface, etc. is used to refer to the downward direction based on the cross section of the drawings, and "upper" in the upper side, upper part, upper surface, etc. is used to indicate the opposite direction. However, this is a definition of direction for the convenience of description, and the scope of the claims is not particularly limited by the description of the direction, and the concept of upper / lower can be changed at any time.

[0079] In the present disclosure, the term "connection" may refer not only to "direct connection" but also to "indirect connection" via an adhesive layer or the like. Furthermore, the term "electrical connection" may include both situations where an element is "physically connected" and situations where an element is "not physically connected." Furthermore, it is understood that when an element is referred to as "first" and "second," the element is not limited by these terms. These terms may be used solely to distinguish an element from other elements and may not limit the order or importance of the elements. In some cases, a first element may be referred to as a second element without departing from the scope of the claims. Similarly, a second element may be referred to as a first element.

[0080] The terms "exemplary embodiment" or "example" used in this disclosure do not refer to the same example and are provided to emphasize the unique features that differ between each example. However, the examples provided in the above description do not exclude the possibility of being associated with features of other examples and being combined thereafter. For example, unless otherwise noted, even if content described in a particular example is not described in a different example, the content can be understood to be associated with another example.

[0081] While the present disclosure has been described in connection with what are presently considered to be practical embodiments, it should be understood that the disclosure is not limited to the disclosed embodiments, but on the contrary is intended to cover various modifications and equivalents included within the spirit and scope of the appended claims.

Claims

1. A printed circuit board, comprising: glass layer; a first insulating layer, disposed on the glass layer; as well as The first protective layer covers a portion of the upper surface of the glass layer, at least a portion of the side surface of the glass layer, and at least a portion of the side surface of the first insulating layer.

2. The printed circuit board according to claim 1, wherein The first protective layer also covers a portion of the lower surface of the glass layer.

3. The printed circuit board according to claim 1, further comprising: a solder resist layer disposed on the first insulating layer, The first protection layer also covers at least a portion of a side surface of the solder resist layer.

4. The printed circuit board according to claim 1, wherein The first protection layer includes a material different from that of the first insulating layer. 5 . The printed circuit board according to claim 1 , further comprising a first interconnection layer disposed on the first insulating layer.

6. The printed circuit board according to claim 5, wherein The first insulating layer is disposed on each of the lower surface and the upper surface of the glass layer, and the first interconnect layer is disposed on each of the upper surface and the lower surface of the glass layer.

7. The printed circuit board according to claim 5, further comprising: a second insulating layer, disposed on the first insulating layer; as well as The second interconnection layer is disposed on the second insulating layer.

8. The printed circuit board according to claim 7, wherein An average pitch of the second interconnect layer is smaller than an average pitch of the first interconnect layer.

9. The printed circuit board according to claim 7, wherein The first protection layer also covers at least a portion of a side surface of the second insulating layer.

10. The printed circuit board according to claim 9, wherein The width of the second insulating layer is the same as that of the first insulating layer, and both the width of the second insulating layer and the width of the first insulating layer are smaller than the width of the glass layer. 11 . The printed circuit board of claim 1 , further comprising at least one second protective layer disposed between the glass layer and the first protective layer.

12. The printed circuit board according to claim 11, wherein The second protection layer extends between at least a portion of the side surface of the first insulating layer and the first protection layer. 13 . The printed circuit board according to claim 11 , further comprising at least one third protective layer disposed between the second protective layer and the first protective layer.

14. The printed circuit board according to claim 1, wherein The first protective layer includes one or more first protective layers.

15. The printed circuit board according to claim 1, wherein The thermal expansion coefficient of the first protective layer is greater than the thermal expansion coefficient of the first insulating layer.

16. The printed circuit board according to claim 15, wherein The thermal expansion coefficient of the first protective layer is greater than the thermal expansion coefficient of the glass layer.

17. The printed circuit board according to claim 15, further comprising: a second protective layer disposed between the first protective layer and the first insulating layer and between the first protective layer and the glass layer; Wherein, the thermal expansion coefficient of the second protective layer is greater than the thermal expansion coefficient of the first insulating layer.

18. A printed circuit board comprising: glass layer; a first insulating layer, disposed on the glass layer; as well as a first interconnection layer disposed on the first insulating layer; Wherein, the width of the first insulating layer is smaller than the width of the glass layer. 19 . The printed circuit board according to claim 18 , further comprising a first protective layer covering a portion of an upper surface of the glass layer, at least a portion of a side surface of the glass layer, and at least a portion of a side surface of the first insulating layer.

20. The printed circuit board according to claim 19, wherein The first protective layer also covers a portion of the lower surface of the glass layer.

21. The printed circuit board according to claim 19, further comprising: a solder resist layer disposed on the first insulating layer, The first protection layer also covers at least a portion of a side surface of the solder resist layer.

22. The printed circuit board according to claim 19, wherein The first protection layer includes a material different from that of the first insulating layer.

23. The printed circuit board according to claim 18, wherein The first insulating layer is disposed on each of an upper surface and a lower surface of the glass layer, and the first interconnect layer is disposed on each of the upper surface and the lower surface of the glass layer.

24. The printed circuit board according to claim 19, further comprising: a second insulating layer, disposed on the first insulating layer; as well as The second interconnection layer is disposed on the second insulating layer.

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