Plasma processing method and plasma processing apparatus

By using a DC pulse voltage and processing gas to generate plasma in a plasma processing device, the photoresist film is selectively removed and a deposited film is formed as a mask, which solves the problems of photoresist film reduction and pattern defects and achieves higher etching accuracy and uniformity.

CN120642032APending Publication Date: 2025-09-12TOKYO ELECTRON LTD
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Patent Information

Application Number
CN202480010448.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-02-15
Filing Date
2024-02-06
Publication Date
2025-09-12

AI Technical Summary

Technical Problem

The prior art is difficult to effectively reduce pattern defects of the photoresist film while suppressing the reduction of the photoresist film.

Method used

In a plasma processing apparatus, a substrate support is arranged in a plasma processing chamber, and plasma is generated using a DC pulse voltage and a processing gas to selectively remove a portion of the photoresist film and form a deposited film on the etching film to perform etching as a mask.

Benefits of technology

The reduction of the photoresist film is effectively suppressed, while the pattern defects of the photoresist film are reduced and the accuracy and uniformity of the etching film are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a technique capable of reducing pattern defects in a photoresist film while suppressing the decrease in the photoresist film. The plasma processing method is performed in a plasma processing apparatus. The plasma processing apparatus includes a plasma processing chamber and a substrate support portion disposed in the plasma processing chamber. The plasma processing method includes: a step of disposing a substrate on the substrate support portion, the substrate having an etching film and a photoresist film disposed on the etching film; and a removal step of selectively removing a portion of the photoresist film from the etching film, the removal step including a step of generating plasma from the processing gas supplied into the plasma processing chamber and a step of applying a DC pulse voltage to the substrate supporting portion.
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Description

Technical Field

[0001] Exemplary embodiments of the present invention relate to a plasma processing method and a plasma processing apparatus. Background Art

[0002] As a technique for suppressing development defects in a resist pattern, there is a semiconductor manufacturing apparatus described in Patent Document 1.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 10-209014 Summary of the Invention

[0006] Technical problem to be solved by the invention

[0007] The present invention provides a technology capable of reducing pattern defects of a photoresist film while suppressing the reduction of the photoresist film.

[0008] Technical means for solving technical problems

[0009] In one exemplary embodiment of the present invention, a plasma processing method is provided for use in a plasma processing apparatus having a plasma processing chamber and a substrate support disposed within the plasma processing chamber. The plasma processing method includes: placing a substrate on the substrate support, wherein the substrate includes an etching film and a photoresist film disposed on the etching film; and removing a portion of the photoresist film from the etching film, wherein the removal step includes generating plasma from a processing gas supplied into the plasma processing chamber and applying a DC pulse voltage to the substrate support.

[0010] Effects of the Invention

[0011] According to an exemplary embodiment of the present invention, a technology capable of reducing pattern defects of a photoresist film while suppressing reduction of the photoresist film may be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a diagram for explaining a configuration example of a plasma processing system.

[0013] Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0014] Figure 3 It is a partially enlarged view showing an example of the substrate support portion 11 included in the substrate processing apparatus 1 .

[0015] Figure 4 This is a timing chart showing an example of waveforms of a generated source RF signal and a bias DC signal.

[0016] Figure 5 This is a timing chart showing an example of waveforms of a generated source RF signal and a bias DC signal.

[0017] Figure 6 This is a timing chart showing an example of this processing method.

[0018] Figure 7 1 is a diagram showing an example of a cross-sectional structure of a substrate W provided in step ST1 .

[0019] Figure 8 1 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST2.

[0020] Figure 9 1 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST3.

[0021] Figure 10 1 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST4. DETAILED DESCRIPTION

[0022] Hereinafter, each embodiment of the present invention will be described.

[0023] In one exemplary embodiment, a plasma processing method is provided for use in a plasma processing apparatus having a plasma processing chamber and a substrate support disposed within the plasma processing chamber. The plasma processing method includes: placing a substrate on the substrate support, wherein the substrate includes an etching film and a photoresist film disposed on the etching film; and removing a portion of the photoresist film selectively from the etching film. The removal step includes generating plasma from a processing gas supplied into the plasma processing chamber and applying a DC pulse voltage to the substrate support.

[0024] In one exemplary embodiment, the photoresist film is configured to include EUV (Extreme Ultra-violet) resist.

[0025] In one exemplary embodiment, the EUV resist contains metal.

[0026] In one exemplary embodiment, the metal is tin (Sn).

[0027] In one exemplary embodiment, the process gas includes at least one gas selected from nitrogen (N2) gas, oxygen (O2) gas, hydrogen (H2) gas, and carbon tetrafluoride (CF4) gas.

[0028] In one exemplary embodiment, an etching process of etching the etching film using the photoresist film as a mask is further included.

[0029] In one exemplary embodiment, the etching process includes supplying a bias RF signal to the substrate support.

[0030] In one exemplary embodiment, the etching process includes applying a bias DC signal to the substrate support.

[0031] In the plasma treatment method according to an exemplary embodiment, the DC pulse voltage is 10 to 200V.

[0032] In the plasma processing method according to an exemplary embodiment, the frequency of the DC pulse voltage is 200 kHz to 2 MHz.

[0033] In the plasma treatment method according to one exemplary embodiment, the method further includes forming a deposition film on at least a portion of the photoresist film before or after the removal process.

[0034] In an exemplary embodiment, the present invention includes: a plasma processing chamber; a substrate support portion configured in the plasma processing chamber; and a control portion that performs the following controls: control of configuring a substrate on the substrate support portion, wherein the substrate has an etching film and a photoresist film configured on the etching film; and removal control of selectively removing a portion of the photoresist film from the etching film, wherein the removal control includes control of generating plasma from a processing gas supplied into the plasma processing chamber, and control of applying a DC pulse voltage to the substrate support portion.

[0035] The following describes various embodiments of the present invention in detail with reference to the accompanying drawings. In the drawings, identical or similar elements are denoted by the same reference numerals, and duplicate descriptions are omitted. Unless otherwise specified, positional relationships, such as up, down, left, and right, are described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual proportions, and actual proportions are not limited to those shown in the drawings.

[0036] <Configuration Example of Plasma Processing System>

[0037] Figure 1: is a diagram for illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing device 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing device 1 is an example of a substrate processing device. The plasma processing device 1 includes a plasma processing chamber 10, a substrate support portion 11, and a plasma generating portion 12. The plasma processing chamber 10 has a plasma processing space. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to the gas supply portion 20 described later, and the gas exhaust port is connected to the exhaust system 40 described later. The substrate support portion 11 is arranged in the plasma processing space and has a substrate supporting surface for supporting a substrate.

[0038] The plasma generating section 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP: Capacitively Coupled Plasma), inductively coupled plasma (ICP: Inductively Coupled Plasma), ECR plasma (Electron-Cyclotron-resonance plasma: Electron cyclotron resonance plasma), helicon wave excited plasma (HWP: Helicon Wave Plasma) or surface wave plasma (SWP: Surface Wave Plasma), etc. In addition, various types of plasma generating sections including AC (Alternating Current: Alternating Current) plasma generating sections and DC (Direct Current: Direct Current) plasma generating sections may also be used. In one embodiment, the AC signal (AC power) used in the AC plasma generating section has a frequency in the range of 100kHz to 10GHz. Therefore, the AC signal includes an RF (Radio Frequency: Radio Frequency) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 100kHz to 150MHz.

[0039] The control unit 2 is capable of processing computer-executable commands for causing the plasma processing apparatus 1 to perform the various processes described in the present invention. The control unit 2 can be configured to control the various elements of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, a portion or all of the control unit 2 can be included in the plasma processing apparatus 1. The control unit 2 can include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control actions by reading a program from the storage unit 2a2 and executing the read program. The program can be stored in the storage unit 2a2 in advance or obtained via a medium when necessary. The obtained program is stored in the storage unit 2a2 and read and executed from the storage unit 2a2 by the processing unit 2a1. The medium can be various storage media readable by the computer 2a, or a communication line connected to the communication interface 2a3. The processing unit 2a1 can be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0040] <Configuration Example of Plasma Processing Apparatus>

[0041] Hereinafter, a configuration example of a capacitive coupling type plasma processing apparatus will be described as an example of the plasma processing apparatus 1 . Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0042] A capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. In addition, the plasma processing apparatus 1 includes a substrate support unit 11 and a gas inlet unit. The gas inlet unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The shower head 13 and the substrate support unit 11 are electrically insulated from the shell of the plasma processing chamber 10.

[0043] Figure 3 1 is a partially enlarged view showing an example of a substrate support portion 11 included in the substrate processing device 1. The substrate support portion 11 includes a main body 111 and a ring assembly 112. The main body 111 may include a base 1110, an electrostatic chuck 1111, and an electrode plate 1112. In addition, the main body 111 has a central area 111a for supporting a substrate W and an annular area 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular area 111b of the main body 111 surrounds the central area 111a of the main body 111 when viewed from above. The substrate W is arranged on the central area 111a of the main body 111, and the ring assembly 112 is arranged on the annular area 111b of the main body 111 so as to surround the substrate W on the central area 111a of the main body 111. Therefore, the central region 111 a is also referred to as a substrate supporting surface for supporting the substrate W, and the annular region 111 b is also referred to as a ring supporting surface for supporting the ring assembly 112 .

[0044] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is arranged on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b arranged in the ceramic component 1111a. The ceramic component 1111a has a central area 111a. In one embodiment, the ceramic component 1111a also has an annular area 111b. In addition, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may have an annular area 111b. In this case, the ring assembly 112 may be arranged on the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 1111 and the annular insulating component. In addition, at least one RF / DC electrode coupled to the RF power supply 31 and / or DC power supply 32 described later may be arranged in the ceramic component 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. In the case where the bias RF signal and / or DC signal described later is supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. In addition, the conductive component of the base 1110 and the at least one RF / DC electrode may also function as a plurality of lower electrodes. In addition, the electrostatic electrode 1111b may also function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

[0045] The electrostatic electrode 1111b includes an electrode 115a disposed between the substrate support surface 111a and the base 1110. Electrode 115a may be a planar electrode corresponding to the shape of the substrate support surface 111a. Furthermore, the chuck electrode 15 may include electrodes 115b and 115c disposed between the ring assembly 112 and the base 1110. Electrodes 115b and 115c may be annular electrodes corresponding to the shape of the ring assembly 112. Furthermore, electrode 115c is disposed outside electrode 115b. The bias electrode 116 includes an electrode 116a disposed between electrode 115a (or substrate support surface 111a) and the base 1110. Electrode 116a may be a planar electrode corresponding to the shape of the substrate support surface 111a and / or electrode 115a. Furthermore, the bias electrode 116 may include electrode 116b disposed between the ring assembly and the base 1110.

[0046] Furthermore, when the conductive member included in the susceptor 1110 functions as the lower electrode, the electrostatic chuck 114 does not need to include the bias electrode 116. Alternatively, the electrostatic electrode 1111b may function as the lower electrode. When the electrostatic electrode 1111b functions as the lower electrode, the electrostatic chuck 114 does not need to include the bias electrode 116. Furthermore, the portion of the electrostatic chuck 114 including the electrodes 115a and 116a and the portion including the electrodes 115b and 115c and the electrode 116b may be formed as separate components.

[0047] The ring assembly 112 includes one or more ring-shaped components. In one embodiment, the one or more ring-shaped components include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0048] In addition, back to Figure 2 , the substrate support portion 11 may also include a temperature control module, which is configured to adjust at least one of the electrostatic suction cup 1111, the ring assembly 112 and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are arranged in the ceramic component 1111a of the electrostatic suction cup 1111. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion, which is configured to supply a heat transfer gas to the gap between the back side of the substrate W and the central area 111a.

[0049] The shower head 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlet ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas inlet ports 13c through the gas diffusion chamber 13b. In addition, the shower head 13 includes at least one upper electrode. In addition, the gas inlet portion may also include, in addition to the shower head 13, one or more side gas injection portions (SGI: Side Gas Injector) installed at one or more openings formed in the side wall 10a.

[0050] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may, for example, be a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include at least one flow modulation device for modulating or pulsing the flow of the at least one process gas.

[0051] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a portion of the plasma generating unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential can be generated on the substrate W, thereby attracting ions in the generated plasma toward the substrate W.

[0052] In one embodiment, the RF power supply 31 includes a first RF generator 31a and a second RF generator 31b. The first RF generator 31a is configured to couple with at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generator 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0053] The second RF generating unit 31b is configured to couple with at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the generation source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the generation source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generating unit 31b may also be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in each embodiment, at least one of the generation source RF signal and the bias RF signal may be pulsed.

[0054] Additionally, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to at least one lower electrode and generates a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to at least one upper electrode and generates a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0055] In various embodiments, the first and second DC signals can be pulsed. In this case, a voltage pulse sequence is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have rectangular, trapezoidal, triangular, or a combination thereof pulse waveforms. In one embodiment, a waveform generator for generating the voltage pulse sequence from the DC signal is connected between the first DC generator 32a and the at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute the voltage pulse generator. If the voltage pulse generator comprises the second DC generator 32b and the waveform generator, the voltage pulse generator is connected to the at least one upper electrode. The voltage pulses can have either positive or negative polarity. Furthermore, the voltage pulse sequence can include one or more positive voltage pulses and one or more negative voltage pulses within a single cycle. Furthermore, the first and second DC generators 32a and 32b can be provided together with the RF power supply 31, or the first DC generator 32a can be provided in place of the second RF generator 31b.

[0056] Figure 4 and Figure 5 1 is a timing chart showing an example of the waveforms of the generation source RF signal and the bias DC signal in one embodiment. Figure 4 As shown, the source RF signal and the bias DC signal can each be a pulse wave in which electric pulses appear periodically. The source RF signal can alternately include a period in which the effective value of the electric power (electric power) is high, that is, an H period (a period in which the electric pulse appears), and a period in which the effective value of the electric power is lower than the H period, that is, an L period. During the L period, the effective value of the electric power of the source RF signal can be zero. Figure 5 As shown in FIG, each electric pulse generating the source RF signal can be configured as a continuous wave including RF. Figure 5 As shown, each electrical pulse of the bias DC signal is configured to periodically include a pulse voltage (DC voltage). The pulse voltage can be a negative voltage. Furthermore, the source RF signal can be a continuous wave with RF continuously occurring rather than a pulse wave. Furthermore, the bias DC signal can be a continuous wave with periodic pulse voltage continuously occurring rather than a pulse wave.

[0057] Back to Figure 2 The exhaust system 40 can be connected to a gas outlet 10e provided at the bottom of the plasma processing chamber 10, for example. The exhaust system 40 can include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s can be adjusted using the pressure regulating valve. The vacuum pump can include a turbomolecular pump, a dry pump, or a combination thereof.

[0058] <An Example of Plasma Treatment Method>

[0059] Figure 6 FIG. 1 is a flow chart showing a plasma treatment method according to an exemplary embodiment (hereinafter also referred to as “the present treatment method”). Figure 6 As shown in FIG. 1 , the processing method includes a process ST1 of providing a substrate, a process ST2 of removing scum, a process ST3 of forming a deposited film, and a process ST4 of etching the etching film. The processing in each process can be performed by Figure 1 The plasma processing system and / or Figure 2 Hereinafter, the processing method will be described by taking as an example a case where the control unit 2 controls each unit of the plasma processing apparatus 1 to perform the processing method on the substrate W. In addition, step ST3 may be performed between steps ST1 and ST2.

[0060] (Step ST1: Providing a Substrate)

[0061] In step ST1 , a substrate W is provided in the plasma processing space 10 s of the plasma processing apparatus 1 . The substrate W is provided in the central region 111 a of the substrate support 11 , and is held by the electrostatic chuck 1111 on the substrate support 11 .

[0062] Figure 7 This diagram shows an example of a cross-sectional structure of a substrate W provided in step ST1. The substrate W comprises an etching film EF and a photoresist film PR stacked in this order on a base film UF. The substrate W can be used to manufacture semiconductor devices. Examples of semiconductor devices include semiconductor memory devices such as DRAM and 3D-NAND flash memory.

[0063] In one example, the base film UF is a silicon wafer, an organic film formed on the silicon wafer, a dielectric film, a metal film, a semiconductor film, etc. The base film UF can be formed by stacking a plurality of films.

[0064] The etching film EF is a film different from the base film UF. The etching film EF may be, for example, an organic film, a dielectric film, a semiconductor film, or a metal film. The etching film EF may be composed of a single film or a stack of multiple films. For example, the etching film EF may be composed of a single film, a carbon-containing film, a spin-on-glass (SOG) film, a Si-containing anti-reflection film (SiARC), or the like, or a stack of multiple films.

[0065] The photoresist film PR may be a film containing EUV resist. In one example, the photoresist film PR may be a metal-containing film. In one example, the metal-containing film is a film containing tin. In one example, the photoresist film PR may contain at least one of tin oxide and tin hydroxide. The tin-containing film may contain an organic substance.

[0066] The photoresist film PR has an upper surface TS, a side surface SS continuous from the upper surface TS, and a lower surface in contact with the etching film EF. The photoresist film PR has at least one opening OP. The opening OP is defined by the side surface SS of the photoresist film PR. The opening OP is a space on the etching film EF surrounded by the side surface SS. That is, Figure 7 In FIG, the upper surface of the etching film EF has a portion covered with the photoresist film PR and a portion exposed at the bottom surface BS of the opening OP.

[0067] The opening OP can be seen when looking down at the substrate W (in Figure 7 The photoresist film PR may have any shape (when viewing the substrate W from the top down). This shape may be, for example, a line, a rectangle, a circle, an ellipse, or a combination of one or more thereof. The photoresist film PR may have a plurality of openings OP. The plurality of openings OP may each have a line shape and be arranged at regular intervals to form a line and space (Line & Space) pattern. Alternatively, the plurality of openings OP may each have a hole shape and form an array pattern arranged at regular intervals.

[0068] At least a portion of the side surface SS of the photoresist film PR may have a portion SC extending toward the opening OP. The portion SC may be, for example, a portion SC1 present at the outer edge of the bottom surface BS of the opening OP. For example, in the case where the photoresist film PR forms a Line & Space pattern, the portion SC1 may be a bridge present between two adjacent lines. In addition, the portion SC may be a convex portion SC2 protruding from the side surface SS toward the opening OP in the upper region away from the bottom surface BS in the side surface SS. The portions SC (SC1, SC2) may be residues of the photoresist film PR. The residues may be, for example, remnants of the resist that were not completely removed in the process (e.g., the development process) of forming the opening OP in the mask film MF. In addition to the residues constituting the above-mentioned portion SC, the residues of the photoresist film PR may include, for example, a portion SC3 that is not connected to the side surface SS of the photoresist film PR but is isolated on the bottom surface BS of the opening OP. In addition, the side surface SS of the photoresist film PR may also have recesses (not shown) such as depressions and cracks (including interruptions in patterns such as line patterns).

[0069] Each film constituting the substrate W (underlayer film UF, etching film EF, photoresist film PR) can be formed by CVD, ALD, spin coating, etc. Each of the films may be a flat film or a film having irregularities.

[0070] The opening OP can be formed by patterning by photolithography. In one example, first, a photoresist film containing tin is formed on the etching film EF. Then, the photoresist film is selectively irradiated with light (for example, EUV excimer laser, etc.) using an exposure mask, and a pattern of a shape corresponding to the exposure mask is exposed on the photoresist film. Then, the exposed photoresist film is developed. Thus, a photoresist film PR with an opening OP can be formed. In addition, the opening OP can also be formed by etching the photoresist film PR. Among them, the development can be any one of wet development and dry development.

[0071] In one example, the plasma processing chamber 10 may be part of a developing device that develops the photoresist film PR. Furthermore, at least a portion of the process for forming the various films on the substrate W may be performed within the space of the plasma processing chamber 10. For example, when etching the photoresist film PR to form the opening OP, this process may be performed within the plasma processing chamber 10. Alternatively, after all or a portion of the various films on the substrate W are formed within a device or chamber outside the plasma processing apparatus 1, the substrate W may be introduced into the plasma processing space 10s of the plasma processing apparatus 1 and positioned in the central region 111a of the substrate support 11, thereby providing the substrate.

[0072] (Step ST2: Removal of Residues)

[0073] In step ST2, part SC (hereinafter also referred to as "residue") is removed. The process of removing the residue can be performed as follows. First, a first process gas is supplied from the gas supply unit 20 into the plasma processing space 10s. The first process gas can be appropriately selected according to the types of the photoresist film PR and the etching film EF. In one example, the first process gas may include at least one gas selected from nitrogen (N2) gas, oxygen (O2) gas, hydrogen (H2) gas, and carbon tetrafluoride (CF4) gas. Then, a generation source RF signal is supplied to the upper electrode or the lower electrode. Thus, a high-frequency electric field can be generated in the plasma processing space 10s, and plasma can be generated from the first process gas.

[0074] In addition, a bias DC signal is applied to the lower electrode. In one example, the lower electrode to which the bias DC signal is applied may be the base 1110, the bias electrode 116, or the electrostatic electrode 1111b (see Figure 3In the bias DC signal, the absolute value of the pulse voltage may be 10 to 200 V. Alternatively, the absolute value may be 50 to 150 V. The pulse voltage may be a negative voltage. Furthermore, in the bias DC signal, the frequency of the pulse voltage may be 200 kHz to 2 MHz. Alternatively, the frequency may be 400 kHz to 1 MHz.

[0075] Figure 8 FIG2 is a diagram showing an example of a cross-sectional structure of a substrate W after processing in step ST2. In step ST2, when plasma is generated from the first processing gas, active species in the plasma are attracted to the substrate W by the bias DC signal. Then, using the active species attracted to the substrate W, as shown in FIG2 , Figure 8 As shown, a portion of the photoresist film PR, including residue SC, is removed. In this embodiment, since the active species are attracted to the substrate W using a bias DC signal, variations in the angle of incidence of the active species relative to the substrate W can be suppressed. In one example, the bias DC signal can be used to adjust the angle of incidence of the active species closer to vertical. This can suppress the incidence of active species that are incident obliquely on corners in the cross section of the photoresist film PR, such as the upper portion of the sidewall SS forming the opening OP. Consequently, etching of these corners of the photoresist film PR can be suppressed.

[0076] Furthermore, in step ST2, the photoresist film PR can be selectively etched with respect to the etching film EF. That is, in step ST2, the photoresist film PR can be etched at a higher etching rate than the etching film EF. In one example, the etching selectivity can be 10 or more.

[0077] (Step ST3: Forming a Deposited Film)

[0078] In step ST3, a deposited film DF is formed. First, the second process gas is supplied from the gas supply unit 20 into the plasma processing space 10s. Next, a generation source RF signal is supplied to the upper or lower electrode. This generates a high-frequency electric field within the plasma processing space 10s, generating plasma from the second process gas. A bias signal need not be supplied to the lower electrode of the substrate support 11.

[0079] The second process gas may include a carbon-containing gas. The gas may be carbon monoxide (CO). Alternatively, the gas may be a CH-based gas. The second process gas may also include an inert gas such as a rare gas or N2 gas.

[0080] Figure 9This diagram shows an example of a cross-sectional structure of a substrate W after processing in step ST3. When step ST3 is performed, a deposited film DF is formed on the top surface TS and side surfaces SS of the photoresist film PR. The deposited film DF is a film containing carbon. The deposited film DF can be formed thicker on the top surface TS than on the side surfaces SS of the photoresist film PR. The deposited film DF can be formed almost entirely on the bottom surface BS of the opening OP. Figure 9 The size (eg, diameter, width) of the opening OP in the cross section shown can be smaller than that before the processing in step ST3 .

[0081] In addition, process ST3 may include a process of curing (Cure) the photoresist film PR and / or the deposited film DF. In this process, first, a third process gas is supplied from the gas supply unit 20 to the plasma processing space 10s. In one example, the third process gas may contain rare gases such as hydrogen and argon (Ar) gas. Then, a source RF signal is supplied to the upper electrode or the lower electrode. In addition, a DC voltage (DCS) is applied to the upper electrode. In one example, the DC voltage may be 500 to 1500V. A bias signal may not be supplied to the lower electrode. Through this process, the secondary electrons released from the upper electrode reach the substrate W, thereby curing the photoresist film PR and / or the deposited film DF. Thus, in process ST4 (etching the etching film), the selectivity of the photoresist film PR and / or the deposited film DF relative to the etching film EF can be improved.

[0082] (Step ST4: Etching the Etching Film)

[0083] In step ST4, the etching film EF is etched. First, a fourth process gas is supplied from the gas supply unit 20 into the plasma processing space 10s. The fourth process gas can be selected so that the etching film EF can be etched with sufficient selectivity relative to the photoresist film PR and / or the deposited film DF. Next, a generation source RF signal is supplied to the upper electrode to generate plasma from the fourth process gas. In addition, a bias RF signal or a bias DC signal is supplied to the lower electrode of the substrate support unit 11 to generate a bias potential between the plasma and the substrate W. As a result, the active species in the plasma are attracted to the substrate W, and the etching film EF can be etched using these active species.

[0084] Figure 10 1 is a diagram showing an example of a cross-sectional structure of a substrate W after processing in step ST4. In step ST4, the photoresist film PR and / or the deposited film DF function as a mask, and the etching film EF is etched. Figure 10 As shown, through step ST4 , the recessed portion RC can be formed in the etching film EF based on the shape of the opening OP of the photoresist film PR.

[0085] According to this processing method, it is possible to reduce residue while suppressing the reduction in thickness of the photoresist film PR. This can reduce pattern defects in the photoresist film PR. Furthermore, it is possible to appropriately control the size and shape of the recessed portion RC formed in the etching film EF.

[0086] The embodiments of the present invention also include the following aspects.

[0087] (Note 1)

[0088] A plasma processing method is performed in a plasma processing apparatus having a plasma processing chamber and a substrate support portion disposed in the plasma processing chamber, the plasma processing method comprising:

[0089] a step of placing a substrate on the substrate support portion, wherein the substrate has an etching film and a photoresist film placed on the etching film; and

[0090] A removal process for selectively removing a portion of the photoresist film from the etching film, wherein the removal process includes: a process of generating plasma from a processing gas supplied into the plasma processing chamber; and a process of applying a DC pulse voltage to the substrate support portion.

[0091] (Note 2)

[0092] The plasma processing method according to Supplementary Note 1, wherein the photoresist film is configured to include an EUV resist.

[0093] (Note 3)

[0094] The plasma processing method according to Supplementary Note 2, wherein the EUV resist contains metal.

[0095] (Note 4)

[0096] The plasma processing method according to Supplementary Note 3, wherein the metal is tin (Sn).

[0097] (Note 5)

[0098] The plasma processing method according to Note 1, wherein the processing gas includes at least one gas selected from nitrogen (N2) gas, oxygen (O2) gas, hydrogen (H2) gas and carbon tetrafluoride (CF4) gas.

[0099] (Note 6)

[0100] The plasma processing method according to any one of Supplementary Notes 1 to 5, further comprising: an etching step of etching the etching film using the photoresist film as a mask.

[0101] (Note 7)

[0102] The plasma processing method according to Supplementary Note 6, wherein the etching step includes a step of supplying a bias RF signal to the substrate support portion.

[0103] (Note 8)

[0104] The plasma processing method according to Supplementary Note 6, wherein the etching step includes a step of applying a bias DC signal to the substrate support portion.

[0105] (Note 9)

[0106] The plasma processing method according to any one of Supplementary Notes 1 to 8, wherein the DC pulse voltage is 10 to 200V.

[0107] (Note 10)

[0108] The plasma processing method according to any one of Supplementary Notes 1 to 8, wherein the frequency of the DC pulse voltage is 200 kHz to 2 MHz.

[0109] (Note 11)

[0110] The plasma processing method according to any one of Supplementary Notes 1 to 10, further comprising a step of forming a deposited film on at least a portion of the photoresist film before or after the removal step.

[0111] (Note 12)

[0112] A plasma processing device, comprising:

[0113] plasma processing chamber;

[0114] a substrate support disposed within the plasma processing chamber; and

[0115] Control Department,

[0116] The control unit performs the following control:

[0117] Controlling the placement of a substrate on the substrate support portion, wherein the substrate has an etching film and a photoresist film placed on the etching film; and

[0118] Removal control of selectively removing a portion of the photoresist film from the etching film, wherein the removal control includes: control of generating plasma from a processing gas supplied into the plasma processing chamber, and control of applying a DC pulse voltage to the substrate support portion.

[0119] The above embodiments are described for the purpose of illustration and are not intended to limit the scope of the present invention. The above embodiments can be modified in various ways without departing from the scope and gist of the present invention. For example, a part of the components in one embodiment can be added to other embodiments. In addition, a part of the components in one embodiment can be replaced with corresponding components in other embodiments.

[0120] Description of Reference Signs

[0121] 1 ... plasma processing apparatus, 2 ... control unit, 10 ... plasma processing chamber, 11 ... substrate support unit, DF ... deposited film, EF ... etching film, PR ... photoresist film.

Claims

1. A plasma processing method performed in a plasma processing apparatus having a plasma processing chamber and a substrate support disposed within the plasma processing chamber, the plasma processing method comprising: a step of placing a substrate on the substrate support portion, wherein the substrate has an etching film and a photoresist film placed on the etching film; and A removal process for selectively removing a portion of the photoresist film from the etching film, wherein the removal process includes: a process of generating plasma from a processing gas supplied into the plasma processing chamber; and a process of applying a DC pulse voltage to the substrate support portion.

2. The plasma treatment method according to claim 1, wherein: The photoresist film is configured to include EUV resist.

3. The plasma treatment method according to claim 2, wherein: The EUV resist contains metal.

4. The plasma treatment method according to claim 3, wherein: The metal is tin (Sn).

5. The plasma processing method according to claim 1, wherein: The process gas includes at least one gas selected from nitrogen (N2) gas, oxygen (O2) gas, hydrogen (H2) gas, and carbon tetrafluoride (CF4) gas.

6. The plasma processing method according to any one of claims 1 to 5, characterized in that: Also includes: An etching step of etching the etching film using the photoresist film as a mask.

7. The plasma processing method according to claim 6, wherein: The etching step includes supplying a bias RF signal to the substrate support portion.

8. The plasma processing method according to claim 6, wherein: The etching step includes applying a bias DC signal to the substrate support portion.

9. The plasma processing method according to any one of claims 1 to 5, characterized in that: The DC pulse voltage is 10-200V.

10. The plasma processing method according to any one of claims 1 to 5, characterized in that: The frequency of the DC pulse voltage is 200kHz to 2MHz.

11. The plasma processing method according to claim 1, wherein: Also includes: Before or after the removal step, a deposited film is formed on at least a portion of the photoresist film.

12. A plasma processing device, characterized in that: include: plasma processing chamber; a substrate support portion disposed within the plasma processing chamber; and Control Department, The control unit performs the following control: Controlling the placement of a substrate on the substrate support portion, wherein the substrate has an etching film and a photoresist film placed on the etching film; and Removal control of selectively removing a portion of the photoresist film from the etching film, wherein the removal control includes: control of generating plasma from a processing gas supplied into the plasma processing chamber; and control of applying a DC pulse voltage to the substrate support portion.

Citation Information

Patent Citations

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    JP1998209014A