PCB wiring design method and system considering pulse current fusing effect

Abstract

The invention discloses a PCB wiring design method and system considering a pulse current fusing effect, and relates to the technical field of PCB design. The method comprises the following steps: based on a differential impedance design principle, including design rules of a differential microstrip line and a differential strip line, determining parameters such as the width, the thickness, the line spacing and the medium thickness of a wire so as to meet the impedance value requirement; based on the heat balance equation of the current-carrying conductor, a current conductor heating model and a current-carrying conductor heat dissipation model are established; on the basis of differential impedance design and in combination with the proposed binary particle swarm optimization algorithm, the electromagnetic compatibility factor can be comprehensively considered, the problems of low efficiency and electromagnetic compatibility existing in large-scale wiring design are effectively solved, rapid and accurate design of large-scale wiring can be achieved through an efficient calculation process, and the method is suitable for large-scale wiring design. The design efficiency and quality are remarkably improved, and the design requirement for the routing pulse fusing effect of a high-speed PCB signal is met.

Description

Technical Field

[0001] The present invention relates to the technical field of PCB design, and in particular to a PCB routing design method and system considering the pulse current fusing effect. Background Art

[0002] In PCB design, some scenarios involve transient currents exceeding normal operating currents. This requires margin design for these transient currents to ensure proper operation. During PCB operation, the impact of transient currents on traces can easily cause malfunction or failure. Transient currents typically include short, high-amplitude current pulses generated by circuit switching, sudden load changes, power startup, static electricity, and indirect lightning. The amplitude of these transient currents can be far greater than the normal operating current of the circuit, significantly impacting PCB traces by overheating and thermal performance, inducing electromagnetic interference, and causing voltage drops.

[0003] First, transient currents can cause PCB traces to overheat. Due to the resistance of traces, high currents passing through them generate heat. If transient currents occur frequently or are excessively high, the trace temperature can rise rapidly, exceeding the trace's tolerance limit. This can lead to trace aging, insulation damage, or even short circuits or disconnections. Second, transient currents can cause electromagnetic interference (EMI). Rapidly changing currents generate strong electromagnetic fields that interfere with adjacent signal traces, causing signal distortion and increased noise, impacting circuit operation. This interference can severely affect system performance and stability, especially in high-speed digital and RF circuits. Furthermore, transient currents can cause voltage drop issues. When high transient currents flow through a trace, the trace's resistance causes a significant voltage drop, affecting voltage stability at the load and, in turn, disrupting circuit operation. This voltage fluctuation, particularly in power distribution networks (PDNs), can severely interfere with sensitive analog or digital logic circuits.

[0004] To address these issues, transient currents must be fully considered in PCB design. During design, the potential amplitude and duration of transient currents must be assessed based on the specific application scenario, and trace width, thickness, and material must be appropriately selected to ensure the traces can withstand the thermal and electromagnetic stresses caused by transient currents. Furthermore, appropriate routing strategies, such as increasing the width of power and ground traces, using multilayer PCB designs, and properly placing decoupling capacitors, can effectively reduce the impact of transient currents on PCB traces, thereby ensuring PCB reliability and stability. Currently, the melting effect of pulse currents is primarily considered based on the Preece equation, proposed by W.H. Preece, chief electrical engineer of the British General Post Office in the 1890s. The Preece equation describes the melting current of a circular copper conductor with an outer insulation layer as the model. I is the melting current, d is the diameter of the circular conductor, and K is the conductor coefficient (10244 for copper). However, the Preece equation lacks a time variable. I.M. Onderdonk proposed the Onderdonk equation, which incorporates the time parameter. The general formula is: where T is time, A is the cross-sectional area, and Y is the conductor heating coefficient. However, there is a lack of the relationship between energy and the line width and length of the trace. The paper "Current Carrying Capacity of Copper-clad PCB Traces and Vias" gives the experimental results of traces and through-holes through experimental methods, but does not give detailed calculations, relying on empirical rules. The PCB trace standard, referring to the IPC-2152 standard, provides a corresponding relationship chart of copper foil thickness, line width, current and temperature rise. It is an authoritative basis for engineering design and provides corresponding empirical formulas. It can be used by looking up tables in occasions where the requirements are not high, but it is more cumbersome in the case of large-scale automatic wiring. However, with the development of high-speed signals, the design of PCBs with pulse currents needs to consider the situation of large-scale traces, and how to ensure electromagnetic compatibility caused by pulse currents and other issues. Therefore, the shortcomings of the existing PCB trace design method considering the pulse current fusing effect are summarized as follows:

[0005] Problem 1: In PCB design, pulse current routing often relies on empirical experience, rather than effectively utilizing relevant formulas for accurate calculations. This not only leads to low design efficiency, but also, due to the subjective limitations of experience, makes it difficult to guarantee the accuracy of the design results. This makes it difficult to adapt to complex and changing pulse current scenarios, and it is easy for the designed routing to fail to meet actual requirements.

[0006] Problem 2: When designing large-scale traces, designers must repeatedly consult design specifications and datasheets to determine trace parameters. This process is tedious and time-consuming, and prone to errors due to manual manipulation. Furthermore, traditional table lookup methods only focus on the trace's pulse fusing effects and fail to assess electromagnetic compatibility issues caused by pulse currents. This poses a potential risk and can impact device stability and reliability. Summary of the Invention

[0007] The purpose of the present invention is to provide a PCB trace design method and system considering the pulse current fusing effect, so as to solve the influence of the pulse current on the PCB trace fusing effect and solve the electromagnetic compatibility problem.

[0008] According to a first aspect of the present invention, to achieve the above-mentioned purpose, the present invention provides the following technical solution: a PCB routing design method considering the pulse current fusing effect, comprising the following steps:

[0009] Based on the differential impedance design principles, including the design rules of differential microstrip lines and differential striplines, the trace width, thickness, line spacing, and dielectric thickness parameters are determined to meet the impedance value requirements;

[0010] Based on the thermal balance equation of the current-carrying conductor, a current conductor heating model and a current-carrying wire heat dissipation model are established. The mathematical model of the PCB trace fusing current is calculated using the law of conservation of energy. This model is used to evaluate the trace's thermal response and fusing current under pulse current.

[0011] The binary particle swarm optimization algorithm is used, combined with the binary method and particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current to ensure that the design meets the requirements.

[0012] Furthermore, according to the differential microstrip line design rules, the trace width, thickness, line spacing, and dielectric thickness parameters are determined as follows:

[0013] (21) According to the differential microstrip line characteristic impedance Z given in the IPC design manual w0 Calculation, as shown in formula (1):

[0014]

[0015] Where ε r is the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (1), the microstrip differential impedance value can be calculated as shown in formula (2):

[0016]

[0017] Where s represents the distance between the trace edges within the differential pair, and h represents the distance between the signal trace and the return path.

[0018] (22) Differential microstrip lines should be placed on a uniform reference plane to reduce electromagnetic interference and improve signal stability. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuity and signal reflection.

[0019] (23) At the end of the differential pair, terminal resistors are used to match impedance and reduce signal reflection.

[0020] Furthermore, according to the design rules of differential stripline, the trace width, thickness, line spacing and dielectric thickness parameters are determined as follows:

[0021] (31) Differential stripline characteristic impedance Z d0 Calculation, as shown in formula (3):

[0022]

[0023] Where ε r is the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (3), the calculation of the strip differential impedance value is as shown in formula (4):

[0024]

[0025] Where s represents the distance between the trace edges within the differential pair, and b represents the distance between the reference planes.

[0026] (32) The reference planes on both sides of the differential stripline should be kept intact and continuous to provide effective shielding and stable impedance. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuity and signal reflection.

[0027] (33) At the end of the differential pair, terminal resistors are used to match impedance and reduce signal reflection.

[0028] Furthermore, a current conductor heating model is constructed, and the specific steps are as follows:

[0029] (41) The mathematical model of the current conductor heating Q1 is shown in formula (5):

[0030]

[0031] Where I is the current on the conductor, t is the time, and R is the resistance of the conductor. According to the definition of resistance, we have formula (6):

[0032]

[0033] Where ρ0 is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, θ is the conductor surface temperature, w is the conductor width, T is the copper thickness, and α is the temperature coefficient;

[0034] On this basis, the current conductor heating model formula of PCB traces is shown in (7):

[0035]

[0036] In the formula, p0 is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, θ is the conductor surface temperature, w is the conductor width, and T is the copper thickness.

[0037] Further, a current-carrying wire heat dissipation model is constructed, specifically as follows:

[0038] (51) The heat Q2 consumed by the temperature rise of the wire itself is mathematically modeled as formula (8):

[0039] Q2 = Cm (θ - θ0) (8)

[0040] Where C is the specific heat capacity of the wire, m is the weight of the wire, θ is the conductor surface temperature, and θ0 is the initial temperature of the conductor.

[0041] Considering the temperature of the current-carrying wire radiating outward, i.e., the heat exchange between the wire heating and the surrounding environment, the heat Q3 consumed by the wire heat dissipation is mathematically modeled as formula (9):

[0042] Q3 = K t Aτt = K t MLτt (9)

[0043] Where K t is the comprehensive heat dissipation coefficient of the wire's heat convection, heat conduction, and heat radiation, A is the surface heat dissipation area of the wire, M is the perimeter of the wire, L is the length of the wire, τ is the temperature difference between the wire surface and the environment, and t is time.

[0044] Further, based on the current conductor heating model and the current-carrying wire heat dissipation model, a mathematical model of the PCB trace melting current is established, specifically as follows:

[0045] (61) According to the law of conservation of energy, the energy of the current conductor heating model must be equal to the energy of the current-carrying conductor heat dissipation model, therefore, the thermal equilibrium equation of the current-carrying conductor is formula (10):

[0046] Q1 = Q2 + Q3 (10)

[0047] When a transient pulse current flows through the conductor, since the heat dissipation process cannot keep up with the speed of the heat generated by the current, all the generated heat will be completely used for the temperature rise of the conductor, therefore, the heat dissipation Q3 of the conductor to the outside world is zero, therefore, the heat absorbed by the conductor will directly lead to the temperature rise thereof, then formula 11 is obtained:

[0048]

[0049] (62) Considering that the temperature of the conductor surface will change over time, the differential method is used to calculate the heat Q1 of the heating model and the heat Q2 of the heat dissipation model, and by establishing a differential equation, the change law of the conductor temperature over time is described.

[0050] After sorting out and integrating the differential equation, the conductor surface temperature θ can be derived k The mathematical relationship between the current through the conductor and time is shown in formulas (12), (13) and (14):

[0051]

[0052] Finally, the conductor surface temperature θ is obtained k The relationship between the conductor current I and time is formula (15), which establishes the mathematical model of the PCB trace fusing current:

[0053]

[0054] Where, t k Indicates heating time;

[0055] (63) Set a fusing temperature θ T , and solve the corresponding fusing current I T , the fusing current I T Compare this with the established mathematical model of PCB trace fusing current, comparing I and I T The relationship between the size of the wires is used to determine whether the requirements are met. The calculation of the wire's fusing current is shown in formula (16):

[0056]

[0057] where θ T is the melting temperature, θ0 is the initial temperature of the conductor, h is the dielectric thickness, L is the length of the trace, W is the trace width, and R is the resistance of the wire.

[0058] Furthermore, a bisection particle swarm optimization algorithm is used, combining the bisection method and the particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value, and compare it with the fusing current, as follows:

[0059] (71) Initialize the particle swarm positions X, V, Gbest, Pbest, set the updated regions of X and V, and give the search interval X∈{X:S1=|X i,max -X i,min |i=1,2,…,n}, calculate the function F j =f(X 1,min ,X 2,min ,…,X j,max ,…,X n,max ), where j = 1, 2, ..., n;

[0060] (72) Select the minimum value F i =min(F1,F2,…,F n ), that is, F i =f(X 1,min ,X 2,min ,…,X i,max );

[0061] (73) Combined with the solution of the differential impedance with the set minimum function, the differential impedance error is set to 5% for iteration, and the parameter X is set by dichotomy according to formula (18) and formula (19):

[0062] X∈{X:X i,max =|X i,max -X i,min | / 2,X i,min =X i,min} (18)

[0063] X∈{X:X i,min =|X i,max -X i,min | / 2,X i,max =X i,max} (19)

[0064] (74) Judgment: Set the error e to 5%, if F i <e,进行更新Gbest,Pbest,若F i >e, then continue iteration;

[0065] If iter>iterMax, or Gbest>Gbestmax, then exit the calculation.

[0066] Furthermore, the line width w is used as X in the bisection particle swarm optimization algorithm for iterative operation.

[0067] According to a second aspect of the present invention, a PCB trace design system considering the pulse current fusing effect is provided, which is used to implement the PCB trace design method considering the pulse current fusing effect described in the first aspect, comprising:

[0068] A design module is used to determine the trace width, thickness, trace spacing, and dielectric thickness parameters based on differential impedance design principles, including differential microstrip and differential stripline design rules, to meet impedance requirements.

[0069] The model building module is used to establish the current conductor heating model and the current-carrying wire heat dissipation model based on the thermal balance equation of the current-carrying conductor. The mathematical model of the PCB trace fusing current is calculated by the law of conservation of energy. It is used to evaluate the thermal response and fusing current of the trace under pulse current.

[0070] The calculation module is used to use the bisection particle swarm optimization algorithm, combined with the bisection method and particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current to ensure that the design meets the requirements.

[0071] According to a third aspect of the present invention, the present invention provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and capable of running on the processor. When the processor loads and executes the computer program, a PCB routing design method considering the pulse current fusing effect described in the first aspect is adopted.

[0072] The present invention has at least the following beneficial effects:

[0073] 1. This patented invention is based on differential impedance design and combines the proposed bisection particle swarm optimization algorithm. It not only comprehensively considers electromagnetic compatibility factors and effectively solves the inefficiency and electromagnetic compatibility problems in large-scale routing design, but also realizes the fast and accurate design of large-scale routing through an efficient calculation process, significantly improving design efficiency and quality, and meeting the routing pulse fusing effect design requirements of high-speed PCB signals.

[0074] 2. Through theoretical analysis, this invention comprehensively considers the relationship between trace energy, radiation energy and pulse instantaneous energy, establishes a detailed mathematical model, and conducts rigorous formula derivation. This allows the trace parameters under pulse current to be accurately calculated based on the formula, ensuring the scientificity and reliability of the design results. This provides a mathematical model for the design that considers the pulse fusing effect of PCB traces.

[0075] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0076] Figure 1 Schematic diagram of the process of the PCB routing design method of the present invention;

[0077] Figure 2 This is an example diagram of a differential microstrip line and a differential stripline in the first embodiment of the present invention;

[0078] Figure 3 Schematic diagram of the process of the bisection particle swarm optimization algorithm in Example 1 of the present invention;

[0079] Figure 4 This is an example of the algorithm iteration code in Example 1 of the present invention. DETAILED DESCRIPTION

[0080] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present disclosure.

[0081] Example 1:

[0082] See also Figure 1 The present invention provides a technical solution: a PCB routing design method considering the pulse current fusing effect, comprising the following steps:

[0083] S1. PCB trace impedance design principles: Based on the differential impedance design principles, including the design rules of differential microstrip lines and differential striplines, determine trace width, thickness, trace spacing, and dielectric thickness to meet impedance requirements.

[0084] This embodiment takes the differential impedance design principle as the core and introduces the key elements of PCB trace design in detail. Differential traces are mainly divided into two types: microstrip differential lines and strip differential lines. In PCB design, transmission lines are mainly divided into two types: microstrip lines (Microstripline) and strip lines (Stripline). The two differential microstrip line model diagrams are shown in the attached figure. Figure 2 As shown;

[0085] S1-1 Differential Microstrip Line Design Rules

[0086] In high-speed PCB design, differential microstrip traces must adhere to a series of precise rules to ensure signal integrity and electromagnetic compatibility. First, the spacing between the two conductors in a differential microstrip pair should be kept constant, with a typical value of 0.1mm to 0.3mm, to maintain a stable differential microstrip impedance. The line width affects the differential impedance and should be determined based on the desired impedance and material properties. The thickness of the dielectric layer also affects the differential impedance, with thicker dielectric layers resulting in lower impedance. The mechanical strength and cost of the PCB must also be considered. The differential impedance is a key design parameter, typically between 50Ω and 100Ω, and can be precisely controlled by adjusting the line width, line spacing, and dielectric thickness.

[0087] According to the IPC design manual, the differential microstrip line characteristic impedance Z is given w0 Calculation, as shown in formula (1):

[0088]

[0089] where ε ris the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (1), the microstrip differential impedance value can be calculated as shown in formula (2):

[0090]

[0091] Where s represents the distance between the trace edges within the differential pair, and h represents the distance between the signal trace and the return path, as shown in the attached figure. Figure 2 As shown;

[0092] In addition, differential microstrip lines should be located on a uniform reference plane to reduce electromagnetic interference and improve signal stability. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuities and signal reflections.

[0093] At the end of the differential pair, appropriate terminal resistors should be used to match impedance and reduce signal reflections. Following these design rules can ensure the performance and reliability of differential microstrip lines in high-speed PCB design.

[0094] S1-2. Differential Stripline Design Rules

[0095] In high-speed PCB design, differential stripline and differential microstrip designs have similarities, but there are also significant differences. Differential stripline consists of two parallel conductors, which are sandwiched between two reference planes (usually ground planes). This structure provides better shielding and reduces electromagnetic interference, while differential microstrip has only one reference plane, which is one side of the dielectric substrate. In differential stripline design, the line spacing should be kept constant to maintain stable differential impedance. The choice of line width affects the impedance value and needs to be accurately calculated based on the target impedance value. The thickness of the dielectric layer has a greater impact on the impedance of the differential stripline. A thinner dielectric layer will result in higher impedance. The design needs to balance impedance control and the mechanical strength of the PCB. Differential impedance is a key parameter in the design, usually between 50Ω and 100Ω. It can be precisely controlled by adjusting the line width, line spacing, and dielectric thickness.

[0096] According to the IPC design manual, the differential stripline characteristic impedance Z is given d0 Calculation, as shown in formula (3):

[0097]

[0098] where ε r is the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (3), the calculation of the strip differential impedance value is as shown in formula (4):

[0099]

[0100] Where s represents the distance between the trace edges within the differential pair, and b represents the distance between the reference planes, as shown in the attached figure. Figure 2 As shown;

[0101] In addition, the reference planes on both sides of the differential stripline should remain intact and continuous to provide effective shielding and stable impedance. Any interruption or discontinuity may cause signal distortion and impedance mismatch. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuity and signal reflection.

[0102] At the end of the differential pair, appropriate terminal resistors should be used to match impedance and reduce signal reflections. Following these design rules can ensure the performance and reliability of differential stripline in high-speed PCB design while providing better signal integrity and electromagnetic compatibility;

[0103] S2. Establish a mathematical model for PCB trace fusing current: Based on the thermal balance equation for current-carrying conductors, a heating model for current-carrying conductors and a heat dissipation model for current-carrying wires are established. The mathematical model for PCB trace fusing current is derived by solving the law of conservation of energy. This model is used to evaluate the trace's thermal response and fusing conditions under pulsed current.

[0104] In PCB design, the impact of pulse current on PCB trace fusing needs to be considered, as it is directly related to the reliability and safety of the PCB. This embodiment establishes a mathematical model for PCB trace fusing current. This model can accurately describe the complex relationship between the heat generated by the current on the conductor, the heat consumed by the conductor's own temperature rise, and the heat dissipated by the conductor. Establishing this model is crucial for predicting and evaluating the behavior of traces under extreme current conditions. Through this mathematical model, the thermal response of the trace under different current conditions can be predicted during the design phase, thereby avoiding trace fusing or damage due to overheating. This is of great significance for ensuring circuit stability under various operating conditions and extending the service life of the PCB. This embodiment uses the thermal balance equation of the current-carrying conductor to build a mathematical model for PCB trace fusing current.

[0105] S2-1 Establishment of current conductor heating model

[0106] The current conductor heating model is described according to Joule's law, that is, there is a relationship between the heat generated in the conductor and the current, resistance and time t. In this embodiment, considering the actual situation, the resistance of the conductor will change with the increase of temperature, and the relationship between the temperature coefficient of resistance and the initial temperature of the conductor is considered. In order to more accurately describe the heating process of the conductor, a current conductor heating model is established. The resistance of the conductor in the model established in this embodiment depends not only on the material and geometry, but also on the temperature. By introducing temperature-related resistance changes, the heat generation of the conductor at different temperatures can be more accurately calculated. Then, the mathematical model of the current conductor heating Q1 is shown in formula (5):

[0107]

[0108] Where I is the current on the conductor, t is the time, and R is the resistance of the conductor. According to the definition of resistance, we have formula (6):

[0109]

[0110] Where ρ0 is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, θ is the conductor surface temperature, w is the conductor width, T is the conductor thickness, and α is the temperature coefficient. On this basis, the current conductor heating model formula of the PCB trace is obtained as shown in (7):

[0111]

[0112] Where, is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, is the conductor surface temperature, w is the conductor width, and T is the copper thickness;

[0113] S2-2 Establishment of heat dissipation model for current-carrying wires

[0114] This embodiment proposes a method for establishing a heat dissipation model for a current-carrying conductor. The model comprehensively considers key factors such as the conductor's heat capacity, thermal conductivity, and heat exchange with the surrounding environment. The model proposed in this embodiment takes into account the heat consumed by the conductor's own temperature rise and the heat consumed by the conductor's heat dissipation. These two parameters are crucial for evaluating the thermal stability of the conductor when carrying current. When establishing a mathematical model of the PCB trace fusing current, it is necessary to consider the influence of the heat dissipation of the current-carrying conductor. By accurately calculating the temperature change and heat dissipation efficiency of the conductor under the action of current, it can provide important thermal management guidance for PCB design. The conductor's own temperature rise requires heat consumption. This embodiment provides a mathematical model for the heat Q2 consumed by the conductor's own temperature rise based on the conductor's specific heat capacity and the heat exchange with the surrounding environment, as shown in Formula (8):

[0115] Q2=Cm(θ-θ0) (8)

[0116] Where C is the specific heat capacity of the conductor, m is the weight of the conductor, θ is the surface temperature of the conductor, and θ0 is the initial temperature of the conductor. This embodiment considers the temperature radiated outward by the current-carrying conductor, that is, the heat exchange between the conductor and the surrounding environment, and gives the mathematical model of the heat Q3 consumed by the conductor as shown in formula (9):

[0117] Q3=K t Aτt=K t MLτt (9)

[0118] where K tis the comprehensive heat dissipation coefficient of the wire (the comprehensive coefficient of heat convection, heat conduction and heat radiation), A is the surface heat dissipation area of ​​the wire (excluding the cross section), M is the circumference of the wire, L is the length of the wire, τ is the difference between the surface temperature of the wire and the ambient temperature, and t is the time;

[0119] S2-3 Establishment of mathematical model for PCB trace fuse current

[0120] In PCB design, it is crucial to ensure that the traces can withstand the expected maximum current without melting. This involves accurate mathematical modeling of the melting current of the PCB traces. According to the law of conservation of energy, the energy of the current conductor heating model must be equal to the energy of the current-carrying conductor heat dissipation model. This principle is the basis for establishing the mathematical model of the melting current of the PCB traces. According to steps S2-1 and S2-2, the mathematical model of the melting current of the PCB traces is established. According to the law of conservation of energy, the thermal balance equation of the current-carrying conductor is obtained, such as formula (10):

[0121] Q1=Q2+Q3 (10)

[0122] When a transient pulse current flows through a conductor, the heat dissipation process cannot keep up with the speed of heat generated by the current. Therefore, all the generated heat will be completely used to increase the temperature of the conductor. In this embodiment, it is assumed that the heat dissipation Q3 of the conductor to the outside is approximately zero. Therefore, the heat absorbed by the conductor will directly lead to the increase of its temperature. Then, formula (11) is obtained:

[0123]

[0124] Considering that the surface temperature of the conductor will change over time, this embodiment uses a differential method to calculate the heat Q1 of the heating model and the heat Q2 of the heat dissipation model;

[0125] By establishing a differential equation to describe the change of conductor temperature over time, and after sorting and integrating the differential equation, the conductor surface temperature θ can be derived k The mathematical relationship between the current through the conductor and time is derived as shown in formulas (12), (13) and (14):

[0126]

[0127] Finally, the conductor surface temperature θ is obtained k The relationship between the current I flowing through the conductor and time is formula (15):

[0128]

[0129] Where, t k Indicates the heating time; at this point, the mathematical model of the PCB trace fusing current is completed;

[0130] When the temperature of the trace exceeds the melting point of its material, the trace will melt, so a melting temperature θ needs to be set. T , and solve the corresponding fusing current I T , and compare it with the mathematical model of PCB trace fusing current established in this embodiment, and compare I and I T The relationship between the size of the wires is used to determine whether the requirements are met. The fuse condition equation of the wire is shown in formula (16):

[0131]

[0132] where θ T is the melting temperature, θ0 is the initial temperature of the conductor, h is the dielectric thickness, L is the length of the trace, W is the trace width, and R is the resistance of the conductor;

[0133] S3. Bisection-PSO Algorithm Based on the Fuse Current Model: This algorithm uses a bisection particle swarm optimization algorithm, combining bisection and particle swarm optimization algorithms, to rapidly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value, and compare it with the fusing current to ensure that the design meets requirements.

[0134] This embodiment uses a binary search particle swarm optimization algorithm to quickly solve the pulse current of the differential transmission line. This algorithm combines the efficiency of binary search and the global search capability of particle swarm optimization, aiming to find the optimal differential impedance value that meets the electromagnetic compatibility requirements. During the algorithm iteration process, the possible range of differential impedance is first gradually narrowed using the binary search method to determine the critical impedance value at which the line may melt under the pulse current; then, the particle swarm optimization algorithm further searches within this range, finding the optimal solution by simulating the social behavior of bird flocks, that is, the design method of the optimal impedance value that meets the electromagnetic compatibility, and calculates the maximum tolerable pulse current value, which is compared with the melting current I T Compare and see whether the requirements are met;

[0135] This method not only improves solution efficiency but also can handle complex problems in large-scale routing design, providing a fast and accurate pulse current evaluation tool for high-speed PCB design.

[0136] S3-1 Particle Swarm Optimization

[0137] Particle Swarm Optimization (PSO) algorithm is an efficient random search global optimization method, which has attracted widespread attention for its advantages such as simple implementation, high accuracy and fast convergence. In this algorithm, the search space is defined as d-dimensional, the population consists of N particles, and the position of each particle is represented by a d-dimensional vector X. i =(x i1 ,x i2,…,x id ) speed; the position of each particle represents a potential solution to the problem being solved, and the quality of the solution is evaluated by the value of the fitness function; the fitness function is usually closely related to the objective function of the problem and needs to be designed according to the specific problem; each particle always tracks two target values ​​during the search, namely the best historical solution found by itself and the best historical solution found by other particles in the group (or neighborhood), and updates its position based on these two values; the speed of the i-th particle is expressed as: V i =(v i1 ,v i2 ,…,v id ), the best historical point experienced by the i-th particle is expressed as The global optimal point within a group (or neighborhood) is expressed as: The position and velocity of the particle change according to the following equations (17):

[0138]

[0139] in is the velocity of particle i in the jth dimension at the kth iteration; is the j-dimensional value of the global optimal solution of the k-th iteration; ω is the non-negative inertia weight; C1 and C2 are acceleration factors, r1 and r2 are pseudo-random values ​​with uniform distribution between 0 and 1; the acceleration factors C1 and C2 play a vital role in the PSO algorithm. They are used to adjust the step size of the particle flying to its own optimal position and the group's optimal position respectively. These two parameters not only determine the particle's motion trajectory in the search space, but also reflect the degree of information exchange between the particle's individual experience and the experience of other particles.

[0140] By adjusting C1 and C2, we can balance the particles' exploration of their own historical best positions and the global best positions, thereby affecting the algorithm's convergence speed and the diversity of solutions. Appropriate parameter settings can promote effective information sharing between particle swarms, accelerate the search process, and improve the algorithm's ability to find the global optimal solution.

[0141] S3-2 Bisection Method–PSO Algorithm

[0142] The particle swarm optimization algorithm has been widely used in many optimization problems due to its excellent global search capabilities and simple implementation. However, the algorithm has a certain degree of randomness in the iterative process, which may result in a long computing time when pursuing a high-precision solution. To overcome this challenge, the patent of this invention introduces the dichotomy method into the iterative process of the PSO algorithm. Through this method, the algorithm's search strategy is transformed from the traditional blind search to a more planned and goal-oriented search; the introduction of the dichotomy method enables the algorithm to more accurately locate the area where the optimal solution is located, thereby significantly improving the search efficiency and accuracy and shortening the convergence time. This hybrid method that combines random search and deterministic search strategies not only retains the advantages of the PSO algorithm in global search, but also enhances its convergence speed and solution accuracy for specific problems.

[0143] The specific steps of the binary-PSO algorithm are as follows:

[0144] Initialize the particle swarm position X, V, Gbest, Pbest, set the updated X and V areas, and give the search interval X∈{X:S1=|X i,max -X i,min |i=1,2,…,n}, calculate the function F j =f(X 1,min ,X 2,min ,…,X j,max ,…,X n,max ), where j = 1, 2, ..., n; select the minimum value F i =min(F1,F2,…,F n ), that is, F i =f(X 1,min ,X 2,min ,…,X i,max );

[0145] Combined with the set minimum function for solving the differential impedance, the differential impedance error is generally set to 5% for iteration, and the parameter X is set by dichotomy according to formula (18) and formula (19);

[0146] X∈{X:X i,max =|X i,max -X i,min | / 2,X i,min =X i,min} (18)

[0147] X∈{X:X i,min =|X i,max -X i,min | / 2,X i,max =X i,max} (19)

[0148] Judgment: set error e, the patent sets 5%, if F i <e, update Gbest, Pbest, if F i >e, continue iteration. If iter>iterMax, or Gbest>Gbestmax, exit calculation. The patent adopts line width w as X in the bisection-PSO algorithm for iterative operation, as shown in the attached Figure 3 Figure is a flow chart of the bisection-PSO algorithm.

[0149] Based on Figure 4 After iterative calculation by the program, the output copper thickness is 2.00 oz, the differential impedance value is 100.04Ω, and the relative error is 0.04%, which meets the requirements.

[0150] In summary, the present application considers the influence of pulse current on normal lines in various environments, takes into account the influence of electromagnetic compatibility during design, and reduces the signal transmission problem of high-speed PCBs. The design of the bisection particle swarm optimization algorithm in the present application can speed up the design progress based on the consideration of PCB electromagnetic compatibility design. The bisection particle swarm optimization algorithm proposed in the present application is based on the differential line design principle. First, the size of the trace is determined by bisection method, and then the optimal differential line solution is found by particle swarm algorithm to ensure that the differential impedance error is strictly controlled within 5%. This process realizes fast iteration and calculates the optimal solution, thereby significantly improving the design efficiency. The present application comprehensively considers the mutual relationship among trace energy, radiation energy and pulse transient energy, and establishes a detailed mathematical model. The proposed bisection particle swarm optimization algorithm effectively solves the low efficiency and electromagnetic compatibility problems existing in large-scale trace design.

[0151] Example two:

[0152] The present application provides a PCB trace design system considering the pulse current melting effect, which is used to realize the PCB trace design method considering the pulse current melting effect described in example one, comprising:

[0153] The design module is used to determine the width, thickness, line spacing and dielectric thickness parameters of the trace based on the differential impedance design principle, including the design rules of differential microstrip line and differential stripline, to meet the impedance value requirement.

[0154] The model construction module is used to establish the current conductor heating model and the current-carrying conductor heat dissipation model based on the heat balance equation of the current-carrying conductor, and calculate the mathematical model of the PCB trace melting current by the law of conservation of energy, which is used to evaluate the thermal response and melting current of the trace under pulse current.

[0155] The calculation module is used to use the bisection particle swarm optimization algorithm, combined with the bisection method and particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current to ensure that the design meets the requirements.

[0156] Example 3:

[0157] The present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor. The memory stores the computer program capable of running on the processor. When the processor loads and executes the computer program, a PCB routing design method considering the pulse current fusing effect described in Example 1 is adopted.

[0158] It should be noted that the terminal device can be a computer device such as a desktop computer, a laptop computer or a cloud server, and the terminal device includes but is not limited to a processor and a memory. For example, the terminal device can also include input and output devices, network access devices and buses, etc.

[0159] Furthermore, the processor may adopt a central processing unit (CPU). Of course, depending on the actual usage, other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. may also be adopted. The general-purpose processor may adopt a microprocessor or any conventional processor, etc., and this application does not impose any restrictions on this.

[0160] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0161] For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances. When an element is referred to as being "assembled on", "installed on", "fixed on" or "set on" another element, it can be directly on the other element or there can be a central element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there can be a central element at the same time. The terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used herein are for illustrative purposes only and are not intended to be the only embodiment.

[0162] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

[0163] Throughout this specification, references to terms such as "one embodiment," "example," or "specific example" indicate that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Claims

1. A PCB routing design method considering the pulse current fusing effect, characterized in that: The following steps are involved: Based on the differential impedance design principles, including the design rules of differential microstrip lines and differential striplines, the trace width, thickness, line spacing, and dielectric thickness parameters are determined to meet the impedance value requirements; Based on the thermal balance equation of the current-carrying conductor, a current conductor heating model and a current-carrying wire heat dissipation model are established. The mathematical model of the PCB trace fusing current is calculated using the law of conservation of energy. This model is used to evaluate the trace's thermal response and fusing current under pulse current. The binary particle swarm optimization algorithm is used, combined with the binary method and particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current to ensure that the design meets the requirements.

2. The PCB routing design method considering the pulse current fusing effect according to claim 1, characterized in that: According to the differential microstrip line design rules, the trace width, thickness, line spacing, and dielectric thickness parameters are determined as follows: (21) According to the differential microstrip line characteristic impedance Z given in the IPC design manual w0 Calculation, as shown in formula (1): Where ε r is the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (1), the microstrip differential impedance value can be calculated as shown in formula (2): Where s represents the distance between the trace edges within the differential pair, and h represents the distance between the signal trace and the return path. (22) Differential microstrip lines should be placed on a uniform reference plane to reduce electromagnetic interference and improve signal stability. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuity and signal reflection. (23) At the end of the differential pair, terminal resistors are used to match impedance and reduce signal reflection.

3. The PCB routing design method considering the pulse current fusing effect according to claim 2, characterized in that: According to the design rules of differential stripline, the width, thickness, line spacing and dielectric thickness parameters of the trace are determined as follows: (31) Differential stripline characteristic impedance Z d0 Calculation, as shown in formula (3): Where ε r is the dielectric constant, T is the copper thickness, and w is the trace width. Based on formula (3), the calculation of the strip differential impedance value is as shown in formula (4): Where s represents the distance between the trace edges within the differential pair, and b represents the distance between the reference planes. (32) The reference planes on both sides of the differential stripline should be kept intact and continuous to provide effective shielding and stable impedance. Avoid right-angle routing and use 45-degree angles or arc transitions to reduce impedance discontinuity and signal reflection. (33) At the end of the differential pair, terminal resistors are used to match impedance and reduce signal reflection.

4. The PCB routing design method considering the pulse current fusing effect according to claim 3, characterized in that: Construct a current conductor heating model. The specific steps are as follows: (41) The mathematical model of the current conductor heating Q1 is shown in formula (5): Where I is the current on the conductor, t is the time, and R is the resistance of the conductor. According to the definition of resistance, we have formula (6): Where ρ0 is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, θ is the conductor surface temperature, w is the conductor width, T is the copper thickness, and α is the temperature coefficient; On this basis, the current conductor heating model formula of PCB traces is shown in (7): Where ρ0 is the resistivity of the conductor, L is the conductor length, S is the conductor cross-sectional area, θ is the conductor surface temperature, w is the conductor width, and T is the copper thickness.

5. The PCB routing design method considering the pulse current fusing effect according to claim 4, characterized in that: Construct a heat dissipation model for current-carrying wires as follows: (51) The mathematical model of the heat Q2 consumed by the temperature rise of the conductor itself is as shown in formula (8): Q2=Cm(θ-θ0) (8) Where C is the specific heat capacity of the conductor, m is the weight of the conductor, θ is the surface temperature of the conductor, and θ0 is the initial temperature of the conductor; Considering the temperature radiated outward by the current-carrying conductor, that is, the heat exchange between the conductor and the surrounding environment, the mathematical model of the heat dissipated by the conductor Q3 is given as formula (9): Q3=K t Aτt=K t MLτt (9) where K t It is the comprehensive heat dissipation coefficient of the conductor's heat convection, heat conduction and heat radiation. A is the surface heat dissipation area of ​​the conductor, M is the circumference of the conductor, L is the length of the conductor, τ is the difference between the conductor surface temperature and the ambient temperature, and t is time.

6. The PCB routing design method considering the pulse current fusing effect according to claim 1, characterized in that: Based on the current conductor heating model and the current-carrying wire heat dissipation model, a mathematical model of PCB trace fusing current is established, as follows: (61) According to the law of conservation of energy, the energy of the current conductor heating model must be equal to the energy of the current-carrying conductor heat dissipation model. Therefore, the thermal balance equation of the current-carrying conductor is as follows: Q1=Q2+Q3 (10) When a transient pulse current flows through a conductor, the heat dissipation process cannot keep up with the speed at which the current generates heat. All the heat generated will be completely used to increase the temperature of the conductor. Therefore, the heat dissipation Q3 of the conductor to the outside world is zero. Therefore, the heat absorbed by the conductor will directly lead to the increase in its temperature. Formula 11 is: (62) Considering that the surface temperature of the conductor will change with the passage of time, the differential method is used to calculate the heat Q1 of the heating model and the heat Q2 of the heat dissipation model. By establishing differential equations, the change law of the conductor temperature with time is described; After sorting out and integrating the differential equation, the conductor surface temperature θ can be derived k The mathematical relationship between the current through the conductor and time is shown in formulas (12), (13) and (14): Finally, the conductor surface temperature θ is obtained k The relationship between the conductor current I and time is formula (15), which establishes the mathematical model of the PCB trace fusing current: Where, t k Indicates heating time; (63) Set a fusing temperature θ T , and solve the corresponding fusing current I T , the fusing current I T Compare this with the established mathematical model of PCB trace fusing current, comparing I and I T The relationship between the size of the wires is used to determine whether the requirements are met. The calculation of the wire's fusing current is shown in formula (16): where θ T is the melting temperature, θ0 is the initial temperature of the conductor, h is the dielectric thickness, L is the length of the trace, W is the trace width, and R is the resistance of the wire.

7. The PCB routing design method considering the pulse current fusing effect according to claim 6, characterized in that: The bisection particle swarm optimization algorithm is used, combined with the bisection method and the particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current, as follows: (71) Initialize the particle swarm positions X, V, Gbest, Pbest, set the updated regions of X and V, and give the search interval X∈{X:S1=|X i,max -X i,min |i=1,2,…,n}, calculate the function F j =f(X 1,min ,X 2,min ,…,X j,max ,…,X n,max ), where j = 1, 2, ..., n; (72) Select the minimum value F i =min(F1,F2,…,F n ), that is, F i =f(X 1,min ,X 2,min ,…,X i,max ); (73) Combined with the solution of the differential impedance with the set minimum function, the differential impedance error is set to 5% for iteration, and the parameter X is set by dichotomy according to formula (18) and formula (19): X∈{X:X i,max =|X i,max -X i,min | / 2,X i,min =X i,min } (18) X∈{X:X i,min =|X i,max -X i,min | / 2,X i,max =X i,max } (19) (74) Judgment: Set the error e to 5%. If F i < e, update Gbest and Pbest. If F i > e, continue the iteration; If iter>iterMax, or Gbest>Gbestmax, then exit the calculation.

8. The PCB routing design method considering the pulse current fusing effect according to claim 7, characterized in that: The line width w is used as X in the binary particle swarm optimization algorithm for iterative calculation.

9. A PCB routing design system considering pulse current fusing effect, used to implement a PCB routing design method considering pulse current fusing effect according to any one of claims 1 to 8, characterized in that: include: A design module is used to determine the trace width, thickness, trace spacing, and dielectric thickness parameters based on differential impedance design principles, including differential microstrip and differential stripline design rules, to meet impedance requirements. The model building module is used to establish the current conductor heating model and the current-carrying wire heat dissipation model based on the thermal balance equation of the current-carrying conductor. The mathematical model of the PCB trace fusing current is calculated by the law of conservation of energy. It is used to evaluate the thermal response and fusing current of the trace under pulse current. The calculation module is used to use the bisection particle swarm optimization algorithm, combined with the bisection method and particle swarm optimization algorithm, to quickly solve the pulse current of the differential transmission line, determine the optimal differential impedance value that meets the electromagnetic compatibility requirements, calculate the maximum tolerable pulse current value and compare it with the fusing current to ensure that the design meets the requirements.

10. A terminal device comprising a memory, a processor, and a computer program stored in the memory and capable of running on the processor, characterized in that: When the processor loads and executes the computer program, the PCB routing design method considering the pulse current fusing effect according to any one of claims 1 to 8 is adopted.

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