High-efficiency energy-saving inverter control method based on distributed data processing architecture

Abstract

The invention discloses an efficient and energy-saving inverter control method based on a distributed data processing architecture, which relates to the technical field of electronics, and comprises the following steps: synchronously acquiring system operation parameters of an inverter in a preset sampling period, and storing the system operation parameters into double buffer areas; calculating a real-time load rate of the communication processing unit CSU in a set time, triggering a task allocation flag to set, performing data processing task division according to a task allocation flag state, and obtaining system operation parameters in a second buffer area to perform distributed parallel data processing; and generating an optimization control instruction by using a distributed parallel data processing result, and sending the optimization control instruction to a power control module through a DMA channel to perform optimization control of the inverter. According to the invention, the overall response speed can be improved, the load of a single processor is reduced, the control precision of the inverter is ensured, the dual optimization of the control efficiency and the energy consumption is realized, and the practical value and the popularization prospect are remarkable.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a high-efficiency energy-saving inverter control method based on a distributed data processing architecture. Background Art

[0002] With the rapid expansion of renewable energy grid integration and the deepening application of power electronics technology, high-efficiency and energy-saving inverters have become a key component of distributed power generation systems and energy storage devices. Traditional inverter control often relies on a single processor to sequentially execute multiple computational tasks. With increasing requirements for sampling frequency, power density, and reliability, single-processor architectures are gradually facing bottlenecks in real-time performance, parallelism, and resource utilization. Furthermore, with the increasing number of complex operating conditions such as grid frequency fluctuations, load disturbances, and device temperature drift, inverter control systems are facing the challenge of higher algorithm throughput and lower latency. Industry scholars have proposed various improvement approaches, including heterogeneous collaboration between multi-core DSPs and FPGAs, task priority scheduling, and DMA-based data transfer acceleration. However, these approaches often focus on hardware expansion or algorithm optimization of computing units, while neglecting the overall architectural design of the control system for data acquisition and processing flows. More importantly, the lack of a mature distributed data management solution hinders the simultaneous acquisition and real-time distribution of all system parameters at high sampling rates (e.g., 50μs), which still faces challenges such as memory conflicts, task contention, and uneven load distribution.

[0003] While existing technologies meet the core control requirements of inverters, they often sacrifice energy consumption or increase hardware costs. For example, some solutions increase processing power by increasing the MCU's main frequency or adding auxiliary DSPs. However, due to inefficient task scheduling and data transmission mechanisms, the system is still prone to data frame loss, reduced real-time performance, and even lagging protection mechanisms under high load. Summary of the Invention

[0004] The present invention is proposed in view of the problems existing in the existing high-efficiency and energy-saving inverter control method based on a distributed data processing architecture. Therefore, the problem to be solved by the present invention is how to provide a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0006] In a first aspect, the present invention provides a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture, comprising synchronously collecting system operating parameters of the inverter within a preset sampling period and storing the system operating parameters in a double buffer; the double buffer comprises a first buffer for writing data and a second buffer for reading data;

[0007] Calculate the real-time load rate of the communication processing unit CSU within the set time, trigger the task allocation flag to be set, divide the data processing tasks according to the task allocation flag status, obtain the system operation parameters in the second buffer for distributed parallel data processing;

[0008] The distributed parallel data processing results are used to generate optimized control instructions, which are sent to the power control module through the DMA channel for optimized control of the inverter.

[0009] As a preferred solution of the high-efficiency and energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the system operating parameters include AC side voltage, AC side current, IGBT junction temperature and grid frequency.

[0010] As a preferred solution of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the calculation of the real-time load rate of the communication processing unit CSU within a set time includes:

[0011] At the end of each time window, the processing time t of each category of tasks is counted i , calculate the weighted cumulative processing time, the formula is:

[0012]

[0013] Where, is the weighted cumulative processing time, N is the total number of task categories, t i is the cumulative processing time of the i-th task in the window, w i is the priority weight of the i-th task, and

[0014] The instantaneous load rate is calculated using the formula:

[0015]

[0016] Where, L i is the instantaneous load rate of the i-th task, T w is the time window length;

[0017] Introducing the exponential smoothing parameter α∈(0,1), the instantaneous load rate calculated in this window is combined with the last smoothing result to obtain the smoothed real-time load rate. The formula is:

[0018] L exp (k) = αL i (k)+(1-α)L exp (k-1)

[0019] Where, k represents the kth calculation, L i(k) is the instantaneous load rate calculated k times, L exp (k) is the smoothed real-time load rate calculated for the kth time;

[0020] The smoothed real-time load rate is compared with the preset load threshold to decide whether to perform distributed task allocation.

[0021] As a preferred solution of the high-efficiency and energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the data processing task division according to the task allocation flag status includes:

[0022] When the smoothed real-time load rate is less than the preset load threshold, the task allocation flag F1 is set to 1, entering the low-load state and performing distributed task allocation; otherwise, F1 is kept at 0 and the system maintains the current priority.

[0023] Under low load conditions, data processing tasks are divided into first-level tasks and second-level tasks. The first-level tasks include PWM waveform generation and grid-connected synchronization control, which are executed by the main control unit MCU first; the second-level tasks include harmonic analysis and temperature warning, which are executed by the parallel communication processing unit CSU.

[0024] As a preferred solution of the high-efficiency and energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the step of obtaining the system operating parameters in the second buffer and performing distributed parallel data processing includes:

[0025] When the task allocation flag F1 = 1, the main control unit MCU executes the first-level task and reads the AC side voltage and AC side current in the double buffer;

[0026] Obtain power factor, harmonic distortion rate, IGBT junction temperature, and AC side voltage deviation, and perform linear normalization processing on each;

[0027] Adjust the PWM carrier frequency, define four feedforward gain coefficients k1, k2, k3 and k4, and obtain the reference PWM carrier frequency f c0 , calculate the adjusted PWM carrier frequency, the formula is:

[0028] f c,ff (h) = f c0 (1+k1N PF -k2N THD -k3N T +k4N V )

[0029] Where, f c,ff (k) is the PWM carrier frequency after sampling time h, k1, k2, k3 and k4 are feedforward gain coefficients, N PFis the normalized power factor, N THD is the normalized harmonic distortion rate, N T is the normalized IGBT junction temperature, N V is the normalized AC side voltage deviation;

[0030] The communication processing unit CSU performs the second-level task, performs harmonic analysis on the AC side current, obtains the harmonic distortion rate, and transmits the obtained harmonic distortion rate to the main control unit MCU;

[0031] The IGBT junction temperature T j Matching with the preset temperature curve, the measured junction temperature is compared with the three-level temperature threshold to determine the temperature warning level;

[0032] When F1=0, the main control unit MCU and the communication processing unit CSU are kept executing tasks according to the default priority.

[0033] As a preferred solution of the high-efficiency and energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the step of determining the temperature warning level includes:

[0034] When the IGBT junction temperature T j ≤First temperature threshold T L1 When , the current temperature is normal;

[0035] When the first temperature threshold T L1 <IGBT junction temperature T j ≤Second temperature threshold T L2 When the temperature reaches level 1, the current temperature warning level will be set to level 1 warning state;

[0036] When the second temperature threshold T L2 <IGBT junction temperature T j ≤ the third temperature threshold T L3 When the temperature reaches level 2, the current temperature warning level will be set to level 2 warning state;

[0037] When the third temperature threshold T L3 <IGBT junction temperature T j When the temperature reaches the third level, the warning level will be changed to the third level.

[0038] As a preferred solution of the high-efficiency and energy-saving inverter control method based on a distributed data processing architecture described in the present invention, the method of generating optimized control instructions using the distributed parallel data processing results includes:

[0039] The dead-zone compensation time is adjusted by the harmonic distortion (THD). An FFT is performed on the AC current every PWM cycle or a fixed time window to calculate the current total harmonic distortion (THD). The measured THD is subtracted from the target THD to obtain the error. The dead-zone compensation time is adjusted by selecting a preset compensation increment based on the error.

[0040] Adjust the inverter output power according to the temperature warning level: when the temperature warning level is level 1, the inverter output power is reduced to 90% of the rated value; when the temperature warning level is level 2, the inverter output power is reduced to 70% of the rated value; when the temperature warning level is level 3, the inverter protection is triggered and the inverter is shut down;

[0041] The obtained adjusted PWM carrier frequency, dead zone compensation time and inverter power output power are encapsulated into control instructions and sent to the power control module through the DMA channel for optimized control of the inverter.

[0042] In a second aspect, the present invention provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: when the processor executes the computer program, it implements the steps of a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture.

[0043] In a third aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program is executed by a processor, the steps of a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture are implemented.

[0044] The present invention has the following beneficial effects: By introducing a mechanism to monitor the real-time load rate of the communication processing unit (CSU), the system can dynamically prioritize tasks based on resource usage, ensuring the timely execution of critical control tasks and rationally allocating auxiliary analysis tasks when sufficient processing resources are available. The distributed parallel data processing architecture based on the main control unit and the communication processing unit not only shortens the data processing cycle and improves overall response speed, but also reduces the load on a single processor. This architecture achieves dual optimization of control efficiency and energy consumption while ensuring inverter control accuracy, thus possessing significant practical value and promising prospects for promotion. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1The flowchart of a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture is shown. DETAILED DESCRIPTION

[0047] To make the above-mentioned objects, features, and advantages of the present invention more easily understood, the following detailed description of the specific embodiments of the present invention is given in conjunction with the accompanying drawings. It is obvious that the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in this field without creative work should fall within the scope of protection of the present invention.

[0048] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0049] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it constitute a separate or selective embodiment that is mutually exclusive with other embodiments.

[0050] Reference Figure 1 , which is the first embodiment of the present invention, provides a high-efficiency energy-saving inverter control method based on a distributed data processing architecture, comprising:

[0051] S1: synchronously collecting system operating parameters of the inverter within a preset sampling period, and storing the system operating parameters in a double buffer; the double buffer includes a first buffer and a second buffer, the first buffer is used for data writing, and the second buffer is used for data reading;

[0052] Specifically, the inverter includes a main control unit MCU, a communication processing unit CSU, a data acquisition module, and a distributed task allocation module; the main control unit MCU includes a first processor and a power control module; the communication processing unit CSU includes a second processor; the data acquisition module is used to collect system operating parameters of the inverter and input them into the double buffer in the communication processing unit CSU, and is connected to the main control unit MCU and the communication processing unit CSU; the distributed task allocation module is used to monitor the real-time workload of the communication processing unit CSU and perform distributed task allocation;

[0053] Within the preset sampling period (50μs), the AC side voltage V is synchronously acquired through the data acquisition module. ac , AC side current I ac、IGBT junction temperature T j and grid frequency f g The above four data are written into double buffers respectively. The first buffer (write buffer) is used to continuously receive new collected data; the second buffer (read buffer) is read by subsequent processing units to ensure that data processing and collection do not interfere with each other.

[0054] S2: Calculate the real-time load rate of the communication processing unit (CSU) within a set time, trigger the task allocation flag to be set, divide the data processing tasks according to the task allocation flag status, obtain the system operating parameters in the second buffer, and perform distributed parallel data processing;

[0055] Specifically, let the current time window length be T w (e.g. 100ms), the communication processing unit CSU has N types of tasks of type i that need to be processed within this time window, and the cumulative processing time of each type of task within the window is t i , the corresponding priority weight is w i ,and

[0056] In each T w At the end of the window, the processing time t of each category of tasks is counted i , calculate the weighted cumulative processing time, the formula is:

[0057]

[0058] Where, is the weighted cumulative processing time, N is the total number of task categories, t i is the cumulative processing time of the i-th task in the window, w i is the priority weight of the i-th task, and

[0059] Introducing the exponential smoothing parameter α∈(0,1), the instantaneous load rate is calculated as follows:

[0060]

[0061] Where, L i is the instantaneous load rate of the i-th task, T w is the time window length;

[0062] Combine the instantaneous load rate calculated in this window with the last smoothing result to obtain the smoothed real-time load rate. The formula is:

[0063] L exp (k) = αL i (k)+(1-α)L exp (k-1)

[0064] In the formula, k represents the kth calculation, and initially L can be set to exp (0) = L i (0), T w is the time window length (e.g. 100ms), N is the total number of task categories (first level, second level or more subdivisions), t i is the cumulative processing time of the i-th task in the window, w i is the priority weight of the i-th task, α is the exponential smoothing coefficient (the recommended value is 0.6–0.8), L i (k) is the instantaneous load rate calculated k times, L exp (k) is the smoothed real-time load rate calculated for the kth time, which is used for subsequent task allocation decisions;

[0065] The smoothed real-time load rate is compared with the preset load threshold to decide whether to perform distributed task allocation.

[0066] When the smoothed real-time load rate is less than the preset load threshold, the task allocation flag F1 is set to 1, entering the low-load state, and distributed task allocation is performed, dividing the data processing tasks into: first-level tasks (executed by the main control unit MCU with priority): PWM waveform generation, grid-connected synchronization control; second-level tasks (executed by the parallel communication processing unit CSU): harmonic analysis, temperature warning; otherwise, keep F1 = 0 and the system maintains the current priority.

[0067] When F1=1 (low load): the main control unit MCU performs the first-level task and reads the AC side voltage V in the double buffer. ac With the AC side current I ac , obtain power factor PF, harmonic distortion rate THD, IGBT junction temperature T j , AC side voltage deviation ΔV, respectively, is linearly normalized;

[0068] Adjust and define four feedforward gain coefficients k1, k2, k3 and k4 to obtain the reference PWM carrier frequency f c0 , calculate the adjusted PWM carrier frequency, the formula is:

[0069] f c,ff (h) = f c0 (1+k1N PF -k2N THD -k3N T +k4N V )

[0070] Where, f c,ff (k) is the PWM carrier frequency after sampling time h, k1, k2, k3 and k4 are feedforward gain coefficients, N PFN is the normalized power factor THD N is the normalized harmonic distortion rate T N is the normalized IGBT junction temperature V N is the normalized AC side voltage deviation.

[0071] The communication processing unit CSU performs second-level tasks on the AC side current I ac The harmonic distortion rate THD is obtained by performing harmonic analysis, and the obtained harmonic distortion rate is transmitted to the main control unit MCU;

[0072] The IGBT junction temperature T j is matched with the preset temperature curve, and interval judgment is performed on the measured junction temperature and the third temperature threshold to determine the temperature warning level;

[0073] According to the Safe Operating Area (SOA) data provided by the IGBT chip manufacturer and the accelerated life test results, the temperature threshold is obtained to divide different warning levels:

[0074] When the IGBT junction temperature T j ≤ the first temperature threshold T L1 , the current temperature is in a normal state;

[0075] When the first temperature threshold T L1 < IGBT junction temperature T j ≤ the second temperature threshold T L2 , the current temperature warning level is in a first warning state;

[0076] When the second temperature threshold T L2 < IGBT junction temperature T j ≤ the third temperature threshold T L3 , the current temperature warning level is in a second warning state;

[0077] When the third temperature threshold T L3 < IGBT junction temperature T j , the current temperature warning level is in a third warning state;

[0078] When F1=0 (high load), the main control unit MCU and the communication processing unit CSU respectively perform first-level and second-level tasks according to default priorities to avoid overload.

[0079] S3: Use the distributed parallel data processing result to generate an optimized control instruction, which is sent to the power control module through a DMA channel for inverter optimization control.

[0080] Specifically, the dead-time compensation time t d: Every PWM cycle or fixed time window, perform FFT on the AC side current to calculate the current total harmonic distortion (THD). Subtract the measured THD from the target THD to obtain the error. Based on the error, select the preset compensation increment to adjust the dead-band compensation time.

[0081] Adjust the inverter output power according to the temperature warning level: when the temperature warning level is level 1, the inverter output power is reduced to 90% of the rated value; when the temperature warning level is level 2, the inverter output power is reduced to 70% of the rated value; when the temperature warning level is level 3, the inverter protection is triggered and the inverter is shut down.

[0082] The obtained adjusted PWM carrier frequency, dead zone compensation time and inverter power output power are encapsulated into control instructions and sent to the power control module through the DMA channel for optimized control of the inverter.

[0083] This embodiment also provides a computer device, which is suitable for a high-efficiency and energy-saving inverter control method based on a distributed data processing architecture, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute computer-executable instructions to implement all or part of the steps of the method described in the embodiment of the present invention proposed in the above embodiment.

[0084] This embodiment further provides a storage medium having a computer program stored thereon, which, when executed by a processor, performs the method of any optional implementation of the above embodiment. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0085] The storage medium proposed in this embodiment and the data storage method proposed in the above embodiment belong to the same inventive concept. Technical details not fully described in this embodiment can be found in the above embodiment, and this embodiment has the same beneficial effects as the above embodiment.

[0086] To sum up, by introducing the monitoring mechanism of the real-time load rate of the communication processing unit CSU, the system can dynamically divide the task priority according to the resource occupation, ensure the timely execution of the key control task, and reasonably allocate the auxiliary analysis task when the processing resource is sufficient. Based on the distributed parallel data processing architecture of the main control unit and the communication processing unit, the data processing period is shortened, the overall response speed is improved, the single processor load is reduced, the control accuracy of the inverter is ensured, the control efficiency and energy consumption are optimized, and the application value and popularization prospect are significant. It should be noted that the above examples are used to illustrate the technical solutions of the present application, but not limited. Although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, which should be covered in the scope of the claims of the present application.

Claims

1. A high-efficiency and energy-saving inverter control method based on a distributed data processing architecture, characterized by: include, Synchronously collecting system operating parameters of the inverter within a preset sampling period and storing the system operating parameters in a double buffer; the double buffer includes a first buffer and a second buffer, the first buffer is used for data writing, and the second buffer is used for data reading; Calculate the real-time load rate of the communication processing unit CSU within the set time, trigger the task allocation flag to be set, divide the data processing tasks according to the task allocation flag status, obtain the system operation parameters in the second buffer for distributed parallel data processing; The distributed parallel data processing results are used to generate optimized control instructions, which are sent to the power control module through the DMA channel for optimized control of the inverter.

2. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 1, characterized in that: The system operating parameters include AC side voltage, AC side current, IGBT junction temperature and grid frequency.

3. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 2, characterized in that: The calculation of the real-time load rate of the communication processing unit CSU within the set time includes: At the end of each time window, the processing time t of each category of tasks is counted i , calculate the weighted cumulative processing time, the formula is: Where, is the weighted cumulative processing time, N is the total number of task categories, t i is the cumulative processing time of the i-th task in the window, w i is the priority weight of the i-th task, and The instantaneous load rate is calculated using the formula: Where, L i is the instantaneous load rate of the i-th task, T w is the time window length; Introducing the exponential smoothing parameter α∈(0,1), the instantaneous load rate calculated in this window is combined with the last smoothing result to obtain the smoothed real-time load rate. The formula is: L exp (k)=αL i (k)+(1-α)L exp (k-1) Where, k represents the kth calculation, L i (k) is the instantaneous load rate calculated k times, L exp (k) is the smoothed real-time load rate calculated for the kth time; The smoothed real-time load rate is compared with the preset load threshold to decide whether to perform distributed task allocation.

4. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 3, characterized in that: The data processing task division according to the task allocation flag status includes: When the smoothed real-time load rate is less than the preset load threshold, the task allocation flag F1 is set to 1, entering the low-load state and performing distributed task allocation; otherwise, F1 is kept at 0 and the system maintains the current priority. Under low load conditions, data processing tasks are divided into first-level tasks and second-level tasks. The first-level tasks include PWM waveform generation and grid-connected synchronization control, which are executed by the main control unit MCU first; the second-level tasks include harmonic analysis and temperature warning, which are executed by the parallel communication processing unit CSU.

5. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 4, characterized in that: The obtaining of the system operating parameters in the second buffer for distributed parallel data processing includes: When the task allocation flag F1 = 1, the main control unit MCU executes the first-level task and reads the AC side voltage and AC side current in the double buffer; Obtain power factor, harmonic distortion rate, IGBT junction temperature, and AC side voltage deviation, and perform linear normalization processing on each; Adjust the PWM carrier frequency, define four feedforward gain coefficients k1, k2, k3 and k4, and obtain the reference PWM carrier frequency f c0 , calculate the adjusted PWM carrier frequency, the formula is: f c,ff (h)=f c0 (1+k1N PF -k2N THD -k3N T +k4N V ) Where, f c,ff (k) is the PWM carrier frequency after sampling time h, k1, k2, k3 and k4 are feedforward gain coefficients, N PF is the normalized power factor, N THD is the normalized harmonic distortion rate, N T is the normalized IGBT junction temperature, N V is the normalized AC side voltage deviation; The communication processing unit CSU performs the second-level task, performs harmonic analysis on the AC side current, obtains the harmonic distortion rate, and transmits the obtained harmonic distortion rate to the main control unit MCU; The IGBT junction temperature T j Matching with the preset temperature curve, the measured junction temperature is compared with the three-level temperature threshold to determine the temperature warning level; When F1=0, the main control unit MCU and the communication processing unit CSU are kept executing tasks according to the default priority.

6. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 5, characterized in that: Determining the temperature warning level includes: When the IGBT junction temperature T j ≤First temperature threshold T L1 When , the current temperature is normal; When the first temperature threshold T L1 <IGBT junction temperature T j ≤Second temperature threshold T L2 When the temperature reaches level 1, the current temperature warning level will be set to level 1 warning state; When the second temperature threshold T L2 <IGBT junction temperature T j ≤ the third temperature threshold T L3 When the temperature reaches level 2, the current temperature warning level will be set to level 2 warning state; When the third temperature threshold T L3 <IGBT junction temperature T j When the temperature reaches the third level, the warning level will be changed to the third level.

7. The high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to claim 6, characterized in that: The generating of the optimization control instruction by using the distributed parallel data processing result includes: The dead-zone compensation time is adjusted by the harmonic distortion (THD). An FFT is performed on the AC current every PWM cycle or a fixed time window to calculate the current total harmonic distortion (THD). The measured THD is subtracted from the target THD to obtain the error. The dead-zone compensation time is adjusted by selecting a preset compensation increment based on the error. Adjust the inverter output power according to the temperature warning level: when the temperature warning level is level 1, the inverter output power is reduced to 90% of the rated value; when the temperature warning level is level 2, the inverter output power is reduced to 70% of the rated value; when the temperature warning level is level 3, the inverter protection is triggered and the inverter is shut down; The obtained adjusted PWM carrier frequency, dead zone compensation time and inverter power output power are encapsulated into control instructions and sent to the power control module through the DMA channel for optimized control of the inverter.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture according to any one of claims 1 to 7 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in any one of claims 1 to 7 are implemented.

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