Blind hole processing method of printed circuit board and printed circuit board

Abstract

The invention discloses a blind hole processing method of a printed circuit board and the printed circuit board. The blind hole processing method of the printed circuit board comprises the following steps: providing a core board and etching the surface of the core board to form a groove or providing a prepreg and carrying out through groove processing on the prepreg; the groove or the through groove is filled with anti-plating ink; laminating the core board or the prepreg with other boards to form a multi-layer board; opening holes in the positions, directly facing the grooves or the through grooves, of the multi-layer board so as to expose the anti-plating ink; and removing the exposed anti-plating ink, and electroplating the formed hole to obtain the conducting blind hole. According to the processing method, the problem that the concave-convex property of the electroplated hole wall is extremely poor due to the fact that the uneven upper copper layer reflects the laser to the hole wall is solved, the processing difficulty of the deep micro blind hole is reduced, and the reliability of the processed printed circuit board is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of preparing circuit board, and particularly relates to a blind hole processing method of printed circuit board and printed circuit board. BACKGROUND

[0002] In the manufacturing process of printed circuit board (PCB), blind hole processing is a key technology, especially in the production of high-density interconnection (HDI) circuit board. Blind holes are used to connect surface layers and internal layers without penetrating through the entire circuit board, thereby improving wiring density and design flexibility. However, when using RTF copper foil as the bottom copper, blind hole processing faces some special challenges. RTF copper foil is widely used for its excellent interlayer adhesion and good electrical conductivity, but its high reflectivity becomes a significant problem in laser drilling blind holes. In the processing of deep micro-holes, a portion of the medium is first drilled away using a depth control drill, leaving a portion for laser drilling to ablate the medium. During laser processing, the high reflectivity of the RTF copper foil surface causes part of the laser energy to be reflected instead of being completely absorbed. Finally, the laser is reflected by the bottom copper to ablate the substrate on the hole wall, damaging the hole wall, resulting in a concave-convex degree of the hole wall after electroplating that does not meet the standard and poses a reliability risk. SUMMARY

[0003] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application proposes a blind hole processing method of printed circuit board, which solves the problem that the uneven upper copper layer reflects the laser to the hole wall, resulting in poor concave-convexity of the hole wall after electroplating, reduces the difficulty of deep micro-blind hole processing, and improves the reliability of the printed circuit board.

[0004] The present application further proposes a printed circuit board.

[0005] According to the blind hole processing method of printed circuit board of the first aspect of the present application, a core plate is provided and its surface is etched to form a groove, or a prepreg is provided and a through groove is formed therein; anti-plating ink is filled in the groove or the through groove; the core plate or the prepreg is laminated with other plate materials to form a multi-layer plate; the position of the multi-layer plate opposite to the groove or the through groove is drilled to expose the anti-plating ink; the exposed anti-plating ink is removed, and the drilled hole is electroplated to obtain a conductive blind hole.

[0006] The blind hole processing method of the printed circuit board according to the embodiment of the present application, by pre-embedding the anti-plating ink in the upper copper layer of the core board or the prepreg, exposing the anti-plating ink by drilling the position of the multi-layer board opposite to the anti-plating ink after the multi-layer board is formed by pressing, and then removing the anti-plating ink, the through blind hole is obtained. In this way, the problem that the uneven upper copper layer reflects the laser to the hole wall to cause the poor unevenness of the hole wall after electroplating is effectively solved, the difficulty of deep and micro blind hole processing is reduced, and the reliability of the processed printed circuit board is improved.

[0007] According to some embodiments of the present application, the etching of the surface of the core board to form the groove comprises: etching the surface of the core board to form a wiring pattern and a pad, and etching the groove in the pad; filling the anti-plating ink in the groove, and the thickness of the anti-plating ink is higher than the surface of the pad.

[0008] According to some embodiments of the present application, the height difference between the surface of the anti-plating ink and the surface of the pad is h, and the h satisfies the relationship: 30um>h>20um.

[0009] According to some embodiments of the present application, the pressing of the core board and other board materials to form a multi-layer board, and the drilling of the position of the multi-layer board opposite to the groove to expose the anti-plating ink comprises: sequentially pressing the core board, the prepreg, and the outer copper foil to form a multi-layer board; drilling the position of the multi-layer board opposite to the groove until the thickness of the anti-plating ink is reached.

[0010] According to some embodiments of the present application, the pressing of the core board and other board materials to form a multi-layer board, and the drilling of the position of the multi-layer board opposite to the groove to expose the anti-plating ink comprises: sequentially pressing the core board, the prepreg, and the outer copper foil to form a multi-layer board; drilling the position of the multi-layer board opposite to the groove until the thickness of the anti-plating ink is reached.

[0011] According to some embodiments of the present application, the removing of the exposed anti-plating ink, and the electroplating of the drilled hole to obtain a through blind hole comprises: washing and removing the anti-plating ink in the multi-layer board by using an alkaline solution; and copper plating the drilled hole of the multi-layer board to obtain a through blind hole.

[0012] According to some embodiments of the present application, the blind hole processing method of the printed circuit board further comprises: resin filling the through blind hole; copper electroplating the surface of the multi-layer board, and covering the through blind hole with copper; and etching the surface of the multi-layer board to form an outer wiring pattern and an outer pad.

[0013] According to some embodiments of the present application, the etching of the surface of the multilayer board to form the outer layer trace pattern and the outer layer pad comprises: etching the surface of the multilayer board except the area covering the through-hole to form the outer layer trace pattern and the outer layer pad; and the blind hole processing method of the printed circuit board further comprises: resist processing of the surface of the multilayer board to form a resist layer on the surface of the multilayer board.

[0014] According to some embodiments of the present application, the core board comprises at least one sub-core board, and the sub-core board comprises: an insulating substrate and an inner layer copper foil, wherein the inner layer copper foil is an RTF copper foil.

[0015] The printed circuit board according to the second embodiment of the present application is processed by the blind hole processing method of the printed circuit board.

[0016] Additional aspects and advantages of the present application will be made apparent by the following description and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0017] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the following description, taken in conjunction with the accompanying drawings, in which: Figure 1 is a processing schematic diagram of etching the surface of the core board in the blind hole processing method of the printed circuit board according to the first embodiment of the present application; Figure 2 is a processing schematic diagram of filling the groove of the core board with resist ink in the blind hole processing method of the printed circuit board according to the first embodiment of the present application; Figure 3 is a processing schematic diagram of pressing the core board and other board materials to form a multilayer board in the blind hole processing method of the printed circuit board according to the first embodiment of the present application; Figure 4 is a processing schematic diagram of drilling the multilayer board to expose the resist ink in the blind hole processing method of the printed circuit board according to the first embodiment of the present application; Figure 5 is a processing schematic diagram of removing the resist ink from the multilayer board in the blind hole processing method of the printed circuit board according to the first embodiment of the present application; Figure 6 is a processing schematic diagram of slotting the prepreg in the blind hole processing method of the printed circuit board according to the second embodiment of the present application; Figure 7 is a processing schematic diagram of filling the slot of the prepreg with resist ink in the blind hole processing method of the printed circuit board according to the second embodiment of the present application; Figure 8Fig. 2 is a schematic diagram of a process of pressing a prepreg and other boards to form a multi-layer board in a blind hole processing method of a printed circuit board according to the second embodiment of the present application; Figure 9 Fig. 3 is a schematic diagram of a process of etching a multi-layer board to expose resist ink in a blind hole processing method of a printed circuit board according to the second embodiment of the present application; Figure 10 Fig. 4 is a schematic diagram of a process of removing resist ink from a multi-layer board in a blind hole processing method of a printed circuit board according to the second embodiment of the present application; Figure 11 Fig. 5 is a schematic diagram of a process of electroplating a drilled hole to form a through blind hole in a blind hole processing method of a printed circuit board according to the embodiment of the present application; Figure 12 Fig. 6 is a schematic diagram of a process of filling resin into a through blind hole in a blind hole processing method of a printed circuit board according to the embodiment of the present application; Figure 13 Fig. 7 is a schematic diagram of a process of electroplating a surface of a multi-layer board to form an outer layer of copper in a blind hole processing method of a printed circuit board according to the embodiment of the present application; Figure 14 Fig. 8 is a schematic diagram of a process of etching a surface of a multi-layer board to form an outer layer of traces and pads in a blind hole processing method of a printed circuit board according to the embodiment of the present application; Figure 15 Fig. 9 is a schematic diagram of a process of solder resist processing a surface of a multi-layer board in a blind hole processing method of a printed circuit board according to the embodiment of the present application; Figure 16 Fig. 10 is a schematic diagram of a process of etching a surface of a core board to form a trace pattern and pads from a top angle in a blind hole processing method of a printed circuit board according to the first embodiment of the present application.

[0018] Reference Signs: 1, core board; 101, upper copper layer; 102, insulating board; 103, lower copper layer; 2, prepreg; 3, groove; 4, through groove; 5, resist ink; 6, multi-layer board; 7, through blind hole; 8, outer layer of copper foil; 9, pad; 10, resin; 11, outer layer of pad; 12, solder resist layer. DETAILED DESCRIPTION

[0019] Embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0020] The embodiments of the present application are described below with reference to the accompanying drawings. Figures 1-16 A blind hole processing method of a printed circuit board according to the embodiments of the present application is described below.

[0021] In existing blind hole processing methods, pads are usually set at preset positions on the core board, and other boards are laminated on top of the core board. First, a controlled depth drill is used to drill holes in the other core boards on top of the core board, leaving a portion of the medium. Then, a laser drill is used to burn off the reserved medium until the pads on the core board are exposed. Finally, electroplating is performed to obtain the processed blind hole.

[0022] Because the surface of the copper layer on the core board is uneven, when the medium is burned off by laser drilling, the uneven copper layer will reflect the laser onto the hole wall and burn off the medium on the hole wall, resulting in extremely poor unevenness of the hole wall after electroplating, which leads to the risk of reliability of the processed printed circuit board.

[0023] To address reliability risks in printed circuit boards (PCBs), this invention proposes a method for processing blind vias on PCBs. This method includes the following steps: providing a core board and etching its surface to form grooves, or providing a prepreg and creating through-grooves; filling the grooves or through-grooves with resist ink; laminating the core board or prepreg with other substrates to form a multilayer board; opening holes in the multilayer board opposite the grooves or through-grooves to expose the resist ink; removing the exposed resist ink and electroplating the opened holes to obtain conductive blind vias.

[0024] Specifically, the present invention provides two implementation methods for processing blind vias on printed circuit boards.

[0025] Taking the fabrication of blind vias in a multilayer board as an example, the basic process flow is as follows: First, a core board is provided, and its surface is etched to form grooves. The core board is a double-sided copper-clad insulating board, such as... Figure 1 As shown, the core board consists of an upper copper layer, an insulating plate, and a lower copper layer, wherein the upper copper layer has an uneven shape. Etching is performed at predetermined positions on the upper copper layer of the core board to remove the copper plating, thereby forming grooves in the upper copper layer of the core board. It is important to note that these grooves form the basis for the conductive blind vias formed in subsequent processes; that is, the cross-section of the groove is the same as the cross-section of the designed conductive blind via.

[0026] Secondly, such as Figure 2 As shown, the grooves are filled with resist ink. For example, the resist ink is applied to the grooves using a screen printing method. Because the resist ink contains special resins and additives, it provides the required easy-peel properties, facilitating removal of the resist ink in subsequent processes.

[0027] Then, as Figure 3 and Figure 4As shown, the core board is laminated with other boards to form a multi-layer board, and the position of the multi-layer board opposite the groove is drilled to expose the plating-resistant ink. Specifically, the upper copper layer of the core board is laminated with other boards to form a multi-layer board, and then the other boards on the upper layer of the core board are drilled using a depth control drill, so that the depth control depth reaches or drills into the plating-resistant ink, but does not drill through the plating-resistant ink. As shown Figure 5 As shown, the exposed plating-resistant ink is removed, and the drilled hole is electroplated to obtain a through blind hole.

[0028] For the above-mentioned first embodiment of the present application, by pre-embedding the plating-resistant ink in the groove of the core board, after the core board is laminated with other boards to form a multi-layer board, the position of the multi-layer board opposite the pre-embedded plating-resistant ink is drilled to expose the plating-resistant ink, and then the plating-resistant ink is removed, thereby obtaining a blind hole. In this way, first, the use of a depth control drill drills into the plating-resistant ink, eliminating the processing procedure of a laser drill, and the drilling depth can be controlled to ensure the accuracy of the processing of deep micro-holes and avoid the problem that the use of a laser drill only ablates the medium and cannot control the depth. Second, by filling the plating-resistant ink in the groove of the core board, when drilling the multi-layer board, the drill bit only contacts the plating-resistant ink and does not contact the upper copper layer at the bottom of the plating-resistant ink. In this way, even when a laser drill is used for drilling, the uneven upper copper layer is always protected by the plating-resistant ink and cannot reflect the laser to the hole wall, ensuring that the hole wall is relatively smooth and improving the reliability of the processed printed circuit board.

[0029] The second embodiment of the present application also takes the manufacture of a blind hole of a certain multi-layer board as an example, and the basic process flow is as follows: First, as shown Figure 6 A prepreg is provided and a through groove is formed therein. For example, a drill bit is used to drill through the predetermined position of the prepreg to form a through groove. It should be noted that the through groove is the basis for forming a through blind hole in the subsequent process, that is, the cross section of the through groove is the same as the cross section of the designed through blind hole.

[0030] Second, as shown Figure 7 The plating-resistant ink is filled in the through groove. For example, the plating-resistant ink is applied to the groove by a silk screen printing method. Since the plating-resistant ink can provide the required easy-to-peel property, it is convenient to remove the plating-resistant ink in the subsequent process.

[0031] Then, as shown Figure 8 and Figure 9As shown, the prepreg is laminated with other board materials to form a multi-layer board, and the position of the multi-layer board facing the through slot is drilled to expose the anti-plating ink. As is known, the prepreg is used as an adhesive in the manufacture of printed circuit boards to laminate different copper-clad board materials together. Through a heating and pressing process, the resin in the prepreg flows and eventually solidifies, achieving a firm bond between the layers. Specifically, the prepreg is laminated with copper-clad board materials on both sides, and the surface of the upper copper layer of the copper-clad board material laminated with the bottom of the prepreg presents a rough shape. After the prepreg is laminated with the corresponding copper-clad board materials to form a multi-layer board, the position of the multi-layer board facing the through slot is drilled to expose the anti-plating ink, as shown in Figure 10 The exposed anti-plating ink is removed, and the drilled hole is electroplated to obtain a through blind hole. It should be noted that, for the second embodiment of the present application, the core board does not pre-embed the anti-plating ink, and is not the same core board as in the first embodiment.

[0032] For the above-mentioned second embodiment of the present application, by pre-embedding the anti-plating ink in the through slot of the prepreg, after the prepreg is laminated with other board materials to form a multi-layer board, the position of the multi-layer board facing the anti-plating ink is drilled until the anti-plating ink is exposed, and then the anti-plating ink is removed, thereby obtaining a blind hole. In this way, the rough upper copper layer is protected by the anti-plating ink, ensuring that the hole wall will not be damaged, and improving the reliability of the processed printed circuit board. At the same time, the processing procedure of laser drilling is saved, and the cost is saved. In addition, the surface of the upper copper layer is rough after the anti-plating ink is removed, increasing the actual surface area of the upper copper layer, which helps to enhance the mechanical bonding force between the subsequent electroplated layer and the upper copper layer, making the metal deposition more firm. Moreover, during the electroplating process, the rough surface can help guide the electroplating solution to better cover the entire area, including those hard-to-reach corners and gaps, thereby ensuring that the thickness of the electroplated layer is more uniform.

[0033] Thus, by pre-embedding the anti-plating ink in the core board or the prepreg, exposing the anti-plating ink by drilling the position of the multi-layer board facing the anti-plating ink after laminating to form a multi-layer board, and then removing the anti-plating ink, a through blind hole is obtained. The blind hole processing method of the printed circuit board of the embodiment of the present application effectively reduces the difficulty of processing deep and micro blind holes, and improves the reliability of the processed printed circuit board.

[0034] Further, the surface of the core board is etched to form a groove, including: etching the surface of the core board to form a wiring pattern and a pad, and etching the groove in the pad; filling the anti-plating ink in the groove, and the thickness of the anti-plating ink is higher than the surface of the pad.

[0035] As shown in Figure 1 and Figure 16As shown, the upper copper layer of the core plate is etched to form a wiring pattern and a pad, and a certain range of the pad is etched to form a groove, the anti-plating ink is filled in the groove formed by the pad, and the thickness (i.e. height) of the anti-plating ink is higher than the surface of the pad. In this way, after the core plate and other plates are pressed to form a multi-layer plate, during the process of drilling the position of the multi-layer plate opposite to the groove, since the thickness of the anti-plating ink is higher than the surface of the pad, the drill stops when the anti-plating ink is exposed, and does not contact the pad, thereby solving the problem that the uneven upper copper layer reflects laser to the hole wall, resulting in poor unevenness of the hole wall after electroplating. If the thickness of the anti-plating ink is lower than the surface of the pad, the drill needs to drill into the groove formed by the pad to expose the anti-plating ink, which is easy to damage the pad.

[0036] Further, the height difference between the surface of the anti-plating ink and the surface of the pad is h, and h satisfies the relationship: 30um > h > 20um. In this way, the thickness of the anti-plating ink higher than the surface of the pad is in the size range of 20um to 30um, which ensures that the anti-plating ink is not drilled through during the drilling process, and the drill stops when the anti-plating ink above the pad is drilled, thereby avoiding drilling through the anti-plating ink to damage the pad, and providing good buffering effect. In addition, it is helpful to obtain clear and accurate boundaries after subsequent removal of the anti-plating ink, and reduce edge blur phenomenon.

[0037] Further, the core plate and other plates are pressed to form a multi-layer plate, and the position of the multi-layer plate opposite to the groove is drilled to expose the anti-plating ink, including: the core plate, the prepreg and the outer copper foil are sequentially laminated to form a multi-layer plate; the position of the multi-layer plate opposite to the groove is drilled until the thickness of the anti-plating ink is drilled.

[0038] For the first embodiment of the present application, as shown in Figure 3 The upper copper layer of the core plate is laminated with the prepreg and the outer copper foil to form a multi-layer plate, and the position of the multi-layer plate opposite to the groove is drilled to expose the anti-plating ink. In the first embodiment of the present application, the prepreg does not pre-embed the anti-plating ink, and is not the same as the prepreg of the second embodiment.

[0039] Further, the core plate and other plates are pressed to form a multi-layer plate, and the position of the multi-layer plate opposite to the groove is drilled to expose the anti-plating ink, including: the core plate, the prepreg and the outer copper foil are sequentially laminated to form a multi-layer plate; the position of the multi-layer plate opposite to the groove is drilled until the thickness of the anti-plating ink is drilled.

[0040] For the first embodiment of the present application, as shown in Figure 8As shown, the two sides of the prepreg are laminated with the core board and the outer copper foil to form a multilayer board, and the position of the multilayer board opposite the through slot is etched to open a window, that is, the position of the outer copper foil opposite the through slot is etched until the resist plating ink is exposed, and then the resist plating ink is removed to form a through blind hole. Such a processing method saves the drilling processing step, which not only saves time but also reduces the demand for equipment and tools and reduces production costs. At the same time, the clamping, positioning and tool changing operations in the drilling process are saved, which can speed up the entire production line, especially for large-scale production scenarios. Therefore, the blind hole processing method of the present application realizes very small blind holes without the need for physical drilling, which is beneficial to the design and manufacture of high-density interconnection (HDI) boards.

[0041] Further, the exposed resist plating ink is removed, and the opened hole is electroplated to obtain a through blind hole, including: using an alkaline solution to wash and remove the resist plating ink in the multilayer board; and copper plating the drilled hole to obtain a through blind hole.

[0042] As shown in Figure 11 The resist plating ink is made of a resin sensitive to alkaline, and the alkaline solution can quickly and effectively dissolve the ink, ensuring that even complex designs and small areas can be thoroughly cleaned. Compared with some organic solvents or other methods, the alkaline solution can complete the ink removal process in a relatively short time, speeding up the entire manufacturing process. Under proper alkaline concentration and temperature control, the alkaline solution does not damage most commonly used PCB substrates, including glass fiber reinforced epoxy resin (FR-4), thereby maintaining the overall structural integrity and electrical performance of the circuit board, avoiding unnecessary corrosion of the copper surface, and ensuring the quality of subsequent processes. Moreover, after removing the resist plating ink, copper plating is performed to obtain a through blind hole, achieving electrical connectivity.

[0043] Further, the blind hole processing method of the printed circuit board further includes: resin filling the through blind hole; covering copper plating on the surface of the multilayer board, and copper plating covering the through blind hole; and etching the surface of the multilayer board to form outer layer trace patterns and outer layer pads.

[0044] As shown in Figures 12-14 After the through blind hole is obtained, resin is inserted into the through blind hole, and then the multilayer board is covered with copper plating, and the through blind hole area is simultaneously covered with copper plating to form a new copper layer. Etching is performed on the new copper layer to form outer layer trace patterns and outer layer pads. The outer layer pads formed on the surface of the multilayer board are electrically connected to the pads of the core board through the through blind hole.

[0045] Furthermore, etching is performed on the surface of the multilayer board to form outer layer trace patterns and outer layer pads, including etching the multilayer board except for the area covering the via blind holes to form outer layer trace patterns and outer layer pads.

[0046] Furthermore, the blind via processing method for printed circuit boards also includes: performing solder mask processing on the surface of a multilayer board with outer layer trace patterns and outer layer pads to form a solder mask layer on the surface of the multilayer board.

[0047] like Figure 15 As shown, the solder mask covers all areas of the multilayer board except for outer layer pads, outer layer patterns, test points, and other parts that need to be soldered or contacted. This effectively prevents bridging that may occur during soldering and avoids short circuits caused by unnecessary metal-to-metal contact. At the same time, the solder mask provides a physical barrier, protecting the circuit from external environmental factors such as moisture, dust, chemicals, and mechanical damage, extending the lifespan of the circuit board. Furthermore, the solder mask enhances the overall durability and stability of the circuit board.

[0048] Furthermore, the core board includes at least one sub-core board, which includes an insulating substrate and an inner copper foil, wherein the inner copper foil is RTF copper foil. Of course, the inner copper foil can also be other copper foil substrates with uneven surfaces.

[0049] According to a second aspect embodiment of the present invention, a blind via fabrication method is used for the printed circuit board.

[0050] The printed circuit board of this invention achieves blind via processing using one of two methods. The first method involves etching a portion of the copper layer on the core board, then inserting resist ink, and laminating it with a prepreg and outer copper foil to form a multilayer board. The area opposite the resist ink on the multilayer board is then drilled with controlled-depth drilling until the resist ink is exposed. The ink is then removed, and copper plating is performed to obtain the desired high-quality blind vias. The second method involves not etching the core board, but inserting resist ink into a through-groove on the prepreg, and then laminating it with the core board and outer copper foil to form a multilayer board. The multilayer board is etched to remove the outer copper layer, and the ink is then removed. Copper plating is performed to obtain the desired high-quality blind vias.

[0051] The two methods described above can improve the wall quality of blind holes caused by laser reflection from RTF copper foil in deep micro-hole processing, reduce the difficulty of deep micro-blind hole processing, and enable the prepared printed circuit boards to meet the requirements of high-frequency and high-speed products.

[0052] In the description of the application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0053] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "illustrative embodiment", "example", "specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0054] Although embodiments of the present application have been shown and described, those skilled in the art can understand that various changes, modifications, replacements and variations can be made to these embodiments without departing from the principles and spirit of the present application, and the scope of the present application is defined by the claims and their equivalents.

Claims

1. A method for processing blind vias on a printed circuit board, characterized in that, include: Provide a core board and etch its surface to form grooves, or provide a half-cured sheet and slot it through; The groove or the through slot is filled with anti-plating ink; The core board or the prepreg is pressed together with other boards to form a multilayer board; The multilayer board is made with a hole in the position opposite the groove or the through slot to expose the anti-plating ink; The exposed anti-plating ink is removed, and the holes are electroplated to obtain conductive blind holes.

2. The method for processing blind vias on a printed circuit board according to claim 1, characterized in that, The etching of the core board surface to form grooves includes: The core board surface is etched to form trace patterns and pads, and the grooves are etched in the pads. The groove is filled with the anti-plating ink, and the thickness of the anti-plating ink is higher than the surface of the pad.

3. The method for processing blind vias on a printed circuit board according to claim 2, characterized in that, The height difference between the surface of the anti-plating ink and the surface of the pad is h, and h satisfies the relationship: 30um > h > 20um.

4. The method for processing blind vias on a printed circuit board according to claim 2, characterized in that, The step of pressing the core board with other boards to form a multilayer board, and then drilling holes in the multilayer board at the position opposite the groove to expose the anti-plating ink, includes: The core board, prepreg, and outer copper foil are sequentially stacked to form a multilayer board; Drill holes in the multilayer board at the position opposite the groove until the holes penetrate the thickness range of the anti-plating ink.

5. The method for processing blind vias on a printed circuit board according to claim 1, characterized in that, The step of pressing the prepreg with other substrates to form a multilayer board, and then drilling holes in the multilayer board facing the through groove to expose the anti-plating ink, includes: The prepreg is pressed onto the core board and the outer copper foil on both sides of its thickness to form a multilayer board; The multilayer board is etched to create a window at the position opposite the through slot until the anti-plating ink is exposed.

6. The method for processing blind vias on a printed circuit board according to claim 1, characterized in that, The process of removing the exposed anti-plating ink and electroplating the opened holes to obtain conductive blind vias includes: The anti-plating ink in the multilayer board is removed by washing with an alkaline solution; The holes in the multilayer board are electroplated with copper to create the through blind vias.

7. The method for processing blind vias on a printed circuit board according to claim 1, characterized in that, Also includes: The through-hole is filled with resin; The surface of the multilayer board is coated with copper electroplating, and the through blind holes are covered with copper plating. The surface of the multilayer board is etched to form outer layer trace patterns and outer layer pads.

8. The method for processing blind vias on a printed circuit board according to claim 7, characterized in that, The etching of the multilayer board surface to form outer layer trace patterns and outer layer pads includes: etching the multilayer board except for the area covering the via blind holes to form outer layer trace patterns and outer layer pads; and further includes: The surface of the multilayer board is subjected to solder resist processing to form a solder resist layer on the surface of the multilayer board.

9. The method for processing blind vias on a printed circuit board according to claim 1, characterized in that, The core board includes at least one sub-core board, the sub-core board including: an insulating substrate and an inner copper foil, the inner copper foil being RTF copper foil.

10. A printed circuit board, characterized in that, The blind via processing method for printed circuit boards as described in any one of claims 1-9 is adopted.

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